Merge tag 'uuid-for-4.14' of git://git.infradead.org/users/hch/uuid
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx6dl-gw54xx.dts
index be915412f852ea5af34121808ecc22b04c592b4e..b909bdf9a2efcc2c1e8ff89a0a57fc79638e1f14 100644 (file)
        model = "Gateworks Ventana i.MX6 DualLite/Solo GW54XX";
        compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl";
 };
+
+&i2c3 {
+       adv7180: camera@20 {
+               compatible = "adi,adv7180";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_adv7180>;
+               reg = <0x20>;
+               powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
+               interrupt-parent = <&gpio3>;
+               interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
+
+               port {
+                       adv7180_to_ipu1_csi1_mux: endpoint {
+                               remote-endpoint = <&ipu1_csi1_mux_from_parallel_sensor>;
+                               bus-width = <8>;
+                       };
+               };
+       };
+};
+
+&ipu1_csi1_from_ipu1_csi1_mux {
+       bus-width = <8>;
+};
+
+&ipu1_csi1_mux_from_parallel_sensor {
+       remote-endpoint = <&adv7180_to_ipu1_csi1_mux>;
+       bus-width = <8>;
+};
+
+&ipu1_csi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ipu1_csi1>;
+};
+
+&iomuxc {
+       pinctrl_adv7180: adv7180grp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_D30__GPIO3_IO30          0x0001b0b0
+                       MX6QDL_PAD_EIM_D31__GPIO3_IO31          0x4001b0b0
+               >;
+       };
+
+       pinctrl_ipu1_csi1: ipu1_csi1grp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_EB2__IPU1_CSI1_DATA19    0x1b0b0
+                       MX6QDL_PAD_EIM_D16__IPU1_CSI1_DATA18    0x1b0b0
+                       MX6QDL_PAD_EIM_D18__IPU1_CSI1_DATA17    0x1b0b0
+                       MX6QDL_PAD_EIM_D19__IPU1_CSI1_DATA16    0x1b0b0
+                       MX6QDL_PAD_EIM_D20__IPU1_CSI1_DATA15    0x1b0b0
+                       MX6QDL_PAD_EIM_D26__IPU1_CSI1_DATA14    0x1b0b0
+                       MX6QDL_PAD_EIM_D27__IPU1_CSI1_DATA13    0x1b0b0
+                       MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12    0x1b0b0
+                       MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC     0x1b0b0
+                       MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC     0x1b0b0
+                       MX6QDL_PAD_EIM_A16__IPU1_CSI1_PIXCLK    0x1b0b0
+               >;
+       };
+};