Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

[sfrench/cifs-2.6.git] / arch / arm / boot / dts / exynos4x12.dtsi

diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index b7490ea0c75cc536c89f5d8f014b6248d50ab0e6..c452499ae8c9a45a128e15dd80f9e29a439d3155 100644 (file)
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -281,6 +281,180 @@
                clocks = <&clock CLK_SMMU_LITE1>, <&clock CLK_FIMC_LITE1>;
                #iommu-cells = <0>;
        };
+
+       bus_dmc: bus_dmc {
+               compatible = "samsung,exynos-bus";
+               clocks = <&clock CLK_DIV_DMC>;
+               clock-names = "bus";
+               operating-points-v2 = <&bus_dmc_opp_table>;
+               status = "disabled";
+       };
+
+       bus_acp: bus_acp {
+               compatible = "samsung,exynos-bus";
+               clocks = <&clock CLK_DIV_ACP>;
+               clock-names = "bus";
+               operating-points-v2 = <&bus_acp_opp_table>;
+               status = "disabled";
+       };
+
+       bus_c2c: bus_c2c {
+               compatible = "samsung,exynos-bus";
+               clocks = <&clock CLK_DIV_C2C>;
+               clock-names = "bus";
+               operating-points-v2 = <&bus_dmc_opp_table>;
+               status = "disabled";
+       };
+
+       bus_dmc_opp_table: opp_table1 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp@100000000 {
+                       opp-hz = /bits/ 64 <100000000>;
+                       opp-microvolt = <900000>;
+               };
+               opp@134000000 {
+                       opp-hz = /bits/ 64 <134000000>;
+                       opp-microvolt = <900000>;
+               };
+               opp@160000000 {
+                       opp-hz = /bits/ 64 <160000000>;
+                       opp-microvolt = <900000>;
+               };
+               opp@267000000 {
+                       opp-hz = /bits/ 64 <267000000>;
+                       opp-microvolt = <950000>;
+               };
+               opp@400000000 {
+                       opp-hz = /bits/ 64 <400000000>;
+                       opp-microvolt = <1050000>;
+               };
+       };
+
+       bus_acp_opp_table: opp_table2 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp@100000000 {
+                       opp-hz = /bits/ 64 <100000000>;
+               };
+               opp@134000000 {
+                       opp-hz = /bits/ 64 <134000000>;
+               };
+               opp@160000000 {
+                       opp-hz = /bits/ 64 <160000000>;
+               };
+               opp@267000000 {
+                       opp-hz = /bits/ 64 <267000000>;
+               };
+       };
+
+       bus_leftbus: bus_leftbus {
+               compatible = "samsung,exynos-bus";
+               clocks = <&clock CLK_DIV_GDL>;
+               clock-names = "bus";
+               operating-points-v2 = <&bus_leftbus_opp_table>;
+               status = "disabled";
+       };
+
+       bus_rightbus: bus_rightbus {
+               compatible = "samsung,exynos-bus";
+               clocks = <&clock CLK_DIV_GDR>;
+               clock-names = "bus";
+               operating-points-v2 = <&bus_leftbus_opp_table>;
+               status = "disabled";
+       };
+
+       bus_display: bus_display {
+               compatible = "samsung,exynos-bus";
+               clocks = <&clock CLK_ACLK160>;
+               clock-names = "bus";
+               operating-points-v2 = <&bus_display_opp_table>;
+               status = "disabled";
+       };
+
+       bus_fsys: bus_fsys {
+               compatible = "samsung,exynos-bus";
+               clocks = <&clock CLK_ACLK133>;
+               clock-names = "bus";
+               operating-points-v2 = <&bus_fsys_opp_table>;
+               status = "disabled";
+       };
+
+       bus_peri: bus_peri {
+               compatible = "samsung,exynos-bus";
+               clocks = <&clock CLK_ACLK100>;
+               clock-names = "bus";
+               operating-points-v2 = <&bus_peri_opp_table>;
+               status = "disabled";
+       };
+
+       bus_mfc: bus_mfc {
+               compatible = "samsung,exynos-bus";
+               clocks = <&clock CLK_SCLK_MFC>;
+               clock-names = "bus";
+               operating-points-v2 = <&bus_leftbus_opp_table>;
+               status = "disabled";
+       };
+
+       bus_leftbus_opp_table: opp_table3 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp@100000000 {
+                       opp-hz = /bits/ 64 <100000000>;
+                       opp-microvolt = <900000>;
+               };
+               opp@134000000 {
+                       opp-hz = /bits/ 64 <134000000>;
+                       opp-microvolt = <925000>;
+               };
+               opp@160000000 {
+                       opp-hz = /bits/ 64 <160000000>;
+                       opp-microvolt = <950000>;
+               };
+               opp@200000000 {
+                       opp-hz = /bits/ 64 <200000000>;
+                       opp-microvolt = <1000000>;
+               };
+       };
+
+       bus_display_opp_table: opp_table4 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp@160000000 {
+                       opp-hz = /bits/ 64 <160000000>;
+               };
+               opp@200000000 {
+                       opp-hz = /bits/ 64 <200000000>;
+               };
+       };
+
+       bus_fsys_opp_table: opp_table5 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp@100000000 {
+                       opp-hz = /bits/ 64 <100000000>;
+               };
+               opp@134000000 {
+                       opp-hz = /bits/ 64 <134000000>;
+               };
+       };
+
+       bus_peri_opp_table: opp_table6 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp@50000000 {
+                       opp-hz = /bits/ 64 <50000000>;
+               };
+               opp@100000000 {
+                       opp-hz = /bits/ 64 <100000000>;
+               };
+       };
 };
 
 &combiner {