serial3 = &serial_3;
};
- clock_audss: clock-controller@03810000 {
+ clock_audss: clock-controller@3810000 {
compatible = "samsung,exynos4210-audss-clock";
reg = <0x03810000 0x0C>;
#clock-cells = <1>;
clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
};
- i2s0: i2s@03830000 {
+ i2s0: i2s@3830000 {
compatible = "samsung,s5pv210-i2s";
reg = <0x03830000 0x100>;
clocks = <&clock_audss EXYNOS_I2S_BUS>,