Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

[sfrench/cifs-2.6.git] / arch / arm / boot / dts / exynos3250.dtsi

diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 137f9015d4e87a89ed30732a70bd5bd5c134a6cf..62f3dcd9e046c3dc526d81a8bd70a575be99487f 100644 (file)
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -31,6 +31,7 @@
                pinctrl1 = &pinctrl_1;
                mshc0 = &mshc_0;
                mshc1 = &mshc_1;
+               mshc2 = &mshc_2;
                spi0 = &spi_0;
                spi1 = &spi_1;
                i2c0 = &i2c_0;
@@ -43,6 +44,7 @@
                i2c7 = &i2c_7;
                serial0 = &serial_0;
                serial1 = &serial_1;
+               serial2 = &serial_2;
        };
 
        cpus {
@@ -153,7 +155,7 @@
                        interrupt-parent = <&gic>;
                };
 
-               mipi_phy: video-phy@10020710 {
+               mipi_phy: video-phy {
                        compatible = "samsung,s5pv210-mipi-video-phy";
                        #phy-cells = <1>;
                        syscon = <&pmu_system_controller>;
@@ -357,6 +359,18 @@
                        status = "disabled";
                };
 
+               mshc_2: mshc@12530000 {
+                       compatible = "samsung,exynos5250-dw-mshc";
+                       reg = <0x12530000 0x1000>;
+                       interrupts = <0 144 0>;
+                       clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>;
+                       clock-names = "biu", "ciu";
+                       fifo-depth = <0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                exynos_usbphy: exynos-usbphy@125B0000 {
                        compatible = "samsung,exynos3250-usb2-phy";
                        reg = <0x125B0000 0x100>;
@@ -452,6 +466,17 @@
                        status = "disabled";
                };
 
+               serial_2: serial@13820000 {
+                       compatible = "samsung,exynos4210-uart";
+                       reg = <0x13820000 0x100>;
+                       interrupts = <0 111 0>;
+                       clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>;
+                       clock-names = "uart", "clk_uart_baud0";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&uart2_data>;
+                       status = "disabled";
+               };
+
                i2c_0: i2c@13860000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -688,6 +713,187 @@
                        clock-names = "ppmu";
                        status = "disabled";
                };
+
+               bus_dmc: bus_dmc {
+                       compatible = "samsung,exynos-bus";
+                       clocks = <&cmu_dmc CLK_DIV_DMC>;
+                       clock-names = "bus";
+                       operating-points-v2 = <&bus_dmc_opp_table>;
+                       status = "disabled";
+               };
+
+               bus_dmc_opp_table: opp_table1 {
+                       compatible = "operating-points-v2";
+                       opp-shared;
+
+                       opp@50000000 {
+                               opp-hz = /bits/ 64 <50000000>;
+                               opp-microvolt = <800000>;
+                       };
+                       opp@100000000 {
+                               opp-hz = /bits/ 64 <100000000>;
+                               opp-microvolt = <800000>;
+                       };
+                       opp@134000000 {
+                               opp-hz = /bits/ 64 <134000000>;
+                               opp-microvolt = <800000>;
+                       };
+                       opp@200000000 {
+                               opp-hz = /bits/ 64 <200000000>;
+                               opp-microvolt = <825000>;
+                       };
+                       opp@400000000 {
+                               opp-hz = /bits/ 64 <400000000>;
+                               opp-microvolt = <875000>;
+                       };
+               };
+
+               bus_leftbus: bus_leftbus {
+                       compatible = "samsung,exynos-bus";
+                       clocks = <&cmu CLK_DIV_GDL>;
+                       clock-names = "bus";
+                       operating-points-v2 = <&bus_leftbus_opp_table>;
+                       status = "disabled";
+               };
+
+               bus_rightbus: bus_rightbus {
+                       compatible = "samsung,exynos-bus";
+                       clocks = <&cmu CLK_DIV_GDR>;
+                       clock-names = "bus";
+                       operating-points-v2 = <&bus_leftbus_opp_table>;
+                       status = "disabled";
+               };
+
+               bus_lcd0: bus_lcd0 {
+                       compatible = "samsung,exynos-bus";
+                       clocks = <&cmu CLK_DIV_ACLK_160>;
+                       clock-names = "bus";
+                       operating-points-v2 = <&bus_leftbus_opp_table>;
+                       status = "disabled";
+               };
+
+               bus_fsys: bus_fsys {
+                       compatible = "samsung,exynos-bus";
+                       clocks = <&cmu CLK_DIV_ACLK_200>;
+                       clock-names = "bus";
+                       operating-points-v2 = <&bus_leftbus_opp_table>;
+                       status = "disabled";
+               };
+
+               bus_mcuisp: bus_mcuisp {
+                       compatible = "samsung,exynos-bus";
+                       clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
+                       clock-names = "bus";
+                       operating-points-v2 = <&bus_mcuisp_opp_table>;
+                       status = "disabled";
+               };
+
+               bus_isp: bus_isp {
+                       compatible = "samsung,exynos-bus";
+                       clocks = <&cmu CLK_DIV_ACLK_266>;
+                       clock-names = "bus";
+                       operating-points-v2 = <&bus_isp_opp_table>;
+                       status = "disabled";
+               };
+
+               bus_peril: bus_peril {
+                       compatible = "samsung,exynos-bus";
+                       clocks = <&cmu CLK_DIV_ACLK_100>;
+                       clock-names = "bus";
+                       operating-points-v2 = <&bus_peril_opp_table>;
+                       status = "disabled";
+               };
+
+               bus_mfc: bus_mfc {
+                       compatible = "samsung,exynos-bus";
+                       clocks = <&cmu CLK_SCLK_MFC>;
+                       clock-names = "bus";
+                       operating-points-v2 = <&bus_leftbus_opp_table>;
+                       status = "disabled";
+               };
+
+               bus_leftbus_opp_table: opp_table2 {
+                       compatible = "operating-points-v2";
+                       opp-shared;
+
+                       opp@50000000 {
+                               opp-hz = /bits/ 64 <50000000>;
+                               opp-microvolt = <900000>;
+                       };
+                       opp@80000000 {
+                               opp-hz = /bits/ 64 <80000000>;
+                               opp-microvolt = <900000>;
+                       };
+                       opp@100000000 {
+                               opp-hz = /bits/ 64 <100000000>;
+                               opp-microvolt = <1000000>;
+                       };
+                       opp@134000000 {
+                               opp-hz = /bits/ 64 <134000000>;
+                               opp-microvolt = <1000000>;
+                       };
+                       opp@200000000 {
+                               opp-hz = /bits/ 64 <200000000>;
+                               opp-microvolt = <1000000>;
+                       };
+               };
+
+               bus_mcuisp_opp_table: opp_table3 {
+                       compatible = "operating-points-v2";
+                       opp-shared;
+
+                       opp@50000000 {
+                               opp-hz = /bits/ 64 <50000000>;
+                       };
+                       opp@80000000 {
+                               opp-hz = /bits/ 64 <80000000>;
+                       };
+                       opp@100000000 {
+                               opp-hz = /bits/ 64 <100000000>;
+                       };
+                       opp@200000000 {
+                               opp-hz = /bits/ 64 <200000000>;
+                       };
+                       opp@400000000 {
+                               opp-hz = /bits/ 64 <400000000>;
+                       };
+               };
+
+               bus_isp_opp_table: opp_table4 {
+                       compatible = "operating-points-v2";
+                       opp-shared;
+
+                       opp@50000000 {
+                               opp-hz = /bits/ 64 <50000000>;
+                       };
+                       opp@80000000 {
+                               opp-hz = /bits/ 64 <80000000>;
+                       };
+                       opp@100000000 {
+                               opp-hz = /bits/ 64 <100000000>;
+                       };
+                       opp@200000000 {
+                               opp-hz = /bits/ 64 <200000000>;
+                       };
+                       opp@300000000 {
+                               opp-hz = /bits/ 64 <300000000>;
+                       };
+               };
+
+               bus_peril_opp_table: opp_table5 {
+                       compatible = "operating-points-v2";
+                       opp-shared;
+
+                       opp@50000000 {
+                               opp-hz = /bits/ 64 <50000000>;
+                       };
+                       opp@80000000 {
+                               opp-hz = /bits/ 64 <80000000>;
+                       };
+                       opp@100000000 {
+                               opp-hz = /bits/ 64 <100000000>;
+                       };
+               };
        };
 };