Merge commit '949bdcc8a97c' into omap-for-v4.19/dt

[sfrench/cifs-2.6.git] / arch / arm / boot / dts / dra7.dtsi

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index f4ddd86f2c774a452cb4d711c434fa0f283310d6..93fc2d79d33728e9d0cf5ce2e7c1623f00a137a6 100644 (file)
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1079,17 +1079,15 @@
                };
 
                mmc1: mmc@4809c000 {
-                       compatible = "ti,omap4-hsmmc";
+                       compatible = "ti,dra7-sdhci";
                        reg = <0x4809c000 0x400>;
                        interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc1";
-                       ti,dual-volt;
-                       ti,needs-special-reset;
-                       dmas = <&sdma_xbar 61>, <&sdma_xbar 62>;
-                       dma-names = "tx", "rx";
                        status = "disabled";
                        pbias-supply = <&pbias_mmc_reg>;
                        max-frequency = <192000000>;
+                       mmc-ddr-1_8v;
+                       mmc-ddr-3_3v;
                };
 
                hdqw1w: 1w@480b2000 {
@@ -1100,40 +1098,40 @@
                };
 
                mmc2: mmc@480b4000 {
-                       compatible = "ti,omap4-hsmmc";
+                       compatible = "ti,dra7-sdhci";
                        reg = <0x480b4000 0x400>;
                        interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc2";
-                       ti,needs-special-reset;
-                       dmas = <&sdma_xbar 47>, <&sdma_xbar 48>;
-                       dma-names = "tx", "rx";
                        status = "disabled";
                        max-frequency = <192000000>;
+                       /* SDR104/DDR50/SDR50 bits in CAPA2 is not supported */
+                       sdhci-caps-mask = <0x7 0x0>;
+                       mmc-hs200-1_8v;
+                       mmc-ddr-1_8v;
+                       mmc-ddr-3_3v;
                };
 
                mmc3: mmc@480ad000 {
-                       compatible = "ti,omap4-hsmmc";
+                       compatible = "ti,dra7-sdhci";
                        reg = <0x480ad000 0x400>;
                        interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc3";
-                       ti,needs-special-reset;
-                       dmas = <&sdma_xbar 77>, <&sdma_xbar 78>;
-                       dma-names = "tx", "rx";
                        status = "disabled";
                        /* Errata i887 limits max-frequency of MMC3 to 64 MHz */
                        max-frequency = <64000000>;
+                       /* SDMA is not supported */
+                       sdhci-caps-mask = <0x0 0x400000>;
                };
 
                mmc4: mmc@480d1000 {
-                       compatible = "ti,omap4-hsmmc";
+                       compatible = "ti,dra7-sdhci";
                        reg = <0x480d1000 0x400>;
                        interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc4";
-                       ti,needs-special-reset;
-                       dmas = <&sdma_xbar 57>, <&sdma_xbar 58>;
-                       dma-names = "tx", "rx";
                        status = "disabled";
                        max-frequency = <192000000>;
+                       /* SDMA is not supported */
+                       sdhci-caps-mask = <0x0 0x400000>;
                };
 
                mmu0_dsp1: mmu@40d01000 {
@@ -1895,7 +1893,7 @@
                        };
                };
 
-               dcan1: can@481cc000 {
+               dcan1: can@4ae3c000 {
                        compatible = "ti,dra7-d_can";
                        ti,hwmods = "dcan1";
                        reg = <0x4ae3c000 0x2000>;
@@ -1905,7 +1903,7 @@
                        status = "disabled";
                };
 
-               dcan2: can@481d0000 {
+               dcan2: can@48480000 {
                        compatible = "ti,dra7-d_can";
                        ti,hwmods = "dcan2";
                        reg = <0x48480000 0x2000>;