Merge branch 'master' into for-next

[sfrench/cifs-2.6.git] / arch / arm / Kconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a955d89ed83642cd5b5b62d7954edd8241637730..5b714695b01bb9db0455ad2f5c959a714aa00064 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -49,6 +49,7 @@ config ARM
        select HAVE_REGS_AND_STACK_ACCESS_API
        select HAVE_SYSCALL_TRACEPOINTS
        select HAVE_UID16
+       select HAVE_VIRT_TO_BUS
        select KTIME_SCALAR
        select PERF_USE_VMALLOC
        select RTC_LIB
@@ -77,6 +78,27 @@ config ARM_DMA_USE_IOMMU
        select ARM_HAS_SG_CHAIN
        select NEED_SG_DMA_LENGTH
 
+if ARM_DMA_USE_IOMMU
+
+config ARM_DMA_IOMMU_ALIGNMENT
+       int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
+       range 4 9
+       default 8
+       help
+         DMA mapping framework by default aligns all buffers to the smallest
+         PAGE_SIZE order which is greater than or equal to the requested buffer
+         size. This works well for buffers up to a few hundreds kilobytes, but
+         for larger buffers it just a waste of address space. Drivers which has
+         relatively small addressing window (like 64Mib) might run out of
+         virtual space with just a few allocations.
+
+         With this parameter you can specify the maximum PAGE_SIZE order for
+         DMA IOMMU buffers. Larger buffers will be aligned only to this
+         specified order. The order is expressed as a power of two multiplied
+         by the PAGE_SIZE.
+
+endif
+
 config HAVE_PWM
        bool
 
@@ -1654,7 +1676,6 @@ config HZ
        int
        default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
                ARCH_S5PV210 || ARCH_EXYNOS4
-       default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
        default AT91_TIMER_HZ if ARCH_AT91
        default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
        default 100