Merge tag 'powerpc-4.15-7' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc...
[sfrench/cifs-2.6.git] / arch / arc / plat-axs10x / axs10x.c
index f1ac6790da5fe64782b59b720bf3ea80d999bff1..46544e88492d5273de4c6a121538fd4a6418ec65 100644 (file)
@@ -317,25 +317,23 @@ static void __init axs103_early_init(void)
         * Instead of duplicating defconfig/DT for SMP/QUAD, add a small hack
         * of fudging the freq in DT
         */
+#define AXS103_QUAD_CORE_CPU_FREQ_HZ   50000000
+
        unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F;
        if (num_cores > 2) {
-               u32 freq = 50, orig;
-               /*
-                * TODO: use cpu node "cpu-freq" param instead of platform-specific
-                * "/cpu_card/core_clk" as it works only if we use fixed-clock for cpu.
-                */
+               u32 freq;
                int off = fdt_path_offset(initial_boot_params, "/cpu_card/core_clk");
                const struct fdt_property *prop;
 
                prop = fdt_get_property(initial_boot_params, off,
-                                       "clock-frequency", NULL);
-               orig = be32_to_cpu(*(u32*)(prop->data)) / 1000000;
+                                       "assigned-clock-rates", NULL);
+               freq = be32_to_cpu(*(u32 *)(prop->data));
 
                /* Patching .dtb in-place with new core clock value */
-               if (freq != orig ) {
-                       freq = cpu_to_be32(freq * 1000000);
+               if (freq != AXS103_QUAD_CORE_CPU_FREQ_HZ) {
+                       freq = cpu_to_be32(AXS103_QUAD_CORE_CPU_FREQ_HZ);
                        fdt_setprop_inplace(initial_boot_params, off,
-                                           "clock-frequency", &freq, sizeof(freq));
+                                           "assigned-clock-rates", &freq, sizeof(freq));
                }
        }
 #endif