Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost

[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / power / pd-samsung.txt

diff --git a/Documentation/devicetree/bindings/power/pd-samsung.txt b/Documentation/devicetree/bindings/power/pd-samsung.txt
index 549f7dee9b9de0b33f851ab1bb34008ab9d1a51a..92ef355e8f6433c58c14f4bc3d05f39fbf7ea858 100644 (file)
--- a/Documentation/devicetree/bindings/power/pd-samsung.txt
+++ b/Documentation/devicetree/bindings/power/pd-samsung.txt
@@ -15,23 +15,13 @@ Required Properties:
 Optional Properties:
 - label: Human readable string with domain name. Will be visible in userspace
        to let user to distinguish between multiple domains in SoC.
-- clocks: List of clock handles. The parent clocks of the input clocks to the
-       devices in this power domain are set to oscclk before power gating
-       and restored back after powering on a domain. This is required for
-       all domains which are powered on and off and not required for unused
-       domains.
-- clock-names: The following clocks can be specified:
-       - oscclk: Oscillator clock.
-       - clkN: Input clocks to the devices in this power domain. These clocks
-               will be reparented to oscclk before switching power domain off.
-               Their original parent will be brought back after turning on
-               the domain. Maximum of 4 clocks (N = 0 to 3) are supported.
-       - asbN: Clocks required by asynchronous bridges (ASB) present in
-               the power domain. These clock should be enabled during power
-               domain on/off operations.
 - power-domains: phandle pointing to the parent power domain, for more details
                 see Documentation/devicetree/bindings/power/power_domain.txt
 
+Deprecated Properties:
+- clocks
+- clock-names
+
 Node of a device using power domains must have a power-domains property
 defined with a phandle to respective power domain.
 
@@ -47,8 +37,6 @@ Example:
        mfc_pd: power-domain@10044060 {
                compatible = "samsung,exynos4210-pd";
                reg = <0x10044060 0x20>;
-               clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>;
-               clock-names = "oscclk", "clk0";
                #power-domain-cells = <0>;
                label = "MFC";
        };