Merge branch 'x86-tsx-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...

[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / pci / ti-pci.txt

diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt
index 452fe48c4fdd2480a6cfeacc3ca240c1b6ad9273..d5cbfe6b0d893325fc712cd337f12e9618315ef7 100644 (file)
--- a/Documentation/devicetree/bindings/pci/ti-pci.txt
+++ b/Documentation/devicetree/bindings/pci/ti-pci.txt
@@ -1,14 +1,21 @@
 TI PCI Controllers
 
 PCIe DesignWare Controller
- - compatible: Should be "ti,dra7-pcie" for RC
-              Should be "ti,dra7-pcie-ep" for EP
+ - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
+              Should be "ti,dra7-pcie-ep" for EP (deprecated)
+              Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
+              Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
+              Should be "ti,dra726-pcie-rc" for dra72x in RC mode
+              Should be "ti,dra726-pcie-ep" for dra72x in EP mode
  - phys : list of PHY specifiers (used by generic PHY framework)
  - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
               number of PHYs as specified in *phys* property.
  - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
               where <X> is the instance number of the pcie from the HW spec.
  - num-lanes as specified in ../designware-pcie.txt
+ - ti,syscon-lane-sel : phandle/offset pair. Phandle to the system control
+                       module and the register offset to specify lane
+                       selection.
 
 HOST MODE
 =========