Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / mtd / qcom_nandc.txt
index 70dd5118a3247c19b14e673b3673fd095973dd8e..73d336befa081b95fb96d8e33863bb6c602fcca9 100644 (file)
@@ -1,11 +1,20 @@
 * Qualcomm NAND controller
 
 Required properties:
-- compatible:          should be "qcom,ipq806x-nand"
+- compatible:          must be one of the following:
+    * "qcom,ipq806x-nand" - for EBI2 NAND controller being used in IPQ806x
+                           SoC and it uses ADM DMA
+    * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in
+                            IPQ4019 SoC and it uses BAM DMA
+    * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
+                            IPQ8074 SoC and it uses BAM DMA
+
 - reg:                 MMIO address range
 - clocks:              must contain core clock and always on clock
 - clock-names:         must contain "core" for the core clock and "aon" for the
                        always on clock
+
+EBI2 specific properties:
 - dmas:                        DMA specifier, consisting of a phandle to the ADM DMA
                        controller node and the channel number to be used for
                        NAND. Refer to dma.txt and qcom_adm.txt for more details
@@ -16,6 +25,12 @@ Required properties:
 - qcom,data-crci:      must contain the ADM data type CRCI block instance
                        number specified for the NAND controller on the given
                        platform
+
+QPIC specific properties:
+- dmas:                        DMA specifier, consisting of a phandle to the BAM DMA
+                       and the channel number to be used for NAND. Refer to
+                       dma.txt, qcom_bam_dma.txt for more details
+- dma-names:           must contain all 3 channel names : "tx", "rx", "cmd"
 - #address-cells:      <1> - subnodes give the chip-select number
 - #size-cells:         <0>
 
@@ -26,7 +41,6 @@ chip-selects which (may) contain NAND flash chips. Their properties are as
 follows.
 
 Required properties:
-- compatible:          should contain "qcom,nandcs"
 - reg:                 a single integer representing the chip-select
                        number (e.g., 0, 1, 2, etc.)
 - #address-cells:      see partition.txt
@@ -43,8 +57,8 @@ partition.txt for more detail.
 
 Example:
 
-nand@1ac00000 {
-       compatible = "qcom,ebi2-nandc";
+nand-controller@1ac00000 {
+       compatible = "qcom,ipq806x-nand";
        reg = <0x1ac00000 0x800>;
 
        clocks = <&gcc EBI2_CLK>,
@@ -59,8 +73,7 @@ nand@1ac00000 {
        #address-cells = <1>;
        #size-cells = <0>;
 
-       nandcs@0 {
-               compatible = "qcom,nandcs";
+       nand@0 {
                reg = <0>;
 
                nand-ecc-strength = <4>;
@@ -84,3 +97,43 @@ nand@1ac00000 {
                };
        };
 };
+
+nand-controller@79b0000 {
+       compatible = "qcom,ipq4019-nand";
+       reg = <0x79b0000 0x1000>;
+
+       clocks = <&gcc GCC_QPIC_CLK>,
+               <&gcc GCC_QPIC_AHB_CLK>;
+       clock-names = "core", "aon";
+
+       dmas = <&qpicbam 0>,
+               <&qpicbam 1>,
+               <&qpicbam 2>;
+       dma-names = "tx", "rx", "cmd";
+
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       nand@0 {
+               reg = <0>;
+               nand-ecc-strength = <4>;
+               nand-ecc-step-size = <512>;
+               nand-bus-width = <8>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "boot-nand";
+                               reg = <0 0x58a0000>;
+                       };
+
+                       partition@58a0000 {
+                               label = "fs-nand";
+                               reg = <0x58a0000 0x4000000>;
+                       };
+               };
+       };
+};