config CSKY def_bool y select ARCH_HAS_SYNC_DMA_FOR_CPU select ARCH_HAS_SYNC_DMA_FOR_DEVICE select ARCH_USE_BUILTIN_BSWAP select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2 select COMMON_CLK select CLKSRC_MMIO select CLKSRC_OF select DMA_DIRECT_REMAP select IRQ_DOMAIN select HANDLE_DOMAIN_IRQ select DW_APB_TIMER_OF select GENERIC_LIB_ASHLDI3 select GENERIC_LIB_ASHRDI3 select GENERIC_LIB_LSHRDI3 select GENERIC_LIB_MULDI3 select GENERIC_LIB_CMPDI2 select GENERIC_LIB_UCMPDI2 select GENERIC_ALLOCATOR select GENERIC_ATOMIC64 select GENERIC_CLOCKEVENTS select GENERIC_CPU_DEVICES select GENERIC_IRQ_CHIP select GENERIC_IRQ_PROBE select GENERIC_IRQ_SHOW select GENERIC_IRQ_MULTI_HANDLER select GENERIC_SCHED_CLOCK select GENERIC_SMP_IDLE_THREAD select HAVE_ARCH_TRACEHOOK select HAVE_GENERIC_DMA_COHERENT select HAVE_KERNEL_GZIP select HAVE_KERNEL_LZO select HAVE_KERNEL_LZMA select HAVE_C_RECORDMCOUNT select HAVE_DMA_API_DEBUG select HAVE_DMA_CONTIGUOUS select MAY_HAVE_SPARSE_IRQ select MODULES_USE_ELF_RELA if MODULES select OF select OF_EARLY_FLATTREE select OF_RESERVED_MEM select PERF_USE_VMALLOC select RTC_LIB select TIMER_OF select USB_ARCH_HAS_EHCI select USB_ARCH_HAS_OHCI config CPU_HAS_CACHEV2 bool config CPU_HAS_FPUV2 bool config CPU_HAS_HILO bool config CPU_HAS_TLBI bool config CPU_HAS_LDSTEX bool help For SMP, CPU needs "ldex&stex" instrcutions to atomic operations. config CPU_NEED_TLBSYNC bool config CPU_NEED_SOFTALIGN bool config CPU_NO_USER_BKPT bool help For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because abiv2 is 16/32bit instruction set and "trap 1" is 32bit. So we need a 16bit instruction as user space bkpt, and it will cause an illegal instruction exception. In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not. config GENERIC_CALIBRATE_DELAY def_bool y config GENERIC_CSUM def_bool y config GENERIC_HWEIGHT def_bool y config MMU def_bool y config RWSEM_GENERIC_SPINLOCK def_bool y config TIME_LOW_RES def_bool y config TRACE_IRQFLAGS_SUPPORT def_bool y config CPU_TLB_SIZE int default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810) default "1024" if (CPU_CK860) config CPU_ASID_BITS int default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810) default "12" if (CPU_CK860) config L1_CACHE_SHIFT int default "4" if (CPU_CK610) default "5" if (CPU_CK807 || CPU_CK810) default "6" if (CPU_CK860) menu "Processor type and features" choice prompt "CPU MODEL" default CPU_CK807 config CPU_CK610 bool "CSKY CPU ck610" select CPU_NEED_TLBSYNC select CPU_NEED_SOFTALIGN select CPU_NO_USER_BKPT config CPU_CK810 bool "CSKY CPU ck810" select CPU_HAS_HILO select CPU_NEED_TLBSYNC config CPU_CK807 bool "CSKY CPU ck807" select CPU_HAS_HILO config CPU_CK860 bool "CSKY CPU ck860" select CPU_HAS_TLBI select CPU_HAS_CACHEV2 select CPU_HAS_LDSTEX select CPU_HAS_FPUV2 endchoice choice prompt "Power Manager Instruction (wait/doze/stop)" default CPU_PM_NONE config CPU_PM_NONE bool "None" config CPU_PM_WAIT bool "wait" config CPU_PM_DOZE bool "doze" config CPU_PM_STOP bool "stop" endchoice config CPU_HAS_VDSP bool "CPU has VDSP coprocessor" depends on CPU_HAS_FPU && CPU_HAS_FPUV2 config CPU_HAS_FPU bool "CPU has FPU coprocessor" depends on CPU_CK807 || CPU_CK810 || CPU_CK860 config CPU_HAS_TEE bool "CPU has Trusted Execution Environment" depends on CPU_CK810 config SMP bool "Symmetric Multi-Processing (SMP) support for C-SKY" depends on CPU_CK860 default n config NR_CPUS int "Maximum number of CPUs (2-32)" range 2 32 depends on SMP default "2" config HIGHMEM bool "High Memory Support" depends on !CPU_CK610 default y config FORCE_MAX_ZONEORDER int "Maximum zone order" default "11" config RAM_BASE hex "DRAM start addr (the same with memory-section in dts)" default 0x0 endmenu source "kernel/Kconfig.hz"