// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for J721E SoC Family Main Domain peripherals * * Copyright (C) 2016-2019 Texas Instruments Incorporated - http://www.ti.com/ */ &cbass_main { msmc_ram: sram@70000000 { compatible = "mmio-sram"; reg = <0x0 0x70000000 0x0 0x800000>; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x70000000 0x800000>; atf-sram@0 { reg = <0x0 0x20000>; }; }; gic500: interrupt-controller@1800000 { compatible = "arm,gic-v3"; #address-cells = <2>; #size-cells = <2>; ranges; #interrupt-cells = <3>; interrupt-controller; reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ <0x00 0x01900000 0x00 0x100000>; /* GICR */ /* vcpumntirq: virtual CPU interface maintenance interrupt */ interrupts = ; gic_its: gic-its@1820000 { compatible = "arm,gic-v3-its"; reg = <0x00 0x01820000 0x00 0x10000>; socionext,synquacer-pre-its = <0x1000000 0x400000>; msi-controller; #msi-cells = <1>; }; }; smmu0: smmu@36600000 { compatible = "arm,smmu-v3"; reg = <0x0 0x36600000 0x0 0x100000>; interrupt-parent = <&gic500>; interrupts = , ; interrupt-names = "eventq", "gerror"; #iommu-cells = <1>; }; main_gpio_intr: interrupt-controller0 { compatible = "ti,sci-intr"; ti,intr-trigger-type = <1>; interrupt-controller; interrupt-parent = <&gic500>; #interrupt-cells = <2>; ti,sci = <&dmsc>; ti,sci-dst-id = <14>; ti,sci-rm-range-girq = <0x1>; }; cbass_main_navss: interconnect0 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; main_navss_intr: interrupt-controller1 { compatible = "ti,sci-intr"; ti,intr-trigger-type = <4>; interrupt-controller; interrupt-parent = <&gic500>; #interrupt-cells = <2>; ti,sci = <&dmsc>; ti,sci-dst-id = <14>; ti,sci-rm-range-girq = <0>, <2>; }; main_udmass_inta: interrupt-controller@33d00000 { compatible = "ti,sci-inta"; reg = <0x0 0x33d00000 0x0 0x100000>; interrupt-controller; interrupt-parent = <&main_navss_intr>; msi-controller; ti,sci = <&dmsc>; ti,sci-dev-id = <209>; ti,sci-rm-range-vint = <0xa>; ti,sci-rm-range-global-event = <0xd>; }; hwspinlock: spinlock@30e00000 { compatible = "ti,am654-hwspinlock"; reg = <0x00 0x30e00000 0x00 0x1000>; #hwlock-cells = <1>; }; }; secure_proxy_main: mailbox@32c00000 { compatible = "ti,am654-secure-proxy"; #mbox-cells = <1>; reg-names = "target_data", "rt", "scfg"; reg = <0x00 0x32c00000 0x00 0x100000>, <0x00 0x32400000 0x00 0x100000>, <0x00 0x32800000 0x00 0x100000>; interrupt-names = "rx_011"; interrupts = ; }; main_pmx0: pinmux@11c000 { compatible = "pinctrl-single"; /* Proxy 0 addressing */ reg = <0x0 0x11c000 0x0 0x2b4>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0xffffffff>; }; main_uart0: serial@2800000 { compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02800000 0x00 0x100>; reg-shift = <2>; reg-io-width = <4>; interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 146 0>; clock-names = "fclk"; }; main_uart1: serial@2810000 { compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02810000 0x00 0x100>; reg-shift = <2>; reg-io-width = <4>; interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 278 0>; clock-names = "fclk"; }; main_uart2: serial@2820000 { compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02820000 0x00 0x100>; reg-shift = <2>; reg-io-width = <4>; interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; power-domains = <&k3_pds 279 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 279 0>; clock-names = "fclk"; }; main_uart3: serial@2830000 { compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02830000 0x00 0x100>; reg-shift = <2>; reg-io-width = <4>; interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; power-domains = <&k3_pds 280 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 280 0>; clock-names = "fclk"; }; main_uart4: serial@2840000 { compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02840000 0x00 0x100>; reg-shift = <2>; reg-io-width = <4>; interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; power-domains = <&k3_pds 281 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 281 0>; clock-names = "fclk"; }; main_uart5: serial@2850000 { compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02850000 0x00 0x100>; reg-shift = <2>; reg-io-width = <4>; interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; power-domains = <&k3_pds 282 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 282 0>; clock-names = "fclk"; }; main_uart6: serial@2860000 { compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02860000 0x00 0x100>; reg-shift = <2>; reg-io-width = <4>; interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 283 0>; clock-names = "fclk"; }; main_uart7: serial@2870000 { compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02870000 0x00 0x100>; reg-shift = <2>; reg-io-width = <4>; interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; power-domains = <&k3_pds 284 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 284 0>; clock-names = "fclk"; }; main_uart8: serial@2880000 { compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02880000 0x00 0x100>; reg-shift = <2>; reg-io-width = <4>; interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; power-domains = <&k3_pds 285 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 285 0>; clock-names = "fclk"; }; main_uart9: serial@2890000 { compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02890000 0x00 0x100>; reg-shift = <2>; reg-io-width = <4>; interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 286 0>; clock-names = "fclk"; }; main_gpio0: gpio@600000 { compatible = "ti,j721e-gpio", "ti,keystone-gpio"; reg = <0x0 0x00600000 0x0 0x100>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; interrupts = <105 0>, <105 1>, <105 2>, <105 3>, <105 4>, <105 5>, <105 6>, <105 7>; interrupt-controller; #interrupt-cells = <2>; ti,ngpio = <128>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 105 0>; clock-names = "gpio"; }; main_gpio1: gpio@601000 { compatible = "ti,j721e-gpio", "ti,keystone-gpio"; reg = <0x0 0x00601000 0x0 0x100>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; interrupts = <106 0>, <106 1>, <106 2>; interrupt-controller; #interrupt-cells = <2>; ti,ngpio = <36>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 106 0>; clock-names = "gpio"; }; main_gpio2: gpio@610000 { compatible = "ti,j721e-gpio", "ti,keystone-gpio"; reg = <0x0 0x00610000 0x0 0x100>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; interrupts = <107 0>, <107 1>, <107 2>, <107 3>, <107 4>, <107 5>, <107 6>, <107 7>; interrupt-controller; #interrupt-cells = <2>; ti,ngpio = <128>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 107 0>; clock-names = "gpio"; }; main_gpio3: gpio@611000 { compatible = "ti,j721e-gpio", "ti,keystone-gpio"; reg = <0x0 0x00611000 0x0 0x100>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; interrupts = <108 0>, <108 1>, <108 2>; interrupt-controller; #interrupt-cells = <2>; ti,ngpio = <36>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 108 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 108 0>; clock-names = "gpio"; }; main_gpio4: gpio@620000 { compatible = "ti,j721e-gpio", "ti,keystone-gpio"; reg = <0x0 0x00620000 0x0 0x100>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; interrupts = <109 0>, <109 1>, <109 2>, <109 3>, <109 4>, <109 5>, <109 6>, <109 7>; interrupt-controller; #interrupt-cells = <2>; ti,ngpio = <128>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 109 0>; clock-names = "gpio"; }; main_gpio5: gpio@621000 { compatible = "ti,j721e-gpio", "ti,keystone-gpio"; reg = <0x0 0x00621000 0x0 0x100>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; interrupts = <110 0>, <110 1>, <110 2>; interrupt-controller; #interrupt-cells = <2>; ti,ngpio = <36>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 110 0>; clock-names = "gpio"; }; main_gpio6: gpio@630000 { compatible = "ti,j721e-gpio", "ti,keystone-gpio"; reg = <0x0 0x00630000 0x0 0x100>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; interrupts = <111 0>, <111 1>, <111 2>, <111 3>, <111 4>, <111 5>, <111 6>, <111 7>; interrupt-controller; #interrupt-cells = <2>; ti,ngpio = <128>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 111 0>; clock-names = "gpio"; }; main_gpio7: gpio@631000 { compatible = "ti,j721e-gpio", "ti,keystone-gpio"; reg = <0x0 0x00631000 0x0 0x100>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; interrupts = <112 0>, <112 1>, <112 2>; interrupt-controller; #interrupt-cells = <2>; ti,ngpio = <36>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 112 0>; clock-names = "gpio"; }; };