KVM: x86: Clear apic tsc-deadline after deadline
[sfrench/cifs-2.6.git] / virt / kvm / irq_comm.c
1 /*
2  * irq_comm.c: Common API for in kernel interrupt controller
3  * Copyright (c) 2007, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16  * Place - Suite 330, Boston, MA 02111-1307 USA.
17  * Authors:
18  *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
19  *
20  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
21  */
22
23 #include <linux/kvm_host.h>
24 #include <linux/slab.h>
25 #include <linux/export.h>
26 #include <trace/events/kvm.h>
27
28 #include <asm/msidef.h>
29 #ifdef CONFIG_IA64
30 #include <asm/iosapic.h>
31 #endif
32
33 #include "irq.h"
34
35 #include "ioapic.h"
36
37 static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
38                            struct kvm *kvm, int irq_source_id, int level,
39                            bool line_status)
40 {
41 #ifdef CONFIG_X86
42         struct kvm_pic *pic = pic_irqchip(kvm);
43         return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
44 #else
45         return -1;
46 #endif
47 }
48
49 static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
50                               struct kvm *kvm, int irq_source_id, int level,
51                               bool line_status)
52 {
53         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
54         return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
55                                 line_status);
56 }
57
58 inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
59 {
60 #ifdef CONFIG_IA64
61         return irq->delivery_mode ==
62                 (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
63 #else
64         return irq->delivery_mode == APIC_DM_LOWEST;
65 #endif
66 }
67
68 int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
69                 struct kvm_lapic_irq *irq, unsigned long *dest_map)
70 {
71         int i, r = -1;
72         struct kvm_vcpu *vcpu, *lowest = NULL;
73
74         if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
75                         kvm_is_dm_lowest_prio(irq)) {
76                 printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
77                 irq->delivery_mode = APIC_DM_FIXED;
78         }
79
80         if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
81                 return r;
82
83         kvm_for_each_vcpu(i, vcpu, kvm) {
84                 if (!kvm_apic_present(vcpu))
85                         continue;
86
87                 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
88                                         irq->dest_id, irq->dest_mode))
89                         continue;
90
91                 if (!kvm_is_dm_lowest_prio(irq)) {
92                         if (r < 0)
93                                 r = 0;
94                         r += kvm_apic_set_irq(vcpu, irq, dest_map);
95                 } else if (kvm_lapic_enabled(vcpu)) {
96                         if (!lowest)
97                                 lowest = vcpu;
98                         else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
99                                 lowest = vcpu;
100                 }
101         }
102
103         if (lowest)
104                 r = kvm_apic_set_irq(lowest, irq, dest_map);
105
106         return r;
107 }
108
109 static inline void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e,
110                                    struct kvm_lapic_irq *irq)
111 {
112         trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
113
114         irq->dest_id = (e->msi.address_lo &
115                         MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
116         irq->vector = (e->msi.data &
117                         MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
118         irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
119         irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
120         irq->delivery_mode = e->msi.data & 0x700;
121         irq->level = 1;
122         irq->shorthand = 0;
123         /* TODO Deal with RH bit of MSI message address */
124 }
125
126 int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
127                 struct kvm *kvm, int irq_source_id, int level, bool line_status)
128 {
129         struct kvm_lapic_irq irq;
130
131         if (!level)
132                 return -1;
133
134         kvm_set_msi_irq(e, &irq);
135
136         return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
137 }
138
139
140 static int kvm_set_msi_inatomic(struct kvm_kernel_irq_routing_entry *e,
141                          struct kvm *kvm)
142 {
143         struct kvm_lapic_irq irq;
144         int r;
145
146         kvm_set_msi_irq(e, &irq);
147
148         if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
149                 return r;
150         else
151                 return -EWOULDBLOCK;
152 }
153
154 /*
155  * Deliver an IRQ in an atomic context if we can, or return a failure,
156  * user can retry in a process context.
157  * Return value:
158  *  -EWOULDBLOCK - Can't deliver in atomic context: retry in a process context.
159  *  Other values - No need to retry.
160  */
161 int kvm_set_irq_inatomic(struct kvm *kvm, int irq_source_id, u32 irq, int level)
162 {
163         struct kvm_kernel_irq_routing_entry entries[KVM_NR_IRQCHIPS];
164         struct kvm_kernel_irq_routing_entry *e;
165         int ret = -EINVAL;
166         int idx;
167
168         trace_kvm_set_irq(irq, level, irq_source_id);
169
170         /*
171          * Injection into either PIC or IOAPIC might need to scan all CPUs,
172          * which would need to be retried from thread context;  when same GSI
173          * is connected to both PIC and IOAPIC, we'd have to report a
174          * partial failure here.
175          * Since there's no easy way to do this, we only support injecting MSI
176          * which is limited to 1:1 GSI mapping.
177          */
178         idx = srcu_read_lock(&kvm->irq_srcu);
179         if (kvm_irq_map_gsi(kvm, entries, irq) > 0) {
180                 e = &entries[0];
181                 if (likely(e->type == KVM_IRQ_ROUTING_MSI))
182                         ret = kvm_set_msi_inatomic(e, kvm);
183                 else
184                         ret = -EWOULDBLOCK;
185         }
186         srcu_read_unlock(&kvm->irq_srcu, idx);
187         return ret;
188 }
189
190 int kvm_request_irq_source_id(struct kvm *kvm)
191 {
192         unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
193         int irq_source_id;
194
195         mutex_lock(&kvm->irq_lock);
196         irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
197
198         if (irq_source_id >= BITS_PER_LONG) {
199                 printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
200                 irq_source_id = -EFAULT;
201                 goto unlock;
202         }
203
204         ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
205 #ifdef CONFIG_X86
206         ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
207 #endif
208         set_bit(irq_source_id, bitmap);
209 unlock:
210         mutex_unlock(&kvm->irq_lock);
211
212         return irq_source_id;
213 }
214
215 void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
216 {
217         ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
218 #ifdef CONFIG_X86
219         ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
220 #endif
221
222         mutex_lock(&kvm->irq_lock);
223         if (irq_source_id < 0 ||
224             irq_source_id >= BITS_PER_LONG) {
225                 printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
226                 goto unlock;
227         }
228         clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
229         if (!irqchip_in_kernel(kvm))
230                 goto unlock;
231
232         kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
233 #ifdef CONFIG_X86
234         kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id);
235 #endif
236 unlock:
237         mutex_unlock(&kvm->irq_lock);
238 }
239
240 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
241                                     struct kvm_irq_mask_notifier *kimn)
242 {
243         mutex_lock(&kvm->irq_lock);
244         kimn->irq = irq;
245         hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list);
246         mutex_unlock(&kvm->irq_lock);
247 }
248
249 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
250                                       struct kvm_irq_mask_notifier *kimn)
251 {
252         mutex_lock(&kvm->irq_lock);
253         hlist_del_rcu(&kimn->link);
254         mutex_unlock(&kvm->irq_lock);
255         synchronize_srcu(&kvm->irq_srcu);
256 }
257
258 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
259                              bool mask)
260 {
261         struct kvm_irq_mask_notifier *kimn;
262         int idx, gsi;
263
264         idx = srcu_read_lock(&kvm->irq_srcu);
265         gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
266         if (gsi != -1)
267                 hlist_for_each_entry_rcu(kimn, &kvm->mask_notifier_list, link)
268                         if (kimn->irq == gsi)
269                                 kimn->func(kimn, mask);
270         srcu_read_unlock(&kvm->irq_srcu, idx);
271 }
272
273 int kvm_set_routing_entry(struct kvm_kernel_irq_routing_entry *e,
274                           const struct kvm_irq_routing_entry *ue)
275 {
276         int r = -EINVAL;
277         int delta;
278         unsigned max_pin;
279
280         switch (ue->type) {
281         case KVM_IRQ_ROUTING_IRQCHIP:
282                 delta = 0;
283                 switch (ue->u.irqchip.irqchip) {
284                 case KVM_IRQCHIP_PIC_MASTER:
285                         e->set = kvm_set_pic_irq;
286                         max_pin = PIC_NUM_PINS;
287                         break;
288                 case KVM_IRQCHIP_PIC_SLAVE:
289                         e->set = kvm_set_pic_irq;
290                         max_pin = PIC_NUM_PINS;
291                         delta = 8;
292                         break;
293                 case KVM_IRQCHIP_IOAPIC:
294                         max_pin = KVM_IOAPIC_NUM_PINS;
295                         e->set = kvm_set_ioapic_irq;
296                         break;
297                 default:
298                         goto out;
299                 }
300                 e->irqchip.irqchip = ue->u.irqchip.irqchip;
301                 e->irqchip.pin = ue->u.irqchip.pin + delta;
302                 if (e->irqchip.pin >= max_pin)
303                         goto out;
304                 break;
305         case KVM_IRQ_ROUTING_MSI:
306                 e->set = kvm_set_msi;
307                 e->msi.address_lo = ue->u.msi.address_lo;
308                 e->msi.address_hi = ue->u.msi.address_hi;
309                 e->msi.data = ue->u.msi.data;
310                 break;
311         default:
312                 goto out;
313         }
314
315         r = 0;
316 out:
317         return r;
318 }
319
320 #define IOAPIC_ROUTING_ENTRY(irq) \
321         { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,  \
322           .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
323 #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
324
325 #ifdef CONFIG_X86
326 #  define PIC_ROUTING_ENTRY(irq) \
327         { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,  \
328           .u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
329 #  define ROUTING_ENTRY2(irq) \
330         IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
331 #else
332 #  define ROUTING_ENTRY2(irq) \
333         IOAPIC_ROUTING_ENTRY(irq)
334 #endif
335
336 static const struct kvm_irq_routing_entry default_routing[] = {
337         ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
338         ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
339         ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
340         ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
341         ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
342         ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
343         ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
344         ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
345         ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
346         ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
347         ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
348         ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
349 #ifdef CONFIG_IA64
350         ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
351         ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
352         ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
353         ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
354         ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
355         ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
356         ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
357         ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
358         ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
359         ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
360         ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
361         ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
362 #endif
363 };
364
365 int kvm_setup_default_irq_routing(struct kvm *kvm)
366 {
367         return kvm_set_irq_routing(kvm, default_routing,
368                                    ARRAY_SIZE(default_routing), 0);
369 }