KVM: x86: Clear apic tsc-deadline after deadline
[sfrench/cifs-2.6.git] / virt / kvm / ioapic.c
1 /*
2  *  Copyright (C) 2001  MandrakeSoft S.A.
3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
4  *
5  *    MandrakeSoft S.A.
6  *    43, rue d'Aboukir
7  *    75002 Paris - France
8  *    http://www.linux-mandrake.com/
9  *    http://www.mandrakesoft.com/
10  *
11  *  This library is free software; you can redistribute it and/or
12  *  modify it under the terms of the GNU Lesser General Public
13  *  License as published by the Free Software Foundation; either
14  *  version 2 of the License, or (at your option) any later version.
15  *
16  *  This library is distributed in the hope that it will be useful,
17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  *  Lesser General Public License for more details.
20  *
21  *  You should have received a copy of the GNU Lesser General Public
22  *  License along with this library; if not, write to the Free Software
23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
24  *
25  *  Yunhong Jiang <yunhong.jiang@intel.com>
26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
27  *  Based on Xen 3.1 code.
28  */
29
30 #include <linux/kvm_host.h>
31 #include <linux/kvm.h>
32 #include <linux/mm.h>
33 #include <linux/highmem.h>
34 #include <linux/smp.h>
35 #include <linux/hrtimer.h>
36 #include <linux/io.h>
37 #include <linux/slab.h>
38 #include <linux/export.h>
39 #include <asm/processor.h>
40 #include <asm/page.h>
41 #include <asm/current.h>
42 #include <trace/events/kvm.h>
43
44 #include "ioapic.h"
45 #include "lapic.h"
46 #include "irq.h"
47
48 #if 0
49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
50 #else
51 #define ioapic_debug(fmt, arg...)
52 #endif
53 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
54                 bool line_status);
55
56 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
57                                           unsigned long addr,
58                                           unsigned long length)
59 {
60         unsigned long result = 0;
61
62         switch (ioapic->ioregsel) {
63         case IOAPIC_REG_VERSION:
64                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
65                           | (IOAPIC_VERSION_ID & 0xff));
66                 break;
67
68         case IOAPIC_REG_APIC_ID:
69         case IOAPIC_REG_ARB_ID:
70                 result = ((ioapic->id & 0xf) << 24);
71                 break;
72
73         default:
74                 {
75                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
76                         u64 redir_content;
77
78                         if (redir_index < IOAPIC_NUM_PINS)
79                                 redir_content =
80                                         ioapic->redirtbl[redir_index].bits;
81                         else
82                                 redir_content = ~0ULL;
83
84                         result = (ioapic->ioregsel & 0x1) ?
85                             (redir_content >> 32) & 0xffffffff :
86                             redir_content & 0xffffffff;
87                         break;
88                 }
89         }
90
91         return result;
92 }
93
94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
95 {
96         ioapic->rtc_status.pending_eoi = 0;
97         bitmap_zero(ioapic->rtc_status.dest_map, KVM_MAX_VCPUS);
98 }
99
100 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
101
102 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
103 {
104         if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
105                 kvm_rtc_eoi_tracking_restore_all(ioapic);
106 }
107
108 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
109 {
110         bool new_val, old_val;
111         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
112         union kvm_ioapic_redirect_entry *e;
113
114         e = &ioapic->redirtbl[RTC_GSI];
115         if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
116                                 e->fields.dest_mode))
117                 return;
118
119         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
120         old_val = test_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
121
122         if (new_val == old_val)
123                 return;
124
125         if (new_val) {
126                 __set_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
127                 ioapic->rtc_status.pending_eoi++;
128         } else {
129                 __clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
130                 ioapic->rtc_status.pending_eoi--;
131                 rtc_status_pending_eoi_check_valid(ioapic);
132         }
133 }
134
135 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
136 {
137         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
138
139         spin_lock(&ioapic->lock);
140         __rtc_irq_eoi_tracking_restore_one(vcpu);
141         spin_unlock(&ioapic->lock);
142 }
143
144 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
145 {
146         struct kvm_vcpu *vcpu;
147         int i;
148
149         if (RTC_GSI >= IOAPIC_NUM_PINS)
150                 return;
151
152         rtc_irq_eoi_tracking_reset(ioapic);
153         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
154             __rtc_irq_eoi_tracking_restore_one(vcpu);
155 }
156
157 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
158 {
159         if (test_and_clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map)) {
160                 --ioapic->rtc_status.pending_eoi;
161                 rtc_status_pending_eoi_check_valid(ioapic);
162         }
163 }
164
165 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
166 {
167         if (ioapic->rtc_status.pending_eoi > 0)
168                 return true; /* coalesced */
169
170         return false;
171 }
172
173 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
174                 int irq_level, bool line_status)
175 {
176         union kvm_ioapic_redirect_entry entry;
177         u32 mask = 1 << irq;
178         u32 old_irr;
179         int edge, ret;
180
181         entry = ioapic->redirtbl[irq];
182         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
183
184         if (!irq_level) {
185                 ioapic->irr &= ~mask;
186                 ret = 1;
187                 goto out;
188         }
189
190         /*
191          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
192          * this only happens if a previous edge has not been delivered due
193          * do masking.  For level interrupts, the remote_irr field tells
194          * us if the interrupt is waiting for an EOI.
195          *
196          * RTC is special: it is edge-triggered, but userspace likes to know
197          * if it has been already ack-ed via EOI because coalesced RTC
198          * interrupts lead to time drift in Windows guests.  So we track
199          * EOI manually for the RTC interrupt.
200          */
201         if (irq == RTC_GSI && line_status &&
202                 rtc_irq_check_coalesced(ioapic)) {
203                 ret = 0;
204                 goto out;
205         }
206
207         old_irr = ioapic->irr;
208         ioapic->irr |= mask;
209         if ((edge && old_irr == ioapic->irr) ||
210             (!edge && entry.fields.remote_irr)) {
211                 ret = 0;
212                 goto out;
213         }
214
215         ret = ioapic_service(ioapic, irq, line_status);
216
217 out:
218         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
219         return ret;
220 }
221
222 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
223 {
224         u32 idx;
225
226         rtc_irq_eoi_tracking_reset(ioapic);
227         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
228                 ioapic_set_irq(ioapic, idx, 1, true);
229
230         kvm_rtc_eoi_tracking_restore_all(ioapic);
231 }
232
233
234 static void update_handled_vectors(struct kvm_ioapic *ioapic)
235 {
236         DECLARE_BITMAP(handled_vectors, 256);
237         int i;
238
239         memset(handled_vectors, 0, sizeof(handled_vectors));
240         for (i = 0; i < IOAPIC_NUM_PINS; ++i)
241                 __set_bit(ioapic->redirtbl[i].fields.vector, handled_vectors);
242         memcpy(ioapic->handled_vectors, handled_vectors,
243                sizeof(handled_vectors));
244         smp_wmb();
245 }
246
247 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap,
248                         u32 *tmr)
249 {
250         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
251         union kvm_ioapic_redirect_entry *e;
252         int index;
253
254         spin_lock(&ioapic->lock);
255         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
256                 e = &ioapic->redirtbl[index];
257                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
258                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
259                     index == RTC_GSI) {
260                         if (kvm_apic_match_dest(vcpu, NULL, 0,
261                                 e->fields.dest_id, e->fields.dest_mode)) {
262                                 __set_bit(e->fields.vector,
263                                         (unsigned long *)eoi_exit_bitmap);
264                                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG)
265                                         __set_bit(e->fields.vector,
266                                                 (unsigned long *)tmr);
267                         }
268                 }
269         }
270         spin_unlock(&ioapic->lock);
271 }
272
273 #ifdef CONFIG_X86
274 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
275 {
276         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
277
278         if (!ioapic)
279                 return;
280         kvm_make_scan_ioapic_request(kvm);
281 }
282 #else
283 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
284 {
285         return;
286 }
287 #endif
288
289 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
290 {
291         unsigned index;
292         bool mask_before, mask_after;
293         union kvm_ioapic_redirect_entry *e;
294
295         switch (ioapic->ioregsel) {
296         case IOAPIC_REG_VERSION:
297                 /* Writes are ignored. */
298                 break;
299
300         case IOAPIC_REG_APIC_ID:
301                 ioapic->id = (val >> 24) & 0xf;
302                 break;
303
304         case IOAPIC_REG_ARB_ID:
305                 break;
306
307         default:
308                 index = (ioapic->ioregsel - 0x10) >> 1;
309
310                 ioapic_debug("change redir index %x val %x\n", index, val);
311                 if (index >= IOAPIC_NUM_PINS)
312                         return;
313                 e = &ioapic->redirtbl[index];
314                 mask_before = e->fields.mask;
315                 if (ioapic->ioregsel & 1) {
316                         e->bits &= 0xffffffff;
317                         e->bits |= (u64) val << 32;
318                 } else {
319                         e->bits &= ~0xffffffffULL;
320                         e->bits |= (u32) val;
321                         e->fields.remote_irr = 0;
322                 }
323                 update_handled_vectors(ioapic);
324                 mask_after = e->fields.mask;
325                 if (mask_before != mask_after)
326                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
327                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
328                     && ioapic->irr & (1 << index))
329                         ioapic_service(ioapic, index, false);
330                 kvm_vcpu_request_scan_ioapic(ioapic->kvm);
331                 break;
332         }
333 }
334
335 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
336 {
337         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
338         struct kvm_lapic_irq irqe;
339         int ret;
340
341         if (entry->fields.mask)
342                 return -1;
343
344         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
345                      "vector=%x trig_mode=%x\n",
346                      entry->fields.dest_id, entry->fields.dest_mode,
347                      entry->fields.delivery_mode, entry->fields.vector,
348                      entry->fields.trig_mode);
349
350         irqe.dest_id = entry->fields.dest_id;
351         irqe.vector = entry->fields.vector;
352         irqe.dest_mode = entry->fields.dest_mode;
353         irqe.trig_mode = entry->fields.trig_mode;
354         irqe.delivery_mode = entry->fields.delivery_mode << 8;
355         irqe.level = 1;
356         irqe.shorthand = 0;
357
358         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
359                 ioapic->irr &= ~(1 << irq);
360
361         if (irq == RTC_GSI && line_status) {
362                 /*
363                  * pending_eoi cannot ever become negative (see
364                  * rtc_status_pending_eoi_check_valid) and the caller
365                  * ensures that it is only called if it is >= zero, namely
366                  * if rtc_irq_check_coalesced returns false).
367                  */
368                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
369                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
370                                 ioapic->rtc_status.dest_map);
371                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
372         } else
373                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
374
375         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
376                 entry->fields.remote_irr = 1;
377
378         return ret;
379 }
380
381 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
382                        int level, bool line_status)
383 {
384         int ret, irq_level;
385
386         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
387
388         spin_lock(&ioapic->lock);
389         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
390                                          irq_source_id, level);
391         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
392
393         spin_unlock(&ioapic->lock);
394
395         return ret;
396 }
397
398 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
399 {
400         int i;
401
402         spin_lock(&ioapic->lock);
403         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
404                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
405         spin_unlock(&ioapic->lock);
406 }
407
408 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
409                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
410 {
411         int i;
412
413         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
414                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
415
416                 if (ent->fields.vector != vector)
417                         continue;
418
419                 if (i == RTC_GSI)
420                         rtc_irq_eoi(ioapic, vcpu);
421                 /*
422                  * We are dropping lock while calling ack notifiers because ack
423                  * notifier callbacks for assigned devices call into IOAPIC
424                  * recursively. Since remote_irr is cleared only after call
425                  * to notifiers if the same vector will be delivered while lock
426                  * is dropped it will be put into irr and will be delivered
427                  * after ack notifier returns.
428                  */
429                 spin_unlock(&ioapic->lock);
430                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
431                 spin_lock(&ioapic->lock);
432
433                 if (trigger_mode != IOAPIC_LEVEL_TRIG)
434                         continue;
435
436                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
437                 ent->fields.remote_irr = 0;
438                 if (ioapic->irr & (1 << i))
439                         ioapic_service(ioapic, i, false);
440         }
441 }
442
443 bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector)
444 {
445         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
446         smp_rmb();
447         return test_bit(vector, ioapic->handled_vectors);
448 }
449
450 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
451 {
452         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
453
454         spin_lock(&ioapic->lock);
455         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
456         spin_unlock(&ioapic->lock);
457 }
458
459 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
460 {
461         return container_of(dev, struct kvm_ioapic, dev);
462 }
463
464 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
465 {
466         return ((addr >= ioapic->base_address &&
467                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
468 }
469
470 static int ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len,
471                             void *val)
472 {
473         struct kvm_ioapic *ioapic = to_ioapic(this);
474         u32 result;
475         if (!ioapic_in_range(ioapic, addr))
476                 return -EOPNOTSUPP;
477
478         ioapic_debug("addr %lx\n", (unsigned long)addr);
479         ASSERT(!(addr & 0xf));  /* check alignment */
480
481         addr &= 0xff;
482         spin_lock(&ioapic->lock);
483         switch (addr) {
484         case IOAPIC_REG_SELECT:
485                 result = ioapic->ioregsel;
486                 break;
487
488         case IOAPIC_REG_WINDOW:
489                 result = ioapic_read_indirect(ioapic, addr, len);
490                 break;
491
492         default:
493                 result = 0;
494                 break;
495         }
496         spin_unlock(&ioapic->lock);
497
498         switch (len) {
499         case 8:
500                 *(u64 *) val = result;
501                 break;
502         case 1:
503         case 2:
504         case 4:
505                 memcpy(val, (char *)&result, len);
506                 break;
507         default:
508                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
509         }
510         return 0;
511 }
512
513 static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
514                              const void *val)
515 {
516         struct kvm_ioapic *ioapic = to_ioapic(this);
517         u32 data;
518         if (!ioapic_in_range(ioapic, addr))
519                 return -EOPNOTSUPP;
520
521         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
522                      (void*)addr, len, val);
523         ASSERT(!(addr & 0xf));  /* check alignment */
524
525         switch (len) {
526         case 8:
527         case 4:
528                 data = *(u32 *) val;
529                 break;
530         case 2:
531                 data = *(u16 *) val;
532                 break;
533         case 1:
534                 data = *(u8  *) val;
535                 break;
536         default:
537                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
538                 return 0;
539         }
540
541         addr &= 0xff;
542         spin_lock(&ioapic->lock);
543         switch (addr) {
544         case IOAPIC_REG_SELECT:
545                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
546                 break;
547
548         case IOAPIC_REG_WINDOW:
549                 ioapic_write_indirect(ioapic, data);
550                 break;
551 #ifdef  CONFIG_IA64
552         case IOAPIC_REG_EOI:
553                 __kvm_ioapic_update_eoi(NULL, ioapic, data, IOAPIC_LEVEL_TRIG);
554                 break;
555 #endif
556
557         default:
558                 break;
559         }
560         spin_unlock(&ioapic->lock);
561         return 0;
562 }
563
564 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
565 {
566         int i;
567
568         for (i = 0; i < IOAPIC_NUM_PINS; i++)
569                 ioapic->redirtbl[i].fields.mask = 1;
570         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
571         ioapic->ioregsel = 0;
572         ioapic->irr = 0;
573         ioapic->id = 0;
574         rtc_irq_eoi_tracking_reset(ioapic);
575         update_handled_vectors(ioapic);
576 }
577
578 static const struct kvm_io_device_ops ioapic_mmio_ops = {
579         .read     = ioapic_mmio_read,
580         .write    = ioapic_mmio_write,
581 };
582
583 int kvm_ioapic_init(struct kvm *kvm)
584 {
585         struct kvm_ioapic *ioapic;
586         int ret;
587
588         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
589         if (!ioapic)
590                 return -ENOMEM;
591         spin_lock_init(&ioapic->lock);
592         kvm->arch.vioapic = ioapic;
593         kvm_ioapic_reset(ioapic);
594         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
595         ioapic->kvm = kvm;
596         mutex_lock(&kvm->slots_lock);
597         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
598                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
599         mutex_unlock(&kvm->slots_lock);
600         if (ret < 0) {
601                 kvm->arch.vioapic = NULL;
602                 kfree(ioapic);
603         }
604
605         return ret;
606 }
607
608 void kvm_ioapic_destroy(struct kvm *kvm)
609 {
610         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
611
612         if (ioapic) {
613                 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
614                 kvm->arch.vioapic = NULL;
615                 kfree(ioapic);
616         }
617 }
618
619 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
620 {
621         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
622         if (!ioapic)
623                 return -EINVAL;
624
625         spin_lock(&ioapic->lock);
626         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
627         spin_unlock(&ioapic->lock);
628         return 0;
629 }
630
631 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
632 {
633         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
634         if (!ioapic)
635                 return -EINVAL;
636
637         spin_lock(&ioapic->lock);
638         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
639         ioapic->irr = 0;
640         update_handled_vectors(ioapic);
641         kvm_vcpu_request_scan_ioapic(kvm);
642         kvm_ioapic_inject_all(ioapic, state->irr);
643         spin_unlock(&ioapic->lock);
644         return 0;
645 }