virt/kvm/ioapic.c

   1 /*
   2  *  Copyright (C) 2001  MandrakeSoft S.A.
   3  *
   4  *    MandrakeSoft S.A.
   5  *    43, rue d'Aboukir
   6  *    75002 Paris - France
   7  *    http://www.linux-mandrake.com/
   8  *    http://www.mandrakesoft.com/
   9  *
  10  *  This library is free software; you can redistribute it and/or
  11  *  modify it under the terms of the GNU Lesser General Public
  12  *  License as published by the Free Software Foundation; either
  13  *  version 2 of the License, or (at your option) any later version.
  14  *
  15  *  This library is distributed in the hope that it will be useful,
  16  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  *  Lesser General Public License for more details.
  19  *
  20  *  You should have received a copy of the GNU Lesser General Public
  21  *  License along with this library; if not, write to the Free Software
  22  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  23  *
  24  *  Yunhong Jiang <yunhong.jiang@intel.com>
  25  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
  26  *  Based on Xen 3.1 code.
  27  */
  28
  29 #include <linux/kvm_host.h>
  30 #include <linux/kvm.h>
  31 #include <linux/mm.h>
  32 #include <linux/highmem.h>
  33 #include <linux/smp.h>
  34 #include <linux/hrtimer.h>
  35 #include <linux/io.h>
  36 #include <asm/processor.h>
  37 #include <asm/page.h>
  38 #include <asm/current.h>
  39
  40 #include "ioapic.h"
  41 #include "lapic.h"
  42
  43 #if 0
  44 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
  45 #else
  46 #define ioapic_debug(fmt, arg...)
  47 #endif
  48 static void ioapic_deliver(struct kvm_ioapic *vioapic, int irq);
  49
  50 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
  51                                           unsigned long addr,
  52                                           unsigned long length)
  53 {
  54         unsigned long result = 0;
  55
  56         switch (ioapic->ioregsel) {
  57         case IOAPIC_REG_VERSION:
  58                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
  59                           | (IOAPIC_VERSION_ID & 0xff));
  60                 break;
  61
  62         case IOAPIC_REG_APIC_ID:
  63         case IOAPIC_REG_ARB_ID:
  64                 result = ((ioapic->id & 0xf) << 24);
  65                 break;
  66
  67         default:
  68                 {
  69                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
  70                         u64 redir_content;
  71
  72                         ASSERT(redir_index < IOAPIC_NUM_PINS);
  73
  74                         redir_content = ioapic->redirtbl[redir_index].bits;
  75                         result = (ioapic->ioregsel & 0x1) ?
  76                             (redir_content >> 32) & 0xffffffff :
  77                             redir_content & 0xffffffff;
  78                         break;
  79                 }
  80         }
  81
  82         return result;
  83 }
  84
  85 static void ioapic_service(struct kvm_ioapic *ioapic, unsigned int idx)
  86 {
  87         union ioapic_redir_entry *pent;
  88
  89         pent = &ioapic->redirtbl[idx];
  90
  91         if (!pent->fields.mask) {
  92                 ioapic_deliver(ioapic, idx);
  93                 if (pent->fields.trig_mode == IOAPIC_LEVEL_TRIG)
  94                         pent->fields.remote_irr = 1;
  95         }
  96         if (!pent->fields.trig_mode)
  97                 ioapic->irr &= ~(1 << idx);
  98 }
  99
 100 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
 101 {
 102         unsigned index;
 103
 104         switch (ioapic->ioregsel) {
 105         case IOAPIC_REG_VERSION:
 106                 /* Writes are ignored. */
 107                 break;
 108
 109         case IOAPIC_REG_APIC_ID:
 110                 ioapic->id = (val >> 24) & 0xf;
 111                 break;
 112
 113         case IOAPIC_REG_ARB_ID:
 114                 break;
 115
 116         default:
 117                 index = (ioapic->ioregsel - 0x10) >> 1;
 118
 119                 ioapic_debug("change redir index %x val %x\n", index, val);
 120                 if (index >= IOAPIC_NUM_PINS)
 121                         return;
 122                 if (ioapic->ioregsel & 1) {
 123                         ioapic->redirtbl[index].bits &= 0xffffffff;
 124                         ioapic->redirtbl[index].bits |= (u64) val << 32;
 125                 } else {
 126                         ioapic->redirtbl[index].bits &= ~0xffffffffULL;
 127                         ioapic->redirtbl[index].bits |= (u32) val;
 128                         ioapic->redirtbl[index].fields.remote_irr = 0;
 129                 }
 130                 if (ioapic->irr & (1 << index))
 131                         ioapic_service(ioapic, index);
 132                 break;
 133         }
 134 }
 135
 136 static void ioapic_inj_irq(struct kvm_ioapic *ioapic,
 137                            struct kvm_vcpu *vcpu,
 138                            u8 vector, u8 trig_mode, u8 delivery_mode)
 139 {
 140         ioapic_debug("irq %d trig %d deliv %d\n", vector, trig_mode,
 141                      delivery_mode);
 142
 143         ASSERT((delivery_mode == IOAPIC_FIXED) ||
 144                (delivery_mode == IOAPIC_LOWEST_PRIORITY));
 145
 146         kvm_apic_set_irq(vcpu, vector, trig_mode);
 147 }
 148
 149 static u32 ioapic_get_delivery_bitmask(struct kvm_ioapic *ioapic, u8 dest,
 150                                        u8 dest_mode)
 151 {
 152         u32 mask = 0;
 153         int i;
 154         struct kvm *kvm = ioapic->kvm;
 155         struct kvm_vcpu *vcpu;
 156
 157         ioapic_debug("dest %d dest_mode %d\n", dest, dest_mode);
 158
 159         if (dest_mode == 0) {   /* Physical mode. */
 160                 if (dest == 0xFF) {     /* Broadcast. */
 161                         for (i = 0; i < KVM_MAX_VCPUS; ++i)
 162                                 if (kvm->vcpus[i] && kvm->vcpus[i]->arch.apic)
 163                                         mask |= 1 << i;
 164                         return mask;
 165                 }
 166                 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
 167                         vcpu = kvm->vcpus[i];
 168                         if (!vcpu)
 169                                 continue;
 170                         if (kvm_apic_match_physical_addr(vcpu->arch.apic, dest)) {
 171                                 if (vcpu->arch.apic)
 172                                         mask = 1 << i;
 173                                 break;
 174                         }
 175                 }
 176         } else if (dest != 0)   /* Logical mode, MDA non-zero. */
 177                 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
 178                         vcpu = kvm->vcpus[i];
 179                         if (!vcpu)
 180                                 continue;
 181                         if (vcpu->arch.apic &&
 182                             kvm_apic_match_logical_addr(vcpu->arch.apic, dest))
 183                                 mask |= 1 << vcpu->vcpu_id;
 184                 }
 185         ioapic_debug("mask %x\n", mask);
 186         return mask;
 187 }
 188
 189 static void ioapic_deliver(struct kvm_ioapic *ioapic, int irq)
 190 {
 191         u8 dest = ioapic->redirtbl[irq].fields.dest_id;
 192         u8 dest_mode = ioapic->redirtbl[irq].fields.dest_mode;
 193         u8 delivery_mode = ioapic->redirtbl[irq].fields.delivery_mode;
 194         u8 vector = ioapic->redirtbl[irq].fields.vector;
 195         u8 trig_mode = ioapic->redirtbl[irq].fields.trig_mode;
 196         u32 deliver_bitmask;
 197         struct kvm_vcpu *vcpu;
 198         int vcpu_id;
 199
 200         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
 201                      "vector=%x trig_mode=%x\n",
 202                      dest, dest_mode, delivery_mode, vector, trig_mode);
 203
 204         deliver_bitmask = ioapic_get_delivery_bitmask(ioapic, dest, dest_mode);
 205         if (!deliver_bitmask) {
 206                 ioapic_debug("no target on destination\n");
 207                 return;
 208         }
 209
 210         switch (delivery_mode) {
 211         case IOAPIC_LOWEST_PRIORITY:
 212                 vcpu = kvm_get_lowest_prio_vcpu(ioapic->kvm, vector,
 213                                 deliver_bitmask);
 214 #ifdef CONFIG_X86
 215                 if (irq == 0)
 216                         vcpu = ioapic->kvm->vcpus[0];
 217 #endif
 218                 if (vcpu != NULL)
 219                         ioapic_inj_irq(ioapic, vcpu, vector,
 220                                        trig_mode, delivery_mode);
 221                 else
 222                         ioapic_debug("null lowest prio vcpu: "
 223                                      "mask=%x vector=%x delivery_mode=%x\n",
 224                                      deliver_bitmask, vector, IOAPIC_LOWEST_PRIORITY);
 225                 break;
 226         case IOAPIC_FIXED:
 227 #ifdef CONFIG_X86
 228                 if (irq == 0)
 229                         deliver_bitmask = 1;
 230 #endif
 231                 for (vcpu_id = 0; deliver_bitmask != 0; vcpu_id++) {
 232                         if (!(deliver_bitmask & (1 << vcpu_id)))
 233                                 continue;
 234                         deliver_bitmask &= ~(1 << vcpu_id);
 235                         vcpu = ioapic->kvm->vcpus[vcpu_id];
 236                         if (vcpu) {
 237                                 ioapic_inj_irq(ioapic, vcpu, vector,
 238                                                trig_mode, delivery_mode);
 239                         }
 240                 }
 241                 break;
 242
 243                 /* TODO: NMI */
 244         default:
 245                 printk(KERN_WARNING "Unsupported delivery mode %d\n",
 246                        delivery_mode);
 247                 break;
 248         }
 249 }
 250
 251 void kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int level)
 252 {
 253         u32 old_irr = ioapic->irr;
 254         u32 mask = 1 << irq;
 255         union ioapic_redir_entry entry;
 256
 257         if (irq >= 0 && irq < IOAPIC_NUM_PINS) {
 258                 entry = ioapic->redirtbl[irq];
 259                 level ^= entry.fields.polarity;
 260                 if (!level)
 261                         ioapic->irr &= ~mask;
 262                 else {
 263                         ioapic->irr |= mask;
 264                         if ((!entry.fields.trig_mode && old_irr != ioapic->irr)
 265                             || !entry.fields.remote_irr)
 266                                 ioapic_service(ioapic, irq);
 267                 }
 268         }
 269 }
 270
 271 static int get_eoi_gsi(struct kvm_ioapic *ioapic, int vector)
 272 {
 273         int i;
 274
 275         for (i = 0; i < IOAPIC_NUM_PINS; i++)
 276                 if (ioapic->redirtbl[i].fields.vector == vector)
 277                         return i;
 278         return -1;
 279 }
 280
 281 void kvm_ioapic_update_eoi(struct kvm *kvm, int vector)
 282 {
 283         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 284         union ioapic_redir_entry *ent;
 285         int gsi;
 286
 287         gsi = get_eoi_gsi(ioapic, vector);
 288         if (gsi == -1) {
 289                 printk(KERN_WARNING "Can't find redir item for %d EOI\n",
 290                        vector);
 291                 return;
 292         }
 293
 294         ent = &ioapic->redirtbl[gsi];
 295         ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
 296
 297         ent->fields.remote_irr = 0;
 298         if (!ent->fields.mask && (ioapic->irr & (1 << gsi)))
 299                 ioapic_deliver(ioapic, gsi);
 300 }
 301
 302 static int ioapic_in_range(struct kvm_io_device *this, gpa_t addr)
 303 {
 304         struct kvm_ioapic *ioapic = (struct kvm_ioapic *)this->private;
 305
 306         return ((addr >= ioapic->base_address &&
 307                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
 308 }
 309
 310 static void ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len,
 311                              void *val)
 312 {
 313         struct kvm_ioapic *ioapic = (struct kvm_ioapic *)this->private;
 314         u32 result;
 315
 316         ioapic_debug("addr %lx\n", (unsigned long)addr);
 317         ASSERT(!(addr & 0xf));  /* check alignment */
 318
 319         addr &= 0xff;
 320         switch (addr) {
 321         case IOAPIC_REG_SELECT:
 322                 result = ioapic->ioregsel;
 323                 break;
 324
 325         case IOAPIC_REG_WINDOW:
 326                 result = ioapic_read_indirect(ioapic, addr, len);
 327                 break;
 328
 329         default:
 330                 result = 0;
 331                 break;
 332         }
 333         switch (len) {
 334         case 8:
 335                 *(u64 *) val = result;
 336                 break;
 337         case 1:
 338         case 2:
 339         case 4:
 340                 memcpy(val, (char *)&result, len);
 341                 break;
 342         default:
 343                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
 344         }
 345 }
 346
 347 static void ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
 348                               const void *val)
 349 {
 350         struct kvm_ioapic *ioapic = (struct kvm_ioapic *)this->private;
 351         u32 data;
 352
 353         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
 354                      (void*)addr, len, val);
 355         ASSERT(!(addr & 0xf));  /* check alignment */
 356         if (len == 4 || len == 8)
 357                 data = *(u32 *) val;
 358         else {
 359                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
 360                 return;
 361         }
 362
 363         addr &= 0xff;
 364         switch (addr) {
 365         case IOAPIC_REG_SELECT:
 366                 ioapic->ioregsel = data;
 367                 break;
 368
 369         case IOAPIC_REG_WINDOW:
 370                 ioapic_write_indirect(ioapic, data);
 371                 break;
 372 #ifdef  CONFIG_IA64
 373         case IOAPIC_REG_EOI:
 374                 kvm_ioapic_update_eoi(ioapic->kvm, data);
 375                 break;
 376 #endif
 377
 378         default:
 379                 break;
 380         }
 381 }
 382
 383 void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
 384 {
 385         int i;
 386
 387         for (i = 0; i < IOAPIC_NUM_PINS; i++)
 388                 ioapic->redirtbl[i].fields.mask = 1;
 389         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
 390         ioapic->ioregsel = 0;
 391         ioapic->irr = 0;
 392         ioapic->id = 0;
 393 }
 394
 395 int kvm_ioapic_init(struct kvm *kvm)
 396 {
 397         struct kvm_ioapic *ioapic;
 398
 399         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
 400         if (!ioapic)
 401                 return -ENOMEM;
 402         kvm->arch.vioapic = ioapic;
 403         kvm_ioapic_reset(ioapic);
 404         ioapic->dev.read = ioapic_mmio_read;
 405         ioapic->dev.write = ioapic_mmio_write;
 406         ioapic->dev.in_range = ioapic_in_range;
 407         ioapic->dev.private = ioapic;
 408         ioapic->kvm = kvm;
 409         kvm_io_bus_register_dev(&kvm->mmio_bus, &ioapic->dev);
 410         return 0;
 411 }