Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[sfrench/cifs-2.6.git] / virt / kvm / ioapic.c
1 /*
2  *  Copyright (C) 2001  MandrakeSoft S.A.
3  *
4  *    MandrakeSoft S.A.
5  *    43, rue d'Aboukir
6  *    75002 Paris - France
7  *    http://www.linux-mandrake.com/
8  *    http://www.mandrakesoft.com/
9  *
10  *  This library is free software; you can redistribute it and/or
11  *  modify it under the terms of the GNU Lesser General Public
12  *  License as published by the Free Software Foundation; either
13  *  version 2 of the License, or (at your option) any later version.
14  *
15  *  This library is distributed in the hope that it will be useful,
16  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18  *  Lesser General Public License for more details.
19  *
20  *  You should have received a copy of the GNU Lesser General Public
21  *  License along with this library; if not, write to the Free Software
22  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
23  *
24  *  Yunhong Jiang <yunhong.jiang@intel.com>
25  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
26  *  Based on Xen 3.1 code.
27  */
28
29 #include <linux/kvm_host.h>
30 #include <linux/kvm.h>
31 #include <linux/mm.h>
32 #include <linux/highmem.h>
33 #include <linux/smp.h>
34 #include <linux/hrtimer.h>
35 #include <linux/io.h>
36 #include <linux/slab.h>
37 #include <asm/processor.h>
38 #include <asm/page.h>
39 #include <asm/current.h>
40 #include <trace/events/kvm.h>
41
42 #include "ioapic.h"
43 #include "lapic.h"
44 #include "irq.h"
45
46 #if 0
47 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
48 #else
49 #define ioapic_debug(fmt, arg...)
50 #endif
51 static int ioapic_deliver(struct kvm_ioapic *vioapic, int irq);
52
53 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
54                                           unsigned long addr,
55                                           unsigned long length)
56 {
57         unsigned long result = 0;
58
59         switch (ioapic->ioregsel) {
60         case IOAPIC_REG_VERSION:
61                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
62                           | (IOAPIC_VERSION_ID & 0xff));
63                 break;
64
65         case IOAPIC_REG_APIC_ID:
66         case IOAPIC_REG_ARB_ID:
67                 result = ((ioapic->id & 0xf) << 24);
68                 break;
69
70         default:
71                 {
72                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
73                         u64 redir_content;
74
75                         ASSERT(redir_index < IOAPIC_NUM_PINS);
76
77                         redir_content = ioapic->redirtbl[redir_index].bits;
78                         result = (ioapic->ioregsel & 0x1) ?
79                             (redir_content >> 32) & 0xffffffff :
80                             redir_content & 0xffffffff;
81                         break;
82                 }
83         }
84
85         return result;
86 }
87
88 static int ioapic_service(struct kvm_ioapic *ioapic, unsigned int idx)
89 {
90         union kvm_ioapic_redirect_entry *pent;
91         int injected = -1;
92
93         pent = &ioapic->redirtbl[idx];
94
95         if (!pent->fields.mask) {
96                 injected = ioapic_deliver(ioapic, idx);
97                 if (injected && pent->fields.trig_mode == IOAPIC_LEVEL_TRIG)
98                         pent->fields.remote_irr = 1;
99         }
100
101         return injected;
102 }
103
104 static void update_handled_vectors(struct kvm_ioapic *ioapic)
105 {
106         DECLARE_BITMAP(handled_vectors, 256);
107         int i;
108
109         memset(handled_vectors, 0, sizeof(handled_vectors));
110         for (i = 0; i < IOAPIC_NUM_PINS; ++i)
111                 __set_bit(ioapic->redirtbl[i].fields.vector, handled_vectors);
112         memcpy(ioapic->handled_vectors, handled_vectors,
113                sizeof(handled_vectors));
114         smp_wmb();
115 }
116
117 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
118 {
119         unsigned index;
120         bool mask_before, mask_after;
121         union kvm_ioapic_redirect_entry *e;
122
123         switch (ioapic->ioregsel) {
124         case IOAPIC_REG_VERSION:
125                 /* Writes are ignored. */
126                 break;
127
128         case IOAPIC_REG_APIC_ID:
129                 ioapic->id = (val >> 24) & 0xf;
130                 break;
131
132         case IOAPIC_REG_ARB_ID:
133                 break;
134
135         default:
136                 index = (ioapic->ioregsel - 0x10) >> 1;
137
138                 ioapic_debug("change redir index %x val %x\n", index, val);
139                 if (index >= IOAPIC_NUM_PINS)
140                         return;
141                 e = &ioapic->redirtbl[index];
142                 mask_before = e->fields.mask;
143                 if (ioapic->ioregsel & 1) {
144                         e->bits &= 0xffffffff;
145                         e->bits |= (u64) val << 32;
146                 } else {
147                         e->bits &= ~0xffffffffULL;
148                         e->bits |= (u32) val;
149                         e->fields.remote_irr = 0;
150                 }
151                 update_handled_vectors(ioapic);
152                 mask_after = e->fields.mask;
153                 if (mask_before != mask_after)
154                         kvm_fire_mask_notifiers(ioapic->kvm, index, mask_after);
155                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
156                     && ioapic->irr & (1 << index))
157                         ioapic_service(ioapic, index);
158                 break;
159         }
160 }
161
162 static int ioapic_deliver(struct kvm_ioapic *ioapic, int irq)
163 {
164         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
165         struct kvm_lapic_irq irqe;
166
167         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
168                      "vector=%x trig_mode=%x\n",
169                      entry->fields.dest, entry->fields.dest_mode,
170                      entry->fields.delivery_mode, entry->fields.vector,
171                      entry->fields.trig_mode);
172
173         irqe.dest_id = entry->fields.dest_id;
174         irqe.vector = entry->fields.vector;
175         irqe.dest_mode = entry->fields.dest_mode;
176         irqe.trig_mode = entry->fields.trig_mode;
177         irqe.delivery_mode = entry->fields.delivery_mode << 8;
178         irqe.level = 1;
179         irqe.shorthand = 0;
180
181 #ifdef CONFIG_X86
182         /* Always delivery PIT interrupt to vcpu 0 */
183         if (irq == 0) {
184                 irqe.dest_mode = 0; /* Physical mode. */
185                 /* need to read apic_id from apic regiest since
186                  * it can be rewritten */
187                 irqe.dest_id = ioapic->kvm->bsp_vcpu->vcpu_id;
188         }
189 #endif
190         return kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe);
191 }
192
193 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int level)
194 {
195         u32 old_irr;
196         u32 mask = 1 << irq;
197         union kvm_ioapic_redirect_entry entry;
198         int ret = 1;
199
200         spin_lock(&ioapic->lock);
201         old_irr = ioapic->irr;
202         if (irq >= 0 && irq < IOAPIC_NUM_PINS) {
203                 entry = ioapic->redirtbl[irq];
204                 level ^= entry.fields.polarity;
205                 if (!level)
206                         ioapic->irr &= ~mask;
207                 else {
208                         int edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
209                         ioapic->irr |= mask;
210                         if ((edge && old_irr != ioapic->irr) ||
211                             (!edge && !entry.fields.remote_irr))
212                                 ret = ioapic_service(ioapic, irq);
213                         else
214                                 ret = 0; /* report coalesced interrupt */
215                 }
216                 trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
217         }
218         spin_unlock(&ioapic->lock);
219
220         return ret;
221 }
222
223 static void __kvm_ioapic_update_eoi(struct kvm_ioapic *ioapic, int vector,
224                                      int trigger_mode)
225 {
226         int i;
227
228         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
229                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
230
231                 if (ent->fields.vector != vector)
232                         continue;
233
234                 /*
235                  * We are dropping lock while calling ack notifiers because ack
236                  * notifier callbacks for assigned devices call into IOAPIC
237                  * recursively. Since remote_irr is cleared only after call
238                  * to notifiers if the same vector will be delivered while lock
239                  * is dropped it will be put into irr and will be delivered
240                  * after ack notifier returns.
241                  */
242                 spin_unlock(&ioapic->lock);
243                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
244                 spin_lock(&ioapic->lock);
245
246                 if (trigger_mode != IOAPIC_LEVEL_TRIG)
247                         continue;
248
249                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
250                 ent->fields.remote_irr = 0;
251                 if (!ent->fields.mask && (ioapic->irr & (1 << i)))
252                         ioapic_service(ioapic, i);
253         }
254 }
255
256 void kvm_ioapic_update_eoi(struct kvm *kvm, int vector, int trigger_mode)
257 {
258         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
259
260         smp_rmb();
261         if (!test_bit(vector, ioapic->handled_vectors))
262                 return;
263         spin_lock(&ioapic->lock);
264         __kvm_ioapic_update_eoi(ioapic, vector, trigger_mode);
265         spin_unlock(&ioapic->lock);
266 }
267
268 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
269 {
270         return container_of(dev, struct kvm_ioapic, dev);
271 }
272
273 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
274 {
275         return ((addr >= ioapic->base_address &&
276                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
277 }
278
279 static int ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len,
280                             void *val)
281 {
282         struct kvm_ioapic *ioapic = to_ioapic(this);
283         u32 result;
284         if (!ioapic_in_range(ioapic, addr))
285                 return -EOPNOTSUPP;
286
287         ioapic_debug("addr %lx\n", (unsigned long)addr);
288         ASSERT(!(addr & 0xf));  /* check alignment */
289
290         addr &= 0xff;
291         spin_lock(&ioapic->lock);
292         switch (addr) {
293         case IOAPIC_REG_SELECT:
294                 result = ioapic->ioregsel;
295                 break;
296
297         case IOAPIC_REG_WINDOW:
298                 result = ioapic_read_indirect(ioapic, addr, len);
299                 break;
300
301         default:
302                 result = 0;
303                 break;
304         }
305         spin_unlock(&ioapic->lock);
306
307         switch (len) {
308         case 8:
309                 *(u64 *) val = result;
310                 break;
311         case 1:
312         case 2:
313         case 4:
314                 memcpy(val, (char *)&result, len);
315                 break;
316         default:
317                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
318         }
319         return 0;
320 }
321
322 static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
323                              const void *val)
324 {
325         struct kvm_ioapic *ioapic = to_ioapic(this);
326         u32 data;
327         if (!ioapic_in_range(ioapic, addr))
328                 return -EOPNOTSUPP;
329
330         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
331                      (void*)addr, len, val);
332         ASSERT(!(addr & 0xf));  /* check alignment */
333
334         if (len == 4 || len == 8)
335                 data = *(u32 *) val;
336         else {
337                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
338                 return 0;
339         }
340
341         addr &= 0xff;
342         spin_lock(&ioapic->lock);
343         switch (addr) {
344         case IOAPIC_REG_SELECT:
345                 ioapic->ioregsel = data;
346                 break;
347
348         case IOAPIC_REG_WINDOW:
349                 ioapic_write_indirect(ioapic, data);
350                 break;
351 #ifdef  CONFIG_IA64
352         case IOAPIC_REG_EOI:
353                 __kvm_ioapic_update_eoi(ioapic, data, IOAPIC_LEVEL_TRIG);
354                 break;
355 #endif
356
357         default:
358                 break;
359         }
360         spin_unlock(&ioapic->lock);
361         return 0;
362 }
363
364 void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
365 {
366         int i;
367
368         for (i = 0; i < IOAPIC_NUM_PINS; i++)
369                 ioapic->redirtbl[i].fields.mask = 1;
370         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
371         ioapic->ioregsel = 0;
372         ioapic->irr = 0;
373         ioapic->id = 0;
374         update_handled_vectors(ioapic);
375 }
376
377 static const struct kvm_io_device_ops ioapic_mmio_ops = {
378         .read     = ioapic_mmio_read,
379         .write    = ioapic_mmio_write,
380 };
381
382 int kvm_ioapic_init(struct kvm *kvm)
383 {
384         struct kvm_ioapic *ioapic;
385         int ret;
386
387         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
388         if (!ioapic)
389                 return -ENOMEM;
390         spin_lock_init(&ioapic->lock);
391         kvm->arch.vioapic = ioapic;
392         kvm_ioapic_reset(ioapic);
393         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
394         ioapic->kvm = kvm;
395         mutex_lock(&kvm->slots_lock);
396         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
397         mutex_unlock(&kvm->slots_lock);
398         if (ret < 0) {
399                 kvm->arch.vioapic = NULL;
400                 kfree(ioapic);
401         }
402
403         return ret;
404 }
405
406 void kvm_ioapic_destroy(struct kvm *kvm)
407 {
408         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
409
410         if (ioapic) {
411                 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
412                 kvm->arch.vioapic = NULL;
413                 kfree(ioapic);
414         }
415 }
416
417 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
418 {
419         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
420         if (!ioapic)
421                 return -EINVAL;
422
423         spin_lock(&ioapic->lock);
424         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
425         spin_unlock(&ioapic->lock);
426         return 0;
427 }
428
429 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
430 {
431         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
432         if (!ioapic)
433                 return -EINVAL;
434
435         spin_lock(&ioapic->lock);
436         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
437         update_handled_vectors(ioapic);
438         spin_unlock(&ioapic->lock);
439         return 0;
440 }