sound/sparc/cs4231.c

   1 /*
   2  * Driver for CS4231 sound chips found on Sparcs.
   3  * Copyright (C) 2002 David S. Miller <davem@redhat.com>
   4  *
   5  * Based entirely upon drivers/sbus/audio/cs4231.c which is:
   6  * Copyright (C) 1996, 1997, 1998, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
   7  * and also sound/isa/cs423x/cs4231_lib.c which is:
   8  * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   9  */
  10
  11 #include <linux/config.h>
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/slab.h>
  15 #include <linux/delay.h>
  16 #include <linux/init.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/moduleparam.h>
  19
  20 #include <sound/driver.h>
  21 #include <sound/core.h>
  22 #include <sound/pcm.h>
  23 #include <sound/info.h>
  24 #include <sound/control.h>
  25 #include <sound/timer.h>
  26 #include <sound/initval.h>
  27 #include <sound/pcm_params.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/irq.h>
  31
  32 #ifdef CONFIG_SBUS
  33 #define SBUS_SUPPORT
  34 #endif
  35
  36 #ifdef SBUS_SUPPORT
  37 #include <asm/sbus.h>
  38 #endif
  39
  40 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
  41 #define EBUS_SUPPORT
  42 #endif
  43
  44 #ifdef EBUS_SUPPORT
  45 #include <linux/pci.h>
  46 #include <asm/ebus.h>
  47 #endif
  48
  49 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  50 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  51 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  52
  53 module_param_array(index, int, NULL, 0444);
  54 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
  55 module_param_array(id, charp, NULL, 0444);
  56 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
  57 module_param_array(enable, bool, NULL, 0444);
  58 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
  59 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
  60 MODULE_DESCRIPTION("Sun CS4231");
  61 MODULE_LICENSE("GPL");
  62 MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
  63
  64 #ifdef SBUS_SUPPORT
  65 struct sbus_dma_info {
  66        spinlock_t      lock;
  67        int             dir;
  68        void __iomem    *regs;
  69 };
  70 #endif
  71
  72 struct snd_cs4231;
  73 struct cs4231_dma_control {
  74         void            (*prepare)(struct cs4231_dma_control *dma_cont, int dir);
  75         void            (*enable)(struct cs4231_dma_control *dma_cont, int on);
  76         int             (*request)(struct cs4231_dma_control *dma_cont, dma_addr_t bus_addr, size_t len);
  77         unsigned int    (*address)(struct cs4231_dma_control *dma_cont);
  78         void            (*reset)(struct snd_cs4231 *chip);
  79         void            (*preallocate)(struct snd_cs4231 *chip, struct snd_pcm *pcm);
  80 #ifdef EBUS_SUPPORT
  81         struct          ebus_dma_info   ebus_info;
  82 #endif
  83 #ifdef SBUS_SUPPORT
  84         struct          sbus_dma_info   sbus_info;
  85 #endif
  86 };
  87
  88 struct snd_cs4231 {
  89         spinlock_t              lock;
  90         void __iomem            *port;
  91
  92         struct cs4231_dma_control       p_dma;
  93         struct cs4231_dma_control       c_dma;
  94
  95         u32                     flags;
  96 #define CS4231_FLAG_EBUS        0x00000001
  97 #define CS4231_FLAG_PLAYBACK    0x00000002
  98 #define CS4231_FLAG_CAPTURE     0x00000004
  99
 100         struct snd_card         *card;
 101         struct snd_pcm          *pcm;
 102         struct snd_pcm_substream        *playback_substream;
 103         unsigned int            p_periods_sent;
 104         struct snd_pcm_substream        *capture_substream;
 105         unsigned int            c_periods_sent;
 106         struct snd_timer        *timer;
 107
 108         unsigned short mode;
 109 #define CS4231_MODE_NONE        0x0000
 110 #define CS4231_MODE_PLAY        0x0001
 111 #define CS4231_MODE_RECORD      0x0002
 112 #define CS4231_MODE_TIMER       0x0004
 113 #define CS4231_MODE_OPEN        (CS4231_MODE_PLAY|CS4231_MODE_RECORD|CS4231_MODE_TIMER)
 114
 115         unsigned char           image[32];      /* registers image */
 116         int                     mce_bit;
 117         int                     calibrate_mute;
 118         struct mutex            mce_mutex;
 119         struct mutex            open_mutex;
 120
 121         union {
 122 #ifdef SBUS_SUPPORT
 123                 struct sbus_dev         *sdev;
 124 #endif
 125 #ifdef EBUS_SUPPORT
 126                 struct pci_dev          *pdev;
 127 #endif
 128         } dev_u;
 129         unsigned int            irq[2];
 130         unsigned int            regs_size;
 131         struct snd_cs4231       *next;
 132 };
 133
 134 static struct snd_cs4231 *cs4231_list;
 135
 136 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
 137  * now....  -DaveM
 138  */
 139
 140 /* IO ports */
 141
 142 #define CS4231P(chip, x)        ((chip)->port + c_d_c_CS4231##x)
 143
 144 /* XXX offsets are different than PC ISA chips... */
 145 #define c_d_c_CS4231REGSEL      0x0
 146 #define c_d_c_CS4231REG         0x4
 147 #define c_d_c_CS4231STATUS      0x8
 148 #define c_d_c_CS4231PIO         0xc
 149
 150 /* codec registers */
 151
 152 #define CS4231_LEFT_INPUT       0x00    /* left input control */
 153 #define CS4231_RIGHT_INPUT      0x01    /* right input control */
 154 #define CS4231_AUX1_LEFT_INPUT  0x02    /* left AUX1 input control */
 155 #define CS4231_AUX1_RIGHT_INPUT 0x03    /* right AUX1 input control */
 156 #define CS4231_AUX2_LEFT_INPUT  0x04    /* left AUX2 input control */
 157 #define CS4231_AUX2_RIGHT_INPUT 0x05    /* right AUX2 input control */
 158 #define CS4231_LEFT_OUTPUT      0x06    /* left output control register */
 159 #define CS4231_RIGHT_OUTPUT     0x07    /* right output control register */
 160 #define CS4231_PLAYBK_FORMAT    0x08    /* clock and data format - playback - bits 7-0 MCE */
 161 #define CS4231_IFACE_CTRL       0x09    /* interface control - bits 7-2 MCE */
 162 #define CS4231_PIN_CTRL         0x0a    /* pin control */
 163 #define CS4231_TEST_INIT        0x0b    /* test and initialization */
 164 #define CS4231_MISC_INFO        0x0c    /* miscellaneaous information */
 165 #define CS4231_LOOPBACK         0x0d    /* loopback control */
 166 #define CS4231_PLY_UPR_CNT      0x0e    /* playback upper base count */
 167 #define CS4231_PLY_LWR_CNT      0x0f    /* playback lower base count */
 168 #define CS4231_ALT_FEATURE_1    0x10    /* alternate #1 feature enable */
 169 #define CS4231_ALT_FEATURE_2    0x11    /* alternate #2 feature enable */
 170 #define CS4231_LEFT_LINE_IN     0x12    /* left line input control */
 171 #define CS4231_RIGHT_LINE_IN    0x13    /* right line input control */
 172 #define CS4231_TIMER_LOW        0x14    /* timer low byte */
 173 #define CS4231_TIMER_HIGH       0x15    /* timer high byte */
 174 #define CS4231_LEFT_MIC_INPUT   0x16    /* left MIC input control register (InterWave only) */
 175 #define CS4231_RIGHT_MIC_INPUT  0x17    /* right MIC input control register (InterWave only) */
 176 #define CS4236_EXT_REG          0x17    /* extended register access */
 177 #define CS4231_IRQ_STATUS       0x18    /* irq status register */
 178 #define CS4231_LINE_LEFT_OUTPUT 0x19    /* left line output control register (InterWave only) */
 179 #define CS4231_VERSION          0x19    /* CS4231(A) - version values */
 180 #define CS4231_MONO_CTRL        0x1a    /* mono input/output control */
 181 #define CS4231_LINE_RIGHT_OUTPUT 0x1b   /* right line output control register (InterWave only) */
 182 #define CS4235_LEFT_MASTER      0x1b    /* left master output control */
 183 #define CS4231_REC_FORMAT       0x1c    /* clock and data format - record - bits 7-0 MCE */
 184 #define CS4231_PLY_VAR_FREQ     0x1d    /* playback variable frequency */
 185 #define CS4235_RIGHT_MASTER     0x1d    /* right master output control */
 186 #define CS4231_REC_UPR_CNT      0x1e    /* record upper count */
 187 #define CS4231_REC_LWR_CNT      0x1f    /* record lower count */
 188
 189 /* definitions for codec register select port - CODECP( REGSEL ) */
 190
 191 #define CS4231_INIT             0x80    /* CODEC is initializing */
 192 #define CS4231_MCE              0x40    /* mode change enable */
 193 #define CS4231_TRD              0x20    /* transfer request disable */
 194
 195 /* definitions for codec status register - CODECP( STATUS ) */
 196
 197 #define CS4231_GLOBALIRQ        0x01    /* IRQ is active */
 198
 199 /* definitions for codec irq status - CS4231_IRQ_STATUS */
 200
 201 #define CS4231_PLAYBACK_IRQ     0x10
 202 #define CS4231_RECORD_IRQ       0x20
 203 #define CS4231_TIMER_IRQ        0x40
 204 #define CS4231_ALL_IRQS         0x70
 205 #define CS4231_REC_UNDERRUN     0x08
 206 #define CS4231_REC_OVERRUN      0x04
 207 #define CS4231_PLY_OVERRUN      0x02
 208 #define CS4231_PLY_UNDERRUN     0x01
 209
 210 /* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */
 211
 212 #define CS4231_ENABLE_MIC_GAIN  0x20
 213
 214 #define CS4231_MIXS_LINE        0x00
 215 #define CS4231_MIXS_AUX1        0x40
 216 #define CS4231_MIXS_MIC         0x80
 217 #define CS4231_MIXS_ALL         0xc0
 218
 219 /* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */
 220
 221 #define CS4231_LINEAR_8         0x00    /* 8-bit unsigned data */
 222 #define CS4231_ALAW_8           0x60    /* 8-bit A-law companded */
 223 #define CS4231_ULAW_8           0x20    /* 8-bit U-law companded */
 224 #define CS4231_LINEAR_16        0x40    /* 16-bit twos complement data - little endian */
 225 #define CS4231_LINEAR_16_BIG    0xc0    /* 16-bit twos complement data - big endian */
 226 #define CS4231_ADPCM_16         0xa0    /* 16-bit ADPCM */
 227 #define CS4231_STEREO           0x10    /* stereo mode */
 228 /* bits 3-1 define frequency divisor */
 229 #define CS4231_XTAL1            0x00    /* 24.576 crystal */
 230 #define CS4231_XTAL2            0x01    /* 16.9344 crystal */
 231
 232 /* definitions for interface control register - CS4231_IFACE_CTRL */
 233
 234 #define CS4231_RECORD_PIO       0x80    /* record PIO enable */
 235 #define CS4231_PLAYBACK_PIO     0x40    /* playback PIO enable */
 236 #define CS4231_CALIB_MODE       0x18    /* calibration mode bits */
 237 #define CS4231_AUTOCALIB        0x08    /* auto calibrate */
 238 #define CS4231_SINGLE_DMA       0x04    /* use single DMA channel */
 239 #define CS4231_RECORD_ENABLE    0x02    /* record enable */
 240 #define CS4231_PLAYBACK_ENABLE  0x01    /* playback enable */
 241
 242 /* definitions for pin control register - CS4231_PIN_CTRL */
 243
 244 #define CS4231_IRQ_ENABLE       0x02    /* enable IRQ */
 245 #define CS4231_XCTL1            0x40    /* external control #1 */
 246 #define CS4231_XCTL0            0x80    /* external control #0 */
 247
 248 /* definitions for test and init register - CS4231_TEST_INIT */
 249
 250 #define CS4231_CALIB_IN_PROGRESS 0x20   /* auto calibrate in progress */
 251 #define CS4231_DMA_REQUEST      0x10    /* DMA request in progress */
 252
 253 /* definitions for misc control register - CS4231_MISC_INFO */
 254
 255 #define CS4231_MODE2            0x40    /* MODE 2 */
 256 #define CS4231_IW_MODE3         0x6c    /* MODE 3 - InterWave enhanced mode */
 257 #define CS4231_4236_MODE3       0xe0    /* MODE 3 - CS4236+ enhanced mode */
 258
 259 /* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */
 260
 261 #define CS4231_DACZ             0x01    /* zero DAC when underrun */
 262 #define CS4231_TIMER_ENABLE     0x40    /* codec timer enable */
 263 #define CS4231_OLB              0x80    /* output level bit */
 264
 265 /* SBUS DMA register defines.  */
 266
 267 #define APCCSR  0x10UL  /* APC DMA CSR */
 268 #define APCCVA  0x20UL  /* APC Capture DMA Address */
 269 #define APCCC   0x24UL  /* APC Capture Count */
 270 #define APCCNVA 0x28UL  /* APC Capture DMA Next Address */
 271 #define APCCNC  0x2cUL  /* APC Capture Next Count */
 272 #define APCPVA  0x30UL  /* APC Play DMA Address */
 273 #define APCPC   0x34UL  /* APC Play Count */
 274 #define APCPNVA 0x38UL  /* APC Play DMA Next Address */
 275 #define APCPNC  0x3cUL  /* APC Play Next Count */
 276
 277 /* Defines for SBUS DMA-routines */
 278
 279 #define APCVA  0x0UL    /* APC DMA Address */
 280 #define APCC   0x4UL    /* APC Count */
 281 #define APCNVA 0x8UL    /* APC DMA Next Address */
 282 #define APCNC  0xcUL    /* APC Next Count */
 283 #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
 284 #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
 285
 286 /* APCCSR bits */
 287
 288 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
 289 #define APC_PLAY_INT    0x400000 /* Playback interrupt */
 290 #define APC_CAPT_INT    0x200000 /* Capture interrupt */
 291 #define APC_GENL_INT    0x100000 /* General interrupt */
 292 #define APC_XINT_ENA    0x80000  /* General ext int. enable */
 293 #define APC_XINT_PLAY   0x40000  /* Playback ext intr */
 294 #define APC_XINT_CAPT   0x20000  /* Capture ext intr */
 295 #define APC_XINT_GENL   0x10000  /* Error ext intr */
 296 #define APC_XINT_EMPT   0x8000   /* Pipe empty interrupt (0 write to pva) */
 297 #define APC_XINT_PEMP   0x4000   /* Play pipe empty (pva and pnva not set) */
 298 #define APC_XINT_PNVA   0x2000   /* Playback NVA dirty */
 299 #define APC_XINT_PENA   0x1000   /* play pipe empty Int enable */
 300 #define APC_XINT_COVF   0x800    /* Cap data dropped on floor */
 301 #define APC_XINT_CNVA   0x400    /* Capture NVA dirty */
 302 #define APC_XINT_CEMP   0x200    /* Capture pipe empty (cva and cnva not set) */
 303 #define APC_XINT_CENA   0x100    /* Cap. pipe empty int enable */
 304 #define APC_PPAUSE      0x80     /* Pause the play DMA */
 305 #define APC_CPAUSE      0x40     /* Pause the capture DMA */
 306 #define APC_CDC_RESET   0x20     /* CODEC RESET */
 307 #define APC_PDMA_READY  0x08     /* Play DMA Go */
 308 #define APC_CDMA_READY  0x04     /* Capture DMA Go */
 309 #define APC_CHIP_RESET  0x01     /* Reset the chip */
 310
 311 /* EBUS DMA register offsets  */
 312
 313 #define EBDMA_CSR       0x00UL  /* Control/Status */
 314 #define EBDMA_ADDR      0x04UL  /* DMA Address */
 315 #define EBDMA_COUNT     0x08UL  /* DMA Count */
 316
 317 /*
 318  *  Some variables
 319  */
 320
 321 static unsigned char freq_bits[14] = {
 322         /* 5510 */      0x00 | CS4231_XTAL2,
 323         /* 6620 */      0x0E | CS4231_XTAL2,
 324         /* 8000 */      0x00 | CS4231_XTAL1,
 325         /* 9600 */      0x0E | CS4231_XTAL1,
 326         /* 11025 */     0x02 | CS4231_XTAL2,
 327         /* 16000 */     0x02 | CS4231_XTAL1,
 328         /* 18900 */     0x04 | CS4231_XTAL2,
 329         /* 22050 */     0x06 | CS4231_XTAL2,
 330         /* 27042 */     0x04 | CS4231_XTAL1,
 331         /* 32000 */     0x06 | CS4231_XTAL1,
 332         /* 33075 */     0x0C | CS4231_XTAL2,
 333         /* 37800 */     0x08 | CS4231_XTAL2,
 334         /* 44100 */     0x0A | CS4231_XTAL2,
 335         /* 48000 */     0x0C | CS4231_XTAL1
 336 };
 337
 338 static unsigned int rates[14] = {
 339         5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
 340         27042, 32000, 33075, 37800, 44100, 48000
 341 };
 342
 343 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
 344         .count  = 14,
 345         .list   = rates,
 346 };
 347
 348 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
 349 {
 350         return snd_pcm_hw_constraint_list(runtime, 0,
 351                                           SNDRV_PCM_HW_PARAM_RATE,
 352                                           &hw_constraints_rates);
 353 }
 354
 355 static unsigned char snd_cs4231_original_image[32] =
 356 {
 357         0x00,                   /* 00/00 - lic */
 358         0x00,                   /* 01/01 - ric */
 359         0x9f,                   /* 02/02 - la1ic */
 360         0x9f,                   /* 03/03 - ra1ic */
 361         0x9f,                   /* 04/04 - la2ic */
 362         0x9f,                   /* 05/05 - ra2ic */
 363         0xbf,                   /* 06/06 - loc */
 364         0xbf,                   /* 07/07 - roc */
 365         0x20,                   /* 08/08 - pdfr */
 366         CS4231_AUTOCALIB,       /* 09/09 - ic */
 367         0x00,                   /* 0a/10 - pc */
 368         0x00,                   /* 0b/11 - ti */
 369         CS4231_MODE2,           /* 0c/12 - mi */
 370         0x00,                   /* 0d/13 - lbc */
 371         0x00,                   /* 0e/14 - pbru */
 372         0x00,                   /* 0f/15 - pbrl */
 373         0x80,                   /* 10/16 - afei */
 374         0x01,                   /* 11/17 - afeii */
 375         0x9f,                   /* 12/18 - llic */
 376         0x9f,                   /* 13/19 - rlic */
 377         0x00,                   /* 14/20 - tlb */
 378         0x00,                   /* 15/21 - thb */
 379         0x00,                   /* 16/22 - la3mic/reserved */
 380         0x00,                   /* 17/23 - ra3mic/reserved */
 381         0x00,                   /* 18/24 - afs */
 382         0x00,                   /* 19/25 - lamoc/version */
 383         0x00,                   /* 1a/26 - mioc */
 384         0x00,                   /* 1b/27 - ramoc/reserved */
 385         0x20,                   /* 1c/28 - cdfr */
 386         0x00,                   /* 1d/29 - res4 */
 387         0x00,                   /* 1e/30 - cbru */
 388         0x00,                   /* 1f/31 - cbrl */
 389 };
 390
 391 static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
 392 {
 393 #ifdef EBUS_SUPPORT
 394         if (cp->flags & CS4231_FLAG_EBUS) {
 395                 return readb(reg_addr);
 396         } else {
 397 #endif
 398 #ifdef SBUS_SUPPORT
 399                 return sbus_readb(reg_addr);
 400 #endif
 401 #ifdef EBUS_SUPPORT
 402         }
 403 #endif
 404 }
 405
 406 static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val, void __iomem *reg_addr)
 407 {
 408 #ifdef EBUS_SUPPORT
 409         if (cp->flags & CS4231_FLAG_EBUS) {
 410                 return writeb(val, reg_addr);
 411         } else {
 412 #endif
 413 #ifdef SBUS_SUPPORT
 414                 return sbus_writeb(val, reg_addr);
 415 #endif
 416 #ifdef EBUS_SUPPORT
 417         }
 418 #endif
 419 }
 420
 421 /*
 422  *  Basic I/O functions
 423  */
 424
 425 static void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
 426                      unsigned char mask, unsigned char value)
 427 {
 428         int timeout;
 429         unsigned char tmp;
 430
 431         for (timeout = 250;
 432              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 433              timeout--)
 434                 udelay(100);
 435 #ifdef CONFIG_SND_DEBUG
 436         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 437                 snd_printdd("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 438 #endif
 439         if (chip->calibrate_mute) {
 440                 chip->image[reg] &= mask;
 441                 chip->image[reg] |= value;
 442         } else {
 443                 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 444                 mb();
 445                 tmp = (chip->image[reg] & mask) | value;
 446                 __cs4231_writeb(chip, tmp, CS4231P(chip, REG));
 447                 chip->image[reg] = tmp;
 448                 mb();
 449         }
 450 }
 451
 452 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
 453 {
 454         int timeout;
 455
 456         for (timeout = 250;
 457              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 458              timeout--)
 459                 udelay(100);
 460 #ifdef CONFIG_SND_DEBUG
 461         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 462                 snd_printdd("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 463 #endif
 464         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 465         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 466         mb();
 467 }
 468
 469 static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
 470 {
 471         int timeout;
 472
 473         for (timeout = 250;
 474              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 475              timeout--)
 476                 udelay(100);
 477 #ifdef CONFIG_SND_DEBUG
 478         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 479                 snd_printdd("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 480 #endif
 481         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 482         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 483         chip->image[reg] = value;
 484         mb();
 485 }
 486
 487 static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
 488 {
 489         int timeout;
 490         unsigned char ret;
 491
 492         for (timeout = 250;
 493              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 494              timeout--)
 495                 udelay(100);
 496 #ifdef CONFIG_SND_DEBUG
 497         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 498                 snd_printdd("in: auto calibration time out - reg = 0x%x\n", reg);
 499 #endif
 500         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 501         mb();
 502         ret = __cs4231_readb(chip, CS4231P(chip, REG));
 503         return ret;
 504 }
 505
 506 /*
 507  *  CS4231 detection / MCE routines
 508  */
 509
 510 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
 511 {
 512         int timeout;
 513
 514         /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
 515         for (timeout = 5; timeout > 0; timeout--)
 516                 __cs4231_readb(chip, CS4231P(chip, REGSEL));
 517
 518         /* end of cleanup sequence */
 519         for (timeout = 500;
 520              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 521              timeout--)
 522                 udelay(1000);
 523 }
 524
 525 static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
 526 {
 527         unsigned long flags;
 528         int timeout;
 529
 530         spin_lock_irqsave(&chip->lock, flags);
 531         for (timeout = 250; timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT); timeout--)
 532                 udelay(100);
 533 #ifdef CONFIG_SND_DEBUG
 534         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 535                 snd_printdd("mce_up - auto calibration time out (0)\n");
 536 #endif
 537         chip->mce_bit |= CS4231_MCE;
 538         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 539         if (timeout == 0x80)
 540                 snd_printdd("mce_up [%p]: serious init problem - codec still busy\n", chip->port);
 541         if (!(timeout & CS4231_MCE))
 542                 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 543         spin_unlock_irqrestore(&chip->lock, flags);
 544 }
 545
 546 static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
 547 {
 548         unsigned long flags;
 549         int timeout;
 550
 551         spin_lock_irqsave(&chip->lock, flags);
 552         snd_cs4231_busy_wait(chip);
 553 #ifdef CONFIG_SND_DEBUG
 554         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 555                 snd_printdd("mce_down [%p] - auto calibration time out (0)\n", CS4231P(chip, REGSEL));
 556 #endif
 557         chip->mce_bit &= ~CS4231_MCE;
 558         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 559         __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 560         if (timeout == 0x80)
 561                 snd_printdd("mce_down [%p]: serious init problem - codec still busy\n", chip->port);
 562         if ((timeout & CS4231_MCE) == 0) {
 563                 spin_unlock_irqrestore(&chip->lock, flags);
 564                 return;
 565         }
 566         snd_cs4231_busy_wait(chip);
 567
 568         /* calibration process */
 569
 570         for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--)
 571                 udelay(100);
 572         if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) {
 573                 snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
 574                 spin_unlock_irqrestore(&chip->lock, flags);
 575                 return;
 576         }
 577
 578         /* in 10ms increments, check condition, up to 250ms */
 579         timeout = 25;
 580         while (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) {
 581                 spin_unlock_irqrestore(&chip->lock, flags);
 582                 if (--timeout < 0) {
 583                         snd_printk("mce_down - auto calibration time out (2)\n");
 584                         return;
 585                 }
 586                 msleep(10);
 587                 spin_lock_irqsave(&chip->lock, flags);
 588         }
 589
 590         /* in 10ms increments, check condition, up to 100ms */
 591         timeout = 10;
 592         while (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT) {
 593                 spin_unlock_irqrestore(&chip->lock, flags);
 594                 if (--timeout < 0) {
 595                         snd_printk("mce_down - auto calibration time out (3)\n");
 596                         return;
 597                 }
 598                 msleep(10);
 599                 spin_lock_irqsave(&chip->lock, flags);
 600         }
 601         spin_unlock_irqrestore(&chip->lock, flags);
 602 }
 603
 604 static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
 605                                    struct snd_pcm_substream *substream,
 606                                    unsigned int *periods_sent)
 607 {
 608         struct snd_pcm_runtime *runtime = substream->runtime;
 609
 610         while (1) {
 611                 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
 612                 unsigned int offset = period_size * (*periods_sent);
 613
 614                 BUG_ON(period_size >= (1 << 24));
 615
 616                 if (dma_cont->request(dma_cont, runtime->dma_addr + offset, period_size))
 617                         return;
 618                 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
 619         }
 620 }
 621
 622 static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
 623                                unsigned int what, int on)
 624 {
 625         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
 626         struct cs4231_dma_control *dma_cont;
 627
 628         if (what & CS4231_PLAYBACK_ENABLE) {
 629                 dma_cont = &chip->p_dma;
 630                 if (on) {
 631                         dma_cont->prepare(dma_cont, 0);
 632                         dma_cont->enable(dma_cont, 1);
 633                         snd_cs4231_advance_dma(dma_cont,
 634                                 chip->playback_substream,
 635                                 &chip->p_periods_sent);
 636                 } else {
 637                         dma_cont->enable(dma_cont, 0);
 638                 }
 639         }
 640         if (what & CS4231_RECORD_ENABLE) {
 641                 dma_cont = &chip->c_dma;
 642                 if (on) {
 643                         dma_cont->prepare(dma_cont, 1);
 644                         dma_cont->enable(dma_cont, 1);
 645                         snd_cs4231_advance_dma(dma_cont,
 646                                 chip->capture_substream,
 647                                 &chip->c_periods_sent);
 648                 } else {
 649                         dma_cont->enable(dma_cont, 0);
 650                 }
 651         }
 652 }
 653
 654 static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
 655 {
 656         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
 657         int result = 0;
 658
 659         switch (cmd) {
 660         case SNDRV_PCM_TRIGGER_START:
 661         case SNDRV_PCM_TRIGGER_STOP:
 662         {
 663                 unsigned int what = 0;
 664                 struct snd_pcm_substream *s;
 665                 struct list_head *pos;
 666                 unsigned long flags;
 667
 668                 snd_pcm_group_for_each(pos, substream) {
 669                         s = snd_pcm_group_substream_entry(pos);
 670                         if (s == chip->playback_substream) {
 671                                 what |= CS4231_PLAYBACK_ENABLE;
 672                                 snd_pcm_trigger_done(s, substream);
 673                         } else if (s == chip->capture_substream) {
 674                                 what |= CS4231_RECORD_ENABLE;
 675                                 snd_pcm_trigger_done(s, substream);
 676                         }
 677                 }
 678
 679                 spin_lock_irqsave(&chip->lock, flags);
 680                 if (cmd == SNDRV_PCM_TRIGGER_START) {
 681                         cs4231_dma_trigger(substream, what, 1);
 682                         chip->image[CS4231_IFACE_CTRL] |= what;
 683                 } else {
 684                         cs4231_dma_trigger(substream, what, 0);
 685                         chip->image[CS4231_IFACE_CTRL] &= ~what;
 686                 }
 687                 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
 688                                chip->image[CS4231_IFACE_CTRL]);
 689                 spin_unlock_irqrestore(&chip->lock, flags);
 690                 break;
 691         }
 692         default:
 693                 result = -EINVAL;
 694                 break;
 695         }
 696
 697         return result;
 698 }
 699
 700 /*
 701  *  CODEC I/O
 702  */
 703
 704 static unsigned char snd_cs4231_get_rate(unsigned int rate)
 705 {
 706         int i;
 707
 708         for (i = 0; i < 14; i++)
 709                 if (rate == rates[i])
 710                         return freq_bits[i];
 711         // snd_BUG();
 712         return freq_bits[13];
 713 }
 714
 715 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format, int channels)
 716 {
 717         unsigned char rformat;
 718
 719         rformat = CS4231_LINEAR_8;
 720         switch (format) {
 721         case SNDRV_PCM_FORMAT_MU_LAW:   rformat = CS4231_ULAW_8; break;
 722         case SNDRV_PCM_FORMAT_A_LAW:    rformat = CS4231_ALAW_8; break;
 723         case SNDRV_PCM_FORMAT_S16_LE:   rformat = CS4231_LINEAR_16; break;
 724         case SNDRV_PCM_FORMAT_S16_BE:   rformat = CS4231_LINEAR_16_BIG; break;
 725         case SNDRV_PCM_FORMAT_IMA_ADPCM:        rformat = CS4231_ADPCM_16; break;
 726         }
 727         if (channels > 1)
 728                 rformat |= CS4231_STEREO;
 729         return rformat;
 730 }
 731
 732 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
 733 {
 734         unsigned long flags;
 735
 736         mute = mute ? 1 : 0;
 737         spin_lock_irqsave(&chip->lock, flags);
 738         if (chip->calibrate_mute == mute) {
 739                 spin_unlock_irqrestore(&chip->lock, flags);
 740                 return;
 741         }
 742         if (!mute) {
 743                 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
 744                                 chip->image[CS4231_LEFT_INPUT]);
 745                 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
 746                                 chip->image[CS4231_RIGHT_INPUT]);
 747                 snd_cs4231_dout(chip, CS4231_LOOPBACK,
 748                                 chip->image[CS4231_LOOPBACK]);
 749         }
 750         snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
 751                         mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
 752         snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
 753                         mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
 754         snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
 755                         mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
 756         snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
 757                         mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
 758         snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
 759                         mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
 760         snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
 761                         mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
 762         snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
 763                         mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
 764         snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
 765                         mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
 766         snd_cs4231_dout(chip, CS4231_MONO_CTRL,
 767                         mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
 768         chip->calibrate_mute = mute;
 769         spin_unlock_irqrestore(&chip->lock, flags);
 770 }
 771
 772 static void snd_cs4231_playback_format(struct snd_cs4231 *chip, struct snd_pcm_hw_params *params,
 773                                        unsigned char pdfr)
 774 {
 775         unsigned long flags;
 776
 777         mutex_lock(&chip->mce_mutex);
 778         snd_cs4231_calibrate_mute(chip, 1);
 779
 780         snd_cs4231_mce_up(chip);
 781
 782         spin_lock_irqsave(&chip->lock, flags);
 783         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 784                        (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
 785                        (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
 786                        pdfr);
 787         spin_unlock_irqrestore(&chip->lock, flags);
 788
 789         snd_cs4231_mce_down(chip);
 790
 791         snd_cs4231_calibrate_mute(chip, 0);
 792         mutex_unlock(&chip->mce_mutex);
 793 }
 794
 795 static void snd_cs4231_capture_format(struct snd_cs4231 *chip, struct snd_pcm_hw_params *params,
 796                                       unsigned char cdfr)
 797 {
 798         unsigned long flags;
 799
 800         mutex_lock(&chip->mce_mutex);
 801         snd_cs4231_calibrate_mute(chip, 1);
 802
 803         snd_cs4231_mce_up(chip);
 804
 805         spin_lock_irqsave(&chip->lock, flags);
 806         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
 807                 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 808                                ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
 809                                (cdfr & 0x0f));
 810                 spin_unlock_irqrestore(&chip->lock, flags);
 811                 snd_cs4231_mce_down(chip);
 812                 snd_cs4231_mce_up(chip);
 813                 spin_lock_irqsave(&chip->lock, flags);
 814         }
 815         snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
 816         spin_unlock_irqrestore(&chip->lock, flags);
 817
 818         snd_cs4231_mce_down(chip);
 819
 820         snd_cs4231_calibrate_mute(chip, 0);
 821         mutex_unlock(&chip->mce_mutex);
 822 }
 823
 824 /*
 825  *  Timer interface
 826  */
 827
 828 static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
 829 {
 830         struct snd_cs4231 *chip = snd_timer_chip(timer);
 831
 832         return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
 833 }
 834
 835 static int snd_cs4231_timer_start(struct snd_timer *timer)
 836 {
 837         unsigned long flags;
 838         unsigned int ticks;
 839         struct snd_cs4231 *chip = snd_timer_chip(timer);
 840
 841         spin_lock_irqsave(&chip->lock, flags);
 842         ticks = timer->sticks;
 843         if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
 844             (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
 845             (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
 846                 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
 847                                chip->image[CS4231_TIMER_HIGH] =
 848                                (unsigned char) (ticks >> 8));
 849                 snd_cs4231_out(chip, CS4231_TIMER_LOW,
 850                                chip->image[CS4231_TIMER_LOW] =
 851                                (unsigned char) ticks);
 852                 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 853                                chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
 854         }
 855         spin_unlock_irqrestore(&chip->lock, flags);
 856
 857         return 0;
 858 }
 859
 860 static int snd_cs4231_timer_stop(struct snd_timer *timer)
 861 {
 862         unsigned long flags;
 863         struct snd_cs4231 *chip = snd_timer_chip(timer);
 864
 865         spin_lock_irqsave(&chip->lock, flags);
 866         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 867                        chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
 868         spin_unlock_irqrestore(&chip->lock, flags);
 869
 870         return 0;
 871 }
 872
 873 static void __init snd_cs4231_init(struct snd_cs4231 *chip)
 874 {
 875         unsigned long flags;
 876
 877         snd_cs4231_mce_down(chip);
 878
 879 #ifdef SNDRV_DEBUG_MCE
 880         snd_printdd("init: (1)\n");
 881 #endif
 882         snd_cs4231_mce_up(chip);
 883         spin_lock_irqsave(&chip->lock, flags);
 884         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 885                                             CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
 886                                             CS4231_CALIB_MODE);
 887         chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
 888         snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
 889         spin_unlock_irqrestore(&chip->lock, flags);
 890         snd_cs4231_mce_down(chip);
 891
 892 #ifdef SNDRV_DEBUG_MCE
 893         snd_printdd("init: (2)\n");
 894 #endif
 895
 896         snd_cs4231_mce_up(chip);
 897         spin_lock_irqsave(&chip->lock, flags);
 898         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
 899         spin_unlock_irqrestore(&chip->lock, flags);
 900         snd_cs4231_mce_down(chip);
 901
 902 #ifdef SNDRV_DEBUG_MCE
 903         snd_printdd("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
 904 #endif
 905
 906         spin_lock_irqsave(&chip->lock, flags);
 907         snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
 908         spin_unlock_irqrestore(&chip->lock, flags);
 909
 910         snd_cs4231_mce_up(chip);
 911         spin_lock_irqsave(&chip->lock, flags);
 912         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
 913         spin_unlock_irqrestore(&chip->lock, flags);
 914         snd_cs4231_mce_down(chip);
 915
 916 #ifdef SNDRV_DEBUG_MCE
 917         snd_printdd("init: (4)\n");
 918 #endif
 919
 920         snd_cs4231_mce_up(chip);
 921         spin_lock_irqsave(&chip->lock, flags);
 922         snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
 923         spin_unlock_irqrestore(&chip->lock, flags);
 924         snd_cs4231_mce_down(chip);
 925
 926 #ifdef SNDRV_DEBUG_MCE
 927         snd_printdd("init: (5)\n");
 928 #endif
 929 }
 930
 931 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
 932 {
 933         unsigned long flags;
 934
 935         mutex_lock(&chip->open_mutex);
 936         if ((chip->mode & mode)) {
 937                 mutex_unlock(&chip->open_mutex);
 938                 return -EAGAIN;
 939         }
 940         if (chip->mode & CS4231_MODE_OPEN) {
 941                 chip->mode |= mode;
 942                 mutex_unlock(&chip->open_mutex);
 943                 return 0;
 944         }
 945         /* ok. now enable and ack CODEC IRQ */
 946         spin_lock_irqsave(&chip->lock, flags);
 947         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
 948                        CS4231_RECORD_IRQ |
 949                        CS4231_TIMER_IRQ);
 950         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
 951         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 952         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 953
 954         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
 955                        CS4231_RECORD_IRQ |
 956                        CS4231_TIMER_IRQ);
 957         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
 958
 959         spin_unlock_irqrestore(&chip->lock, flags);
 960
 961         chip->mode = mode;
 962         mutex_unlock(&chip->open_mutex);
 963         return 0;
 964 }
 965
 966 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
 967 {
 968         unsigned long flags;
 969
 970         mutex_lock(&chip->open_mutex);
 971         chip->mode &= ~mode;
 972         if (chip->mode & CS4231_MODE_OPEN) {
 973                 mutex_unlock(&chip->open_mutex);
 974                 return;
 975         }
 976         snd_cs4231_calibrate_mute(chip, 1);
 977
 978         /* disable IRQ */
 979         spin_lock_irqsave(&chip->lock, flags);
 980         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
 981         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 982         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 983
 984         /* now disable record & playback */
 985
 986         if (chip->image[CS4231_IFACE_CTRL] &
 987             (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 988              CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
 989                 spin_unlock_irqrestore(&chip->lock, flags);
 990                 snd_cs4231_mce_up(chip);
 991                 spin_lock_irqsave(&chip->lock, flags);
 992                 chip->image[CS4231_IFACE_CTRL] &=
 993                         ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 994                           CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
 995                 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
 996                 spin_unlock_irqrestore(&chip->lock, flags);
 997                 snd_cs4231_mce_down(chip);
 998                 spin_lock_irqsave(&chip->lock, flags);
 999         }
1000
1001         /* clear IRQ again */
1002         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1003         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1004         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1005         spin_unlock_irqrestore(&chip->lock, flags);
1006
1007         snd_cs4231_calibrate_mute(chip, 0);
1008
1009         chip->mode = 0;
1010         mutex_unlock(&chip->open_mutex);
1011 }
1012
1013 /*
1014  *  timer open/close
1015  */
1016
1017 static int snd_cs4231_timer_open(struct snd_timer *timer)
1018 {
1019         struct snd_cs4231 *chip = snd_timer_chip(timer);
1020         snd_cs4231_open(chip, CS4231_MODE_TIMER);
1021         return 0;
1022 }
1023
1024 static int snd_cs4231_timer_close(struct snd_timer * timer)
1025 {
1026         struct snd_cs4231 *chip = snd_timer_chip(timer);
1027         snd_cs4231_close(chip, CS4231_MODE_TIMER);
1028         return 0;
1029 }
1030
1031 static struct snd_timer_hardware snd_cs4231_timer_table =
1032 {
1033         .flags          =       SNDRV_TIMER_HW_AUTO,
1034         .resolution     =       9945,
1035         .ticks          =       65535,
1036         .open           =       snd_cs4231_timer_open,
1037         .close          =       snd_cs4231_timer_close,
1038         .c_resolution   =       snd_cs4231_timer_resolution,
1039         .start          =       snd_cs4231_timer_start,
1040         .stop           =       snd_cs4231_timer_stop,
1041 };
1042
1043 /*
1044  *  ok.. exported functions..
1045  */
1046
1047 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
1048                                          struct snd_pcm_hw_params *hw_params)
1049 {
1050         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1051         unsigned char new_pdfr;
1052         int err;
1053
1054         if ((err = snd_pcm_lib_malloc_pages(substream,
1055                                             params_buffer_bytes(hw_params))) < 0)
1056                 return err;
1057         new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1058                                          params_channels(hw_params)) |
1059                 snd_cs4231_get_rate(params_rate(hw_params));
1060         snd_cs4231_playback_format(chip, hw_params, new_pdfr);
1061
1062         return 0;
1063 }
1064
1065 static int snd_cs4231_playback_hw_free(struct snd_pcm_substream *substream)
1066 {
1067         return snd_pcm_lib_free_pages(substream);
1068 }
1069
1070 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
1071 {
1072         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1073         struct snd_pcm_runtime *runtime = substream->runtime;
1074         unsigned long flags;
1075
1076         spin_lock_irqsave(&chip->lock, flags);
1077
1078         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
1079                                             CS4231_PLAYBACK_PIO);
1080
1081         BUG_ON(runtime->period_size > 0xffff + 1);
1082
1083         chip->p_periods_sent = 0;
1084         spin_unlock_irqrestore(&chip->lock, flags);
1085
1086         return 0;
1087 }
1088
1089 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
1090                                         struct snd_pcm_hw_params *hw_params)
1091 {
1092         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1093         unsigned char new_cdfr;
1094         int err;
1095
1096         if ((err = snd_pcm_lib_malloc_pages(substream,
1097                                             params_buffer_bytes(hw_params))) < 0)
1098                 return err;
1099         new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1100                                          params_channels(hw_params)) |
1101                 snd_cs4231_get_rate(params_rate(hw_params));
1102         snd_cs4231_capture_format(chip, hw_params, new_cdfr);
1103
1104         return 0;
1105 }
1106
1107 static int snd_cs4231_capture_hw_free(struct snd_pcm_substream *substream)
1108 {
1109         return snd_pcm_lib_free_pages(substream);
1110 }
1111
1112 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
1113 {
1114         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1115         unsigned long flags;
1116
1117         spin_lock_irqsave(&chip->lock, flags);
1118         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
1119                                             CS4231_RECORD_PIO);
1120
1121
1122         chip->c_periods_sent = 0;
1123         spin_unlock_irqrestore(&chip->lock, flags);
1124
1125         return 0;
1126 }
1127
1128 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
1129 {
1130         unsigned long flags;
1131         unsigned char res;
1132
1133         spin_lock_irqsave(&chip->lock, flags);
1134         res = snd_cs4231_in(chip, CS4231_TEST_INIT);
1135         spin_unlock_irqrestore(&chip->lock, flags);
1136
1137         if (res & (0x08 | 0x02))        /* detect overrange only above 0dB; may be user selectable? */
1138                 chip->capture_substream->runtime->overrange++;
1139 }
1140
1141 static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
1142 {
1143         if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
1144                 snd_pcm_period_elapsed(chip->playback_substream);
1145                 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
1146                                             &chip->p_periods_sent);
1147         }
1148 }
1149
1150 static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
1151 {
1152         if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
1153                 snd_pcm_period_elapsed(chip->capture_substream);
1154                 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
1155                                             &chip->c_periods_sent);
1156         }
1157 }
1158
1159 static snd_pcm_uframes_t snd_cs4231_playback_pointer(struct snd_pcm_substream *substream)
1160 {
1161         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1162         struct cs4231_dma_control *dma_cont = &chip->p_dma;
1163         size_t ptr;
1164
1165         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1166                 return 0;
1167         ptr = dma_cont->address(dma_cont);
1168         if (ptr != 0)
1169                 ptr -= substream->runtime->dma_addr;
1170
1171         return bytes_to_frames(substream->runtime, ptr);
1172 }
1173
1174 static snd_pcm_uframes_t snd_cs4231_capture_pointer(struct snd_pcm_substream *substream)
1175 {
1176         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1177         struct cs4231_dma_control *dma_cont = &chip->c_dma;
1178         size_t ptr;
1179
1180         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1181                 return 0;
1182         ptr = dma_cont->address(dma_cont);
1183         if (ptr != 0)
1184                 ptr -= substream->runtime->dma_addr;
1185
1186         return bytes_to_frames(substream->runtime, ptr);
1187 }
1188
1189 /*
1190
1191  */
1192
1193 static int __init snd_cs4231_probe(struct snd_cs4231 *chip)
1194 {
1195         unsigned long flags;
1196         int i, id, vers;
1197         unsigned char *ptr;
1198
1199         id = vers = 0;
1200         for (i = 0; i < 50; i++) {
1201                 mb();
1202                 if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
1203                         udelay(2000);
1204                 else {
1205                         spin_lock_irqsave(&chip->lock, flags);
1206                         snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1207                         id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1208                         vers = snd_cs4231_in(chip, CS4231_VERSION);
1209                         spin_unlock_irqrestore(&chip->lock, flags);
1210                         if (id == 0x0a)
1211                                 break;  /* this is valid value */
1212                 }
1213         }
1214         snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1215         if (id != 0x0a)
1216                 return -ENODEV; /* no valid device found */
1217
1218         spin_lock_irqsave(&chip->lock, flags);
1219
1220
1221         /* Reset DMA engine (sbus only).  */
1222         chip->p_dma.reset(chip);
1223
1224         __cs4231_readb(chip, CS4231P(chip, STATUS));    /* clear any pendings IRQ */
1225         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));
1226         mb();
1227
1228         spin_unlock_irqrestore(&chip->lock, flags);
1229
1230         chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1231         chip->image[CS4231_IFACE_CTRL] =
1232                 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1233         chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1234         chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1235         if (vers & 0x20)
1236                 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1237
1238         ptr = (unsigned char *) &chip->image;
1239
1240         snd_cs4231_mce_down(chip);
1241
1242         spin_lock_irqsave(&chip->lock, flags);
1243
1244         for (i = 0; i < 32; i++)        /* ok.. fill all CS4231 registers */
1245                 snd_cs4231_out(chip, i, *ptr++);
1246
1247         spin_unlock_irqrestore(&chip->lock, flags);
1248
1249         snd_cs4231_mce_up(chip);
1250
1251         snd_cs4231_mce_down(chip);
1252
1253         mdelay(2);
1254
1255         return 0;               /* all things are ok.. */
1256 }
1257
1258 static struct snd_pcm_hardware snd_cs4231_playback =
1259 {
1260         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1261                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1262         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1263                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1264                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1265                                  SNDRV_PCM_FMTBIT_S16_BE),
1266         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1267         .rate_min               = 5510,
1268         .rate_max               = 48000,
1269         .channels_min           = 1,
1270         .channels_max           = 2,
1271         .buffer_bytes_max       = (32*1024),
1272         .period_bytes_min       = 4096,
1273         .period_bytes_max       = (32*1024),
1274         .periods_min            = 1,
1275         .periods_max            = 1024,
1276 };
1277
1278 static struct snd_pcm_hardware snd_cs4231_capture =
1279 {
1280         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1281                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1282         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1283                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1284                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1285                                  SNDRV_PCM_FMTBIT_S16_BE),
1286         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1287         .rate_min               = 5510,
1288         .rate_max               = 48000,
1289         .channels_min           = 1,
1290         .channels_max           = 2,
1291         .buffer_bytes_max       = (32*1024),
1292         .period_bytes_min       = 4096,
1293         .period_bytes_max       = (32*1024),
1294         .periods_min            = 1,
1295         .periods_max            = 1024,
1296 };
1297
1298 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1299 {
1300         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1301         struct snd_pcm_runtime *runtime = substream->runtime;
1302         int err;
1303
1304         runtime->hw = snd_cs4231_playback;
1305
1306         if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1307                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1308                 return err;
1309         }
1310         chip->playback_substream = substream;
1311         chip->p_periods_sent = 0;
1312         snd_pcm_set_sync(substream);
1313         snd_cs4231_xrate(runtime);
1314
1315         return 0;
1316 }
1317
1318 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1319 {
1320         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1321         struct snd_pcm_runtime *runtime = substream->runtime;
1322         int err;
1323
1324         runtime->hw = snd_cs4231_capture;
1325
1326         if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1327                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1328                 return err;
1329         }
1330         chip->capture_substream = substream;
1331         chip->c_periods_sent = 0;
1332         snd_pcm_set_sync(substream);
1333         snd_cs4231_xrate(runtime);
1334
1335         return 0;
1336 }
1337
1338 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1339 {
1340         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1341
1342         snd_cs4231_close(chip, CS4231_MODE_PLAY);
1343         chip->playback_substream = NULL;
1344
1345         return 0;
1346 }
1347
1348 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1349 {
1350         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1351
1352         snd_cs4231_close(chip, CS4231_MODE_RECORD);
1353         chip->capture_substream = NULL;
1354
1355         return 0;
1356 }
1357
1358 /* XXX We can do some power-management, in particular on EBUS using
1359  * XXX the audio AUXIO register...
1360  */
1361
1362 static struct snd_pcm_ops snd_cs4231_playback_ops = {
1363         .open           =       snd_cs4231_playback_open,
1364         .close          =       snd_cs4231_playback_close,
1365         .ioctl          =       snd_pcm_lib_ioctl,
1366         .hw_params      =       snd_cs4231_playback_hw_params,
1367         .hw_free        =       snd_cs4231_playback_hw_free,
1368         .prepare        =       snd_cs4231_playback_prepare,
1369         .trigger        =       snd_cs4231_trigger,
1370         .pointer        =       snd_cs4231_playback_pointer,
1371 };
1372
1373 static struct snd_pcm_ops snd_cs4231_capture_ops = {
1374         .open           =       snd_cs4231_capture_open,
1375         .close          =       snd_cs4231_capture_close,
1376         .ioctl          =       snd_pcm_lib_ioctl,
1377         .hw_params      =       snd_cs4231_capture_hw_params,
1378         .hw_free        =       snd_cs4231_capture_hw_free,
1379         .prepare        =       snd_cs4231_capture_prepare,
1380         .trigger        =       snd_cs4231_trigger,
1381         .pointer        =       snd_cs4231_capture_pointer,
1382 };
1383
1384 static int __init snd_cs4231_pcm(struct snd_cs4231 *chip)
1385 {
1386         struct snd_pcm *pcm;
1387         int err;
1388
1389         if ((err = snd_pcm_new(chip->card, "CS4231", 0, 1, 1, &pcm)) < 0)
1390                 return err;
1391
1392         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1393         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1394
1395         /* global setup */
1396         pcm->private_data = chip;
1397         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1398         strcpy(pcm->name, "CS4231");
1399
1400         chip->p_dma.preallocate(chip, pcm);
1401
1402         chip->pcm = pcm;
1403
1404         return 0;
1405 }
1406
1407 static int __init snd_cs4231_timer(struct snd_cs4231 *chip)
1408 {
1409         struct snd_timer *timer;
1410         struct snd_timer_id tid;
1411         int err;
1412
1413         /* Timer initialization */
1414         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1415         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1416         tid.card = chip->card->number;
1417         tid.device = 0;
1418         tid.subdevice = 0;
1419         if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1420                 return err;
1421         strcpy(timer->name, "CS4231");
1422         timer->private_data = chip;
1423         timer->hw = snd_cs4231_timer_table;
1424         chip->timer = timer;
1425
1426         return 0;
1427 }
1428
1429 /*
1430  *  MIXER part
1431  */
1432
1433 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1434                                struct snd_ctl_elem_info *uinfo)
1435 {
1436         static char *texts[4] = {
1437                 "Line", "CD", "Mic", "Mix"
1438         };
1439         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1440
1441         snd_assert(chip->card != NULL, return -EINVAL);
1442         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1443         uinfo->count = 2;
1444         uinfo->value.enumerated.items = 4;
1445         if (uinfo->value.enumerated.item > 3)
1446                 uinfo->value.enumerated.item = 3;
1447         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1448
1449         return 0;
1450 }
1451
1452 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1453                               struct snd_ctl_elem_value *ucontrol)
1454 {
1455         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1456         unsigned long flags;
1457
1458         spin_lock_irqsave(&chip->lock, flags);
1459         ucontrol->value.enumerated.item[0] =
1460                 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1461         ucontrol->value.enumerated.item[1] =
1462                 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1463         spin_unlock_irqrestore(&chip->lock, flags);
1464
1465         return 0;
1466 }
1467
1468 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1469                               struct snd_ctl_elem_value *ucontrol)
1470 {
1471         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1472         unsigned long flags;
1473         unsigned short left, right;
1474         int change;
1475
1476         if (ucontrol->value.enumerated.item[0] > 3 ||
1477             ucontrol->value.enumerated.item[1] > 3)
1478                 return -EINVAL;
1479         left = ucontrol->value.enumerated.item[0] << 6;
1480         right = ucontrol->value.enumerated.item[1] << 6;
1481
1482         spin_lock_irqsave(&chip->lock, flags);
1483
1484         left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1485         right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1486         change = left != chip->image[CS4231_LEFT_INPUT] ||
1487                  right != chip->image[CS4231_RIGHT_INPUT];
1488         snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1489         snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1490
1491         spin_unlock_irqrestore(&chip->lock, flags);
1492
1493         return change;
1494 }
1495
1496 static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1497                                   struct snd_ctl_elem_info *uinfo)
1498 {
1499         int mask = (kcontrol->private_value >> 16) & 0xff;
1500
1501         uinfo->type = (mask == 1) ?
1502                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1503         uinfo->count = 1;
1504         uinfo->value.integer.min = 0;
1505         uinfo->value.integer.max = mask;
1506
1507         return 0;
1508 }
1509
1510 static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1511                                  struct snd_ctl_elem_value *ucontrol)
1512 {
1513         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1514         unsigned long flags;
1515         int reg = kcontrol->private_value & 0xff;
1516         int shift = (kcontrol->private_value >> 8) & 0xff;
1517         int mask = (kcontrol->private_value >> 16) & 0xff;
1518         int invert = (kcontrol->private_value >> 24) & 0xff;
1519
1520         spin_lock_irqsave(&chip->lock, flags);
1521
1522         ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1523
1524         spin_unlock_irqrestore(&chip->lock, flags);
1525
1526         if (invert)
1527                 ucontrol->value.integer.value[0] =
1528                         (mask - ucontrol->value.integer.value[0]);
1529
1530         return 0;
1531 }
1532
1533 static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1534                                  struct snd_ctl_elem_value *ucontrol)
1535 {
1536         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1537         unsigned long flags;
1538         int reg = kcontrol->private_value & 0xff;
1539         int shift = (kcontrol->private_value >> 8) & 0xff;
1540         int mask = (kcontrol->private_value >> 16) & 0xff;
1541         int invert = (kcontrol->private_value >> 24) & 0xff;
1542         int change;
1543         unsigned short val;
1544
1545         val = (ucontrol->value.integer.value[0] & mask);
1546         if (invert)
1547                 val = mask - val;
1548         val <<= shift;
1549
1550         spin_lock_irqsave(&chip->lock, flags);
1551
1552         val = (chip->image[reg] & ~(mask << shift)) | val;
1553         change = val != chip->image[reg];
1554         snd_cs4231_out(chip, reg, val);
1555
1556         spin_unlock_irqrestore(&chip->lock, flags);
1557
1558         return change;
1559 }
1560
1561 static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1562                                   struct snd_ctl_elem_info *uinfo)
1563 {
1564         int mask = (kcontrol->private_value >> 24) & 0xff;
1565
1566         uinfo->type = mask == 1 ?
1567                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1568         uinfo->count = 2;
1569         uinfo->value.integer.min = 0;
1570         uinfo->value.integer.max = mask;
1571
1572         return 0;
1573 }
1574
1575 static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1576                                  struct snd_ctl_elem_value *ucontrol)
1577 {
1578         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1579         unsigned long flags;
1580         int left_reg = kcontrol->private_value & 0xff;
1581         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1582         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1583         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1584         int mask = (kcontrol->private_value >> 24) & 0xff;
1585         int invert = (kcontrol->private_value >> 22) & 1;
1586
1587         spin_lock_irqsave(&chip->lock, flags);
1588
1589         ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1590         ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1591
1592         spin_unlock_irqrestore(&chip->lock, flags);
1593
1594         if (invert) {
1595                 ucontrol->value.integer.value[0] =
1596                         (mask - ucontrol->value.integer.value[0]);
1597                 ucontrol->value.integer.value[1] =
1598                         (mask - ucontrol->value.integer.value[1]);
1599         }
1600
1601         return 0;
1602 }
1603
1604 static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1605                                  struct snd_ctl_elem_value *ucontrol)
1606 {
1607         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1608         unsigned long flags;
1609         int left_reg = kcontrol->private_value & 0xff;
1610         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1611         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1612         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1613         int mask = (kcontrol->private_value >> 24) & 0xff;
1614         int invert = (kcontrol->private_value >> 22) & 1;
1615         int change;
1616         unsigned short val1, val2;
1617
1618         val1 = ucontrol->value.integer.value[0] & mask;
1619         val2 = ucontrol->value.integer.value[1] & mask;
1620         if (invert) {
1621                 val1 = mask - val1;
1622                 val2 = mask - val2;
1623         }
1624         val1 <<= shift_left;
1625         val2 <<= shift_right;
1626
1627         spin_lock_irqsave(&chip->lock, flags);
1628
1629         val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1630         val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1631         change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1632         snd_cs4231_out(chip, left_reg, val1);
1633         snd_cs4231_out(chip, right_reg, val2);
1634
1635         spin_unlock_irqrestore(&chip->lock, flags);
1636
1637         return change;
1638 }
1639
1640 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1641 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1642   .info = snd_cs4231_info_single, \
1643   .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1644   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1645
1646 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1647 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1648   .info = snd_cs4231_info_double, \
1649   .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1650   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1651
1652 static struct snd_kcontrol_new snd_cs4231_controls[] __initdata = {
1653 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1654 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1655 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1656 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1657 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1658 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1659 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1660 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1661 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1662 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1663 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1664 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1665 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1666 {
1667         .iface  = SNDRV_CTL_ELEM_IFACE_MIXER,
1668         .name   = "Capture Source",
1669         .info   = snd_cs4231_info_mux,
1670         .get    = snd_cs4231_get_mux,
1671         .put    = snd_cs4231_put_mux,
1672 },
1673 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1674 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1675 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1676 /* SPARC specific uses of XCTL{0,1} general purpose outputs.  */
1677 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1678 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1679 };
1680
1681 static int __init snd_cs4231_mixer(struct snd_cs4231 *chip)
1682 {
1683         struct snd_card *card;
1684         int err, idx;
1685
1686         snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1687
1688         card = chip->card;
1689
1690         strcpy(card->mixername, chip->pcm->name);
1691
1692         for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1693                 if ((err = snd_ctl_add(card,
1694                                        snd_ctl_new1(&snd_cs4231_controls[idx],
1695                                                     chip))) < 0)
1696                         return err;
1697         }
1698         return 0;
1699 }
1700
1701 static int dev;
1702
1703 static int __init cs4231_attach_begin(struct snd_card **rcard)
1704 {
1705         struct snd_card *card;
1706
1707         *rcard = NULL;
1708
1709         if (dev >= SNDRV_CARDS)
1710                 return -ENODEV;
1711
1712         if (!enable[dev]) {
1713                 dev++;
1714                 return -ENOENT;
1715         }
1716
1717         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1718         if (card == NULL)
1719                 return -ENOMEM;
1720
1721         strcpy(card->driver, "CS4231");
1722         strcpy(card->shortname, "Sun CS4231");
1723
1724         *rcard = card;
1725         return 0;
1726 }
1727
1728 static int __init cs4231_attach_finish(struct snd_card *card, struct snd_cs4231 *chip)
1729 {
1730         int err;
1731
1732         if ((err = snd_cs4231_pcm(chip)) < 0)
1733                 goto out_err;
1734
1735         if ((err = snd_cs4231_mixer(chip)) < 0)
1736                 goto out_err;
1737
1738         if ((err = snd_cs4231_timer(chip)) < 0)
1739                 goto out_err;
1740
1741         if ((err = snd_card_register(card)) < 0)
1742                 goto out_err;
1743
1744         chip->next = cs4231_list;
1745         cs4231_list = chip;
1746
1747         dev++;
1748         return 0;
1749
1750 out_err:
1751         snd_card_free(card);
1752         return err;
1753 }
1754
1755 #ifdef SBUS_SUPPORT
1756
1757 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1758 {
1759         unsigned long flags;
1760         unsigned char status;
1761         u32 csr;
1762         struct snd_cs4231 *chip = dev_id;
1763
1764         /*This is IRQ is not raised by the cs4231*/
1765         if (!(__cs4231_readb(chip, CS4231P(chip, STATUS)) & CS4231_GLOBALIRQ))
1766                 return IRQ_NONE;
1767
1768         /* ACK the APC interrupt. */
1769         csr = sbus_readl(chip->port + APCCSR);
1770
1771         sbus_writel(csr, chip->port + APCCSR);
1772
1773         if ((csr & APC_PDMA_READY) &&
1774             (csr & APC_PLAY_INT) &&
1775             (csr & APC_XINT_PNVA) &&
1776             !(csr & APC_XINT_EMPT))
1777                         snd_cs4231_play_callback(chip);
1778
1779         if ((csr & APC_CDMA_READY) &&
1780             (csr & APC_CAPT_INT) &&
1781             (csr & APC_XINT_CNVA) &&
1782             !(csr & APC_XINT_EMPT))
1783                         snd_cs4231_capture_callback(chip);
1784
1785         status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1786
1787         if (status & CS4231_TIMER_IRQ) {
1788                 if (chip->timer)
1789                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
1790         }
1791
1792         if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1793                 snd_cs4231_overrange(chip);
1794
1795         /* ACK the CS4231 interrupt. */
1796         spin_lock_irqsave(&chip->lock, flags);
1797         snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1798         spin_unlock_irqrestore(&chip->lock, flags);
1799
1800         return 0;
1801 }
1802
1803 /*
1804  * SBUS DMA routines
1805  */
1806
1807 static int sbus_dma_request(struct cs4231_dma_control *dma_cont, dma_addr_t bus_addr, size_t len)
1808 {
1809         unsigned long flags;
1810         u32 test, csr;
1811         int err;
1812         struct sbus_dma_info *base = &dma_cont->sbus_info;
1813
1814         if (len >= (1 << 24))
1815                 return -EINVAL;
1816         spin_lock_irqsave(&base->lock, flags);
1817         csr = sbus_readl(base->regs + APCCSR);
1818         err = -EINVAL;
1819         test = APC_CDMA_READY;
1820         if ( base->dir == APC_PLAY )
1821                 test = APC_PDMA_READY;
1822         if (!(csr & test))
1823                 goto out;
1824         err = -EBUSY;
1825         csr = sbus_readl(base->regs + APCCSR);
1826         test = APC_XINT_CNVA;
1827         if ( base->dir == APC_PLAY )
1828                 test = APC_XINT_PNVA;
1829         if (!(csr & test))
1830                 goto out;
1831         err = 0;
1832         sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1833         sbus_writel(len, base->regs + base->dir + APCNC);
1834 out:
1835         spin_unlock_irqrestore(&base->lock, flags);
1836         return err;
1837 }
1838
1839 static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1840 {
1841         unsigned long flags;
1842         u32 csr, test;
1843         struct sbus_dma_info *base = &dma_cont->sbus_info;
1844
1845         spin_lock_irqsave(&base->lock, flags);
1846         csr = sbus_readl(base->regs + APCCSR);
1847         test =  APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1848                 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1849                  APC_XINT_PENA;
1850         if ( base->dir == APC_RECORD )
1851                 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1852                         APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1853         csr |= test;
1854         sbus_writel(csr, base->regs + APCCSR);
1855         spin_unlock_irqrestore(&base->lock, flags);
1856 }
1857
1858 static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1859 {
1860         unsigned long flags;
1861         u32 csr, shift;
1862         struct sbus_dma_info *base = &dma_cont->sbus_info;
1863
1864         spin_lock_irqsave(&base->lock, flags);
1865         if (!on) {
1866                 if (base->dir == APC_PLAY) {
1867                         sbus_writel(0, base->regs + base->dir + APCNVA);
1868                         sbus_writel(1, base->regs + base->dir + APCC);
1869                 }
1870                 else
1871                 {
1872                         sbus_writel(0, base->regs + base->dir + APCNC);
1873                         sbus_writel(0, base->regs + base->dir + APCVA);
1874                 }
1875         }
1876         udelay(600);
1877         csr = sbus_readl(base->regs + APCCSR);
1878         shift = 0;
1879         if ( base->dir == APC_PLAY )
1880                 shift = 1;
1881         if (on)
1882                 csr &= ~(APC_CPAUSE << shift);
1883         else
1884                 csr |= (APC_CPAUSE << shift);
1885         sbus_writel(csr, base->regs + APCCSR);
1886         if (on)
1887                 csr |= (APC_CDMA_READY << shift);
1888         else
1889                 csr &= ~(APC_CDMA_READY << shift);
1890         sbus_writel(csr, base->regs + APCCSR);
1891
1892         spin_unlock_irqrestore(&base->lock, flags);
1893 }
1894
1895 static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1896 {
1897         struct sbus_dma_info *base = &dma_cont->sbus_info;
1898
1899         return sbus_readl(base->regs + base->dir + APCVA);
1900 }
1901
1902 static void sbus_dma_reset(struct snd_cs4231 *chip)
1903 {
1904         sbus_writel(APC_CHIP_RESET, chip->port + APCCSR);
1905         sbus_writel(0x00, chip->port + APCCSR);
1906         sbus_writel(sbus_readl(chip->port + APCCSR) | APC_CDC_RESET,
1907                     chip->port + APCCSR);
1908
1909         udelay(20);
1910
1911         sbus_writel(sbus_readl(chip->port + APCCSR) & ~APC_CDC_RESET,
1912                     chip->port + APCCSR);
1913         sbus_writel(sbus_readl(chip->port + APCCSR) | (APC_XINT_ENA |
1914                        APC_XINT_PENA |
1915                        APC_XINT_CENA),
1916                        chip->port + APCCSR);
1917 }
1918
1919 static void sbus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
1920 {
1921         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS,
1922                                               snd_dma_sbus_data(chip->dev_u.sdev),
1923                                               64*1024, 128*1024);
1924 }
1925
1926 /*
1927  * Init and exit routines
1928  */
1929
1930 static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1931 {
1932         if (chip->irq[0])
1933                 free_irq(chip->irq[0], chip);
1934
1935         if (chip->port)
1936                 sbus_iounmap(chip->port, chip->regs_size);
1937
1938         kfree(chip);
1939
1940         return 0;
1941 }
1942
1943 static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1944 {
1945         struct snd_cs4231 *cp = device->device_data;
1946
1947         return snd_cs4231_sbus_free(cp);
1948 }
1949
1950 static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1951         .dev_free       =       snd_cs4231_sbus_dev_free,
1952 };
1953
1954 static int __init snd_cs4231_sbus_create(struct snd_card *card,
1955                                          struct sbus_dev *sdev,
1956                                          int dev,
1957                                          struct snd_cs4231 **rchip)
1958 {
1959         struct snd_cs4231 *chip;
1960         int err;
1961
1962         *rchip = NULL;
1963         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1964         if (chip == NULL)
1965                 return -ENOMEM;
1966
1967         spin_lock_init(&chip->lock);
1968         spin_lock_init(&chip->c_dma.sbus_info.lock);
1969         spin_lock_init(&chip->p_dma.sbus_info.lock);
1970         mutex_init(&chip->mce_mutex);
1971         mutex_init(&chip->open_mutex);
1972         chip->card = card;
1973         chip->dev_u.sdev = sdev;
1974         chip->regs_size = sdev->reg_addrs[0].reg_size;
1975         memcpy(&chip->image, &snd_cs4231_original_image,
1976                sizeof(snd_cs4231_original_image));
1977
1978         chip->port = sbus_ioremap(&sdev->resource[0], 0,
1979                                   chip->regs_size, "cs4231");
1980         if (!chip->port) {
1981                 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1982                 return -EIO;
1983         }
1984
1985         chip->c_dma.sbus_info.regs = chip->port;
1986         chip->p_dma.sbus_info.regs = chip->port;
1987         chip->c_dma.sbus_info.dir = APC_RECORD;
1988         chip->p_dma.sbus_info.dir = APC_PLAY;
1989
1990         chip->p_dma.prepare = sbus_dma_prepare;
1991         chip->p_dma.enable = sbus_dma_enable;
1992         chip->p_dma.request = sbus_dma_request;
1993         chip->p_dma.address = sbus_dma_addr;
1994         chip->p_dma.reset = sbus_dma_reset;
1995         chip->p_dma.preallocate = sbus_dma_preallocate;
1996
1997         chip->c_dma.prepare = sbus_dma_prepare;
1998         chip->c_dma.enable = sbus_dma_enable;
1999         chip->c_dma.request = sbus_dma_request;
2000         chip->c_dma.address = sbus_dma_addr;
2001         chip->c_dma.reset = sbus_dma_reset;
2002         chip->c_dma.preallocate = sbus_dma_preallocate;
2003
2004         if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt,
2005                         SA_SHIRQ, "cs4231", chip)) {
2006                 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
2007                             dev, sdev->irqs[0]);
2008                 snd_cs4231_sbus_free(chip);
2009                 return -EBUSY;
2010         }
2011         chip->irq[0] = sdev->irqs[0];
2012
2013         if (snd_cs4231_probe(chip) < 0) {
2014                 snd_cs4231_sbus_free(chip);
2015                 return -ENODEV;
2016         }
2017         snd_cs4231_init(chip);
2018
2019         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2020                                   chip, &snd_cs4231_sbus_dev_ops)) < 0) {
2021                 snd_cs4231_sbus_free(chip);
2022                 return err;
2023         }
2024
2025         *rchip = chip;
2026         return 0;
2027 }
2028
2029 static int __init cs4231_sbus_attach(struct sbus_dev *sdev)
2030 {
2031         struct resource *rp = &sdev->resource[0];
2032         struct snd_cs4231 *cp;
2033         struct snd_card *card;
2034         int err;
2035
2036         err = cs4231_attach_begin(&card);
2037         if (err)
2038                 return err;
2039
2040         sprintf(card->longname, "%s at 0x%02lx:0x%08lx, irq %d",
2041                 card->shortname,
2042                 rp->flags & 0xffL,
2043                 rp->start,
2044                 sdev->irqs[0]);
2045
2046         if ((err = snd_cs4231_sbus_create(card, sdev, dev, &cp)) < 0) {
2047                 snd_card_free(card);
2048                 return err;
2049         }
2050
2051         return cs4231_attach_finish(card, cp);
2052 }
2053 #endif
2054
2055 #ifdef EBUS_SUPPORT
2056
2057 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event, void *cookie)
2058 {
2059         struct snd_cs4231 *chip = cookie;
2060
2061         snd_cs4231_play_callback(chip);
2062 }
2063
2064 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p, int event, void *cookie)
2065 {
2066         struct snd_cs4231 *chip = cookie;
2067
2068         snd_cs4231_capture_callback(chip);
2069 }
2070
2071 /*
2072  * EBUS DMA wrappers
2073  */
2074
2075 static int _ebus_dma_request(struct cs4231_dma_control *dma_cont, dma_addr_t bus_addr, size_t len)
2076 {
2077         return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
2078 }
2079
2080 static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
2081 {
2082         ebus_dma_enable(&dma_cont->ebus_info, on);
2083 }
2084
2085 static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
2086 {
2087         ebus_dma_prepare(&dma_cont->ebus_info, dir);
2088 }
2089
2090 static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
2091 {
2092         return ebus_dma_addr(&dma_cont->ebus_info);
2093 }
2094
2095 static void _ebus_dma_reset(struct snd_cs4231 *chip)
2096 {
2097         return;
2098 }
2099
2100 static void _ebus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
2101 {
2102         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
2103                                       snd_dma_pci_data(chip->dev_u.pdev),
2104                                       64*1024, 128*1024);
2105 }
2106
2107 /*
2108  * Init and exit routines
2109  */
2110
2111 static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
2112 {
2113         if (chip->c_dma.ebus_info.regs) {
2114                 ebus_dma_unregister(&chip->c_dma.ebus_info);
2115                 iounmap(chip->c_dma.ebus_info.regs);
2116         }
2117         if (chip->p_dma.ebus_info.regs) {
2118                 ebus_dma_unregister(&chip->p_dma.ebus_info);
2119                 iounmap(chip->p_dma.ebus_info.regs);
2120         }
2121
2122         if (chip->port)
2123                 iounmap(chip->port);
2124
2125         kfree(chip);
2126
2127         return 0;
2128 }
2129
2130 static int snd_cs4231_ebus_dev_free(struct snd_device *device)
2131 {
2132         struct snd_cs4231 *cp = device->device_data;
2133
2134         return snd_cs4231_ebus_free(cp);
2135 }
2136
2137 static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
2138         .dev_free       =       snd_cs4231_ebus_dev_free,
2139 };
2140
2141 static int __init snd_cs4231_ebus_create(struct snd_card *card,
2142                                          struct linux_ebus_device *edev,
2143                                          int dev,
2144                                          struct snd_cs4231 **rchip)
2145 {
2146         struct snd_cs4231 *chip;
2147         int err;
2148
2149         *rchip = NULL;
2150         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2151         if (chip == NULL)
2152                 return -ENOMEM;
2153
2154         spin_lock_init(&chip->lock);
2155         spin_lock_init(&chip->c_dma.ebus_info.lock);
2156         spin_lock_init(&chip->p_dma.ebus_info.lock);
2157         mutex_init(&chip->mce_mutex);
2158         mutex_init(&chip->open_mutex);
2159         chip->flags |= CS4231_FLAG_EBUS;
2160         chip->card = card;
2161         chip->dev_u.pdev = edev->bus->self;
2162         memcpy(&chip->image, &snd_cs4231_original_image,
2163                sizeof(snd_cs4231_original_image));
2164         strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
2165         chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2166         chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
2167         chip->c_dma.ebus_info.client_cookie = chip;
2168         chip->c_dma.ebus_info.irq = edev->irqs[0];
2169         strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
2170         chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2171         chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
2172         chip->p_dma.ebus_info.client_cookie = chip;
2173         chip->p_dma.ebus_info.irq = edev->irqs[1];
2174
2175         chip->p_dma.prepare = _ebus_dma_prepare;
2176         chip->p_dma.enable = _ebus_dma_enable;
2177         chip->p_dma.request = _ebus_dma_request;
2178         chip->p_dma.address = _ebus_dma_addr;
2179         chip->p_dma.reset = _ebus_dma_reset;
2180         chip->p_dma.preallocate = _ebus_dma_preallocate;
2181
2182         chip->c_dma.prepare = _ebus_dma_prepare;
2183         chip->c_dma.enable = _ebus_dma_enable;
2184         chip->c_dma.request = _ebus_dma_request;
2185         chip->c_dma.address = _ebus_dma_addr;
2186         chip->c_dma.reset = _ebus_dma_reset;
2187         chip->c_dma.preallocate = _ebus_dma_preallocate;
2188
2189         chip->port = ioremap(edev->resource[0].start, 0x10);
2190         chip->p_dma.ebus_info.regs = ioremap(edev->resource[1].start, 0x10);
2191         chip->c_dma.ebus_info.regs = ioremap(edev->resource[2].start, 0x10);
2192         if (!chip->port || !chip->p_dma.ebus_info.regs || !chip->c_dma.ebus_info.regs) {
2193                 snd_cs4231_ebus_free(chip);
2194                 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
2195                 return -EIO;
2196         }
2197
2198         if (ebus_dma_register(&chip->c_dma.ebus_info)) {
2199                 snd_cs4231_ebus_free(chip);
2200                 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n", dev);
2201                 return -EBUSY;
2202         }
2203         if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2204                 snd_cs4231_ebus_free(chip);
2205                 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n", dev);
2206                 return -EBUSY;
2207         }
2208
2209         if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2210                 snd_cs4231_ebus_free(chip);
2211                 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n", dev);
2212                 return -EBUSY;
2213         }
2214         if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2215                 snd_cs4231_ebus_free(chip);
2216                 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2217                 return -EBUSY;
2218         }
2219
2220         if (snd_cs4231_probe(chip) < 0) {
2221                 snd_cs4231_ebus_free(chip);
2222                 return -ENODEV;
2223         }
2224         snd_cs4231_init(chip);
2225
2226         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2227                                   chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2228                 snd_cs4231_ebus_free(chip);
2229                 return err;
2230         }
2231
2232         *rchip = chip;
2233         return 0;
2234 }
2235
2236 static int __init cs4231_ebus_attach(struct linux_ebus_device *edev)
2237 {
2238         struct snd_card *card;
2239         struct snd_cs4231 *chip;
2240         int err;
2241
2242         err = cs4231_attach_begin(&card);
2243         if (err)
2244                 return err;
2245
2246         sprintf(card->longname, "%s at 0x%lx, irq %d",
2247                 card->shortname,
2248                 edev->resource[0].start,
2249                 edev->irqs[0]);
2250
2251         if ((err = snd_cs4231_ebus_create(card, edev, dev, &chip)) < 0) {
2252                 snd_card_free(card);
2253                 return err;
2254         }
2255
2256         return cs4231_attach_finish(card, chip);
2257 }
2258 #endif
2259
2260 static int __init cs4231_init(void)
2261 {
2262 #ifdef SBUS_SUPPORT
2263         struct sbus_bus *sbus;
2264         struct sbus_dev *sdev;
2265 #endif
2266 #ifdef EBUS_SUPPORT
2267         struct linux_ebus *ebus;
2268         struct linux_ebus_device *edev;
2269 #endif
2270         int found;
2271
2272         found = 0;
2273
2274 #ifdef SBUS_SUPPORT
2275         for_all_sbusdev(sdev, sbus) {
2276                 if (!strcmp(sdev->prom_name, "SUNW,CS4231")) {
2277                         if (cs4231_sbus_attach(sdev) == 0)
2278                                 found++;
2279                 }
2280         }
2281 #endif
2282 #ifdef EBUS_SUPPORT
2283         for_each_ebus(ebus) {
2284                 for_each_ebusdev(edev, ebus) {
2285                         int match = 0;
2286
2287                         if (!strcmp(edev->prom_name, "SUNW,CS4231")) {
2288                                 match = 1;
2289                         } else if (!strcmp(edev->prom_name, "audio")) {
2290                                 char compat[16];
2291
2292                                 prom_getstring(edev->prom_node, "compatible",
2293                                                compat, sizeof(compat));
2294                                 compat[15] = '\0';
2295                                 if (!strcmp(compat, "SUNW,CS4231"))
2296                                         match = 1;
2297                         }
2298
2299                         if (match &&
2300                             cs4231_ebus_attach(edev) == 0)
2301                                 found++;
2302                 }
2303         }
2304 #endif
2305
2306
2307         return (found > 0) ? 0 : -EIO;
2308 }
2309
2310 static void __exit cs4231_exit(void)
2311 {
2312         struct snd_cs4231 *p = cs4231_list;
2313
2314         while (p != NULL) {
2315                 struct snd_cs4231 *next = p->next;
2316
2317                 snd_card_free(p->card);
2318
2319                 p = next;
2320         }
2321
2322         cs4231_list = NULL;
2323 }
2324
2325 module_init(cs4231_init);
2326 module_exit(cs4231_exit);