ASoC: samsung: i2s: Fix error handling path in i2s_set_sysclk()
[sfrench/cifs-2.6.git] / sound / soc / samsung / i2s.c
1 /* sound/soc/samsung/i2s.c
2  *
3  * ALSA SoC Audio Layer - Samsung I2S Controller driver
4  *
5  * Copyright (c) 2010 Samsung Electronics Co. Ltd.
6  *      Jaswinder Singh <jassisinghbrar@gmail.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12
13 #include <dt-bindings/sound/samsung-i2s.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <linux/clk-provider.h>
18 #include <linux/io.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/of_device.h>
22 #include <linux/of_gpio.h>
23 #include <linux/pm_runtime.h>
24
25 #include <sound/soc.h>
26 #include <sound/pcm_params.h>
27
28 #include <linux/platform_data/asoc-s3c.h>
29
30 #include "dma.h"
31 #include "idma.h"
32 #include "i2s.h"
33 #include "i2s-regs.h"
34
35 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
36
37 struct samsung_i2s_variant_regs {
38         unsigned int    bfs_off;
39         unsigned int    rfs_off;
40         unsigned int    sdf_off;
41         unsigned int    txr_off;
42         unsigned int    rclksrc_off;
43         unsigned int    mss_off;
44         unsigned int    cdclkcon_off;
45         unsigned int    lrp_off;
46         unsigned int    bfs_mask;
47         unsigned int    rfs_mask;
48         unsigned int    ftx0cnt_off;
49 };
50
51 struct samsung_i2s_dai_data {
52         u32 quirks;
53         unsigned int pcm_rates;
54         const struct samsung_i2s_variant_regs *i2s_variant_regs;
55 };
56
57 struct i2s_dai {
58         /* Platform device for this DAI */
59         struct platform_device *pdev;
60         /* Memory mapped SFR region */
61         void __iomem    *addr;
62         /* Rate of RCLK source clock */
63         unsigned long rclk_srcrate;
64         /* Frame Clock */
65         unsigned frmclk;
66         /*
67          * Specifically requested RCLK,BCLK by MACHINE Driver.
68          * 0 indicates CPU driver is free to choose any value.
69          */
70         unsigned rfs, bfs;
71         /* I2S Controller's core clock */
72         struct clk *clk;
73         /* Clock for generating I2S signals */
74         struct clk *op_clk;
75         /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
76         struct i2s_dai *pri_dai;
77         /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
78         struct i2s_dai *sec_dai;
79 #define DAI_OPENED      (1 << 0) /* Dai is opened */
80 #define DAI_MANAGER     (1 << 1) /* Dai is the manager */
81         unsigned mode;
82         /* Driver for this DAI */
83         struct snd_soc_dai_driver i2s_dai_drv;
84         /* DMA parameters */
85         struct snd_dmaengine_dai_dma_data dma_playback;
86         struct snd_dmaengine_dai_dma_data dma_capture;
87         struct snd_dmaengine_dai_dma_data idma_playback;
88         dma_filter_fn filter;
89         u32     quirks;
90         u32     suspend_i2smod;
91         u32     suspend_i2scon;
92         u32     suspend_i2spsr;
93         const struct samsung_i2s_variant_regs *variant_regs;
94
95         /* Spinlock protecting access to the device's registers */
96         spinlock_t spinlock;
97         spinlock_t *lock;
98
99         /* Below fields are only valid if this is the primary FIFO */
100         struct clk *clk_table[3];
101         struct clk_onecell_data clk_data;
102 };
103
104 /* Lock for cross i/f checks */
105 static DEFINE_SPINLOCK(lock);
106
107 /* If this is the 'overlay' stereo DAI */
108 static inline bool is_secondary(struct i2s_dai *i2s)
109 {
110         return i2s->pri_dai ? true : false;
111 }
112
113 /* If operating in SoC-Slave mode */
114 static inline bool is_slave(struct i2s_dai *i2s)
115 {
116         u32 mod = readl(i2s->addr + I2SMOD);
117         return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
118 }
119
120 /* If this interface of the controller is transmitting data */
121 static inline bool tx_active(struct i2s_dai *i2s)
122 {
123         u32 active;
124
125         if (!i2s)
126                 return false;
127
128         active = readl(i2s->addr + I2SCON);
129
130         if (is_secondary(i2s))
131                 active &= CON_TXSDMA_ACTIVE;
132         else
133                 active &= CON_TXDMA_ACTIVE;
134
135         return active ? true : false;
136 }
137
138 /* Return pointer to the other DAI */
139 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
140 {
141         return i2s->pri_dai ? : i2s->sec_dai;
142 }
143
144 /* If the other interface of the controller is transmitting data */
145 static inline bool other_tx_active(struct i2s_dai *i2s)
146 {
147         struct i2s_dai *other = get_other_dai(i2s);
148
149         return tx_active(other);
150 }
151
152 /* If any interface of the controller is transmitting data */
153 static inline bool any_tx_active(struct i2s_dai *i2s)
154 {
155         return tx_active(i2s) || other_tx_active(i2s);
156 }
157
158 /* If this interface of the controller is receiving data */
159 static inline bool rx_active(struct i2s_dai *i2s)
160 {
161         u32 active;
162
163         if (!i2s)
164                 return false;
165
166         active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
167
168         return active ? true : false;
169 }
170
171 /* If the other interface of the controller is receiving data */
172 static inline bool other_rx_active(struct i2s_dai *i2s)
173 {
174         struct i2s_dai *other = get_other_dai(i2s);
175
176         return rx_active(other);
177 }
178
179 /* If any interface of the controller is receiving data */
180 static inline bool any_rx_active(struct i2s_dai *i2s)
181 {
182         return rx_active(i2s) || other_rx_active(i2s);
183 }
184
185 /* If the other DAI is transmitting or receiving data */
186 static inline bool other_active(struct i2s_dai *i2s)
187 {
188         return other_rx_active(i2s) || other_tx_active(i2s);
189 }
190
191 /* If this DAI is transmitting or receiving data */
192 static inline bool this_active(struct i2s_dai *i2s)
193 {
194         return tx_active(i2s) || rx_active(i2s);
195 }
196
197 /* If the controller is active anyway */
198 static inline bool any_active(struct i2s_dai *i2s)
199 {
200         return this_active(i2s) || other_active(i2s);
201 }
202
203 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
204 {
205         return snd_soc_dai_get_drvdata(dai);
206 }
207
208 static inline bool is_opened(struct i2s_dai *i2s)
209 {
210         if (i2s && (i2s->mode & DAI_OPENED))
211                 return true;
212         else
213                 return false;
214 }
215
216 static inline bool is_manager(struct i2s_dai *i2s)
217 {
218         if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
219                 return true;
220         else
221                 return false;
222 }
223
224 /* Read RCLK of I2S (in multiples of LRCLK) */
225 static inline unsigned get_rfs(struct i2s_dai *i2s)
226 {
227         u32 rfs;
228         rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
229         rfs &= i2s->variant_regs->rfs_mask;
230
231         switch (rfs) {
232         case 7: return 192;
233         case 6: return 96;
234         case 5: return 128;
235         case 4: return 64;
236         case 3: return 768;
237         case 2: return 384;
238         case 1: return 512;
239         default: return 256;
240         }
241 }
242
243 /* Write RCLK of I2S (in multiples of LRCLK) */
244 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
245 {
246         u32 mod = readl(i2s->addr + I2SMOD);
247         int rfs_shift = i2s->variant_regs->rfs_off;
248
249         mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
250
251         switch (rfs) {
252         case 192:
253                 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
254                 break;
255         case 96:
256                 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
257                 break;
258         case 128:
259                 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
260                 break;
261         case 64:
262                 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
263                 break;
264         case 768:
265                 mod |= (MOD_RCLK_768FS << rfs_shift);
266                 break;
267         case 512:
268                 mod |= (MOD_RCLK_512FS << rfs_shift);
269                 break;
270         case 384:
271                 mod |= (MOD_RCLK_384FS << rfs_shift);
272                 break;
273         default:
274                 mod |= (MOD_RCLK_256FS << rfs_shift);
275                 break;
276         }
277
278         writel(mod, i2s->addr + I2SMOD);
279 }
280
281 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
282 static inline unsigned get_bfs(struct i2s_dai *i2s)
283 {
284         u32 bfs;
285         bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
286         bfs &= i2s->variant_regs->bfs_mask;
287
288         switch (bfs) {
289         case 8: return 256;
290         case 7: return 192;
291         case 6: return 128;
292         case 5: return 96;
293         case 4: return 64;
294         case 3: return 24;
295         case 2: return 16;
296         case 1: return 48;
297         default: return 32;
298         }
299 }
300
301 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
302 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
303 {
304         u32 mod = readl(i2s->addr + I2SMOD);
305         int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
306         int bfs_shift = i2s->variant_regs->bfs_off;
307
308         /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
309         if (!tdm && bfs > 48) {
310                 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
311                 return;
312         }
313
314         mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
315
316         switch (bfs) {
317         case 48:
318                 mod |= (MOD_BCLK_48FS << bfs_shift);
319                 break;
320         case 32:
321                 mod |= (MOD_BCLK_32FS << bfs_shift);
322                 break;
323         case 24:
324                 mod |= (MOD_BCLK_24FS << bfs_shift);
325                 break;
326         case 16:
327                 mod |= (MOD_BCLK_16FS << bfs_shift);
328                 break;
329         case 64:
330                 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
331                 break;
332         case 96:
333                 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
334                 break;
335         case 128:
336                 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
337                 break;
338         case 192:
339                 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
340                 break;
341         case 256:
342                 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
343                 break;
344         default:
345                 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
346                 return;
347         }
348
349         writel(mod, i2s->addr + I2SMOD);
350 }
351
352 /* Sample-Size */
353 static inline int get_blc(struct i2s_dai *i2s)
354 {
355         int blc = readl(i2s->addr + I2SMOD);
356
357         blc = (blc >> 13) & 0x3;
358
359         switch (blc) {
360         case 2: return 24;
361         case 1: return 8;
362         default: return 16;
363         }
364 }
365
366 /* TX Channel Control */
367 static void i2s_txctrl(struct i2s_dai *i2s, int on)
368 {
369         void __iomem *addr = i2s->addr;
370         int txr_off = i2s->variant_regs->txr_off;
371         u32 con = readl(addr + I2SCON);
372         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
373
374         if (on) {
375                 con |= CON_ACTIVE;
376                 con &= ~CON_TXCH_PAUSE;
377
378                 if (is_secondary(i2s)) {
379                         con |= CON_TXSDMA_ACTIVE;
380                         con &= ~CON_TXSDMA_PAUSE;
381                 } else {
382                         con |= CON_TXDMA_ACTIVE;
383                         con &= ~CON_TXDMA_PAUSE;
384                 }
385
386                 if (any_rx_active(i2s))
387                         mod |= 2 << txr_off;
388                 else
389                         mod |= 0 << txr_off;
390         } else {
391                 if (is_secondary(i2s)) {
392                         con |=  CON_TXSDMA_PAUSE;
393                         con &= ~CON_TXSDMA_ACTIVE;
394                 } else {
395                         con |=  CON_TXDMA_PAUSE;
396                         con &= ~CON_TXDMA_ACTIVE;
397                 }
398
399                 if (other_tx_active(i2s)) {
400                         writel(con, addr + I2SCON);
401                         return;
402                 }
403
404                 con |=  CON_TXCH_PAUSE;
405
406                 if (any_rx_active(i2s))
407                         mod |= 1 << txr_off;
408                 else
409                         con &= ~CON_ACTIVE;
410         }
411
412         writel(mod, addr + I2SMOD);
413         writel(con, addr + I2SCON);
414 }
415
416 /* RX Channel Control */
417 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
418 {
419         void __iomem *addr = i2s->addr;
420         int txr_off = i2s->variant_regs->txr_off;
421         u32 con = readl(addr + I2SCON);
422         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
423
424         if (on) {
425                 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
426                 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
427
428                 if (any_tx_active(i2s))
429                         mod |= 2 << txr_off;
430                 else
431                         mod |= 1 << txr_off;
432         } else {
433                 con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
434                 con &= ~CON_RXDMA_ACTIVE;
435
436                 if (any_tx_active(i2s))
437                         mod |= 0 << txr_off;
438                 else
439                         con &= ~CON_ACTIVE;
440         }
441
442         writel(mod, addr + I2SMOD);
443         writel(con, addr + I2SCON);
444 }
445
446 /* Flush FIFO of an interface */
447 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
448 {
449         void __iomem *fic;
450         u32 val;
451
452         if (!i2s)
453                 return;
454
455         if (is_secondary(i2s))
456                 fic = i2s->addr + I2SFICS;
457         else
458                 fic = i2s->addr + I2SFIC;
459
460         /* Flush the FIFO */
461         writel(readl(fic) | flush, fic);
462
463         /* Be patient */
464         val = msecs_to_loops(1) / 1000; /* 1 usec */
465         while (--val)
466                 cpu_relax();
467
468         writel(readl(fic) & ~flush, fic);
469 }
470
471 static int i2s_set_sysclk(struct snd_soc_dai *dai,
472           int clk_id, unsigned int rfs, int dir)
473 {
474         struct i2s_dai *i2s = to_info(dai);
475         struct i2s_dai *other = get_other_dai(i2s);
476         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
477         unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
478         unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
479         u32 mod, mask, val = 0;
480         unsigned long flags;
481         int ret = 0;
482
483         pm_runtime_get_sync(dai->dev);
484
485         spin_lock_irqsave(i2s->lock, flags);
486         mod = readl(i2s->addr + I2SMOD);
487         spin_unlock_irqrestore(i2s->lock, flags);
488
489         switch (clk_id) {
490         case SAMSUNG_I2S_OPCLK:
491                 mask = MOD_OPCLK_MASK;
492                 val = dir;
493                 break;
494         case SAMSUNG_I2S_CDCLK:
495                 mask = 1 << i2s_regs->cdclkcon_off;
496                 /* Shouldn't matter in GATING(CLOCK_IN) mode */
497                 if (dir == SND_SOC_CLOCK_IN)
498                         rfs = 0;
499
500                 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
501                                 (any_active(i2s) &&
502                                 (((dir == SND_SOC_CLOCK_IN)
503                                         && !(mod & cdcon_mask)) ||
504                                 ((dir == SND_SOC_CLOCK_OUT)
505                                         && (mod & cdcon_mask))))) {
506                         dev_err(&i2s->pdev->dev,
507                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
508                         ret = -EAGAIN;
509                         goto err;
510                 }
511
512                 if (dir == SND_SOC_CLOCK_IN)
513                         val = 1 << i2s_regs->cdclkcon_off;
514
515                 i2s->rfs = rfs;
516                 break;
517
518         case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
519         case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
520                 mask = 1 << i2s_regs->rclksrc_off;
521
522                 if ((i2s->quirks & QUIRK_NO_MUXPSR)
523                                 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
524                         clk_id = 0;
525                 else
526                         clk_id = 1;
527
528                 if (!any_active(i2s)) {
529                         if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
530                                 if ((clk_id && !(mod & rsrc_mask)) ||
531                                         (!clk_id && (mod & rsrc_mask))) {
532                                         clk_disable_unprepare(i2s->op_clk);
533                                         clk_put(i2s->op_clk);
534                                 } else {
535                                         i2s->rclk_srcrate =
536                                                 clk_get_rate(i2s->op_clk);
537                                         goto done;
538                                 }
539                         }
540
541                         if (clk_id)
542                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
543                                                 "i2s_opclk1");
544                         else
545                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
546                                                 "i2s_opclk0");
547
548                         if (WARN_ON(IS_ERR(i2s->op_clk))) {
549                                 ret = PTR_ERR(i2s->op_clk);
550                                 i2s->op_clk = NULL;
551                                 goto err;
552                         }
553
554                         ret = clk_prepare_enable(i2s->op_clk);
555                         if (ret) {
556                                 clk_put(i2s->op_clk);
557                                 i2s->op_clk = NULL;
558                                 goto err;
559                         }
560                         i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
561
562                         /* Over-ride the other's */
563                         if (other) {
564                                 other->op_clk = i2s->op_clk;
565                                 other->rclk_srcrate = i2s->rclk_srcrate;
566                         }
567                 } else if ((!clk_id && (mod & rsrc_mask))
568                                 || (clk_id && !(mod & rsrc_mask))) {
569                         dev_err(&i2s->pdev->dev,
570                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
571                         ret = -EAGAIN;
572                         goto err;
573                 } else {
574                         /* Call can't be on the active DAI */
575                         i2s->op_clk = other->op_clk;
576                         i2s->rclk_srcrate = other->rclk_srcrate;
577                         goto done;
578                 }
579
580                 if (clk_id == 1)
581                         val = 1 << i2s_regs->rclksrc_off;
582                 break;
583         default:
584                 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
585                 ret = -EINVAL;
586                 goto err;
587         }
588
589         spin_lock_irqsave(i2s->lock, flags);
590         mod = readl(i2s->addr + I2SMOD);
591         mod = (mod & ~mask) | val;
592         writel(mod, i2s->addr + I2SMOD);
593         spin_unlock_irqrestore(i2s->lock, flags);
594 done:
595         pm_runtime_put(dai->dev);
596
597         return 0;
598 err:
599         pm_runtime_put(dai->dev);
600         return ret;
601 }
602
603 static int i2s_set_fmt(struct snd_soc_dai *dai,
604         unsigned int fmt)
605 {
606         struct i2s_dai *i2s = to_info(dai);
607         int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
608         u32 mod, tmp = 0;
609         unsigned long flags;
610
611         lrp_shift = i2s->variant_regs->lrp_off;
612         sdf_shift = i2s->variant_regs->sdf_off;
613         mod_slave = 1 << i2s->variant_regs->mss_off;
614
615         sdf_mask = MOD_SDF_MASK << sdf_shift;
616         lrp_rlow = MOD_LR_RLOW << lrp_shift;
617
618         /* Format is priority */
619         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
620         case SND_SOC_DAIFMT_RIGHT_J:
621                 tmp |= lrp_rlow;
622                 tmp |= (MOD_SDF_MSB << sdf_shift);
623                 break;
624         case SND_SOC_DAIFMT_LEFT_J:
625                 tmp |= lrp_rlow;
626                 tmp |= (MOD_SDF_LSB << sdf_shift);
627                 break;
628         case SND_SOC_DAIFMT_I2S:
629                 tmp |= (MOD_SDF_IIS << sdf_shift);
630                 break;
631         default:
632                 dev_err(&i2s->pdev->dev, "Format not supported\n");
633                 return -EINVAL;
634         }
635
636         /*
637          * INV flag is relative to the FORMAT flag - if set it simply
638          * flips the polarity specified by the Standard
639          */
640         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
641         case SND_SOC_DAIFMT_NB_NF:
642                 break;
643         case SND_SOC_DAIFMT_NB_IF:
644                 if (tmp & lrp_rlow)
645                         tmp &= ~lrp_rlow;
646                 else
647                         tmp |= lrp_rlow;
648                 break;
649         default:
650                 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
651                 return -EINVAL;
652         }
653
654         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
655         case SND_SOC_DAIFMT_CBM_CFM:
656                 tmp |= mod_slave;
657                 break;
658         case SND_SOC_DAIFMT_CBS_CFS:
659                 /* Set default source clock in Master mode */
660                 if (i2s->rclk_srcrate == 0)
661                         i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
662                                                         0, SND_SOC_CLOCK_IN);
663                 break;
664         default:
665                 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
666                 return -EINVAL;
667         }
668
669         pm_runtime_get_sync(dai->dev);
670         spin_lock_irqsave(i2s->lock, flags);
671         mod = readl(i2s->addr + I2SMOD);
672         /*
673          * Don't change the I2S mode if any controller is active on this
674          * channel.
675          */
676         if (any_active(i2s) &&
677                 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
678                 spin_unlock_irqrestore(i2s->lock, flags);
679                 pm_runtime_put(dai->dev);
680                 dev_err(&i2s->pdev->dev,
681                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
682                 return -EAGAIN;
683         }
684
685         mod &= ~(sdf_mask | lrp_rlow | mod_slave);
686         mod |= tmp;
687         writel(mod, i2s->addr + I2SMOD);
688         spin_unlock_irqrestore(i2s->lock, flags);
689         pm_runtime_put(dai->dev);
690
691         return 0;
692 }
693
694 static int i2s_hw_params(struct snd_pcm_substream *substream,
695         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
696 {
697         struct i2s_dai *i2s = to_info(dai);
698         u32 mod, mask = 0, val = 0;
699         unsigned long flags;
700
701         WARN_ON(!pm_runtime_active(dai->dev));
702
703         if (!is_secondary(i2s))
704                 mask |= (MOD_DC2_EN | MOD_DC1_EN);
705
706         switch (params_channels(params)) {
707         case 6:
708                 val |= MOD_DC2_EN;
709         case 4:
710                 val |= MOD_DC1_EN;
711                 break;
712         case 2:
713                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
714                         i2s->dma_playback.addr_width = 4;
715                 else
716                         i2s->dma_capture.addr_width = 4;
717                 break;
718         case 1:
719                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
720                         i2s->dma_playback.addr_width = 2;
721                 else
722                         i2s->dma_capture.addr_width = 2;
723
724                 break;
725         default:
726                 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
727                                 params_channels(params));
728                 return -EINVAL;
729         }
730
731         if (is_secondary(i2s))
732                 mask |= MOD_BLCS_MASK;
733         else
734                 mask |= MOD_BLCP_MASK;
735
736         if (is_manager(i2s))
737                 mask |= MOD_BLC_MASK;
738
739         switch (params_width(params)) {
740         case 8:
741                 if (is_secondary(i2s))
742                         val |= MOD_BLCS_8BIT;
743                 else
744                         val |= MOD_BLCP_8BIT;
745                 if (is_manager(i2s))
746                         val |= MOD_BLC_8BIT;
747                 break;
748         case 16:
749                 if (is_secondary(i2s))
750                         val |= MOD_BLCS_16BIT;
751                 else
752                         val |= MOD_BLCP_16BIT;
753                 if (is_manager(i2s))
754                         val |= MOD_BLC_16BIT;
755                 break;
756         case 24:
757                 if (is_secondary(i2s))
758                         val |= MOD_BLCS_24BIT;
759                 else
760                         val |= MOD_BLCP_24BIT;
761                 if (is_manager(i2s))
762                         val |= MOD_BLC_24BIT;
763                 break;
764         default:
765                 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
766                                 params_format(params));
767                 return -EINVAL;
768         }
769
770         spin_lock_irqsave(i2s->lock, flags);
771         mod = readl(i2s->addr + I2SMOD);
772         mod = (mod & ~mask) | val;
773         writel(mod, i2s->addr + I2SMOD);
774         spin_unlock_irqrestore(i2s->lock, flags);
775
776         snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
777
778         i2s->frmclk = params_rate(params);
779
780         return 0;
781 }
782
783 /* We set constraints on the substream acc to the version of I2S */
784 static int i2s_startup(struct snd_pcm_substream *substream,
785           struct snd_soc_dai *dai)
786 {
787         struct i2s_dai *i2s = to_info(dai);
788         struct i2s_dai *other = get_other_dai(i2s);
789         unsigned long flags;
790
791         pm_runtime_get_sync(dai->dev);
792
793         spin_lock_irqsave(&lock, flags);
794
795         i2s->mode |= DAI_OPENED;
796
797         if (is_manager(other))
798                 i2s->mode &= ~DAI_MANAGER;
799         else
800                 i2s->mode |= DAI_MANAGER;
801
802         if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
803                 writel(CON_RSTCLR, i2s->addr + I2SCON);
804
805         spin_unlock_irqrestore(&lock, flags);
806
807         return 0;
808 }
809
810 static void i2s_shutdown(struct snd_pcm_substream *substream,
811         struct snd_soc_dai *dai)
812 {
813         struct i2s_dai *i2s = to_info(dai);
814         struct i2s_dai *other = get_other_dai(i2s);
815         unsigned long flags;
816
817         spin_lock_irqsave(&lock, flags);
818
819         i2s->mode &= ~DAI_OPENED;
820         i2s->mode &= ~DAI_MANAGER;
821
822         if (is_opened(other))
823                 other->mode |= DAI_MANAGER;
824
825         /* Reset any constraint on RFS and BFS */
826         i2s->rfs = 0;
827         i2s->bfs = 0;
828
829         spin_unlock_irqrestore(&lock, flags);
830
831         pm_runtime_put(dai->dev);
832 }
833
834 static int config_setup(struct i2s_dai *i2s)
835 {
836         struct i2s_dai *other = get_other_dai(i2s);
837         unsigned rfs, bfs, blc;
838         u32 psr;
839
840         blc = get_blc(i2s);
841
842         bfs = i2s->bfs;
843
844         if (!bfs && other)
845                 bfs = other->bfs;
846
847         /* Select least possible multiple(2) if no constraint set */
848         if (!bfs)
849                 bfs = blc * 2;
850
851         rfs = i2s->rfs;
852
853         if (!rfs && other)
854                 rfs = other->rfs;
855
856         if ((rfs == 256 || rfs == 512) && (blc == 24)) {
857                 dev_err(&i2s->pdev->dev,
858                         "%d-RFS not supported for 24-blc\n", rfs);
859                 return -EINVAL;
860         }
861
862         if (!rfs) {
863                 if (bfs == 16 || bfs == 32)
864                         rfs = 256;
865                 else
866                         rfs = 384;
867         }
868
869         /* If already setup and running */
870         if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
871                 dev_err(&i2s->pdev->dev,
872                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
873                 return -EAGAIN;
874         }
875
876         set_bfs(i2s, bfs);
877         set_rfs(i2s, rfs);
878
879         /* Don't bother with PSR in Slave mode */
880         if (is_slave(i2s))
881                 return 0;
882
883         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
884                 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
885                 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
886                 dev_dbg(&i2s->pdev->dev,
887                         "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
888                                 i2s->rclk_srcrate, psr, rfs, bfs);
889         }
890
891         return 0;
892 }
893
894 static int i2s_trigger(struct snd_pcm_substream *substream,
895         int cmd, struct snd_soc_dai *dai)
896 {
897         int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
898         struct snd_soc_pcm_runtime *rtd = substream->private_data;
899         struct i2s_dai *i2s = to_info(rtd->cpu_dai);
900         unsigned long flags;
901
902         switch (cmd) {
903         case SNDRV_PCM_TRIGGER_START:
904         case SNDRV_PCM_TRIGGER_RESUME:
905         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
906                 pm_runtime_get_sync(dai->dev);
907                 spin_lock_irqsave(i2s->lock, flags);
908
909                 if (config_setup(i2s)) {
910                         spin_unlock_irqrestore(i2s->lock, flags);
911                         return -EINVAL;
912                 }
913
914                 if (capture)
915                         i2s_rxctrl(i2s, 1);
916                 else
917                         i2s_txctrl(i2s, 1);
918
919                 spin_unlock_irqrestore(i2s->lock, flags);
920                 break;
921         case SNDRV_PCM_TRIGGER_STOP:
922         case SNDRV_PCM_TRIGGER_SUSPEND:
923         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
924                 spin_lock_irqsave(i2s->lock, flags);
925
926                 if (capture) {
927                         i2s_rxctrl(i2s, 0);
928                         i2s_fifo(i2s, FIC_RXFLUSH);
929                 } else {
930                         i2s_txctrl(i2s, 0);
931                         i2s_fifo(i2s, FIC_TXFLUSH);
932                 }
933
934                 spin_unlock_irqrestore(i2s->lock, flags);
935                 pm_runtime_put(dai->dev);
936                 break;
937         }
938
939         return 0;
940 }
941
942 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
943         int div_id, int div)
944 {
945         struct i2s_dai *i2s = to_info(dai);
946         struct i2s_dai *other = get_other_dai(i2s);
947
948         switch (div_id) {
949         case SAMSUNG_I2S_DIV_BCLK:
950                 pm_runtime_get_sync(dai->dev);
951                 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
952                         || (other && other->bfs && (other->bfs != div))) {
953                         pm_runtime_put(dai->dev);
954                         dev_err(&i2s->pdev->dev,
955                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
956                         return -EAGAIN;
957                 }
958                 i2s->bfs = div;
959                 pm_runtime_put(dai->dev);
960                 break;
961         default:
962                 dev_err(&i2s->pdev->dev,
963                         "Invalid clock divider(%d)\n", div_id);
964                 return -EINVAL;
965         }
966
967         return 0;
968 }
969
970 static snd_pcm_sframes_t
971 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
972 {
973         struct i2s_dai *i2s = to_info(dai);
974         u32 reg = readl(i2s->addr + I2SFIC);
975         snd_pcm_sframes_t delay;
976         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
977
978         WARN_ON(!pm_runtime_active(dai->dev));
979
980         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
981                 delay = FIC_RXCOUNT(reg);
982         else if (is_secondary(i2s))
983                 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
984         else
985                 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
986
987         return delay;
988 }
989
990 #ifdef CONFIG_PM
991 static int i2s_suspend(struct snd_soc_dai *dai)
992 {
993         return pm_runtime_force_suspend(dai->dev);
994 }
995
996 static int i2s_resume(struct snd_soc_dai *dai)
997 {
998         return pm_runtime_force_resume(dai->dev);
999 }
1000 #else
1001 #define i2s_suspend NULL
1002 #define i2s_resume  NULL
1003 #endif
1004
1005 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
1006 {
1007         struct i2s_dai *i2s = to_info(dai);
1008         struct i2s_dai *other = get_other_dai(i2s);
1009         unsigned long flags;
1010
1011         pm_runtime_get_sync(dai->dev);
1012
1013         if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
1014                 snd_soc_dai_init_dma_data(dai, &other->sec_dai->dma_playback,
1015                                            NULL);
1016         } else {
1017                 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback,
1018                                            &i2s->dma_capture);
1019
1020                 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1021                         writel(CON_RSTCLR, i2s->addr + I2SCON);
1022
1023                 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1024                         idma_reg_addr_init(i2s->addr,
1025                                         i2s->sec_dai->idma_playback.addr);
1026         }
1027
1028         /* Reset any constraint on RFS and BFS */
1029         i2s->rfs = 0;
1030         i2s->bfs = 0;
1031         i2s->rclk_srcrate = 0;
1032
1033         spin_lock_irqsave(i2s->lock, flags);
1034         i2s_txctrl(i2s, 0);
1035         i2s_rxctrl(i2s, 0);
1036         i2s_fifo(i2s, FIC_TXFLUSH);
1037         i2s_fifo(other, FIC_TXFLUSH);
1038         i2s_fifo(i2s, FIC_RXFLUSH);
1039         spin_unlock_irqrestore(i2s->lock, flags);
1040
1041         /* Gate CDCLK by default */
1042         if (!is_opened(other))
1043                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1044                                 0, SND_SOC_CLOCK_IN);
1045         pm_runtime_put(dai->dev);
1046
1047         return 0;
1048 }
1049
1050 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1051 {
1052         struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1053         unsigned long flags;
1054
1055         pm_runtime_get_sync(dai->dev);
1056
1057         if (!is_secondary(i2s)) {
1058                 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1059                         spin_lock_irqsave(i2s->lock, flags);
1060                         writel(0, i2s->addr + I2SCON);
1061                         spin_unlock_irqrestore(i2s->lock, flags);
1062                 }
1063         }
1064
1065         pm_runtime_put(dai->dev);
1066
1067         return 0;
1068 }
1069
1070 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1071         .trigger = i2s_trigger,
1072         .hw_params = i2s_hw_params,
1073         .set_fmt = i2s_set_fmt,
1074         .set_clkdiv = i2s_set_clkdiv,
1075         .set_sysclk = i2s_set_sysclk,
1076         .startup = i2s_startup,
1077         .shutdown = i2s_shutdown,
1078         .delay = i2s_delay,
1079 };
1080
1081 static const struct snd_soc_component_driver samsung_i2s_component = {
1082         .name           = "samsung-i2s",
1083 };
1084
1085 #define SAMSUNG_I2S_FMTS        (SNDRV_PCM_FMTBIT_S8 | \
1086                                         SNDRV_PCM_FMTBIT_S16_LE | \
1087                                         SNDRV_PCM_FMTBIT_S24_LE)
1088
1089 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev,
1090                                 const struct samsung_i2s_dai_data *i2s_dai_data,
1091                                 bool sec)
1092 {
1093         struct i2s_dai *i2s;
1094
1095         i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1096         if (i2s == NULL)
1097                 return NULL;
1098
1099         i2s->pdev = pdev;
1100         i2s->pri_dai = NULL;
1101         i2s->sec_dai = NULL;
1102         i2s->i2s_dai_drv.symmetric_rates = 1;
1103         i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1104         i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1105         i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1106         i2s->i2s_dai_drv.suspend = i2s_suspend;
1107         i2s->i2s_dai_drv.resume = i2s_resume;
1108         i2s->i2s_dai_drv.playback.channels_min = 1;
1109         i2s->i2s_dai_drv.playback.channels_max = 2;
1110         i2s->i2s_dai_drv.playback.rates = i2s_dai_data->pcm_rates;
1111         i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1112
1113         if (!sec) {
1114                 i2s->i2s_dai_drv.capture.channels_min = 1;
1115                 i2s->i2s_dai_drv.capture.channels_max = 2;
1116                 i2s->i2s_dai_drv.capture.rates = i2s_dai_data->pcm_rates;
1117                 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1118         }
1119         return i2s;
1120 }
1121
1122 #ifdef CONFIG_PM
1123 static int i2s_runtime_suspend(struct device *dev)
1124 {
1125         struct i2s_dai *i2s = dev_get_drvdata(dev);
1126
1127         i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
1128         i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
1129         i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
1130
1131         if (i2s->op_clk)
1132                 clk_disable_unprepare(i2s->op_clk);
1133         clk_disable_unprepare(i2s->clk);
1134
1135         return 0;
1136 }
1137
1138 static int i2s_runtime_resume(struct device *dev)
1139 {
1140         struct i2s_dai *i2s = dev_get_drvdata(dev);
1141         int ret;
1142
1143         ret = clk_prepare_enable(i2s->clk);
1144         if (ret)
1145                 return ret;
1146
1147         if (i2s->op_clk) {
1148                 ret = clk_prepare_enable(i2s->op_clk);
1149                 if (ret) {
1150                         clk_disable_unprepare(i2s->clk);
1151                         return ret;
1152                 }
1153         }
1154
1155         writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
1156         writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
1157         writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
1158
1159         return 0;
1160 }
1161 #endif /* CONFIG_PM */
1162
1163 static void i2s_unregister_clocks(struct i2s_dai *i2s)
1164 {
1165         int i;
1166
1167         for (i = 0; i < i2s->clk_data.clk_num; i++) {
1168                 if (!IS_ERR(i2s->clk_table[i]))
1169                         clk_unregister(i2s->clk_table[i]);
1170         }
1171 }
1172
1173 static void i2s_unregister_clock_provider(struct platform_device *pdev)
1174 {
1175         struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
1176
1177         of_clk_del_provider(pdev->dev.of_node);
1178         i2s_unregister_clocks(i2s);
1179 }
1180
1181 static int i2s_register_clock_provider(struct platform_device *pdev)
1182 {
1183         struct device *dev = &pdev->dev;
1184         struct i2s_dai *i2s = dev_get_drvdata(dev);
1185         const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1186         const char *p_names[2] = { NULL };
1187         const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1188         struct clk *rclksrc;
1189         int ret, i;
1190
1191         /* Register the clock provider only if it's expected in the DTB */
1192         if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1193                 return 0;
1194
1195         /* Get the RCLKSRC mux clock parent clock names */
1196         for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1197                 rclksrc = clk_get(dev, clk_name[i]);
1198                 if (IS_ERR(rclksrc))
1199                         continue;
1200                 p_names[i] = __clk_get_name(rclksrc);
1201                 clk_put(rclksrc);
1202         }
1203
1204         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1205                 /* Activate the prescaler */
1206                 u32 val = readl(i2s->addr + I2SPSR);
1207                 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1208
1209                 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev,
1210                                 "i2s_rclksrc", p_names, ARRAY_SIZE(p_names),
1211                                 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1212                                 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1213                                 1, 0, i2s->lock);
1214
1215                 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,
1216                                 "i2s_presc", "i2s_rclksrc",
1217                                 CLK_SET_RATE_PARENT,
1218                                 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1219
1220                 p_names[0] = "i2s_presc";
1221                 i2s->clk_data.clk_num = 2;
1222         }
1223         of_property_read_string_index(dev->of_node,
1224                                 "clock-output-names", 0, &clk_name[0]);
1225
1226         i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev, clk_name[0],
1227                                 p_names[0], CLK_SET_RATE_PARENT,
1228                                 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1229                                 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1230
1231         i2s->clk_data.clk_num += 1;
1232         i2s->clk_data.clks = i2s->clk_table;
1233
1234         ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1235                                   &i2s->clk_data);
1236         if (ret < 0) {
1237                 dev_err(dev, "failed to add clock provider: %d\n", ret);
1238                 i2s_unregister_clocks(i2s);
1239         }
1240
1241         return ret;
1242 }
1243
1244 static int samsung_i2s_probe(struct platform_device *pdev)
1245 {
1246         struct i2s_dai *pri_dai, *sec_dai = NULL;
1247         struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1248         struct resource *res;
1249         u32 regs_base, quirks = 0, idma_addr = 0;
1250         struct device_node *np = pdev->dev.of_node;
1251         const struct samsung_i2s_dai_data *i2s_dai_data;
1252         int ret;
1253
1254         if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node)
1255                 i2s_dai_data = of_device_get_match_data(&pdev->dev);
1256         else
1257                 i2s_dai_data = (struct samsung_i2s_dai_data *)
1258                                 platform_get_device_id(pdev)->driver_data;
1259
1260         pri_dai = i2s_alloc_dai(pdev, i2s_dai_data, false);
1261         if (!pri_dai) {
1262                 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1263                 return -ENOMEM;
1264         }
1265
1266         spin_lock_init(&pri_dai->spinlock);
1267         pri_dai->lock = &pri_dai->spinlock;
1268
1269         if (!np) {
1270                 if (i2s_pdata == NULL) {
1271                         dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1272                         return -EINVAL;
1273                 }
1274
1275                 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback;
1276                 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture;
1277                 pri_dai->filter = i2s_pdata->dma_filter;
1278
1279                 quirks = i2s_pdata->type.quirks;
1280                 idma_addr = i2s_pdata->type.idma_addr;
1281         } else {
1282                 quirks = i2s_dai_data->quirks;
1283                 if (of_property_read_u32(np, "samsung,idma-addr",
1284                                          &idma_addr)) {
1285                         if (quirks & QUIRK_SUPPORTS_IDMA) {
1286                                 dev_info(&pdev->dev, "idma address is not"\
1287                                                 "specified");
1288                         }
1289                 }
1290         }
1291
1292         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1293         pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1294         if (IS_ERR(pri_dai->addr))
1295                 return PTR_ERR(pri_dai->addr);
1296
1297         regs_base = res->start;
1298
1299         pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1300         if (IS_ERR(pri_dai->clk)) {
1301                 dev_err(&pdev->dev, "Failed to get iis clock\n");
1302                 return PTR_ERR(pri_dai->clk);
1303         }
1304
1305         ret = clk_prepare_enable(pri_dai->clk);
1306         if (ret != 0) {
1307                 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1308                 return ret;
1309         }
1310         pri_dai->dma_playback.addr = regs_base + I2STXD;
1311         pri_dai->dma_capture.addr = regs_base + I2SRXD;
1312         pri_dai->dma_playback.chan_name = "tx";
1313         pri_dai->dma_capture.chan_name = "rx";
1314         pri_dai->dma_playback.addr_width = 4;
1315         pri_dai->dma_capture.addr_width = 4;
1316         pri_dai->quirks = quirks;
1317         pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1318
1319         if (quirks & QUIRK_PRI_6CHAN)
1320                 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1321
1322         ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter,
1323                                                  NULL, NULL);
1324         if (ret < 0)
1325                 goto err_disable_clk;
1326
1327         ret = devm_snd_soc_register_component(&pdev->dev,
1328                                         &samsung_i2s_component,
1329                                         &pri_dai->i2s_dai_drv, 1);
1330         if (ret < 0)
1331                 goto err_disable_clk;
1332
1333         if (quirks & QUIRK_SEC_DAI) {
1334                 sec_dai = i2s_alloc_dai(pdev, i2s_dai_data, true);
1335                 if (!sec_dai) {
1336                         dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1337                         ret = -ENOMEM;
1338                         goto err_disable_clk;
1339                 }
1340
1341                 sec_dai->lock = &pri_dai->spinlock;
1342                 sec_dai->variant_regs = pri_dai->variant_regs;
1343                 sec_dai->dma_playback.addr = regs_base + I2STXDS;
1344                 sec_dai->dma_playback.chan_name = "tx-sec";
1345
1346                 if (!np) {
1347                         sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec;
1348                         sec_dai->filter = i2s_pdata->dma_filter;
1349                 }
1350
1351                 sec_dai->dma_playback.addr_width = 4;
1352                 sec_dai->addr = pri_dai->addr;
1353                 sec_dai->clk = pri_dai->clk;
1354                 sec_dai->quirks = quirks;
1355                 sec_dai->idma_playback.addr = idma_addr;
1356                 sec_dai->pri_dai = pri_dai;
1357                 pri_dai->sec_dai = sec_dai;
1358
1359                 ret = samsung_asoc_dma_platform_register(&pdev->dev,
1360                                         sec_dai->filter, "tx-sec", NULL);
1361                 if (ret < 0)
1362                         goto err_disable_clk;
1363
1364                 ret = devm_snd_soc_register_component(&pdev->dev,
1365                                                 &samsung_i2s_component,
1366                                                 &sec_dai->i2s_dai_drv, 1);
1367                 if (ret < 0)
1368                         goto err_disable_clk;
1369         }
1370
1371         if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1372                 dev_err(&pdev->dev, "Unable to configure gpio\n");
1373                 ret = -EINVAL;
1374                 goto err_disable_clk;
1375         }
1376
1377         dev_set_drvdata(&pdev->dev, pri_dai);
1378
1379         pm_runtime_set_active(&pdev->dev);
1380         pm_runtime_enable(&pdev->dev);
1381
1382         ret = i2s_register_clock_provider(pdev);
1383         if (!ret)
1384                 return 0;
1385
1386         pm_runtime_disable(&pdev->dev);
1387 err_disable_clk:
1388         clk_disable_unprepare(pri_dai->clk);
1389         return ret;
1390 }
1391
1392 static int samsung_i2s_remove(struct platform_device *pdev)
1393 {
1394         struct i2s_dai *pri_dai;
1395
1396         pri_dai = dev_get_drvdata(&pdev->dev);
1397
1398         pm_runtime_get_sync(&pdev->dev);
1399         pm_runtime_disable(&pdev->dev);
1400
1401         i2s_unregister_clock_provider(pdev);
1402         clk_disable_unprepare(pri_dai->clk);
1403         pm_runtime_put_noidle(&pdev->dev);
1404
1405         return 0;
1406 }
1407
1408 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1409         .bfs_off = 1,
1410         .rfs_off = 3,
1411         .sdf_off = 5,
1412         .txr_off = 8,
1413         .rclksrc_off = 10,
1414         .mss_off = 11,
1415         .cdclkcon_off = 12,
1416         .lrp_off = 7,
1417         .bfs_mask = 0x3,
1418         .rfs_mask = 0x3,
1419         .ftx0cnt_off = 8,
1420 };
1421
1422 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1423         .bfs_off = 0,
1424         .rfs_off = 4,
1425         .sdf_off = 6,
1426         .txr_off = 8,
1427         .rclksrc_off = 10,
1428         .mss_off = 11,
1429         .cdclkcon_off = 12,
1430         .lrp_off = 15,
1431         .bfs_mask = 0xf,
1432         .rfs_mask = 0x3,
1433         .ftx0cnt_off = 8,
1434 };
1435
1436 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1437         .bfs_off = 0,
1438         .rfs_off = 4,
1439         .sdf_off = 7,
1440         .txr_off = 9,
1441         .rclksrc_off = 11,
1442         .mss_off = 12,
1443         .cdclkcon_off = 22,
1444         .lrp_off = 15,
1445         .bfs_mask = 0xf,
1446         .rfs_mask = 0x7,
1447         .ftx0cnt_off = 0,
1448 };
1449
1450 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1451         .bfs_off = 0,
1452         .rfs_off = 3,
1453         .sdf_off = 6,
1454         .txr_off = 8,
1455         .rclksrc_off = 10,
1456         .mss_off = 11,
1457         .cdclkcon_off = 12,
1458         .lrp_off = 15,
1459         .bfs_mask = 0x7,
1460         .rfs_mask = 0x7,
1461         .ftx0cnt_off = 8,
1462 };
1463
1464 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1465         .quirks = QUIRK_NO_MUXPSR,
1466         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1467         .i2s_variant_regs = &i2sv3_regs,
1468 };
1469
1470 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1471         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1472                         QUIRK_SUPPORTS_IDMA,
1473         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1474         .i2s_variant_regs = &i2sv3_regs,
1475 };
1476
1477 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1478         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1479                         QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1480         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1481         .i2s_variant_regs = &i2sv6_regs,
1482 };
1483
1484 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1485         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1486                         QUIRK_SUPPORTS_TDM,
1487         .pcm_rates = SNDRV_PCM_RATE_8000_192000,
1488         .i2s_variant_regs = &i2sv7_regs,
1489 };
1490
1491 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1492         .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1493         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1494         .i2s_variant_regs = &i2sv5_i2s1_regs,
1495 };
1496
1497 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1498         {
1499                 .name           = "samsung-i2s",
1500                 .driver_data    = (kernel_ulong_t)&i2sv3_dai_type,
1501         },
1502         {},
1503 };
1504 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1505
1506 #ifdef CONFIG_OF
1507 static const struct of_device_id exynos_i2s_match[] = {
1508         {
1509                 .compatible = "samsung,s3c6410-i2s",
1510                 .data = &i2sv3_dai_type,
1511         }, {
1512                 .compatible = "samsung,s5pv210-i2s",
1513                 .data = &i2sv5_dai_type,
1514         }, {
1515                 .compatible = "samsung,exynos5420-i2s",
1516                 .data = &i2sv6_dai_type,
1517         }, {
1518                 .compatible = "samsung,exynos7-i2s",
1519                 .data = &i2sv7_dai_type,
1520         }, {
1521                 .compatible = "samsung,exynos7-i2s1",
1522                 .data = &i2sv5_dai_type_i2s1,
1523         },
1524         {},
1525 };
1526 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1527 #endif
1528
1529 static const struct dev_pm_ops samsung_i2s_pm = {
1530         SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1531                                 i2s_runtime_resume, NULL)
1532         SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1533                                      pm_runtime_force_resume)
1534 };
1535
1536 static struct platform_driver samsung_i2s_driver = {
1537         .probe  = samsung_i2s_probe,
1538         .remove = samsung_i2s_remove,
1539         .id_table = samsung_i2s_driver_ids,
1540         .driver = {
1541                 .name = "samsung-i2s",
1542                 .of_match_table = of_match_ptr(exynos_i2s_match),
1543                 .pm = &samsung_i2s_pm,
1544         },
1545 };
1546
1547 module_platform_driver(samsung_i2s_driver);
1548
1549 /* Module information */
1550 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1551 MODULE_DESCRIPTION("Samsung I2S Interface");
1552 MODULE_ALIAS("platform:samsung-i2s");
1553 MODULE_LICENSE("GPL");