c9f87f7bae9925a9d1db14b9648f2779e205af46
[sfrench/cifs-2.6.git] / sound / soc / samsung / i2s.c
1 /* sound/soc/samsung/i2s.c
2  *
3  * ALSA SoC Audio Layer - Samsung I2S Controller driver
4  *
5  * Copyright (c) 2010 Samsung Electronics Co. Ltd.
6  *      Jaswinder Singh <jassisinghbrar@gmail.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12
13 #include <dt-bindings/sound/samsung-i2s.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <linux/clk-provider.h>
18 #include <linux/io.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/of_device.h>
22 #include <linux/of_gpio.h>
23 #include <linux/pm_runtime.h>
24
25 #include <sound/soc.h>
26 #include <sound/pcm_params.h>
27
28 #include <linux/platform_data/asoc-s3c.h>
29
30 #include "dma.h"
31 #include "idma.h"
32 #include "i2s.h"
33 #include "i2s-regs.h"
34
35 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
36
37 struct samsung_i2s_variant_regs {
38         unsigned int    bfs_off;
39         unsigned int    rfs_off;
40         unsigned int    sdf_off;
41         unsigned int    txr_off;
42         unsigned int    rclksrc_off;
43         unsigned int    mss_off;
44         unsigned int    cdclkcon_off;
45         unsigned int    lrp_off;
46         unsigned int    bfs_mask;
47         unsigned int    rfs_mask;
48         unsigned int    ftx0cnt_off;
49 };
50
51 struct samsung_i2s_dai_data {
52         u32 quirks;
53         unsigned int pcm_rates;
54         const struct samsung_i2s_variant_regs *i2s_variant_regs;
55 };
56
57 struct i2s_dai {
58         /* Platform device for this DAI */
59         struct platform_device *pdev;
60         /* Memory mapped SFR region */
61         void __iomem    *addr;
62         /* Rate of RCLK source clock */
63         unsigned long rclk_srcrate;
64         /* Frame Clock */
65         unsigned frmclk;
66         /*
67          * Specifically requested RCLK,BCLK by MACHINE Driver.
68          * 0 indicates CPU driver is free to choose any value.
69          */
70         unsigned rfs, bfs;
71         /* I2S Controller's core clock */
72         struct clk *clk;
73         /* Clock for generating I2S signals */
74         struct clk *op_clk;
75         /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
76         struct i2s_dai *pri_dai;
77         /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
78         struct i2s_dai *sec_dai;
79 #define DAI_OPENED      (1 << 0) /* Dai is opened */
80 #define DAI_MANAGER     (1 << 1) /* Dai is the manager */
81         unsigned mode;
82         /* Driver for this DAI */
83         struct snd_soc_dai_driver i2s_dai_drv;
84         /* DMA parameters */
85         struct snd_dmaengine_dai_dma_data dma_playback;
86         struct snd_dmaengine_dai_dma_data dma_capture;
87         struct snd_dmaengine_dai_dma_data idma_playback;
88         dma_filter_fn filter;
89         u32     quirks;
90         u32     suspend_i2smod;
91         u32     suspend_i2scon;
92         u32     suspend_i2spsr;
93         const struct samsung_i2s_variant_regs *variant_regs;
94
95         /* Spinlock protecting access to the device's registers */
96         spinlock_t spinlock;
97         spinlock_t *lock;
98
99         /* Below fields are only valid if this is the primary FIFO */
100         struct clk *clk_table[3];
101         struct clk_onecell_data clk_data;
102 };
103
104 /* Lock for cross i/f checks */
105 static DEFINE_SPINLOCK(lock);
106
107 /* If this is the 'overlay' stereo DAI */
108 static inline bool is_secondary(struct i2s_dai *i2s)
109 {
110         return i2s->pri_dai ? true : false;
111 }
112
113 /* If operating in SoC-Slave mode */
114 static inline bool is_slave(struct i2s_dai *i2s)
115 {
116         u32 mod = readl(i2s->addr + I2SMOD);
117         return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
118 }
119
120 /* If this interface of the controller is transmitting data */
121 static inline bool tx_active(struct i2s_dai *i2s)
122 {
123         u32 active;
124
125         if (!i2s)
126                 return false;
127
128         active = readl(i2s->addr + I2SCON);
129
130         if (is_secondary(i2s))
131                 active &= CON_TXSDMA_ACTIVE;
132         else
133                 active &= CON_TXDMA_ACTIVE;
134
135         return active ? true : false;
136 }
137
138 /* Return pointer to the other DAI */
139 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
140 {
141         return i2s->pri_dai ? : i2s->sec_dai;
142 }
143
144 /* If the other interface of the controller is transmitting data */
145 static inline bool other_tx_active(struct i2s_dai *i2s)
146 {
147         struct i2s_dai *other = get_other_dai(i2s);
148
149         return tx_active(other);
150 }
151
152 /* If any interface of the controller is transmitting data */
153 static inline bool any_tx_active(struct i2s_dai *i2s)
154 {
155         return tx_active(i2s) || other_tx_active(i2s);
156 }
157
158 /* If this interface of the controller is receiving data */
159 static inline bool rx_active(struct i2s_dai *i2s)
160 {
161         u32 active;
162
163         if (!i2s)
164                 return false;
165
166         active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
167
168         return active ? true : false;
169 }
170
171 /* If the other interface of the controller is receiving data */
172 static inline bool other_rx_active(struct i2s_dai *i2s)
173 {
174         struct i2s_dai *other = get_other_dai(i2s);
175
176         return rx_active(other);
177 }
178
179 /* If any interface of the controller is receiving data */
180 static inline bool any_rx_active(struct i2s_dai *i2s)
181 {
182         return rx_active(i2s) || other_rx_active(i2s);
183 }
184
185 /* If the other DAI is transmitting or receiving data */
186 static inline bool other_active(struct i2s_dai *i2s)
187 {
188         return other_rx_active(i2s) || other_tx_active(i2s);
189 }
190
191 /* If this DAI is transmitting or receiving data */
192 static inline bool this_active(struct i2s_dai *i2s)
193 {
194         return tx_active(i2s) || rx_active(i2s);
195 }
196
197 /* If the controller is active anyway */
198 static inline bool any_active(struct i2s_dai *i2s)
199 {
200         return this_active(i2s) || other_active(i2s);
201 }
202
203 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
204 {
205         return snd_soc_dai_get_drvdata(dai);
206 }
207
208 static inline bool is_opened(struct i2s_dai *i2s)
209 {
210         if (i2s && (i2s->mode & DAI_OPENED))
211                 return true;
212         else
213                 return false;
214 }
215
216 static inline bool is_manager(struct i2s_dai *i2s)
217 {
218         if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
219                 return true;
220         else
221                 return false;
222 }
223
224 /* Read RCLK of I2S (in multiples of LRCLK) */
225 static inline unsigned get_rfs(struct i2s_dai *i2s)
226 {
227         u32 rfs;
228         rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
229         rfs &= i2s->variant_regs->rfs_mask;
230
231         switch (rfs) {
232         case 7: return 192;
233         case 6: return 96;
234         case 5: return 128;
235         case 4: return 64;
236         case 3: return 768;
237         case 2: return 384;
238         case 1: return 512;
239         default: return 256;
240         }
241 }
242
243 /* Write RCLK of I2S (in multiples of LRCLK) */
244 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
245 {
246         u32 mod = readl(i2s->addr + I2SMOD);
247         int rfs_shift = i2s->variant_regs->rfs_off;
248
249         mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
250
251         switch (rfs) {
252         case 192:
253                 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
254                 break;
255         case 96:
256                 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
257                 break;
258         case 128:
259                 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
260                 break;
261         case 64:
262                 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
263                 break;
264         case 768:
265                 mod |= (MOD_RCLK_768FS << rfs_shift);
266                 break;
267         case 512:
268                 mod |= (MOD_RCLK_512FS << rfs_shift);
269                 break;
270         case 384:
271                 mod |= (MOD_RCLK_384FS << rfs_shift);
272                 break;
273         default:
274                 mod |= (MOD_RCLK_256FS << rfs_shift);
275                 break;
276         }
277
278         writel(mod, i2s->addr + I2SMOD);
279 }
280
281 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
282 static inline unsigned get_bfs(struct i2s_dai *i2s)
283 {
284         u32 bfs;
285         bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
286         bfs &= i2s->variant_regs->bfs_mask;
287
288         switch (bfs) {
289         case 8: return 256;
290         case 7: return 192;
291         case 6: return 128;
292         case 5: return 96;
293         case 4: return 64;
294         case 3: return 24;
295         case 2: return 16;
296         case 1: return 48;
297         default: return 32;
298         }
299 }
300
301 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
302 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
303 {
304         u32 mod = readl(i2s->addr + I2SMOD);
305         int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
306         int bfs_shift = i2s->variant_regs->bfs_off;
307
308         /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
309         if (!tdm && bfs > 48) {
310                 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
311                 return;
312         }
313
314         mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
315
316         switch (bfs) {
317         case 48:
318                 mod |= (MOD_BCLK_48FS << bfs_shift);
319                 break;
320         case 32:
321                 mod |= (MOD_BCLK_32FS << bfs_shift);
322                 break;
323         case 24:
324                 mod |= (MOD_BCLK_24FS << bfs_shift);
325                 break;
326         case 16:
327                 mod |= (MOD_BCLK_16FS << bfs_shift);
328                 break;
329         case 64:
330                 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
331                 break;
332         case 96:
333                 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
334                 break;
335         case 128:
336                 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
337                 break;
338         case 192:
339                 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
340                 break;
341         case 256:
342                 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
343                 break;
344         default:
345                 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
346                 return;
347         }
348
349         writel(mod, i2s->addr + I2SMOD);
350 }
351
352 /* Sample-Size */
353 static inline int get_blc(struct i2s_dai *i2s)
354 {
355         int blc = readl(i2s->addr + I2SMOD);
356
357         blc = (blc >> 13) & 0x3;
358
359         switch (blc) {
360         case 2: return 24;
361         case 1: return 8;
362         default: return 16;
363         }
364 }
365
366 /* TX Channel Control */
367 static void i2s_txctrl(struct i2s_dai *i2s, int on)
368 {
369         void __iomem *addr = i2s->addr;
370         int txr_off = i2s->variant_regs->txr_off;
371         u32 con = readl(addr + I2SCON);
372         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
373
374         if (on) {
375                 con |= CON_ACTIVE;
376                 con &= ~CON_TXCH_PAUSE;
377
378                 if (is_secondary(i2s)) {
379                         con |= CON_TXSDMA_ACTIVE;
380                         con &= ~CON_TXSDMA_PAUSE;
381                 } else {
382                         con |= CON_TXDMA_ACTIVE;
383                         con &= ~CON_TXDMA_PAUSE;
384                 }
385
386                 if (any_rx_active(i2s))
387                         mod |= 2 << txr_off;
388                 else
389                         mod |= 0 << txr_off;
390         } else {
391                 if (is_secondary(i2s)) {
392                         con |=  CON_TXSDMA_PAUSE;
393                         con &= ~CON_TXSDMA_ACTIVE;
394                 } else {
395                         con |=  CON_TXDMA_PAUSE;
396                         con &= ~CON_TXDMA_ACTIVE;
397                 }
398
399                 if (other_tx_active(i2s)) {
400                         writel(con, addr + I2SCON);
401                         return;
402                 }
403
404                 con |=  CON_TXCH_PAUSE;
405
406                 if (any_rx_active(i2s))
407                         mod |= 1 << txr_off;
408                 else
409                         con &= ~CON_ACTIVE;
410         }
411
412         writel(mod, addr + I2SMOD);
413         writel(con, addr + I2SCON);
414 }
415
416 /* RX Channel Control */
417 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
418 {
419         void __iomem *addr = i2s->addr;
420         int txr_off = i2s->variant_regs->txr_off;
421         u32 con = readl(addr + I2SCON);
422         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
423
424         if (on) {
425                 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
426                 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
427
428                 if (any_tx_active(i2s))
429                         mod |= 2 << txr_off;
430                 else
431                         mod |= 1 << txr_off;
432         } else {
433                 con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
434                 con &= ~CON_RXDMA_ACTIVE;
435
436                 if (any_tx_active(i2s))
437                         mod |= 0 << txr_off;
438                 else
439                         con &= ~CON_ACTIVE;
440         }
441
442         writel(mod, addr + I2SMOD);
443         writel(con, addr + I2SCON);
444 }
445
446 /* Flush FIFO of an interface */
447 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
448 {
449         void __iomem *fic;
450         u32 val;
451
452         if (!i2s)
453                 return;
454
455         if (is_secondary(i2s))
456                 fic = i2s->addr + I2SFICS;
457         else
458                 fic = i2s->addr + I2SFIC;
459
460         /* Flush the FIFO */
461         writel(readl(fic) | flush, fic);
462
463         /* Be patient */
464         val = msecs_to_loops(1) / 1000; /* 1 usec */
465         while (--val)
466                 cpu_relax();
467
468         writel(readl(fic) & ~flush, fic);
469 }
470
471 static int i2s_set_sysclk(struct snd_soc_dai *dai,
472           int clk_id, unsigned int rfs, int dir)
473 {
474         struct i2s_dai *i2s = to_info(dai);
475         struct i2s_dai *other = get_other_dai(i2s);
476         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
477         unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
478         unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
479         u32 mod, mask, val = 0;
480         unsigned long flags;
481         int ret = 0;
482
483         pm_runtime_get_sync(dai->dev);
484
485         spin_lock_irqsave(i2s->lock, flags);
486         mod = readl(i2s->addr + I2SMOD);
487         spin_unlock_irqrestore(i2s->lock, flags);
488
489         switch (clk_id) {
490         case SAMSUNG_I2S_OPCLK:
491                 mask = MOD_OPCLK_MASK;
492                 val = dir;
493                 break;
494         case SAMSUNG_I2S_CDCLK:
495                 mask = 1 << i2s_regs->cdclkcon_off;
496                 /* Shouldn't matter in GATING(CLOCK_IN) mode */
497                 if (dir == SND_SOC_CLOCK_IN)
498                         rfs = 0;
499
500                 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
501                                 (any_active(i2s) &&
502                                 (((dir == SND_SOC_CLOCK_IN)
503                                         && !(mod & cdcon_mask)) ||
504                                 ((dir == SND_SOC_CLOCK_OUT)
505                                         && (mod & cdcon_mask))))) {
506                         dev_err(&i2s->pdev->dev,
507                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
508                         ret = -EAGAIN;
509                         goto err;
510                 }
511
512                 if (dir == SND_SOC_CLOCK_IN)
513                         val = 1 << i2s_regs->cdclkcon_off;
514
515                 i2s->rfs = rfs;
516                 break;
517
518         case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
519         case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
520                 mask = 1 << i2s_regs->rclksrc_off;
521
522                 if ((i2s->quirks & QUIRK_NO_MUXPSR)
523                                 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
524                         clk_id = 0;
525                 else
526                         clk_id = 1;
527
528                 if (!any_active(i2s)) {
529                         if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
530                                 if ((clk_id && !(mod & rsrc_mask)) ||
531                                         (!clk_id && (mod & rsrc_mask))) {
532                                         clk_disable_unprepare(i2s->op_clk);
533                                         clk_put(i2s->op_clk);
534                                 } else {
535                                         i2s->rclk_srcrate =
536                                                 clk_get_rate(i2s->op_clk);
537                                         goto done;
538                                 }
539                         }
540
541                         if (clk_id)
542                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
543                                                 "i2s_opclk1");
544                         else
545                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
546                                                 "i2s_opclk0");
547
548                         if (WARN_ON(IS_ERR(i2s->op_clk))) {
549                                 ret = PTR_ERR(i2s->op_clk);
550                                 i2s->op_clk = NULL;
551                                 goto err;
552                         }
553
554                         clk_prepare_enable(i2s->op_clk);
555                         i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
556
557                         /* Over-ride the other's */
558                         if (other) {
559                                 other->op_clk = i2s->op_clk;
560                                 other->rclk_srcrate = i2s->rclk_srcrate;
561                         }
562                 } else if ((!clk_id && (mod & rsrc_mask))
563                                 || (clk_id && !(mod & rsrc_mask))) {
564                         dev_err(&i2s->pdev->dev,
565                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
566                         ret = -EAGAIN;
567                         goto err;
568                 } else {
569                         /* Call can't be on the active DAI */
570                         i2s->op_clk = other->op_clk;
571                         i2s->rclk_srcrate = other->rclk_srcrate;
572                         goto done;
573                 }
574
575                 if (clk_id == 1)
576                         val = 1 << i2s_regs->rclksrc_off;
577                 break;
578         default:
579                 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
580                 ret = -EINVAL;
581                 goto err;
582         }
583
584         spin_lock_irqsave(i2s->lock, flags);
585         mod = readl(i2s->addr + I2SMOD);
586         mod = (mod & ~mask) | val;
587         writel(mod, i2s->addr + I2SMOD);
588         spin_unlock_irqrestore(i2s->lock, flags);
589 done:
590         pm_runtime_put(dai->dev);
591
592         return 0;
593 err:
594         pm_runtime_put(dai->dev);
595         return ret;
596 }
597
598 static int i2s_set_fmt(struct snd_soc_dai *dai,
599         unsigned int fmt)
600 {
601         struct i2s_dai *i2s = to_info(dai);
602         int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
603         u32 mod, tmp = 0;
604         unsigned long flags;
605
606         lrp_shift = i2s->variant_regs->lrp_off;
607         sdf_shift = i2s->variant_regs->sdf_off;
608         mod_slave = 1 << i2s->variant_regs->mss_off;
609
610         sdf_mask = MOD_SDF_MASK << sdf_shift;
611         lrp_rlow = MOD_LR_RLOW << lrp_shift;
612
613         /* Format is priority */
614         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
615         case SND_SOC_DAIFMT_RIGHT_J:
616                 tmp |= lrp_rlow;
617                 tmp |= (MOD_SDF_MSB << sdf_shift);
618                 break;
619         case SND_SOC_DAIFMT_LEFT_J:
620                 tmp |= lrp_rlow;
621                 tmp |= (MOD_SDF_LSB << sdf_shift);
622                 break;
623         case SND_SOC_DAIFMT_I2S:
624                 tmp |= (MOD_SDF_IIS << sdf_shift);
625                 break;
626         default:
627                 dev_err(&i2s->pdev->dev, "Format not supported\n");
628                 return -EINVAL;
629         }
630
631         /*
632          * INV flag is relative to the FORMAT flag - if set it simply
633          * flips the polarity specified by the Standard
634          */
635         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
636         case SND_SOC_DAIFMT_NB_NF:
637                 break;
638         case SND_SOC_DAIFMT_NB_IF:
639                 if (tmp & lrp_rlow)
640                         tmp &= ~lrp_rlow;
641                 else
642                         tmp |= lrp_rlow;
643                 break;
644         default:
645                 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
646                 return -EINVAL;
647         }
648
649         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
650         case SND_SOC_DAIFMT_CBM_CFM:
651                 tmp |= mod_slave;
652                 break;
653         case SND_SOC_DAIFMT_CBS_CFS:
654                 /* Set default source clock in Master mode */
655                 if (i2s->rclk_srcrate == 0)
656                         i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
657                                                         0, SND_SOC_CLOCK_IN);
658                 break;
659         default:
660                 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
661                 return -EINVAL;
662         }
663
664         pm_runtime_get_sync(dai->dev);
665         spin_lock_irqsave(i2s->lock, flags);
666         mod = readl(i2s->addr + I2SMOD);
667         /*
668          * Don't change the I2S mode if any controller is active on this
669          * channel.
670          */
671         if (any_active(i2s) &&
672                 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
673                 spin_unlock_irqrestore(i2s->lock, flags);
674                 pm_runtime_put(dai->dev);
675                 dev_err(&i2s->pdev->dev,
676                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
677                 return -EAGAIN;
678         }
679
680         mod &= ~(sdf_mask | lrp_rlow | mod_slave);
681         mod |= tmp;
682         writel(mod, i2s->addr + I2SMOD);
683         spin_unlock_irqrestore(i2s->lock, flags);
684         pm_runtime_put(dai->dev);
685
686         return 0;
687 }
688
689 static int i2s_hw_params(struct snd_pcm_substream *substream,
690         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
691 {
692         struct i2s_dai *i2s = to_info(dai);
693         u32 mod, mask = 0, val = 0;
694         unsigned long flags;
695
696         WARN_ON(!pm_runtime_active(dai->dev));
697
698         if (!is_secondary(i2s))
699                 mask |= (MOD_DC2_EN | MOD_DC1_EN);
700
701         switch (params_channels(params)) {
702         case 6:
703                 val |= MOD_DC2_EN;
704         case 4:
705                 val |= MOD_DC1_EN;
706                 break;
707         case 2:
708                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
709                         i2s->dma_playback.addr_width = 4;
710                 else
711                         i2s->dma_capture.addr_width = 4;
712                 break;
713         case 1:
714                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
715                         i2s->dma_playback.addr_width = 2;
716                 else
717                         i2s->dma_capture.addr_width = 2;
718
719                 break;
720         default:
721                 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
722                                 params_channels(params));
723                 return -EINVAL;
724         }
725
726         if (is_secondary(i2s))
727                 mask |= MOD_BLCS_MASK;
728         else
729                 mask |= MOD_BLCP_MASK;
730
731         if (is_manager(i2s))
732                 mask |= MOD_BLC_MASK;
733
734         switch (params_width(params)) {
735         case 8:
736                 if (is_secondary(i2s))
737                         val |= MOD_BLCS_8BIT;
738                 else
739                         val |= MOD_BLCP_8BIT;
740                 if (is_manager(i2s))
741                         val |= MOD_BLC_8BIT;
742                 break;
743         case 16:
744                 if (is_secondary(i2s))
745                         val |= MOD_BLCS_16BIT;
746                 else
747                         val |= MOD_BLCP_16BIT;
748                 if (is_manager(i2s))
749                         val |= MOD_BLC_16BIT;
750                 break;
751         case 24:
752                 if (is_secondary(i2s))
753                         val |= MOD_BLCS_24BIT;
754                 else
755                         val |= MOD_BLCP_24BIT;
756                 if (is_manager(i2s))
757                         val |= MOD_BLC_24BIT;
758                 break;
759         default:
760                 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
761                                 params_format(params));
762                 return -EINVAL;
763         }
764
765         spin_lock_irqsave(i2s->lock, flags);
766         mod = readl(i2s->addr + I2SMOD);
767         mod = (mod & ~mask) | val;
768         writel(mod, i2s->addr + I2SMOD);
769         spin_unlock_irqrestore(i2s->lock, flags);
770
771         snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
772
773         i2s->frmclk = params_rate(params);
774
775         return 0;
776 }
777
778 /* We set constraints on the substream acc to the version of I2S */
779 static int i2s_startup(struct snd_pcm_substream *substream,
780           struct snd_soc_dai *dai)
781 {
782         struct i2s_dai *i2s = to_info(dai);
783         struct i2s_dai *other = get_other_dai(i2s);
784         unsigned long flags;
785
786         pm_runtime_get_sync(dai->dev);
787
788         spin_lock_irqsave(&lock, flags);
789
790         i2s->mode |= DAI_OPENED;
791
792         if (is_manager(other))
793                 i2s->mode &= ~DAI_MANAGER;
794         else
795                 i2s->mode |= DAI_MANAGER;
796
797         if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
798                 writel(CON_RSTCLR, i2s->addr + I2SCON);
799
800         spin_unlock_irqrestore(&lock, flags);
801
802         return 0;
803 }
804
805 static void i2s_shutdown(struct snd_pcm_substream *substream,
806         struct snd_soc_dai *dai)
807 {
808         struct i2s_dai *i2s = to_info(dai);
809         struct i2s_dai *other = get_other_dai(i2s);
810         unsigned long flags;
811
812         spin_lock_irqsave(&lock, flags);
813
814         i2s->mode &= ~DAI_OPENED;
815         i2s->mode &= ~DAI_MANAGER;
816
817         if (is_opened(other))
818                 other->mode |= DAI_MANAGER;
819
820         /* Reset any constraint on RFS and BFS */
821         i2s->rfs = 0;
822         i2s->bfs = 0;
823
824         spin_unlock_irqrestore(&lock, flags);
825
826         pm_runtime_put(dai->dev);
827 }
828
829 static int config_setup(struct i2s_dai *i2s)
830 {
831         struct i2s_dai *other = get_other_dai(i2s);
832         unsigned rfs, bfs, blc;
833         u32 psr;
834
835         blc = get_blc(i2s);
836
837         bfs = i2s->bfs;
838
839         if (!bfs && other)
840                 bfs = other->bfs;
841
842         /* Select least possible multiple(2) if no constraint set */
843         if (!bfs)
844                 bfs = blc * 2;
845
846         rfs = i2s->rfs;
847
848         if (!rfs && other)
849                 rfs = other->rfs;
850
851         if ((rfs == 256 || rfs == 512) && (blc == 24)) {
852                 dev_err(&i2s->pdev->dev,
853                         "%d-RFS not supported for 24-blc\n", rfs);
854                 return -EINVAL;
855         }
856
857         if (!rfs) {
858                 if (bfs == 16 || bfs == 32)
859                         rfs = 256;
860                 else
861                         rfs = 384;
862         }
863
864         /* If already setup and running */
865         if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
866                 dev_err(&i2s->pdev->dev,
867                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
868                 return -EAGAIN;
869         }
870
871         set_bfs(i2s, bfs);
872         set_rfs(i2s, rfs);
873
874         /* Don't bother with PSR in Slave mode */
875         if (is_slave(i2s))
876                 return 0;
877
878         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
879                 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
880                 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
881                 dev_dbg(&i2s->pdev->dev,
882                         "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
883                                 i2s->rclk_srcrate, psr, rfs, bfs);
884         }
885
886         return 0;
887 }
888
889 static int i2s_trigger(struct snd_pcm_substream *substream,
890         int cmd, struct snd_soc_dai *dai)
891 {
892         int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
893         struct snd_soc_pcm_runtime *rtd = substream->private_data;
894         struct i2s_dai *i2s = to_info(rtd->cpu_dai);
895         unsigned long flags;
896
897         switch (cmd) {
898         case SNDRV_PCM_TRIGGER_START:
899         case SNDRV_PCM_TRIGGER_RESUME:
900         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
901                 pm_runtime_get_sync(dai->dev);
902                 spin_lock_irqsave(i2s->lock, flags);
903
904                 if (config_setup(i2s)) {
905                         spin_unlock_irqrestore(i2s->lock, flags);
906                         return -EINVAL;
907                 }
908
909                 if (capture)
910                         i2s_rxctrl(i2s, 1);
911                 else
912                         i2s_txctrl(i2s, 1);
913
914                 spin_unlock_irqrestore(i2s->lock, flags);
915                 break;
916         case SNDRV_PCM_TRIGGER_STOP:
917         case SNDRV_PCM_TRIGGER_SUSPEND:
918         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
919                 spin_lock_irqsave(i2s->lock, flags);
920
921                 if (capture) {
922                         i2s_rxctrl(i2s, 0);
923                         i2s_fifo(i2s, FIC_RXFLUSH);
924                 } else {
925                         i2s_txctrl(i2s, 0);
926                         i2s_fifo(i2s, FIC_TXFLUSH);
927                 }
928
929                 spin_unlock_irqrestore(i2s->lock, flags);
930                 pm_runtime_put(dai->dev);
931                 break;
932         }
933
934         return 0;
935 }
936
937 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
938         int div_id, int div)
939 {
940         struct i2s_dai *i2s = to_info(dai);
941         struct i2s_dai *other = get_other_dai(i2s);
942
943         switch (div_id) {
944         case SAMSUNG_I2S_DIV_BCLK:
945                 pm_runtime_get_sync(dai->dev);
946                 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
947                         || (other && other->bfs && (other->bfs != div))) {
948                         pm_runtime_put(dai->dev);
949                         dev_err(&i2s->pdev->dev,
950                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
951                         return -EAGAIN;
952                 }
953                 i2s->bfs = div;
954                 pm_runtime_put(dai->dev);
955                 break;
956         default:
957                 dev_err(&i2s->pdev->dev,
958                         "Invalid clock divider(%d)\n", div_id);
959                 return -EINVAL;
960         }
961
962         return 0;
963 }
964
965 static snd_pcm_sframes_t
966 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
967 {
968         struct i2s_dai *i2s = to_info(dai);
969         u32 reg = readl(i2s->addr + I2SFIC);
970         snd_pcm_sframes_t delay;
971         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
972
973         WARN_ON(!pm_runtime_active(dai->dev));
974
975         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
976                 delay = FIC_RXCOUNT(reg);
977         else if (is_secondary(i2s))
978                 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
979         else
980                 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
981
982         return delay;
983 }
984
985 #ifdef CONFIG_PM
986 static int i2s_suspend(struct snd_soc_dai *dai)
987 {
988         return pm_runtime_force_suspend(dai->dev);
989 }
990
991 static int i2s_resume(struct snd_soc_dai *dai)
992 {
993         return pm_runtime_force_resume(dai->dev);
994 }
995 #else
996 #define i2s_suspend NULL
997 #define i2s_resume  NULL
998 #endif
999
1000 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
1001 {
1002         struct i2s_dai *i2s = to_info(dai);
1003         struct i2s_dai *other = get_other_dai(i2s);
1004         unsigned long flags;
1005
1006         pm_runtime_get_sync(dai->dev);
1007
1008         if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
1009                 snd_soc_dai_init_dma_data(dai, &other->sec_dai->dma_playback,
1010                                            NULL);
1011         } else {
1012                 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback,
1013                                            &i2s->dma_capture);
1014
1015                 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1016                         writel(CON_RSTCLR, i2s->addr + I2SCON);
1017
1018                 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1019                         idma_reg_addr_init(i2s->addr,
1020                                         i2s->sec_dai->idma_playback.addr);
1021         }
1022
1023         /* Reset any constraint on RFS and BFS */
1024         i2s->rfs = 0;
1025         i2s->bfs = 0;
1026         i2s->rclk_srcrate = 0;
1027
1028         spin_lock_irqsave(i2s->lock, flags);
1029         i2s_txctrl(i2s, 0);
1030         i2s_rxctrl(i2s, 0);
1031         i2s_fifo(i2s, FIC_TXFLUSH);
1032         i2s_fifo(other, FIC_TXFLUSH);
1033         i2s_fifo(i2s, FIC_RXFLUSH);
1034         spin_unlock_irqrestore(i2s->lock, flags);
1035
1036         /* Gate CDCLK by default */
1037         if (!is_opened(other))
1038                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1039                                 0, SND_SOC_CLOCK_IN);
1040         pm_runtime_put(dai->dev);
1041
1042         return 0;
1043 }
1044
1045 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1046 {
1047         struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1048         unsigned long flags;
1049
1050         pm_runtime_get_sync(dai->dev);
1051
1052         if (!is_secondary(i2s)) {
1053                 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1054                         spin_lock_irqsave(i2s->lock, flags);
1055                         writel(0, i2s->addr + I2SCON);
1056                         spin_unlock_irqrestore(i2s->lock, flags);
1057                 }
1058         }
1059
1060         pm_runtime_put(dai->dev);
1061
1062         return 0;
1063 }
1064
1065 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1066         .trigger = i2s_trigger,
1067         .hw_params = i2s_hw_params,
1068         .set_fmt = i2s_set_fmt,
1069         .set_clkdiv = i2s_set_clkdiv,
1070         .set_sysclk = i2s_set_sysclk,
1071         .startup = i2s_startup,
1072         .shutdown = i2s_shutdown,
1073         .delay = i2s_delay,
1074 };
1075
1076 static const struct snd_soc_component_driver samsung_i2s_component = {
1077         .name           = "samsung-i2s",
1078 };
1079
1080 #define SAMSUNG_I2S_FMTS        (SNDRV_PCM_FMTBIT_S8 | \
1081                                         SNDRV_PCM_FMTBIT_S16_LE | \
1082                                         SNDRV_PCM_FMTBIT_S24_LE)
1083
1084 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev,
1085                                 const struct samsung_i2s_dai_data *i2s_dai_data,
1086                                 bool sec)
1087 {
1088         struct i2s_dai *i2s;
1089
1090         i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1091         if (i2s == NULL)
1092                 return NULL;
1093
1094         i2s->pdev = pdev;
1095         i2s->pri_dai = NULL;
1096         i2s->sec_dai = NULL;
1097         i2s->i2s_dai_drv.symmetric_rates = 1;
1098         i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1099         i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1100         i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1101         i2s->i2s_dai_drv.suspend = i2s_suspend;
1102         i2s->i2s_dai_drv.resume = i2s_resume;
1103         i2s->i2s_dai_drv.playback.channels_min = 1;
1104         i2s->i2s_dai_drv.playback.channels_max = 2;
1105         i2s->i2s_dai_drv.playback.rates = i2s_dai_data->pcm_rates;
1106         i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1107
1108         if (!sec) {
1109                 i2s->i2s_dai_drv.capture.channels_min = 1;
1110                 i2s->i2s_dai_drv.capture.channels_max = 2;
1111                 i2s->i2s_dai_drv.capture.rates = i2s_dai_data->pcm_rates;
1112                 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1113         }
1114         return i2s;
1115 }
1116
1117 #ifdef CONFIG_PM
1118 static int i2s_runtime_suspend(struct device *dev)
1119 {
1120         struct i2s_dai *i2s = dev_get_drvdata(dev);
1121
1122         i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
1123         i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
1124         i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
1125
1126         if (i2s->op_clk)
1127                 clk_disable_unprepare(i2s->op_clk);
1128         clk_disable_unprepare(i2s->clk);
1129
1130         return 0;
1131 }
1132
1133 static int i2s_runtime_resume(struct device *dev)
1134 {
1135         struct i2s_dai *i2s = dev_get_drvdata(dev);
1136
1137         clk_prepare_enable(i2s->clk);
1138         if (i2s->op_clk)
1139                 clk_prepare_enable(i2s->op_clk);
1140
1141         writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
1142         writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
1143         writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
1144
1145         return 0;
1146 }
1147 #endif /* CONFIG_PM */
1148
1149 static void i2s_unregister_clocks(struct i2s_dai *i2s)
1150 {
1151         int i;
1152
1153         for (i = 0; i < i2s->clk_data.clk_num; i++) {
1154                 if (!IS_ERR(i2s->clk_table[i]))
1155                         clk_unregister(i2s->clk_table[i]);
1156         }
1157 }
1158
1159 static void i2s_unregister_clock_provider(struct platform_device *pdev)
1160 {
1161         struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
1162
1163         of_clk_del_provider(pdev->dev.of_node);
1164         i2s_unregister_clocks(i2s);
1165 }
1166
1167 static int i2s_register_clock_provider(struct platform_device *pdev)
1168 {
1169         struct device *dev = &pdev->dev;
1170         struct i2s_dai *i2s = dev_get_drvdata(dev);
1171         const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1172         const char *p_names[2] = { NULL };
1173         const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1174         struct clk *rclksrc;
1175         int ret, i;
1176
1177         /* Register the clock provider only if it's expected in the DTB */
1178         if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1179                 return 0;
1180
1181         /* Get the RCLKSRC mux clock parent clock names */
1182         for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1183                 rclksrc = clk_get(dev, clk_name[i]);
1184                 if (IS_ERR(rclksrc))
1185                         continue;
1186                 p_names[i] = __clk_get_name(rclksrc);
1187                 clk_put(rclksrc);
1188         }
1189
1190         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1191                 /* Activate the prescaler */
1192                 u32 val = readl(i2s->addr + I2SPSR);
1193                 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1194
1195                 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev,
1196                                 "i2s_rclksrc", p_names, ARRAY_SIZE(p_names),
1197                                 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1198                                 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1199                                 1, 0, i2s->lock);
1200
1201                 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,
1202                                 "i2s_presc", "i2s_rclksrc",
1203                                 CLK_SET_RATE_PARENT,
1204                                 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1205
1206                 p_names[0] = "i2s_presc";
1207                 i2s->clk_data.clk_num = 2;
1208         }
1209         of_property_read_string_index(dev->of_node,
1210                                 "clock-output-names", 0, &clk_name[0]);
1211
1212         i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev, clk_name[0],
1213                                 p_names[0], CLK_SET_RATE_PARENT,
1214                                 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1215                                 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1216
1217         i2s->clk_data.clk_num += 1;
1218         i2s->clk_data.clks = i2s->clk_table;
1219
1220         ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1221                                   &i2s->clk_data);
1222         if (ret < 0) {
1223                 dev_err(dev, "failed to add clock provider: %d\n", ret);
1224                 i2s_unregister_clocks(i2s);
1225         }
1226
1227         return ret;
1228 }
1229
1230 static int samsung_i2s_probe(struct platform_device *pdev)
1231 {
1232         struct i2s_dai *pri_dai, *sec_dai = NULL;
1233         struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1234         struct resource *res;
1235         u32 regs_base, quirks = 0, idma_addr = 0;
1236         struct device_node *np = pdev->dev.of_node;
1237         const struct samsung_i2s_dai_data *i2s_dai_data;
1238         int ret;
1239
1240         if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node)
1241                 i2s_dai_data = of_device_get_match_data(&pdev->dev);
1242         else
1243                 i2s_dai_data = (struct samsung_i2s_dai_data *)
1244                                 platform_get_device_id(pdev)->driver_data;
1245
1246         pri_dai = i2s_alloc_dai(pdev, i2s_dai_data, false);
1247         if (!pri_dai) {
1248                 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1249                 return -ENOMEM;
1250         }
1251
1252         spin_lock_init(&pri_dai->spinlock);
1253         pri_dai->lock = &pri_dai->spinlock;
1254
1255         if (!np) {
1256                 if (i2s_pdata == NULL) {
1257                         dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1258                         return -EINVAL;
1259                 }
1260
1261                 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback;
1262                 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture;
1263                 pri_dai->filter = i2s_pdata->dma_filter;
1264
1265                 quirks = i2s_pdata->type.quirks;
1266                 idma_addr = i2s_pdata->type.idma_addr;
1267         } else {
1268                 quirks = i2s_dai_data->quirks;
1269                 if (of_property_read_u32(np, "samsung,idma-addr",
1270                                          &idma_addr)) {
1271                         if (quirks & QUIRK_SUPPORTS_IDMA) {
1272                                 dev_info(&pdev->dev, "idma address is not"\
1273                                                 "specified");
1274                         }
1275                 }
1276         }
1277
1278         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1279         pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1280         if (IS_ERR(pri_dai->addr))
1281                 return PTR_ERR(pri_dai->addr);
1282
1283         regs_base = res->start;
1284
1285         pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1286         if (IS_ERR(pri_dai->clk)) {
1287                 dev_err(&pdev->dev, "Failed to get iis clock\n");
1288                 return PTR_ERR(pri_dai->clk);
1289         }
1290
1291         ret = clk_prepare_enable(pri_dai->clk);
1292         if (ret != 0) {
1293                 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1294                 return ret;
1295         }
1296         pri_dai->dma_playback.addr = regs_base + I2STXD;
1297         pri_dai->dma_capture.addr = regs_base + I2SRXD;
1298         pri_dai->dma_playback.chan_name = "tx";
1299         pri_dai->dma_capture.chan_name = "rx";
1300         pri_dai->dma_playback.addr_width = 4;
1301         pri_dai->dma_capture.addr_width = 4;
1302         pri_dai->quirks = quirks;
1303         pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1304
1305         if (quirks & QUIRK_PRI_6CHAN)
1306                 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1307
1308         ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter,
1309                                                  NULL, NULL);
1310         if (ret < 0)
1311                 goto err_disable_clk;
1312
1313         ret = devm_snd_soc_register_component(&pdev->dev,
1314                                         &samsung_i2s_component,
1315                                         &pri_dai->i2s_dai_drv, 1);
1316         if (ret < 0)
1317                 goto err_disable_clk;
1318
1319         if (quirks & QUIRK_SEC_DAI) {
1320                 sec_dai = i2s_alloc_dai(pdev, i2s_dai_data, true);
1321                 if (!sec_dai) {
1322                         dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1323                         ret = -ENOMEM;
1324                         goto err_disable_clk;
1325                 }
1326
1327                 sec_dai->lock = &pri_dai->spinlock;
1328                 sec_dai->variant_regs = pri_dai->variant_regs;
1329                 sec_dai->dma_playback.addr = regs_base + I2STXDS;
1330                 sec_dai->dma_playback.chan_name = "tx-sec";
1331
1332                 if (!np) {
1333                         sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec;
1334                         sec_dai->filter = i2s_pdata->dma_filter;
1335                 }
1336
1337                 sec_dai->dma_playback.addr_width = 4;
1338                 sec_dai->addr = pri_dai->addr;
1339                 sec_dai->clk = pri_dai->clk;
1340                 sec_dai->quirks = quirks;
1341                 sec_dai->idma_playback.addr = idma_addr;
1342                 sec_dai->pri_dai = pri_dai;
1343                 pri_dai->sec_dai = sec_dai;
1344
1345                 ret = samsung_asoc_dma_platform_register(&pdev->dev,
1346                                         sec_dai->filter, "tx-sec", NULL);
1347                 if (ret < 0)
1348                         goto err_disable_clk;
1349
1350                 ret = devm_snd_soc_register_component(&pdev->dev,
1351                                                 &samsung_i2s_component,
1352                                                 &sec_dai->i2s_dai_drv, 1);
1353                 if (ret < 0)
1354                         goto err_disable_clk;
1355         }
1356
1357         if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1358                 dev_err(&pdev->dev, "Unable to configure gpio\n");
1359                 ret = -EINVAL;
1360                 goto err_disable_clk;
1361         }
1362
1363         dev_set_drvdata(&pdev->dev, pri_dai);
1364
1365         pm_runtime_set_active(&pdev->dev);
1366         pm_runtime_enable(&pdev->dev);
1367
1368         ret = i2s_register_clock_provider(pdev);
1369         if (!ret)
1370                 return 0;
1371
1372         pm_runtime_disable(&pdev->dev);
1373 err_disable_clk:
1374         clk_disable_unprepare(pri_dai->clk);
1375         return ret;
1376 }
1377
1378 static int samsung_i2s_remove(struct platform_device *pdev)
1379 {
1380         struct i2s_dai *pri_dai, *sec_dai;
1381
1382         pri_dai = dev_get_drvdata(&pdev->dev);
1383         sec_dai = pri_dai->sec_dai;
1384
1385         pri_dai->sec_dai = NULL;
1386         sec_dai->pri_dai = NULL;
1387
1388         pm_runtime_get_sync(&pdev->dev);
1389         pm_runtime_disable(&pdev->dev);
1390
1391         i2s_unregister_clock_provider(pdev);
1392         clk_disable_unprepare(pri_dai->clk);
1393         pm_runtime_put_noidle(&pdev->dev);
1394
1395         return 0;
1396 }
1397
1398 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1399         .bfs_off = 1,
1400         .rfs_off = 3,
1401         .sdf_off = 5,
1402         .txr_off = 8,
1403         .rclksrc_off = 10,
1404         .mss_off = 11,
1405         .cdclkcon_off = 12,
1406         .lrp_off = 7,
1407         .bfs_mask = 0x3,
1408         .rfs_mask = 0x3,
1409         .ftx0cnt_off = 8,
1410 };
1411
1412 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1413         .bfs_off = 0,
1414         .rfs_off = 4,
1415         .sdf_off = 6,
1416         .txr_off = 8,
1417         .rclksrc_off = 10,
1418         .mss_off = 11,
1419         .cdclkcon_off = 12,
1420         .lrp_off = 15,
1421         .bfs_mask = 0xf,
1422         .rfs_mask = 0x3,
1423         .ftx0cnt_off = 8,
1424 };
1425
1426 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1427         .bfs_off = 0,
1428         .rfs_off = 4,
1429         .sdf_off = 7,
1430         .txr_off = 9,
1431         .rclksrc_off = 11,
1432         .mss_off = 12,
1433         .cdclkcon_off = 22,
1434         .lrp_off = 15,
1435         .bfs_mask = 0xf,
1436         .rfs_mask = 0x7,
1437         .ftx0cnt_off = 0,
1438 };
1439
1440 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1441         .bfs_off = 0,
1442         .rfs_off = 3,
1443         .sdf_off = 6,
1444         .txr_off = 8,
1445         .rclksrc_off = 10,
1446         .mss_off = 11,
1447         .cdclkcon_off = 12,
1448         .lrp_off = 15,
1449         .bfs_mask = 0x7,
1450         .rfs_mask = 0x7,
1451         .ftx0cnt_off = 8,
1452 };
1453
1454 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1455         .quirks = QUIRK_NO_MUXPSR,
1456         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1457         .i2s_variant_regs = &i2sv3_regs,
1458 };
1459
1460 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1461         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1462                         QUIRK_SUPPORTS_IDMA,
1463         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1464         .i2s_variant_regs = &i2sv3_regs,
1465 };
1466
1467 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1468         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1469                         QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1470         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1471         .i2s_variant_regs = &i2sv6_regs,
1472 };
1473
1474 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1475         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1476                         QUIRK_SUPPORTS_TDM,
1477         .pcm_rates = SNDRV_PCM_RATE_8000_192000,
1478         .i2s_variant_regs = &i2sv7_regs,
1479 };
1480
1481 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1482         .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1483         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1484         .i2s_variant_regs = &i2sv5_i2s1_regs,
1485 };
1486
1487 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1488         {
1489                 .name           = "samsung-i2s",
1490                 .driver_data    = (kernel_ulong_t)&i2sv3_dai_type,
1491         },
1492         {},
1493 };
1494 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1495
1496 #ifdef CONFIG_OF
1497 static const struct of_device_id exynos_i2s_match[] = {
1498         {
1499                 .compatible = "samsung,s3c6410-i2s",
1500                 .data = &i2sv3_dai_type,
1501         }, {
1502                 .compatible = "samsung,s5pv210-i2s",
1503                 .data = &i2sv5_dai_type,
1504         }, {
1505                 .compatible = "samsung,exynos5420-i2s",
1506                 .data = &i2sv6_dai_type,
1507         }, {
1508                 .compatible = "samsung,exynos7-i2s",
1509                 .data = &i2sv7_dai_type,
1510         }, {
1511                 .compatible = "samsung,exynos7-i2s1",
1512                 .data = &i2sv5_dai_type_i2s1,
1513         },
1514         {},
1515 };
1516 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1517 #endif
1518
1519 static const struct dev_pm_ops samsung_i2s_pm = {
1520         SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1521                                 i2s_runtime_resume, NULL)
1522         SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1523                                      pm_runtime_force_resume)
1524 };
1525
1526 static struct platform_driver samsung_i2s_driver = {
1527         .probe  = samsung_i2s_probe,
1528         .remove = samsung_i2s_remove,
1529         .id_table = samsung_i2s_driver_ids,
1530         .driver = {
1531                 .name = "samsung-i2s",
1532                 .of_match_table = of_match_ptr(exynos_i2s_match),
1533                 .pm = &samsung_i2s_pm,
1534         },
1535 };
1536
1537 module_platform_driver(samsung_i2s_driver);
1538
1539 /* Module information */
1540 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1541 MODULE_DESCRIPTION("Samsung I2S Interface");
1542 MODULE_ALIAS("platform:samsung-i2s");
1543 MODULE_LICENSE("GPL");