2 * skl-topology.c - Implements Platform component ALSA controls/widget
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as version 2, as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
19 #include <linux/slab.h>
20 #include <linux/types.h>
21 #include <linux/firmware.h>
22 #include <sound/soc.h>
23 #include <sound/soc-topology.h>
24 #include <uapi/sound/snd_sst_tokens.h>
25 #include "skl-sst-dsp.h"
26 #include "skl-sst-ipc.h"
27 #include "skl-topology.h"
29 #include "skl-tplg-interface.h"
30 #include "../common/sst-dsp.h"
31 #include "../common/sst-dsp-priv.h"
33 #define SKL_CH_FIXUP_MASK (1 << 0)
34 #define SKL_RATE_FIXUP_MASK (1 << 1)
35 #define SKL_FMT_FIXUP_MASK (1 << 2)
36 #define SKL_IN_DIR_BIT_MASK BIT(0)
37 #define SKL_PIN_COUNT_MASK GENMASK(7, 4)
39 static const int mic_mono_list[] = {
42 static const int mic_stereo_list[][SKL_CH_STEREO] = {
43 {0, 1}, {0, 2}, {0, 3}, {1, 2}, {1, 3}, {2, 3},
45 static const int mic_trio_list[][SKL_CH_TRIO] = {
46 {0, 1, 2}, {0, 1, 3}, {0, 2, 3}, {1, 2, 3},
48 static const int mic_quatro_list[][SKL_CH_QUATRO] = {
52 #define CHECK_HW_PARAMS(ch, freq, bps, prm_ch, prm_freq, prm_bps) \
53 ((ch == prm_ch) && (bps == prm_bps) && (freq == prm_freq))
55 void skl_tplg_d0i3_get(struct skl *skl, enum d0i3_capability caps)
57 struct skl_d0i3_data *d0i3 = &skl->skl_sst->d0i3;
64 case SKL_D0I3_STREAMING:
68 case SKL_D0I3_NON_STREAMING:
69 d0i3->non_streaming++;
74 void skl_tplg_d0i3_put(struct skl *skl, enum d0i3_capability caps)
76 struct skl_d0i3_data *d0i3 = &skl->skl_sst->d0i3;
83 case SKL_D0I3_STREAMING:
87 case SKL_D0I3_NON_STREAMING:
88 d0i3->non_streaming--;
94 * SKL DSP driver modelling uses only few DAPM widgets so for rest we will
95 * ignore. This helpers checks if the SKL driver handles this widget type
97 static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w)
100 case snd_soc_dapm_dai_link:
101 case snd_soc_dapm_dai_in:
102 case snd_soc_dapm_aif_in:
103 case snd_soc_dapm_aif_out:
104 case snd_soc_dapm_dai_out:
105 case snd_soc_dapm_switch:
113 * Each pipelines needs memory to be allocated. Check if we have free memory
114 * from available pool.
116 static bool skl_is_pipe_mem_avail(struct skl *skl,
117 struct skl_module_cfg *mconfig)
119 struct skl_sst *ctx = skl->skl_sst;
121 if (skl->resource.mem + mconfig->pipe->memory_pages >
122 skl->resource.max_mem) {
124 "%s: module_id %d instance %d\n", __func__,
125 mconfig->id.module_id,
126 mconfig->id.instance_id);
128 "exceeds ppl memory available %d mem %d\n",
129 skl->resource.max_mem, skl->resource.mem);
137 * Add the mem to the mem pool. This is freed when pipe is deleted.
138 * Note: DSP does actual memory management we only keep track for complete
141 static void skl_tplg_alloc_pipe_mem(struct skl *skl,
142 struct skl_module_cfg *mconfig)
144 skl->resource.mem += mconfig->pipe->memory_pages;
148 * Pipeline needs needs DSP CPU resources for computation, this is
149 * quantified in MCPS (Million Clocks Per Second) required for module/pipe
151 * Each pipelines needs mcps to be allocated. Check if we have mcps for this
155 static bool skl_is_pipe_mcps_avail(struct skl *skl,
156 struct skl_module_cfg *mconfig)
158 struct skl_sst *ctx = skl->skl_sst;
159 u8 res_idx = mconfig->res_idx;
160 struct skl_module_res *res = &mconfig->module->resources[res_idx];
162 if (skl->resource.mcps + res->cps > skl->resource.max_mcps) {
164 "%s: module_id %d instance %d\n", __func__,
165 mconfig->id.module_id, mconfig->id.instance_id);
167 "exceeds ppl mcps available %d > mem %d\n",
168 skl->resource.max_mcps, skl->resource.mcps);
175 static void skl_tplg_alloc_pipe_mcps(struct skl *skl,
176 struct skl_module_cfg *mconfig)
178 u8 res_idx = mconfig->res_idx;
179 struct skl_module_res *res = &mconfig->module->resources[res_idx];
181 skl->resource.mcps += res->cps;
185 * Free the mcps when tearing down
188 skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig)
190 u8 res_idx = mconfig->res_idx;
191 struct skl_module_res *res = &mconfig->module->resources[res_idx];
193 res = &mconfig->module->resources[res_idx];
194 skl->resource.mcps -= res->cps;
198 * Free the memory when tearing down
201 skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig)
203 skl->resource.mem -= mconfig->pipe->memory_pages;
207 static void skl_dump_mconfig(struct skl_sst *ctx,
208 struct skl_module_cfg *mcfg)
210 struct skl_module_iface *iface = &mcfg->module->formats[0];
212 dev_dbg(ctx->dev, "Dumping config\n");
213 dev_dbg(ctx->dev, "Input Format:\n");
214 dev_dbg(ctx->dev, "channels = %d\n", iface->inputs[0].fmt.channels);
215 dev_dbg(ctx->dev, "s_freq = %d\n", iface->inputs[0].fmt.s_freq);
216 dev_dbg(ctx->dev, "ch_cfg = %d\n", iface->inputs[0].fmt.ch_cfg);
217 dev_dbg(ctx->dev, "valid bit depth = %d\n",
218 iface->inputs[0].fmt.valid_bit_depth);
219 dev_dbg(ctx->dev, "Output Format:\n");
220 dev_dbg(ctx->dev, "channels = %d\n", iface->outputs[0].fmt.channels);
221 dev_dbg(ctx->dev, "s_freq = %d\n", iface->outputs[0].fmt.s_freq);
222 dev_dbg(ctx->dev, "valid bit depth = %d\n",
223 iface->outputs[0].fmt.valid_bit_depth);
224 dev_dbg(ctx->dev, "ch_cfg = %d\n", iface->outputs[0].fmt.ch_cfg);
227 static void skl_tplg_update_chmap(struct skl_module_fmt *fmt, int chs)
229 int slot_map = 0xFFFFFFFF;
233 for (i = 0; i < chs; i++) {
235 * For 2 channels with starting slot as 0, slot map will
236 * look like 0xFFFFFF10.
238 slot_map &= (~(0xF << (4 * i)) | (start_slot << (4 * i)));
241 fmt->ch_map = slot_map;
244 static void skl_tplg_update_params(struct skl_module_fmt *fmt,
245 struct skl_pipe_params *params, int fixup)
247 if (fixup & SKL_RATE_FIXUP_MASK)
248 fmt->s_freq = params->s_freq;
249 if (fixup & SKL_CH_FIXUP_MASK) {
250 fmt->channels = params->ch;
251 skl_tplg_update_chmap(fmt, fmt->channels);
253 if (fixup & SKL_FMT_FIXUP_MASK) {
254 fmt->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
257 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
258 * container so update bit depth accordingly
260 switch (fmt->valid_bit_depth) {
261 case SKL_DEPTH_16BIT:
262 fmt->bit_depth = fmt->valid_bit_depth;
266 fmt->bit_depth = SKL_DEPTH_32BIT;
274 * A pipeline may have modules which impact the pcm parameters, like SRC,
275 * channel converter, format converter.
276 * We need to calculate the output params by applying the 'fixup'
277 * Topology will tell driver which type of fixup is to be applied by
278 * supplying the fixup mask, so based on that we calculate the output
280 * Now In FE the pcm hw_params is source/target format. Same is applicable
281 * for BE with its hw_params invoked.
282 * here based on FE, BE pipeline and direction we calculate the input and
283 * outfix and then apply that for a module
285 static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg,
286 struct skl_pipe_params *params, bool is_fe)
288 int in_fixup, out_fixup;
289 struct skl_module_fmt *in_fmt, *out_fmt;
291 /* Fixups will be applied to pin 0 only */
292 in_fmt = &m_cfg->module->formats[0].inputs[0].fmt;
293 out_fmt = &m_cfg->module->formats[0].outputs[0].fmt;
295 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
297 in_fixup = m_cfg->params_fixup;
298 out_fixup = (~m_cfg->converter) &
301 out_fixup = m_cfg->params_fixup;
302 in_fixup = (~m_cfg->converter) &
307 out_fixup = m_cfg->params_fixup;
308 in_fixup = (~m_cfg->converter) &
311 in_fixup = m_cfg->params_fixup;
312 out_fixup = (~m_cfg->converter) &
317 skl_tplg_update_params(in_fmt, params, in_fixup);
318 skl_tplg_update_params(out_fmt, params, out_fixup);
322 * A module needs input and output buffers, which are dependent upon pcm
323 * params, so once we have calculate params, we need buffer calculation as
326 static void skl_tplg_update_buffer_size(struct skl_sst *ctx,
327 struct skl_module_cfg *mcfg)
330 struct skl_module_fmt *in_fmt, *out_fmt;
331 struct skl_module_res *res;
333 /* Since fixups is applied to pin 0 only, ibs, obs needs
334 * change for pin 0 only
336 res = &mcfg->module->resources[0];
337 in_fmt = &mcfg->module->formats[0].inputs[0].fmt;
338 out_fmt = &mcfg->module->formats[0].outputs[0].fmt;
340 if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
343 res->ibs = DIV_ROUND_UP(in_fmt->s_freq, 1000) *
344 in_fmt->channels * (in_fmt->bit_depth >> 3) *
347 res->obs = DIV_ROUND_UP(out_fmt->s_freq, 1000) *
348 out_fmt->channels * (out_fmt->bit_depth >> 3) *
352 static u8 skl_tplg_be_dev_type(int dev_type)
358 ret = NHLT_DEVICE_BT;
361 case SKL_DEVICE_DMIC:
362 ret = NHLT_DEVICE_DMIC;
366 ret = NHLT_DEVICE_I2S;
370 ret = NHLT_DEVICE_INVALID;
377 static int skl_tplg_update_be_blob(struct snd_soc_dapm_widget *w,
380 struct skl_module_cfg *m_cfg = w->priv;
382 u32 ch, s_freq, s_fmt;
383 struct nhlt_specific_cfg *cfg;
384 struct skl *skl = get_skl_ctx(ctx->dev);
385 u8 dev_type = skl_tplg_be_dev_type(m_cfg->dev_type);
386 int fmt_idx = m_cfg->fmt_idx;
387 struct skl_module_iface *m_iface = &m_cfg->module->formats[fmt_idx];
389 /* check if we already have blob */
390 if (m_cfg->formats_config.caps_size > 0)
393 dev_dbg(ctx->dev, "Applying default cfg blob\n");
394 switch (m_cfg->dev_type) {
395 case SKL_DEVICE_DMIC:
396 link_type = NHLT_LINK_DMIC;
397 dir = SNDRV_PCM_STREAM_CAPTURE;
398 s_freq = m_iface->inputs[0].fmt.s_freq;
399 s_fmt = m_iface->inputs[0].fmt.bit_depth;
400 ch = m_iface->inputs[0].fmt.channels;
404 link_type = NHLT_LINK_SSP;
405 if (m_cfg->hw_conn_type == SKL_CONN_SOURCE) {
406 dir = SNDRV_PCM_STREAM_PLAYBACK;
407 s_freq = m_iface->outputs[0].fmt.s_freq;
408 s_fmt = m_iface->outputs[0].fmt.bit_depth;
409 ch = m_iface->outputs[0].fmt.channels;
411 dir = SNDRV_PCM_STREAM_CAPTURE;
412 s_freq = m_iface->inputs[0].fmt.s_freq;
413 s_fmt = m_iface->inputs[0].fmt.bit_depth;
414 ch = m_iface->inputs[0].fmt.channels;
422 /* update the blob based on virtual bus_id and default params */
423 cfg = skl_get_ep_blob(skl, m_cfg->vbus_id, link_type,
424 s_fmt, ch, s_freq, dir, dev_type);
426 m_cfg->formats_config.caps_size = cfg->size;
427 m_cfg->formats_config.caps = (u32 *) &cfg->caps;
429 dev_err(ctx->dev, "Blob NULL for id %x type %d dirn %d\n",
430 m_cfg->vbus_id, link_type, dir);
431 dev_err(ctx->dev, "PCM: ch %d, freq %d, fmt %d\n",
439 static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w,
442 struct skl_module_cfg *m_cfg = w->priv;
443 struct skl_pipe_params *params = m_cfg->pipe->p_params;
444 int p_conn_type = m_cfg->pipe->conn_type;
447 if (!m_cfg->params_fixup)
450 dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n",
453 skl_dump_mconfig(ctx, m_cfg);
455 if (p_conn_type == SKL_PIPE_CONN_TYPE_FE)
460 skl_tplg_update_params_fixup(m_cfg, params, is_fe);
461 skl_tplg_update_buffer_size(ctx, m_cfg);
463 dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n",
466 skl_dump_mconfig(ctx, m_cfg);
470 * some modules can have multiple params set from user control and
471 * need to be set after module is initialized. If set_param flag is
472 * set module params will be done after module is initialised.
474 static int skl_tplg_set_module_params(struct snd_soc_dapm_widget *w,
478 struct skl_module_cfg *mconfig = w->priv;
479 const struct snd_kcontrol_new *k;
480 struct soc_bytes_ext *sb;
481 struct skl_algo_data *bc;
482 struct skl_specific_cfg *sp_cfg;
484 if (mconfig->formats_config.caps_size > 0 &&
485 mconfig->formats_config.set_params == SKL_PARAM_SET) {
486 sp_cfg = &mconfig->formats_config;
487 ret = skl_set_module_params(ctx, sp_cfg->caps,
489 sp_cfg->param_id, mconfig);
494 for (i = 0; i < w->num_kcontrols; i++) {
495 k = &w->kcontrol_news[i];
496 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
497 sb = (void *) k->private_value;
498 bc = (struct skl_algo_data *)sb->dobj.private;
500 if (bc->set_params == SKL_PARAM_SET) {
501 ret = skl_set_module_params(ctx,
502 (u32 *)bc->params, bc->size,
503 bc->param_id, mconfig);
514 * some module param can set from user control and this is required as
515 * when module is initailzed. if module param is required in init it is
516 * identifed by set_param flag. if set_param flag is not set, then this
517 * parameter needs to set as part of module init.
519 static int skl_tplg_set_module_init_data(struct snd_soc_dapm_widget *w)
521 const struct snd_kcontrol_new *k;
522 struct soc_bytes_ext *sb;
523 struct skl_algo_data *bc;
524 struct skl_module_cfg *mconfig = w->priv;
527 for (i = 0; i < w->num_kcontrols; i++) {
528 k = &w->kcontrol_news[i];
529 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
530 sb = (struct soc_bytes_ext *)k->private_value;
531 bc = (struct skl_algo_data *)sb->dobj.private;
533 if (bc->set_params != SKL_PARAM_INIT)
536 mconfig->formats_config.caps = (u32 *)bc->params;
537 mconfig->formats_config.caps_size = bc->size;
546 static int skl_tplg_module_prepare(struct skl_sst *ctx, struct skl_pipe *pipe,
547 struct snd_soc_dapm_widget *w, struct skl_module_cfg *mcfg)
549 switch (mcfg->dev_type) {
550 case SKL_DEVICE_HDAHOST:
551 return skl_pcm_host_dma_prepare(ctx->dev, pipe->p_params);
553 case SKL_DEVICE_HDALINK:
554 return skl_pcm_link_dma_prepare(ctx->dev, pipe->p_params);
561 * Inside a pipe instance, we can have various modules. These modules need
562 * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by
563 * skl_init_module() routine, so invoke that for all modules in a pipeline
566 skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe)
568 struct skl_pipe_module *w_module;
569 struct snd_soc_dapm_widget *w;
570 struct skl_module_cfg *mconfig;
571 struct skl_sst *ctx = skl->skl_sst;
575 list_for_each_entry(w_module, &pipe->w_list, node) {
580 /* check if module ids are populated */
581 if (mconfig->id.module_id < 0) {
582 dev_err(skl->skl_sst->dev,
583 "module %pUL id not populated\n",
584 (uuid_le *)mconfig->guid);
588 cfg_idx = mconfig->pipe->cur_config_idx;
589 mconfig->fmt_idx = mconfig->mod_cfg[cfg_idx].fmt_idx;
590 mconfig->res_idx = mconfig->mod_cfg[cfg_idx].res_idx;
592 /* check resource available */
593 if (!skl_is_pipe_mcps_avail(skl, mconfig))
596 if (mconfig->module->loadable && ctx->dsp->fw_ops.load_mod) {
597 ret = ctx->dsp->fw_ops.load_mod(ctx->dsp,
598 mconfig->id.module_id, mconfig->guid);
602 mconfig->m_state = SKL_MODULE_LOADED;
605 /* prepare the DMA if the module is gateway cpr */
606 ret = skl_tplg_module_prepare(ctx, pipe, w, mconfig);
610 /* update blob if blob is null for be with default value */
611 skl_tplg_update_be_blob(w, ctx);
614 * apply fix/conversion to module params based on
617 skl_tplg_update_module_params(w, ctx);
618 uuid_mod = (uuid_le *)mconfig->guid;
619 mconfig->id.pvt_id = skl_get_pvt_id(ctx, uuid_mod,
620 mconfig->id.instance_id);
621 if (mconfig->id.pvt_id < 0)
623 skl_tplg_set_module_init_data(w);
625 ret = skl_dsp_get_core(ctx->dsp, mconfig->core_id);
627 dev_err(ctx->dev, "Failed to wake up core %d ret=%d\n",
628 mconfig->core_id, ret);
632 ret = skl_init_module(ctx, mconfig);
634 skl_put_pvt_id(ctx, uuid_mod, &mconfig->id.pvt_id);
637 skl_tplg_alloc_pipe_mcps(skl, mconfig);
638 ret = skl_tplg_set_module_params(w, ctx);
645 skl_dsp_put_core(ctx->dsp, mconfig->core_id);
649 static int skl_tplg_unload_pipe_modules(struct skl_sst *ctx,
650 struct skl_pipe *pipe)
653 struct skl_pipe_module *w_module = NULL;
654 struct skl_module_cfg *mconfig = NULL;
656 list_for_each_entry(w_module, &pipe->w_list, node) {
658 mconfig = w_module->w->priv;
659 uuid_mod = (uuid_le *)mconfig->guid;
661 if (mconfig->module->loadable && ctx->dsp->fw_ops.unload_mod &&
662 mconfig->m_state > SKL_MODULE_UNINIT) {
663 ret = ctx->dsp->fw_ops.unload_mod(ctx->dsp,
664 mconfig->id.module_id);
668 skl_put_pvt_id(ctx, uuid_mod, &mconfig->id.pvt_id);
670 ret = skl_dsp_put_core(ctx->dsp, mconfig->core_id);
672 /* don't return; continue with other modules */
673 dev_err(ctx->dev, "Failed to sleep core %d ret=%d\n",
674 mconfig->core_id, ret);
678 /* no modules to unload in this path, so return */
683 * Here, we select pipe format based on the pipe type and pipe
684 * direction to determine the current config index for the pipeline.
685 * The config index is then used to select proper module resources.
686 * Intermediate pipes currently have a fixed format hence we select the
687 * 0th configuratation by default for such pipes.
690 skl_tplg_get_pipe_config(struct skl *skl, struct skl_module_cfg *mconfig)
692 struct skl_sst *ctx = skl->skl_sst;
693 struct skl_pipe *pipe = mconfig->pipe;
694 struct skl_pipe_params *params = pipe->p_params;
695 struct skl_path_config *pconfig = &pipe->configs[0];
696 struct skl_pipe_fmt *fmt = NULL;
700 if (pipe->nr_cfgs == 0) {
701 pipe->cur_config_idx = 0;
705 if (pipe->conn_type == SKL_PIPE_CONN_TYPE_NONE) {
706 dev_dbg(ctx->dev, "No conn_type detected, take 0th config\n");
707 pipe->cur_config_idx = 0;
708 pipe->memory_pages = pconfig->mem_pages;
713 if ((pipe->conn_type == SKL_PIPE_CONN_TYPE_FE &&
714 pipe->direction == SNDRV_PCM_STREAM_PLAYBACK) ||
715 (pipe->conn_type == SKL_PIPE_CONN_TYPE_BE &&
716 pipe->direction == SNDRV_PCM_STREAM_CAPTURE))
719 for (i = 0; i < pipe->nr_cfgs; i++) {
720 pconfig = &pipe->configs[i];
722 fmt = &pconfig->in_fmt;
724 fmt = &pconfig->out_fmt;
726 if (CHECK_HW_PARAMS(params->ch, params->s_freq, params->s_fmt,
727 fmt->channels, fmt->freq, fmt->bps)) {
728 pipe->cur_config_idx = i;
729 pipe->memory_pages = pconfig->mem_pages;
730 dev_dbg(ctx->dev, "Using pipe config: %d\n", i);
736 dev_err(ctx->dev, "Invalid pipe config: %d %d %d for pipe: %d\n",
737 params->ch, params->s_freq, params->s_fmt, pipe->ppl_id);
742 * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we
743 * need create the pipeline. So we do following:
744 * - check the resources
745 * - Create the pipeline
746 * - Initialize the modules in pipeline
747 * - finally bind all modules together
749 static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
753 struct skl_module_cfg *mconfig = w->priv;
754 struct skl_pipe_module *w_module;
755 struct skl_pipe *s_pipe = mconfig->pipe;
756 struct skl_module_cfg *src_module = NULL, *dst_module, *module;
757 struct skl_sst *ctx = skl->skl_sst;
758 struct skl_module_deferred_bind *modules;
760 ret = skl_tplg_get_pipe_config(skl, mconfig);
764 /* check resource available */
765 if (!skl_is_pipe_mcps_avail(skl, mconfig))
768 if (!skl_is_pipe_mem_avail(skl, mconfig))
772 * Create a list of modules for pipe.
773 * This list contains modules from source to sink
775 ret = skl_create_pipeline(ctx, mconfig->pipe);
779 skl_tplg_alloc_pipe_mem(skl, mconfig);
780 skl_tplg_alloc_pipe_mcps(skl, mconfig);
782 /* Init all pipe modules from source to sink */
783 ret = skl_tplg_init_pipe_modules(skl, s_pipe);
787 /* Bind modules from source to sink */
788 list_for_each_entry(w_module, &s_pipe->w_list, node) {
789 dst_module = w_module->w->priv;
791 if (src_module == NULL) {
792 src_module = dst_module;
796 ret = skl_bind_modules(ctx, src_module, dst_module);
800 src_module = dst_module;
804 * When the destination module is initialized, check for these modules
805 * in deferred bind list. If found, bind them.
807 list_for_each_entry(w_module, &s_pipe->w_list, node) {
808 if (list_empty(&skl->bind_list))
811 list_for_each_entry(modules, &skl->bind_list, node) {
812 module = w_module->w->priv;
813 if (modules->dst == module)
814 skl_bind_modules(ctx, modules->src,
822 static int skl_fill_sink_instance_id(struct skl_sst *ctx, u32 *params,
823 int size, struct skl_module_cfg *mcfg)
827 if (mcfg->m_type == SKL_MODULE_TYPE_KPB) {
828 struct skl_kpb_params *kpb_params =
829 (struct skl_kpb_params *)params;
830 struct skl_mod_inst_map *inst = kpb_params->map;
832 for (i = 0; i < kpb_params->num_modules; i++) {
833 pvt_id = skl_get_pvt_instance_id_map(ctx, inst->mod_id,
838 inst->inst_id = pvt_id;
846 * Some modules require params to be set after the module is bound to
847 * all pins connected.
849 * The module provider initializes set_param flag for such modules and we
850 * send params after binding
852 static int skl_tplg_set_module_bind_params(struct snd_soc_dapm_widget *w,
853 struct skl_module_cfg *mcfg, struct skl_sst *ctx)
856 struct skl_module_cfg *mconfig = w->priv;
857 const struct snd_kcontrol_new *k;
858 struct soc_bytes_ext *sb;
859 struct skl_algo_data *bc;
860 struct skl_specific_cfg *sp_cfg;
864 * check all out/in pins are in bind state.
865 * if so set the module param
867 for (i = 0; i < mcfg->module->max_output_pins; i++) {
868 if (mcfg->m_out_pin[i].pin_state != SKL_PIN_BIND_DONE)
872 for (i = 0; i < mcfg->module->max_input_pins; i++) {
873 if (mcfg->m_in_pin[i].pin_state != SKL_PIN_BIND_DONE)
877 if (mconfig->formats_config.caps_size > 0 &&
878 mconfig->formats_config.set_params == SKL_PARAM_BIND) {
879 sp_cfg = &mconfig->formats_config;
880 ret = skl_set_module_params(ctx, sp_cfg->caps,
882 sp_cfg->param_id, mconfig);
887 for (i = 0; i < w->num_kcontrols; i++) {
888 k = &w->kcontrol_news[i];
889 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
890 sb = (void *) k->private_value;
891 bc = (struct skl_algo_data *)sb->dobj.private;
893 if (bc->set_params == SKL_PARAM_BIND) {
894 params = kzalloc(bc->max, GFP_KERNEL);
898 memcpy(params, bc->params, bc->max);
899 skl_fill_sink_instance_id(ctx, params, bc->max,
902 ret = skl_set_module_params(ctx, params,
903 bc->max, bc->param_id, mconfig);
916 static int skl_tplg_module_add_deferred_bind(struct skl *skl,
917 struct skl_module_cfg *src, struct skl_module_cfg *dst)
919 struct skl_module_deferred_bind *m_list, *modules;
922 /* only supported for module with static pin connection */
923 for (i = 0; i < dst->module->max_input_pins; i++) {
924 struct skl_module_pin *pin = &dst->m_in_pin[i];
929 if ((pin->id.module_id == src->id.module_id) &&
930 (pin->id.instance_id == src->id.instance_id)) {
932 if (!list_empty(&skl->bind_list)) {
933 list_for_each_entry(modules, &skl->bind_list, node) {
934 if (modules->src == src && modules->dst == dst)
939 m_list = kzalloc(sizeof(*m_list), GFP_KERNEL);
946 list_add(&m_list->node, &skl->bind_list);
953 static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w,
955 struct snd_soc_dapm_widget *src_w,
956 struct skl_module_cfg *src_mconfig)
958 struct snd_soc_dapm_path *p;
959 struct snd_soc_dapm_widget *sink = NULL, *next_sink = NULL;
960 struct skl_module_cfg *sink_mconfig;
961 struct skl_sst *ctx = skl->skl_sst;
964 snd_soc_dapm_widget_for_each_sink_path(w, p) {
968 dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name);
969 dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name);
973 if (!is_skl_dsp_widget_type(p->sink))
974 return skl_tplg_bind_sinks(p->sink, skl, src_w, src_mconfig);
977 * here we will check widgets in sink pipelines, so that
978 * can be any widgets type and we are only interested if
979 * they are ones used for SKL so check that first
981 if ((p->sink->priv != NULL) &&
982 is_skl_dsp_widget_type(p->sink)) {
985 sink_mconfig = sink->priv;
988 * Modules other than PGA leaf can be connected
989 * directly or via switch to a module in another
990 * pipeline. EX: reference path
991 * when the path is enabled, the dst module that needs
992 * to be bound may not be initialized. if the module is
993 * not initialized, add these modules in the deferred
994 * bind list and when the dst module is initialised,
995 * bind this module to the dst_module in deferred list.
997 if (((src_mconfig->m_state == SKL_MODULE_INIT_DONE)
998 && (sink_mconfig->m_state == SKL_MODULE_UNINIT))) {
1000 ret = skl_tplg_module_add_deferred_bind(skl,
1001 src_mconfig, sink_mconfig);
1009 if (src_mconfig->m_state == SKL_MODULE_UNINIT ||
1010 sink_mconfig->m_state == SKL_MODULE_UNINIT)
1013 /* Bind source to sink, mixin is always source */
1014 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
1018 /* set module params after bind */
1019 skl_tplg_set_module_bind_params(src_w, src_mconfig, ctx);
1020 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
1022 /* Start sinks pipe first */
1023 if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) {
1024 if (sink_mconfig->pipe->conn_type !=
1025 SKL_PIPE_CONN_TYPE_FE)
1026 ret = skl_run_pipe(ctx,
1027 sink_mconfig->pipe);
1034 if (!sink && next_sink)
1035 return skl_tplg_bind_sinks(next_sink, skl, src_w, src_mconfig);
1041 * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA
1042 * we need to do following:
1043 * - Bind to sink pipeline
1044 * Since the sink pipes can be running and we don't get mixer event on
1045 * connect for already running mixer, we need to find the sink pipes
1046 * here and bind to them. This way dynamic connect works.
1047 * - Start sink pipeline, if not running
1048 * - Then run current pipe
1050 static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
1053 struct skl_module_cfg *src_mconfig;
1054 struct skl_sst *ctx = skl->skl_sst;
1057 src_mconfig = w->priv;
1060 * find which sink it is connected to, bind with the sink,
1061 * if sink is not started, start sink pipe first, then start
1064 ret = skl_tplg_bind_sinks(w, skl, w, src_mconfig);
1068 /* Start source pipe last after starting all sinks */
1069 if (src_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
1070 return skl_run_pipe(ctx, src_mconfig->pipe);
1075 static struct snd_soc_dapm_widget *skl_get_src_dsp_widget(
1076 struct snd_soc_dapm_widget *w, struct skl *skl)
1078 struct snd_soc_dapm_path *p;
1079 struct snd_soc_dapm_widget *src_w = NULL;
1080 struct skl_sst *ctx = skl->skl_sst;
1082 snd_soc_dapm_widget_for_each_source_path(w, p) {
1087 dev_dbg(ctx->dev, "sink widget=%s\n", w->name);
1088 dev_dbg(ctx->dev, "src widget=%s\n", p->source->name);
1091 * here we will check widgets in sink pipelines, so that can
1092 * be any widgets type and we are only interested if they are
1093 * ones used for SKL so check that first
1095 if ((p->source->priv != NULL) &&
1096 is_skl_dsp_widget_type(p->source)) {
1102 return skl_get_src_dsp_widget(src_w, skl);
1108 * in the Post-PMU event of mixer we need to do following:
1109 * - Check if this pipe is running
1111 * - bind this pipeline to its source pipeline
1112 * if source pipe is already running, this means it is a dynamic
1113 * connection and we need to bind only to that pipe
1114 * - start this pipeline
1116 static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w,
1120 struct snd_soc_dapm_widget *source, *sink;
1121 struct skl_module_cfg *src_mconfig, *sink_mconfig;
1122 struct skl_sst *ctx = skl->skl_sst;
1123 int src_pipe_started = 0;
1126 sink_mconfig = sink->priv;
1129 * If source pipe is already started, that means source is driving
1130 * one more sink before this sink got connected, Since source is
1131 * started, bind this sink to source and start this pipe.
1133 source = skl_get_src_dsp_widget(w, skl);
1134 if (source != NULL) {
1135 src_mconfig = source->priv;
1136 sink_mconfig = sink->priv;
1137 src_pipe_started = 1;
1140 * check pipe state, then no need to bind or start the
1143 if (src_mconfig->pipe->state != SKL_PIPE_STARTED)
1144 src_pipe_started = 0;
1147 if (src_pipe_started) {
1148 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
1152 /* set module params after bind */
1153 skl_tplg_set_module_bind_params(source, src_mconfig, ctx);
1154 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
1156 if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
1157 ret = skl_run_pipe(ctx, sink_mconfig->pipe);
1164 * in the Pre-PMD event of mixer we need to do following:
1166 * - find the source connections and remove that from dapm_path_list
1167 * - unbind with source pipelines if still connected
1169 static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w,
1172 struct skl_module_cfg *src_mconfig, *sink_mconfig;
1174 struct skl_sst *ctx = skl->skl_sst;
1176 sink_mconfig = w->priv;
1179 ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
1183 for (i = 0; i < sink_mconfig->module->max_input_pins; i++) {
1184 if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) {
1185 src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg;
1189 ret = skl_unbind_modules(ctx,
1190 src_mconfig, sink_mconfig);
1198 * in the Post-PMD event of mixer we need to do following:
1199 * - Free the mcps used
1200 * - Free the mem used
1201 * - Unbind the modules within the pipeline
1202 * - Delete the pipeline (modules are not required to be explicitly
1203 * deleted, pipeline delete is enough here
1205 static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
1208 struct skl_module_cfg *mconfig = w->priv;
1209 struct skl_pipe_module *w_module;
1210 struct skl_module_cfg *src_module = NULL, *dst_module;
1211 struct skl_sst *ctx = skl->skl_sst;
1212 struct skl_pipe *s_pipe = mconfig->pipe;
1213 struct skl_module_deferred_bind *modules, *tmp;
1215 if (s_pipe->state == SKL_PIPE_INVALID)
1218 skl_tplg_free_pipe_mcps(skl, mconfig);
1219 skl_tplg_free_pipe_mem(skl, mconfig);
1221 list_for_each_entry(w_module, &s_pipe->w_list, node) {
1222 if (list_empty(&skl->bind_list))
1225 src_module = w_module->w->priv;
1227 list_for_each_entry_safe(modules, tmp, &skl->bind_list, node) {
1229 * When the destination module is deleted, Unbind the
1230 * modules from deferred bind list.
1232 if (modules->dst == src_module) {
1233 skl_unbind_modules(ctx, modules->src,
1238 * When the source module is deleted, remove this entry
1239 * from the deferred bind list.
1241 if (modules->src == src_module) {
1242 list_del(&modules->node);
1243 modules->src = NULL;
1244 modules->dst = NULL;
1250 list_for_each_entry(w_module, &s_pipe->w_list, node) {
1251 dst_module = w_module->w->priv;
1253 if (mconfig->m_state >= SKL_MODULE_INIT_DONE)
1254 skl_tplg_free_pipe_mcps(skl, dst_module);
1255 if (src_module == NULL) {
1256 src_module = dst_module;
1260 skl_unbind_modules(ctx, src_module, dst_module);
1261 src_module = dst_module;
1264 skl_delete_pipe(ctx, mconfig->pipe);
1266 list_for_each_entry(w_module, &s_pipe->w_list, node) {
1267 src_module = w_module->w->priv;
1268 src_module->m_state = SKL_MODULE_UNINIT;
1271 return skl_tplg_unload_pipe_modules(ctx, s_pipe);
1275 * in the Post-PMD event of PGA we need to do following:
1276 * - Free the mcps used
1277 * - Stop the pipeline
1278 * - In source pipe is connected, unbind with source pipelines
1280 static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
1283 struct skl_module_cfg *src_mconfig, *sink_mconfig;
1285 struct skl_sst *ctx = skl->skl_sst;
1287 src_mconfig = w->priv;
1289 /* Stop the pipe since this is a mixin module */
1290 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
1294 for (i = 0; i < src_mconfig->module->max_output_pins; i++) {
1295 if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) {
1296 sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg;
1300 * This is a connecter and if path is found that means
1301 * unbind between source and sink has not happened yet
1303 ret = skl_unbind_modules(ctx, src_mconfig,
1312 * In modelling, we assume there will be ONLY one mixer in a pipeline. If a
1313 * second one is required that is created as another pipe entity.
1314 * The mixer is responsible for pipe management and represent a pipeline
1317 static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w,
1318 struct snd_kcontrol *k, int event)
1320 struct snd_soc_dapm_context *dapm = w->dapm;
1321 struct skl *skl = get_skl_ctx(dapm->dev);
1324 case SND_SOC_DAPM_PRE_PMU:
1325 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
1327 case SND_SOC_DAPM_POST_PMU:
1328 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
1330 case SND_SOC_DAPM_PRE_PMD:
1331 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
1333 case SND_SOC_DAPM_POST_PMD:
1334 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
1341 * In modelling, we assumed rest of the modules in pipeline are PGA. But we
1342 * are interested in last PGA (leaf PGA) in a pipeline to disconnect with
1343 * the sink when it is running (two FE to one BE or one FE to two BE)
1346 static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w,
1347 struct snd_kcontrol *k, int event)
1350 struct snd_soc_dapm_context *dapm = w->dapm;
1351 struct skl *skl = get_skl_ctx(dapm->dev);
1354 case SND_SOC_DAPM_PRE_PMU:
1355 return skl_tplg_pga_dapm_pre_pmu_event(w, skl);
1357 case SND_SOC_DAPM_POST_PMD:
1358 return skl_tplg_pga_dapm_post_pmd_event(w, skl);
1364 static int skl_tplg_tlv_control_get(struct snd_kcontrol *kcontrol,
1365 unsigned int __user *data, unsigned int size)
1367 struct soc_bytes_ext *sb =
1368 (struct soc_bytes_ext *)kcontrol->private_value;
1369 struct skl_algo_data *bc = (struct skl_algo_data *)sb->dobj.private;
1370 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1371 struct skl_module_cfg *mconfig = w->priv;
1372 struct skl *skl = get_skl_ctx(w->dapm->dev);
1375 skl_get_module_params(skl->skl_sst, (u32 *)bc->params,
1376 bc->size, bc->param_id, mconfig);
1378 /* decrement size for TLV header */
1379 size -= 2 * sizeof(u32);
1381 /* check size as we don't want to send kernel data */
1386 if (copy_to_user(data, &bc->param_id, sizeof(u32)))
1388 if (copy_to_user(data + 1, &size, sizeof(u32)))
1390 if (copy_to_user(data + 2, bc->params, size))
1397 #define SKL_PARAM_VENDOR_ID 0xff
1399 static int skl_tplg_tlv_control_set(struct snd_kcontrol *kcontrol,
1400 const unsigned int __user *data, unsigned int size)
1402 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1403 struct skl_module_cfg *mconfig = w->priv;
1404 struct soc_bytes_ext *sb =
1405 (struct soc_bytes_ext *)kcontrol->private_value;
1406 struct skl_algo_data *ac = (struct skl_algo_data *)sb->dobj.private;
1407 struct skl *skl = get_skl_ctx(w->dapm->dev);
1415 * if the param_is is of type Vendor, firmware expects actual
1416 * parameter id and size from the control.
1418 if (ac->param_id == SKL_PARAM_VENDOR_ID) {
1419 if (copy_from_user(ac->params, data, size))
1422 if (copy_from_user(ac->params,
1428 return skl_set_module_params(skl->skl_sst,
1429 (u32 *)ac->params, ac->size,
1430 ac->param_id, mconfig);
1436 static int skl_tplg_mic_control_get(struct snd_kcontrol *kcontrol,
1437 struct snd_ctl_elem_value *ucontrol)
1439 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1440 struct skl_module_cfg *mconfig = w->priv;
1441 struct soc_enum *ec = (struct soc_enum *)kcontrol->private_value;
1442 u32 ch_type = *((u32 *)ec->dobj.private);
1444 if (mconfig->dmic_ch_type == ch_type)
1445 ucontrol->value.enumerated.item[0] =
1446 mconfig->dmic_ch_combo_index;
1448 ucontrol->value.enumerated.item[0] = 0;
1453 static int skl_fill_mic_sel_params(struct skl_module_cfg *mconfig,
1454 struct skl_mic_sel_config *mic_cfg, struct device *dev)
1456 struct skl_specific_cfg *sp_cfg = &mconfig->formats_config;
1458 sp_cfg->caps_size = sizeof(struct skl_mic_sel_config);
1459 sp_cfg->set_params = SKL_PARAM_SET;
1460 sp_cfg->param_id = 0x00;
1461 if (!sp_cfg->caps) {
1462 sp_cfg->caps = devm_kzalloc(dev, sp_cfg->caps_size, GFP_KERNEL);
1467 mic_cfg->mic_switch = SKL_MIC_SEL_SWITCH;
1469 memcpy(sp_cfg->caps, mic_cfg, sp_cfg->caps_size);
1474 static int skl_tplg_mic_control_set(struct snd_kcontrol *kcontrol,
1475 struct snd_ctl_elem_value *ucontrol)
1477 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1478 struct skl_module_cfg *mconfig = w->priv;
1479 struct skl_mic_sel_config mic_cfg = {0};
1480 struct soc_enum *ec = (struct soc_enum *)kcontrol->private_value;
1481 u32 ch_type = *((u32 *)ec->dobj.private);
1483 u8 in_ch, out_ch, index;
1485 mconfig->dmic_ch_type = ch_type;
1486 mconfig->dmic_ch_combo_index = ucontrol->value.enumerated.item[0];
1488 /* enum control index 0 is INVALID, so no channels to be set */
1489 if (mconfig->dmic_ch_combo_index == 0)
1492 /* No valid channel selection map for index 0, so offset by 1 */
1493 index = mconfig->dmic_ch_combo_index - 1;
1497 if (mconfig->dmic_ch_combo_index > ARRAY_SIZE(mic_mono_list))
1500 list = &mic_mono_list[index];
1504 if (mconfig->dmic_ch_combo_index > ARRAY_SIZE(mic_stereo_list))
1507 list = mic_stereo_list[index];
1511 if (mconfig->dmic_ch_combo_index > ARRAY_SIZE(mic_trio_list))
1514 list = mic_trio_list[index];
1518 if (mconfig->dmic_ch_combo_index > ARRAY_SIZE(mic_quatro_list))
1521 list = mic_quatro_list[index];
1525 dev_err(w->dapm->dev,
1526 "Invalid channel %d for mic_select module\n",
1532 /* channel type enum map to number of chanels for that type */
1533 for (out_ch = 0; out_ch < ch_type; out_ch++) {
1534 in_ch = list[out_ch];
1535 mic_cfg.blob[out_ch][in_ch] = SKL_DEFAULT_MIC_SEL_GAIN;
1538 return skl_fill_mic_sel_params(mconfig, &mic_cfg, w->dapm->dev);
1542 * Fill the dma id for host and link. In case of passthrough
1543 * pipeline, this will both host and link in the same
1544 * pipeline, so need to copy the link and host based on dev_type
1546 static void skl_tplg_fill_dma_id(struct skl_module_cfg *mcfg,
1547 struct skl_pipe_params *params)
1549 struct skl_pipe *pipe = mcfg->pipe;
1551 if (pipe->passthru) {
1552 switch (mcfg->dev_type) {
1553 case SKL_DEVICE_HDALINK:
1554 pipe->p_params->link_dma_id = params->link_dma_id;
1555 pipe->p_params->link_index = params->link_index;
1556 pipe->p_params->link_bps = params->link_bps;
1559 case SKL_DEVICE_HDAHOST:
1560 pipe->p_params->host_dma_id = params->host_dma_id;
1561 pipe->p_params->host_bps = params->host_bps;
1567 pipe->p_params->s_fmt = params->s_fmt;
1568 pipe->p_params->ch = params->ch;
1569 pipe->p_params->s_freq = params->s_freq;
1570 pipe->p_params->stream = params->stream;
1571 pipe->p_params->format = params->format;
1574 memcpy(pipe->p_params, params, sizeof(*params));
1579 * The FE params are passed by hw_params of the DAI.
1580 * On hw_params, the params are stored in Gateway module of the FE and we
1581 * need to calculate the format in DSP module configuration, that
1582 * conversion is done here
1584 int skl_tplg_update_pipe_params(struct device *dev,
1585 struct skl_module_cfg *mconfig,
1586 struct skl_pipe_params *params)
1588 struct skl_module_res *res = &mconfig->module->resources[0];
1589 struct skl *skl = get_skl_ctx(dev);
1590 struct skl_module_fmt *format = NULL;
1591 u8 cfg_idx = mconfig->pipe->cur_config_idx;
1593 skl_tplg_fill_dma_id(mconfig, params);
1594 mconfig->fmt_idx = mconfig->mod_cfg[cfg_idx].fmt_idx;
1595 mconfig->res_idx = mconfig->mod_cfg[cfg_idx].res_idx;
1597 if (skl->nr_modules)
1600 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK)
1601 format = &mconfig->module->formats[0].inputs[0].fmt;
1603 format = &mconfig->module->formats[0].outputs[0].fmt;
1605 /* set the hw_params */
1606 format->s_freq = params->s_freq;
1607 format->channels = params->ch;
1608 format->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
1611 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
1612 * container so update bit depth accordingly
1614 switch (format->valid_bit_depth) {
1615 case SKL_DEPTH_16BIT:
1616 format->bit_depth = format->valid_bit_depth;
1619 case SKL_DEPTH_24BIT:
1620 case SKL_DEPTH_32BIT:
1621 format->bit_depth = SKL_DEPTH_32BIT;
1625 dev_err(dev, "Invalid bit depth %x for pipe\n",
1626 format->valid_bit_depth);
1630 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1631 res->ibs = (format->s_freq / 1000) *
1632 (format->channels) *
1633 (format->bit_depth >> 3);
1635 res->obs = (format->s_freq / 1000) *
1636 (format->channels) *
1637 (format->bit_depth >> 3);
1644 * Query the module config for the FE DAI
1645 * This is used to find the hw_params set for that DAI and apply to FE
1648 struct skl_module_cfg *
1649 skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream)
1651 struct snd_soc_dapm_widget *w;
1652 struct snd_soc_dapm_path *p = NULL;
1654 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1655 w = dai->playback_widget;
1656 snd_soc_dapm_widget_for_each_sink_path(w, p) {
1657 if (p->connect && p->sink->power &&
1658 !is_skl_dsp_widget_type(p->sink))
1661 if (p->sink->priv) {
1662 dev_dbg(dai->dev, "set params for %s\n",
1664 return p->sink->priv;
1668 w = dai->capture_widget;
1669 snd_soc_dapm_widget_for_each_source_path(w, p) {
1670 if (p->connect && p->source->power &&
1671 !is_skl_dsp_widget_type(p->source))
1674 if (p->source->priv) {
1675 dev_dbg(dai->dev, "set params for %s\n",
1677 return p->source->priv;
1685 static struct skl_module_cfg *skl_get_mconfig_pb_cpr(
1686 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1688 struct snd_soc_dapm_path *p;
1689 struct skl_module_cfg *mconfig = NULL;
1691 snd_soc_dapm_widget_for_each_source_path(w, p) {
1692 if (w->endpoints[SND_SOC_DAPM_DIR_OUT] > 0) {
1694 (p->sink->id == snd_soc_dapm_aif_out) &&
1696 mconfig = p->source->priv;
1699 mconfig = skl_get_mconfig_pb_cpr(dai, p->source);
1707 static struct skl_module_cfg *skl_get_mconfig_cap_cpr(
1708 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1710 struct snd_soc_dapm_path *p;
1711 struct skl_module_cfg *mconfig = NULL;
1713 snd_soc_dapm_widget_for_each_sink_path(w, p) {
1714 if (w->endpoints[SND_SOC_DAPM_DIR_IN] > 0) {
1716 (p->source->id == snd_soc_dapm_aif_in) &&
1718 mconfig = p->sink->priv;
1721 mconfig = skl_get_mconfig_cap_cpr(dai, p->sink);
1729 struct skl_module_cfg *
1730 skl_tplg_be_get_cpr_module(struct snd_soc_dai *dai, int stream)
1732 struct snd_soc_dapm_widget *w;
1733 struct skl_module_cfg *mconfig;
1735 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1736 w = dai->playback_widget;
1737 mconfig = skl_get_mconfig_pb_cpr(dai, w);
1739 w = dai->capture_widget;
1740 mconfig = skl_get_mconfig_cap_cpr(dai, w);
1745 static u8 skl_tplg_be_link_type(int dev_type)
1751 ret = NHLT_LINK_SSP;
1754 case SKL_DEVICE_DMIC:
1755 ret = NHLT_LINK_DMIC;
1758 case SKL_DEVICE_I2S:
1759 ret = NHLT_LINK_SSP;
1762 case SKL_DEVICE_HDALINK:
1763 ret = NHLT_LINK_HDA;
1767 ret = NHLT_LINK_INVALID;
1775 * Fill the BE gateway parameters
1776 * The BE gateway expects a blob of parameters which are kept in the ACPI
1777 * NHLT blob, so query the blob for interface type (i2s/pdm) and instance.
1778 * The port can have multiple settings so pick based on the PCM
1781 static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai,
1782 struct skl_module_cfg *mconfig,
1783 struct skl_pipe_params *params)
1785 struct nhlt_specific_cfg *cfg;
1786 struct skl *skl = get_skl_ctx(dai->dev);
1787 int link_type = skl_tplg_be_link_type(mconfig->dev_type);
1788 u8 dev_type = skl_tplg_be_dev_type(mconfig->dev_type);
1790 skl_tplg_fill_dma_id(mconfig, params);
1792 if (link_type == NHLT_LINK_HDA)
1795 /* update the blob based on virtual bus_id*/
1796 cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type,
1797 params->s_fmt, params->ch,
1798 params->s_freq, params->stream,
1801 mconfig->formats_config.caps_size = cfg->size;
1802 mconfig->formats_config.caps = (u32 *) &cfg->caps;
1804 dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n",
1805 mconfig->vbus_id, link_type,
1807 dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n",
1808 params->ch, params->s_freq, params->s_fmt);
1815 static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai,
1816 struct snd_soc_dapm_widget *w,
1817 struct skl_pipe_params *params)
1819 struct snd_soc_dapm_path *p;
1822 snd_soc_dapm_widget_for_each_source_path(w, p) {
1823 if (p->connect && is_skl_dsp_widget_type(p->source) &&
1826 ret = skl_tplg_be_fill_pipe_params(dai,
1827 p->source->priv, params);
1831 ret = skl_tplg_be_set_src_pipe_params(dai,
1841 static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai,
1842 struct snd_soc_dapm_widget *w, struct skl_pipe_params *params)
1844 struct snd_soc_dapm_path *p = NULL;
1847 snd_soc_dapm_widget_for_each_sink_path(w, p) {
1848 if (p->connect && is_skl_dsp_widget_type(p->sink) &&
1851 ret = skl_tplg_be_fill_pipe_params(dai,
1852 p->sink->priv, params);
1856 ret = skl_tplg_be_set_sink_pipe_params(
1857 dai, p->sink, params);
1867 * BE hw_params can be a source parameters (capture) or sink parameters
1868 * (playback). Based on sink and source we need to either find the source
1869 * list or the sink list and set the pipeline parameters
1871 int skl_tplg_be_update_params(struct snd_soc_dai *dai,
1872 struct skl_pipe_params *params)
1874 struct snd_soc_dapm_widget *w;
1876 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1877 w = dai->playback_widget;
1879 return skl_tplg_be_set_src_pipe_params(dai, w, params);
1882 w = dai->capture_widget;
1884 return skl_tplg_be_set_sink_pipe_params(dai, w, params);
1890 static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = {
1891 {SKL_MIXER_EVENT, skl_tplg_mixer_event},
1892 {SKL_VMIXER_EVENT, skl_tplg_mixer_event},
1893 {SKL_PGA_EVENT, skl_tplg_pga_event},
1896 static const struct snd_soc_tplg_bytes_ext_ops skl_tlv_ops[] = {
1897 {SKL_CONTROL_TYPE_BYTE_TLV, skl_tplg_tlv_control_get,
1898 skl_tplg_tlv_control_set},
1901 static const struct snd_soc_tplg_kcontrol_ops skl_tplg_kcontrol_ops[] = {
1903 .id = SKL_CONTROL_TYPE_MIC_SELECT,
1904 .get = skl_tplg_mic_control_get,
1905 .put = skl_tplg_mic_control_set,
1909 static int skl_tplg_fill_pipe_cfg(struct device *dev,
1910 struct skl_pipe *pipe, u32 tkn,
1911 u32 tkn_val, int conf_idx, int dir)
1913 struct skl_pipe_fmt *fmt;
1914 struct skl_path_config *config;
1918 fmt = &pipe->configs[conf_idx].in_fmt;
1922 fmt = &pipe->configs[conf_idx].out_fmt;
1926 dev_err(dev, "Invalid direction: %d\n", dir);
1930 config = &pipe->configs[conf_idx];
1933 case SKL_TKN_U32_CFG_FREQ:
1934 fmt->freq = tkn_val;
1937 case SKL_TKN_U8_CFG_CHAN:
1938 fmt->channels = tkn_val;
1941 case SKL_TKN_U8_CFG_BPS:
1945 case SKL_TKN_U32_PATH_MEM_PGS:
1946 config->mem_pages = tkn_val;
1950 dev_err(dev, "Invalid token config: %d\n", tkn);
1957 static int skl_tplg_fill_pipe_tkn(struct device *dev,
1958 struct skl_pipe *pipe, u32 tkn,
1963 case SKL_TKN_U32_PIPE_CONN_TYPE:
1964 pipe->conn_type = tkn_val;
1967 case SKL_TKN_U32_PIPE_PRIORITY:
1968 pipe->pipe_priority = tkn_val;
1971 case SKL_TKN_U32_PIPE_MEM_PGS:
1972 pipe->memory_pages = tkn_val;
1975 case SKL_TKN_U32_PMODE:
1976 pipe->lp_mode = tkn_val;
1979 case SKL_TKN_U32_PIPE_DIRECTION:
1980 pipe->direction = tkn_val;
1983 case SKL_TKN_U32_NUM_CONFIGS:
1984 pipe->nr_cfgs = tkn_val;
1988 dev_err(dev, "Token not handled %d\n", tkn);
1996 * Add pipeline by parsing the relevant tokens
1997 * Return an existing pipe if the pipe already exists.
1999 static int skl_tplg_add_pipe(struct device *dev,
2000 struct skl_module_cfg *mconfig, struct skl *skl,
2001 struct snd_soc_tplg_vendor_value_elem *tkn_elem)
2003 struct skl_pipeline *ppl;
2004 struct skl_pipe *pipe;
2005 struct skl_pipe_params *params;
2007 list_for_each_entry(ppl, &skl->ppl_list, node) {
2008 if (ppl->pipe->ppl_id == tkn_elem->value) {
2009 mconfig->pipe = ppl->pipe;
2014 ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL);
2018 pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL);
2022 params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL);
2026 pipe->p_params = params;
2027 pipe->ppl_id = tkn_elem->value;
2028 INIT_LIST_HEAD(&pipe->w_list);
2031 list_add(&ppl->node, &skl->ppl_list);
2033 mconfig->pipe = pipe;
2034 mconfig->pipe->state = SKL_PIPE_INVALID;
2039 static int skl_tplg_get_uuid(struct device *dev, u8 *guid,
2040 struct snd_soc_tplg_vendor_uuid_elem *uuid_tkn)
2042 if (uuid_tkn->token == SKL_TKN_UUID) {
2043 memcpy(guid, &uuid_tkn->uuid, 16);
2047 dev_err(dev, "Not an UUID token %d\n", uuid_tkn->token);
2052 static int skl_tplg_fill_pin(struct device *dev,
2053 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
2054 struct skl_module_pin *m_pin,
2059 switch (tkn_elem->token) {
2060 case SKL_TKN_U32_PIN_MOD_ID:
2061 m_pin[pin_index].id.module_id = tkn_elem->value;
2064 case SKL_TKN_U32_PIN_INST_ID:
2065 m_pin[pin_index].id.instance_id = tkn_elem->value;
2069 ret = skl_tplg_get_uuid(dev, m_pin[pin_index].id.mod_uuid.b,
2070 (struct snd_soc_tplg_vendor_uuid_elem *)tkn_elem);
2077 dev_err(dev, "%d Not a pin token\n", tkn_elem->token);
2085 * Parse for pin config specific tokens to fill up the
2086 * module private data
2088 static int skl_tplg_fill_pins_info(struct device *dev,
2089 struct skl_module_cfg *mconfig,
2090 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
2091 int dir, int pin_count)
2094 struct skl_module_pin *m_pin;
2098 m_pin = mconfig->m_in_pin;
2102 m_pin = mconfig->m_out_pin;
2106 dev_err(dev, "Invalid direction value\n");
2110 ret = skl_tplg_fill_pin(dev, tkn_elem, m_pin, pin_count);
2114 m_pin[pin_count].in_use = false;
2115 m_pin[pin_count].pin_state = SKL_PIN_UNBIND;
2121 * Fill up input/output module config format based
2124 static int skl_tplg_fill_fmt(struct device *dev,
2125 struct skl_module_fmt *dst_fmt,
2129 case SKL_TKN_U32_FMT_CH:
2130 dst_fmt->channels = value;
2133 case SKL_TKN_U32_FMT_FREQ:
2134 dst_fmt->s_freq = value;
2137 case SKL_TKN_U32_FMT_BIT_DEPTH:
2138 dst_fmt->bit_depth = value;
2141 case SKL_TKN_U32_FMT_SAMPLE_SIZE:
2142 dst_fmt->valid_bit_depth = value;
2145 case SKL_TKN_U32_FMT_CH_CONFIG:
2146 dst_fmt->ch_cfg = value;
2149 case SKL_TKN_U32_FMT_INTERLEAVE:
2150 dst_fmt->interleaving_style = value;
2153 case SKL_TKN_U32_FMT_SAMPLE_TYPE:
2154 dst_fmt->sample_type = value;
2157 case SKL_TKN_U32_FMT_CH_MAP:
2158 dst_fmt->ch_map = value;
2162 dev_err(dev, "Invalid token %d\n", tkn);
2169 static int skl_tplg_widget_fill_fmt(struct device *dev,
2170 struct skl_module_iface *fmt,
2171 u32 tkn, u32 val, u32 dir, int fmt_idx)
2173 struct skl_module_fmt *dst_fmt;
2180 dst_fmt = &fmt->inputs[fmt_idx].fmt;
2184 dst_fmt = &fmt->outputs[fmt_idx].fmt;
2188 dev_err(dev, "Invalid direction: %d\n", dir);
2192 return skl_tplg_fill_fmt(dev, dst_fmt, tkn, val);
2195 static void skl_tplg_fill_pin_dynamic_val(
2196 struct skl_module_pin *mpin, u32 pin_count, u32 value)
2200 for (i = 0; i < pin_count; i++)
2201 mpin[i].is_dynamic = value;
2205 * Resource table in the manifest has pin specific resources
2206 * like pin and pin buffer size
2208 static int skl_tplg_manifest_pin_res_tkn(struct device *dev,
2209 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
2210 struct skl_module_res *res, int pin_idx, int dir)
2212 struct skl_module_pin_resources *m_pin;
2216 m_pin = &res->input[pin_idx];
2220 m_pin = &res->output[pin_idx];
2224 dev_err(dev, "Invalid pin direction: %d\n", dir);
2228 switch (tkn_elem->token) {
2229 case SKL_TKN_MM_U32_RES_PIN_ID:
2230 m_pin->pin_index = tkn_elem->value;
2233 case SKL_TKN_MM_U32_PIN_BUF:
2234 m_pin->buf_size = tkn_elem->value;
2238 dev_err(dev, "Invalid token: %d\n", tkn_elem->token);
2246 * Fill module specific resources from the manifest's resource
2247 * table like CPS, DMA size, mem_pages.
2249 static int skl_tplg_fill_res_tkn(struct device *dev,
2250 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
2251 struct skl_module_res *res,
2252 int pin_idx, int dir)
2254 int ret, tkn_count = 0;
2259 switch (tkn_elem->token) {
2260 case SKL_TKN_MM_U32_CPS:
2261 res->cps = tkn_elem->value;
2264 case SKL_TKN_MM_U32_DMA_SIZE:
2265 res->dma_buffer_size = tkn_elem->value;
2268 case SKL_TKN_MM_U32_CPC:
2269 res->cpc = tkn_elem->value;
2272 case SKL_TKN_U32_MEM_PAGES:
2273 res->is_pages = tkn_elem->value;
2276 case SKL_TKN_U32_OBS:
2277 res->obs = tkn_elem->value;
2280 case SKL_TKN_U32_IBS:
2281 res->ibs = tkn_elem->value;
2284 case SKL_TKN_U32_MAX_MCPS:
2285 res->cps = tkn_elem->value;
2288 case SKL_TKN_MM_U32_RES_PIN_ID:
2289 case SKL_TKN_MM_U32_PIN_BUF:
2290 ret = skl_tplg_manifest_pin_res_tkn(dev, tkn_elem, res,
2297 dev_err(dev, "Not a res type token: %d", tkn_elem->token);
2307 * Parse tokens to fill up the module private data
2309 static int skl_tplg_get_token(struct device *dev,
2310 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
2311 struct skl *skl, struct skl_module_cfg *mconfig)
2315 static int is_pipe_exists;
2316 static int pin_index, dir, conf_idx;
2317 struct skl_module_iface *iface = NULL;
2318 struct skl_module_res *res = NULL;
2319 int res_idx = mconfig->res_idx;
2320 int fmt_idx = mconfig->fmt_idx;
2323 * If the manifest structure contains no modules, fill all
2324 * the module data to 0th index.
2325 * res_idx and fmt_idx are default set to 0.
2327 if (skl->nr_modules == 0) {
2328 res = &mconfig->module->resources[res_idx];
2329 iface = &mconfig->module->formats[fmt_idx];
2332 if (tkn_elem->token > SKL_TKN_MAX)
2335 switch (tkn_elem->token) {
2336 case SKL_TKN_U8_IN_QUEUE_COUNT:
2337 mconfig->module->max_input_pins = tkn_elem->value;
2340 case SKL_TKN_U8_OUT_QUEUE_COUNT:
2341 mconfig->module->max_output_pins = tkn_elem->value;
2344 case SKL_TKN_U8_DYN_IN_PIN:
2345 if (!mconfig->m_in_pin)
2346 mconfig->m_in_pin = devm_kzalloc(dev, MAX_IN_QUEUE *
2347 sizeof(*mconfig->m_in_pin), GFP_KERNEL);
2348 if (!mconfig->m_in_pin)
2351 skl_tplg_fill_pin_dynamic_val(mconfig->m_in_pin, MAX_IN_QUEUE,
2355 case SKL_TKN_U8_DYN_OUT_PIN:
2356 if (!mconfig->m_out_pin)
2357 mconfig->m_out_pin = devm_kzalloc(dev, MAX_IN_QUEUE *
2358 sizeof(*mconfig->m_in_pin), GFP_KERNEL);
2359 if (!mconfig->m_out_pin)
2362 skl_tplg_fill_pin_dynamic_val(mconfig->m_out_pin, MAX_OUT_QUEUE,
2366 case SKL_TKN_U8_TIME_SLOT:
2367 mconfig->time_slot = tkn_elem->value;
2370 case SKL_TKN_U8_CORE_ID:
2371 mconfig->core_id = tkn_elem->value;
2373 case SKL_TKN_U8_MOD_TYPE:
2374 mconfig->m_type = tkn_elem->value;
2377 case SKL_TKN_U8_DEV_TYPE:
2378 mconfig->dev_type = tkn_elem->value;
2381 case SKL_TKN_U8_HW_CONN_TYPE:
2382 mconfig->hw_conn_type = tkn_elem->value;
2385 case SKL_TKN_U16_MOD_INST_ID:
2386 mconfig->id.instance_id =
2390 case SKL_TKN_U32_MEM_PAGES:
2391 case SKL_TKN_U32_MAX_MCPS:
2392 case SKL_TKN_U32_OBS:
2393 case SKL_TKN_U32_IBS:
2394 ret = skl_tplg_fill_res_tkn(dev, tkn_elem, res, pin_index, dir);
2400 case SKL_TKN_U32_VBUS_ID:
2401 mconfig->vbus_id = tkn_elem->value;
2404 case SKL_TKN_U32_PARAMS_FIXUP:
2405 mconfig->params_fixup = tkn_elem->value;
2408 case SKL_TKN_U32_CONVERTER:
2409 mconfig->converter = tkn_elem->value;
2412 case SKL_TKN_U32_D0I3_CAPS:
2413 mconfig->d0i3_caps = tkn_elem->value;
2416 case SKL_TKN_U32_PIPE_ID:
2417 ret = skl_tplg_add_pipe(dev,
2418 mconfig, skl, tkn_elem);
2421 if (ret == -EEXIST) {
2425 return is_pipe_exists;
2430 case SKL_TKN_U32_PIPE_CONFIG_ID:
2431 conf_idx = tkn_elem->value;
2434 case SKL_TKN_U32_PIPE_CONN_TYPE:
2435 case SKL_TKN_U32_PIPE_PRIORITY:
2436 case SKL_TKN_U32_PIPE_MEM_PGS:
2437 case SKL_TKN_U32_PMODE:
2438 case SKL_TKN_U32_PIPE_DIRECTION:
2439 case SKL_TKN_U32_NUM_CONFIGS:
2440 if (is_pipe_exists) {
2441 ret = skl_tplg_fill_pipe_tkn(dev, mconfig->pipe,
2442 tkn_elem->token, tkn_elem->value);
2449 case SKL_TKN_U32_PATH_MEM_PGS:
2450 case SKL_TKN_U32_CFG_FREQ:
2451 case SKL_TKN_U8_CFG_CHAN:
2452 case SKL_TKN_U8_CFG_BPS:
2453 if (mconfig->pipe->nr_cfgs) {
2454 ret = skl_tplg_fill_pipe_cfg(dev, mconfig->pipe,
2455 tkn_elem->token, tkn_elem->value,
2462 case SKL_TKN_CFG_MOD_RES_ID:
2463 mconfig->mod_cfg[conf_idx].res_idx = tkn_elem->value;
2466 case SKL_TKN_CFG_MOD_FMT_ID:
2467 mconfig->mod_cfg[conf_idx].fmt_idx = tkn_elem->value;
2471 * SKL_TKN_U32_DIR_PIN_COUNT token has the value for both
2472 * direction and the pin count. The first four bits represent
2473 * direction and next four the pin count.
2475 case SKL_TKN_U32_DIR_PIN_COUNT:
2476 dir = tkn_elem->value & SKL_IN_DIR_BIT_MASK;
2477 pin_index = (tkn_elem->value &
2478 SKL_PIN_COUNT_MASK) >> 4;
2482 case SKL_TKN_U32_FMT_CH:
2483 case SKL_TKN_U32_FMT_FREQ:
2484 case SKL_TKN_U32_FMT_BIT_DEPTH:
2485 case SKL_TKN_U32_FMT_SAMPLE_SIZE:
2486 case SKL_TKN_U32_FMT_CH_CONFIG:
2487 case SKL_TKN_U32_FMT_INTERLEAVE:
2488 case SKL_TKN_U32_FMT_SAMPLE_TYPE:
2489 case SKL_TKN_U32_FMT_CH_MAP:
2490 ret = skl_tplg_widget_fill_fmt(dev, iface, tkn_elem->token,
2491 tkn_elem->value, dir, pin_index);
2498 case SKL_TKN_U32_PIN_MOD_ID:
2499 case SKL_TKN_U32_PIN_INST_ID:
2501 ret = skl_tplg_fill_pins_info(dev,
2502 mconfig, tkn_elem, dir,
2509 case SKL_TKN_U32_CAPS_SIZE:
2510 mconfig->formats_config.caps_size =
2515 case SKL_TKN_U32_CAPS_SET_PARAMS:
2516 mconfig->formats_config.set_params =
2520 case SKL_TKN_U32_CAPS_PARAMS_ID:
2521 mconfig->formats_config.param_id =
2525 case SKL_TKN_U32_PROC_DOMAIN:
2531 case SKL_TKN_U32_DMA_BUF_SIZE:
2532 mconfig->dma_buffer_size = tkn_elem->value;
2535 case SKL_TKN_U8_IN_PIN_TYPE:
2536 case SKL_TKN_U8_OUT_PIN_TYPE:
2537 case SKL_TKN_U8_CONN_TYPE:
2541 dev_err(dev, "Token %d not handled\n",
2552 * Parse the vendor array for specific tokens to construct
2553 * module private data
2555 static int skl_tplg_get_tokens(struct device *dev,
2556 char *pvt_data, struct skl *skl,
2557 struct skl_module_cfg *mconfig, int block_size)
2559 struct snd_soc_tplg_vendor_array *array;
2560 struct snd_soc_tplg_vendor_value_elem *tkn_elem;
2561 int tkn_count = 0, ret;
2562 int off = 0, tuple_size = 0;
2563 bool is_module_guid = true;
2565 if (block_size <= 0)
2568 while (tuple_size < block_size) {
2569 array = (struct snd_soc_tplg_vendor_array *)(pvt_data + off);
2573 switch (array->type) {
2574 case SND_SOC_TPLG_TUPLE_TYPE_STRING:
2575 dev_warn(dev, "no string tokens expected for skl tplg\n");
2578 case SND_SOC_TPLG_TUPLE_TYPE_UUID:
2579 if (is_module_guid) {
2580 ret = skl_tplg_get_uuid(dev, mconfig->guid,
2582 is_module_guid = false;
2584 ret = skl_tplg_get_token(dev, array->value, skl,
2591 tuple_size += sizeof(*array->uuid);
2596 tkn_elem = array->value;
2601 while (tkn_count <= (array->num_elems - 1)) {
2602 ret = skl_tplg_get_token(dev, tkn_elem,
2608 tkn_count = tkn_count + ret;
2612 tuple_size += tkn_count * sizeof(*tkn_elem);
2619 * Every data block is preceded by a descriptor to read the number
2620 * of data blocks, they type of the block and it's size
2622 static int skl_tplg_get_desc_blocks(struct device *dev,
2623 struct snd_soc_tplg_vendor_array *array)
2625 struct snd_soc_tplg_vendor_value_elem *tkn_elem;
2627 tkn_elem = array->value;
2629 switch (tkn_elem->token) {
2630 case SKL_TKN_U8_NUM_BLOCKS:
2631 case SKL_TKN_U8_BLOCK_TYPE:
2632 case SKL_TKN_U16_BLOCK_SIZE:
2633 return tkn_elem->value;
2636 dev_err(dev, "Invalid descriptor token %d\n", tkn_elem->token);
2644 * Parse the private data for the token and corresponding value.
2645 * The private data can have multiple data blocks. So, a data block
2646 * is preceded by a descriptor for number of blocks and a descriptor
2647 * for the type and size of the suceeding data block.
2649 static int skl_tplg_get_pvt_data(struct snd_soc_tplg_dapm_widget *tplg_w,
2650 struct skl *skl, struct device *dev,
2651 struct skl_module_cfg *mconfig)
2653 struct snd_soc_tplg_vendor_array *array;
2654 int num_blocks, block_size = 0, block_type, off = 0;
2658 /* Read the NUM_DATA_BLOCKS descriptor */
2659 array = (struct snd_soc_tplg_vendor_array *)tplg_w->priv.data;
2660 ret = skl_tplg_get_desc_blocks(dev, array);
2666 /* Read the BLOCK_TYPE and BLOCK_SIZE descriptor */
2667 while (num_blocks > 0) {
2668 array = (struct snd_soc_tplg_vendor_array *)
2669 (tplg_w->priv.data + off);
2671 ret = skl_tplg_get_desc_blocks(dev, array);
2678 array = (struct snd_soc_tplg_vendor_array *)
2679 (tplg_w->priv.data + off);
2681 ret = skl_tplg_get_desc_blocks(dev, array);
2688 array = (struct snd_soc_tplg_vendor_array *)
2689 (tplg_w->priv.data + off);
2691 data = (tplg_w->priv.data + off);
2693 if (block_type == SKL_TYPE_TUPLE) {
2694 ret = skl_tplg_get_tokens(dev, data,
2695 skl, mconfig, block_size);
2702 if (mconfig->formats_config.caps_size > 0)
2703 memcpy(mconfig->formats_config.caps, data,
2704 mconfig->formats_config.caps_size);
2706 ret = mconfig->formats_config.caps_size;
2714 static void skl_clear_pin_config(struct snd_soc_platform *platform,
2715 struct snd_soc_dapm_widget *w)
2718 struct skl_module_cfg *mconfig;
2719 struct skl_pipe *pipe;
2721 if (!strncmp(w->dapm->component->name, platform->component.name,
2722 strlen(platform->component.name))) {
2724 pipe = mconfig->pipe;
2725 for (i = 0; i < mconfig->module->max_input_pins; i++) {
2726 mconfig->m_in_pin[i].in_use = false;
2727 mconfig->m_in_pin[i].pin_state = SKL_PIN_UNBIND;
2729 for (i = 0; i < mconfig->module->max_output_pins; i++) {
2730 mconfig->m_out_pin[i].in_use = false;
2731 mconfig->m_out_pin[i].pin_state = SKL_PIN_UNBIND;
2733 pipe->state = SKL_PIPE_INVALID;
2734 mconfig->m_state = SKL_MODULE_UNINIT;
2738 void skl_cleanup_resources(struct skl *skl)
2740 struct skl_sst *ctx = skl->skl_sst;
2741 struct snd_soc_platform *soc_platform = skl->platform;
2742 struct snd_soc_dapm_widget *w;
2743 struct snd_soc_card *card;
2745 if (soc_platform == NULL)
2748 card = soc_platform->component.card;
2749 if (!card || !card->instantiated)
2752 skl->resource.mem = 0;
2753 skl->resource.mcps = 0;
2755 list_for_each_entry(w, &card->widgets, list) {
2756 if (is_skl_dsp_widget_type(w) && (w->priv != NULL))
2757 skl_clear_pin_config(soc_platform, w);
2760 skl_clear_module_cnt(ctx->dsp);
2764 * Topology core widget load callback
2766 * This is used to save the private data for each widget which gives
2767 * information to the driver about module and pipeline parameters which DSP
2768 * FW expects like ids, resource values, formats etc
2770 static int skl_tplg_widget_load(struct snd_soc_component *cmpnt,
2771 struct snd_soc_dapm_widget *w,
2772 struct snd_soc_tplg_dapm_widget *tplg_w)
2775 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
2776 struct skl *skl = ebus_to_skl(ebus);
2777 struct hdac_bus *bus = ebus_to_hbus(ebus);
2778 struct skl_module_cfg *mconfig;
2780 if (!tplg_w->priv.size)
2783 mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL);
2788 if (skl->nr_modules == 0) {
2789 mconfig->module = devm_kzalloc(bus->dev,
2790 sizeof(*mconfig->module), GFP_KERNEL);
2791 if (!mconfig->module)
2798 * module binary can be loaded later, so set it to query when
2799 * module is load for a use case
2801 mconfig->id.module_id = -1;
2803 /* Parse private data for tuples */
2804 ret = skl_tplg_get_pvt_data(tplg_w, skl, bus->dev, mconfig);
2808 skl_debug_init_module(skl->debugfs, w, mconfig);
2811 if (tplg_w->event_type == 0) {
2812 dev_dbg(bus->dev, "ASoC: No event handler required\n");
2816 ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops,
2817 ARRAY_SIZE(skl_tplg_widget_ops),
2818 tplg_w->event_type);
2821 dev_err(bus->dev, "%s: No matching event handlers found for %d\n",
2822 __func__, tplg_w->event_type);
2829 static int skl_init_algo_data(struct device *dev, struct soc_bytes_ext *be,
2830 struct snd_soc_tplg_bytes_control *bc)
2832 struct skl_algo_data *ac;
2833 struct skl_dfw_algo_data *dfw_ac =
2834 (struct skl_dfw_algo_data *)bc->priv.data;
2836 ac = devm_kzalloc(dev, sizeof(*ac), GFP_KERNEL);
2840 /* Fill private data */
2841 ac->max = dfw_ac->max;
2842 ac->param_id = dfw_ac->param_id;
2843 ac->set_params = dfw_ac->set_params;
2844 ac->size = dfw_ac->max;
2847 ac->params = (char *) devm_kzalloc(dev, ac->max, GFP_KERNEL);
2851 memcpy(ac->params, dfw_ac->params, ac->max);
2854 be->dobj.private = ac;
2858 static int skl_init_enum_data(struct device *dev, struct soc_enum *se,
2859 struct snd_soc_tplg_enum_control *ec)
2864 if (ec->priv.size) {
2865 data = devm_kzalloc(dev, sizeof(ec->priv.size), GFP_KERNEL);
2868 memcpy(data, ec->priv.data, ec->priv.size);
2869 se->dobj.private = data;
2876 static int skl_tplg_control_load(struct snd_soc_component *cmpnt,
2877 struct snd_kcontrol_new *kctl,
2878 struct snd_soc_tplg_ctl_hdr *hdr)
2880 struct soc_bytes_ext *sb;
2881 struct snd_soc_tplg_bytes_control *tplg_bc;
2882 struct snd_soc_tplg_enum_control *tplg_ec;
2883 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
2884 struct hdac_bus *bus = ebus_to_hbus(ebus);
2885 struct soc_enum *se;
2887 switch (hdr->ops.info) {
2888 case SND_SOC_TPLG_CTL_BYTES:
2889 tplg_bc = container_of(hdr,
2890 struct snd_soc_tplg_bytes_control, hdr);
2891 if (kctl->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
2892 sb = (struct soc_bytes_ext *)kctl->private_value;
2893 if (tplg_bc->priv.size)
2894 return skl_init_algo_data(
2895 bus->dev, sb, tplg_bc);
2899 case SND_SOC_TPLG_CTL_ENUM:
2900 tplg_ec = container_of(hdr,
2901 struct snd_soc_tplg_enum_control, hdr);
2902 if (kctl->access & SNDRV_CTL_ELEM_ACCESS_READWRITE) {
2903 se = (struct soc_enum *)kctl->private_value;
2904 if (tplg_ec->priv.size)
2905 return skl_init_enum_data(bus->dev, se,
2911 dev_warn(bus->dev, "Control load not supported %d:%d:%d\n",
2912 hdr->ops.get, hdr->ops.put, hdr->ops.info);
2919 static int skl_tplg_fill_str_mfest_tkn(struct device *dev,
2920 struct snd_soc_tplg_vendor_string_elem *str_elem,
2924 static int ref_count;
2926 switch (str_elem->token) {
2927 case SKL_TKN_STR_LIB_NAME:
2928 if (ref_count > skl->skl_sst->lib_count - 1) {
2933 strncpy(skl->skl_sst->lib_info[ref_count].name,
2935 ARRAY_SIZE(skl->skl_sst->lib_info[ref_count].name));
2940 dev_err(dev, "Not a string token %d\n", str_elem->token);
2948 static int skl_tplg_get_str_tkn(struct device *dev,
2949 struct snd_soc_tplg_vendor_array *array,
2952 int tkn_count = 0, ret;
2953 struct snd_soc_tplg_vendor_string_elem *str_elem;
2955 str_elem = (struct snd_soc_tplg_vendor_string_elem *)array->value;
2956 while (tkn_count < array->num_elems) {
2957 ret = skl_tplg_fill_str_mfest_tkn(dev, str_elem, skl);
2963 tkn_count = tkn_count + ret;
2969 static int skl_tplg_manifest_fill_fmt(struct device *dev,
2970 struct skl_module_iface *fmt,
2971 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
2972 u32 dir, int fmt_idx)
2974 struct skl_module_pin_fmt *dst_fmt;
2975 struct skl_module_fmt *mod_fmt;
2983 dst_fmt = &fmt->inputs[fmt_idx];
2987 dst_fmt = &fmt->outputs[fmt_idx];
2991 dev_err(dev, "Invalid direction: %d\n", dir);
2995 mod_fmt = &dst_fmt->fmt;
2997 switch (tkn_elem->token) {
2998 case SKL_TKN_MM_U32_INTF_PIN_ID:
2999 dst_fmt->id = tkn_elem->value;
3003 ret = skl_tplg_fill_fmt(dev, mod_fmt, tkn_elem->token,
3013 static int skl_tplg_fill_mod_info(struct device *dev,
3014 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
3015 struct skl_module *mod)
3021 switch (tkn_elem->token) {
3022 case SKL_TKN_U8_IN_PIN_TYPE:
3023 mod->input_pin_type = tkn_elem->value;
3026 case SKL_TKN_U8_OUT_PIN_TYPE:
3027 mod->output_pin_type = tkn_elem->value;
3030 case SKL_TKN_U8_IN_QUEUE_COUNT:
3031 mod->max_input_pins = tkn_elem->value;
3034 case SKL_TKN_U8_OUT_QUEUE_COUNT:
3035 mod->max_output_pins = tkn_elem->value;
3038 case SKL_TKN_MM_U8_NUM_RES:
3039 mod->nr_resources = tkn_elem->value;
3042 case SKL_TKN_MM_U8_NUM_INTF:
3043 mod->nr_interfaces = tkn_elem->value;
3047 dev_err(dev, "Invalid mod info token %d", tkn_elem->token);
3055 static int skl_tplg_get_int_tkn(struct device *dev,
3056 struct snd_soc_tplg_vendor_value_elem *tkn_elem,
3059 int tkn_count = 0, ret;
3060 static int mod_idx, res_val_idx, intf_val_idx, dir, pin_idx;
3061 struct skl_module_res *res = NULL;
3062 struct skl_module_iface *fmt = NULL;
3063 struct skl_module *mod = NULL;
3067 mod = skl->modules[mod_idx];
3068 res = &mod->resources[res_val_idx];
3069 fmt = &mod->formats[intf_val_idx];
3072 switch (tkn_elem->token) {
3073 case SKL_TKN_U32_LIB_COUNT:
3074 skl->skl_sst->lib_count = tkn_elem->value;
3077 case SKL_TKN_U8_NUM_MOD:
3078 skl->nr_modules = tkn_elem->value;
3079 skl->modules = devm_kcalloc(dev, skl->nr_modules,
3080 sizeof(*skl->modules), GFP_KERNEL);
3084 for (i = 0; i < skl->nr_modules; i++) {
3085 skl->modules[i] = devm_kzalloc(dev,
3086 sizeof(struct skl_module), GFP_KERNEL);
3087 if (!skl->modules[i])
3092 case SKL_TKN_MM_U8_MOD_IDX:
3093 mod_idx = tkn_elem->value;
3096 case SKL_TKN_U8_IN_PIN_TYPE:
3097 case SKL_TKN_U8_OUT_PIN_TYPE:
3098 case SKL_TKN_U8_IN_QUEUE_COUNT:
3099 case SKL_TKN_U8_OUT_QUEUE_COUNT:
3100 case SKL_TKN_MM_U8_NUM_RES:
3101 case SKL_TKN_MM_U8_NUM_INTF:
3102 ret = skl_tplg_fill_mod_info(dev, tkn_elem, mod);
3107 case SKL_TKN_U32_DIR_PIN_COUNT:
3108 dir = tkn_elem->value & SKL_IN_DIR_BIT_MASK;
3109 pin_idx = (tkn_elem->value & SKL_PIN_COUNT_MASK) >> 4;
3112 case SKL_TKN_MM_U32_RES_ID:
3116 res->id = tkn_elem->value;
3117 res_val_idx = tkn_elem->value;
3120 case SKL_TKN_MM_U32_FMT_ID:
3124 fmt->fmt_idx = tkn_elem->value;
3125 intf_val_idx = tkn_elem->value;
3128 case SKL_TKN_MM_U32_CPS:
3129 case SKL_TKN_MM_U32_DMA_SIZE:
3130 case SKL_TKN_MM_U32_CPC:
3131 case SKL_TKN_U32_MEM_PAGES:
3132 case SKL_TKN_U32_OBS:
3133 case SKL_TKN_U32_IBS:
3134 case SKL_TKN_MM_U32_RES_PIN_ID:
3135 case SKL_TKN_MM_U32_PIN_BUF:
3136 ret = skl_tplg_fill_res_tkn(dev, tkn_elem, res, pin_idx, dir);
3142 case SKL_TKN_MM_U32_NUM_IN_FMT:
3146 res->nr_input_pins = tkn_elem->value;
3149 case SKL_TKN_MM_U32_NUM_OUT_FMT:
3153 res->nr_output_pins = tkn_elem->value;
3156 case SKL_TKN_U32_FMT_CH:
3157 case SKL_TKN_U32_FMT_FREQ:
3158 case SKL_TKN_U32_FMT_BIT_DEPTH:
3159 case SKL_TKN_U32_FMT_SAMPLE_SIZE:
3160 case SKL_TKN_U32_FMT_CH_CONFIG:
3161 case SKL_TKN_U32_FMT_INTERLEAVE:
3162 case SKL_TKN_U32_FMT_SAMPLE_TYPE:
3163 case SKL_TKN_U32_FMT_CH_MAP:
3164 case SKL_TKN_MM_U32_INTF_PIN_ID:
3165 ret = skl_tplg_manifest_fill_fmt(dev, fmt, tkn_elem,
3172 dev_err(dev, "Not a manifest token %d\n", tkn_elem->token);
3180 static int skl_tplg_get_manifest_uuid(struct device *dev,
3182 struct snd_soc_tplg_vendor_uuid_elem *uuid_tkn)
3184 static int ref_count;
3185 struct skl_module *mod;
3187 if (uuid_tkn->token == SKL_TKN_UUID) {
3188 mod = skl->modules[ref_count];
3189 memcpy(&mod->uuid, &uuid_tkn->uuid, sizeof(uuid_tkn->uuid));
3192 dev_err(dev, "Not an UUID token tkn %d\n", uuid_tkn->token);
3200 * Fill the manifest structure by parsing the tokens based on the
3203 static int skl_tplg_get_manifest_tkn(struct device *dev,
3204 char *pvt_data, struct skl *skl,
3207 int tkn_count = 0, ret;
3208 int off = 0, tuple_size = 0;
3209 struct snd_soc_tplg_vendor_array *array;
3210 struct snd_soc_tplg_vendor_value_elem *tkn_elem;
3212 if (block_size <= 0)
3215 while (tuple_size < block_size) {
3216 array = (struct snd_soc_tplg_vendor_array *)(pvt_data + off);
3218 switch (array->type) {
3219 case SND_SOC_TPLG_TUPLE_TYPE_STRING:
3220 ret = skl_tplg_get_str_tkn(dev, array, skl);
3226 tuple_size += tkn_count *
3227 sizeof(struct snd_soc_tplg_vendor_string_elem);
3230 case SND_SOC_TPLG_TUPLE_TYPE_UUID:
3231 ret = skl_tplg_get_manifest_uuid(dev, skl, array->uuid);
3235 tuple_size += sizeof(*array->uuid);
3239 tkn_elem = array->value;
3244 while (tkn_count <= array->num_elems - 1) {
3245 ret = skl_tplg_get_int_tkn(dev,
3250 tkn_count = tkn_count + ret;
3253 tuple_size += (tkn_count * sizeof(*tkn_elem));
3261 * Parse manifest private data for tokens. The private data block is
3262 * preceded by descriptors for type and size of data block.
3264 static int skl_tplg_get_manifest_data(struct snd_soc_tplg_manifest *manifest,
3265 struct device *dev, struct skl *skl)
3267 struct snd_soc_tplg_vendor_array *array;
3268 int num_blocks, block_size = 0, block_type, off = 0;
3272 /* Read the NUM_DATA_BLOCKS descriptor */
3273 array = (struct snd_soc_tplg_vendor_array *)manifest->priv.data;
3274 ret = skl_tplg_get_desc_blocks(dev, array);
3280 /* Read the BLOCK_TYPE and BLOCK_SIZE descriptor */
3281 while (num_blocks > 0) {
3282 array = (struct snd_soc_tplg_vendor_array *)
3283 (manifest->priv.data + off);
3284 ret = skl_tplg_get_desc_blocks(dev, array);
3291 array = (struct snd_soc_tplg_vendor_array *)
3292 (manifest->priv.data + off);
3294 ret = skl_tplg_get_desc_blocks(dev, array);
3301 array = (struct snd_soc_tplg_vendor_array *)
3302 (manifest->priv.data + off);
3304 data = (manifest->priv.data + off);
3306 if (block_type == SKL_TYPE_TUPLE) {
3307 ret = skl_tplg_get_manifest_tkn(dev, data, skl,
3323 static int skl_manifest_load(struct snd_soc_component *cmpnt,
3324 struct snd_soc_tplg_manifest *manifest)
3326 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
3327 struct hdac_bus *bus = ebus_to_hbus(ebus);
3328 struct skl *skl = ebus_to_skl(ebus);
3330 /* proceed only if we have private data defined */
3331 if (manifest->priv.size == 0)
3334 skl_tplg_get_manifest_data(manifest, bus->dev, skl);
3336 if (skl->skl_sst->lib_count > SKL_MAX_LIB) {
3337 dev_err(bus->dev, "Exceeding max Library count. Got:%d\n",
3338 skl->skl_sst->lib_count);
3345 static struct snd_soc_tplg_ops skl_tplg_ops = {
3346 .widget_load = skl_tplg_widget_load,
3347 .control_load = skl_tplg_control_load,
3348 .bytes_ext_ops = skl_tlv_ops,
3349 .bytes_ext_ops_count = ARRAY_SIZE(skl_tlv_ops),
3350 .io_ops = skl_tplg_kcontrol_ops,
3351 .io_ops_count = ARRAY_SIZE(skl_tplg_kcontrol_ops),
3352 .manifest = skl_manifest_load,
3353 .dai_load = skl_dai_load,
3357 * A pipe can have multiple modules, each of them will be a DAPM widget as
3358 * well. While managing a pipeline we need to get the list of all the
3359 * widgets in a pipelines, so this helper - skl_tplg_create_pipe_widget_list()
3360 * helps to get the SKL type widgets in that pipeline
3362 static int skl_tplg_create_pipe_widget_list(struct snd_soc_platform *platform)
3364 struct snd_soc_dapm_widget *w;
3365 struct skl_module_cfg *mcfg = NULL;
3366 struct skl_pipe_module *p_module = NULL;
3367 struct skl_pipe *pipe;
3369 list_for_each_entry(w, &platform->component.card->widgets, list) {
3370 if (is_skl_dsp_widget_type(w) && w->priv != NULL) {
3374 p_module = devm_kzalloc(platform->dev,
3375 sizeof(*p_module), GFP_KERNEL);
3380 list_add_tail(&p_module->node, &pipe->w_list);
3387 static void skl_tplg_set_pipe_type(struct skl *skl, struct skl_pipe *pipe)
3389 struct skl_pipe_module *w_module;
3390 struct snd_soc_dapm_widget *w;
3391 struct skl_module_cfg *mconfig;
3392 bool host_found = false, link_found = false;
3394 list_for_each_entry(w_module, &pipe->w_list, node) {
3398 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
3400 else if (mconfig->dev_type != SKL_DEVICE_NONE)
3404 if (host_found && link_found)
3405 pipe->passthru = true;
3407 pipe->passthru = false;
3410 /* This will be read from topology manifest, currently defined here */
3411 #define SKL_MAX_MCPS 30000000
3412 #define SKL_FW_MAX_MEM 1000000
3415 * SKL topology init routine
3417 int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus)
3420 const struct firmware *fw;
3421 struct hdac_bus *bus = ebus_to_hbus(ebus);
3422 struct skl *skl = ebus_to_skl(ebus);
3423 struct skl_pipeline *ppl;
3425 ret = request_firmware(&fw, skl->tplg_name, bus->dev);
3427 dev_info(bus->dev, "tplg fw %s load failed with %d, falling back to dfw_sst.bin",
3428 skl->tplg_name, ret);
3429 ret = request_firmware(&fw, "dfw_sst.bin", bus->dev);
3431 dev_err(bus->dev, "Fallback tplg fw %s load failed with %d\n",
3432 "dfw_sst.bin", ret);
3438 * The complete tplg for SKL is loaded as index 0, we don't use
3441 ret = snd_soc_tplg_component_load(&platform->component,
3442 &skl_tplg_ops, fw, 0);
3444 dev_err(bus->dev, "tplg component load failed%d\n", ret);
3445 release_firmware(fw);
3449 skl->resource.max_mcps = SKL_MAX_MCPS;
3450 skl->resource.max_mem = SKL_FW_MAX_MEM;
3453 ret = skl_tplg_create_pipe_widget_list(platform);
3457 list_for_each_entry(ppl, &skl->ppl_list, node)
3458 skl_tplg_set_pipe_type(skl, ppl->pipe);