2 * skl-pcm.c -ASoC HDA Platform driver file implementing PCM functionality
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
22 #include <linux/pci.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/delay.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc.h>
28 #include "skl-topology.h"
29 #include "skl-sst-dsp.h"
30 #include "skl-sst-ipc.h"
36 static const struct snd_pcm_hardware azx_pcm_hw = {
37 .info = (SNDRV_PCM_INFO_MMAP |
38 SNDRV_PCM_INFO_INTERLEAVED |
39 SNDRV_PCM_INFO_BLOCK_TRANSFER |
40 SNDRV_PCM_INFO_MMAP_VALID |
41 SNDRV_PCM_INFO_PAUSE |
42 SNDRV_PCM_INFO_RESUME |
43 SNDRV_PCM_INFO_SYNC_START |
44 SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
45 SNDRV_PCM_INFO_HAS_LINK_ATIME |
46 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
47 .formats = SNDRV_PCM_FMTBIT_S16_LE |
48 SNDRV_PCM_FMTBIT_S32_LE |
49 SNDRV_PCM_FMTBIT_S24_LE,
50 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
56 .buffer_bytes_max = AZX_MAX_BUF_SIZE,
57 .period_bytes_min = 128,
58 .period_bytes_max = AZX_MAX_BUF_SIZE / 2,
60 .periods_max = AZX_MAX_FRAG,
65 struct hdac_ext_stream *get_hdac_ext_stream(struct snd_pcm_substream *substream)
67 return substream->runtime->private_data;
70 static struct hdac_ext_bus *get_bus_ctx(struct snd_pcm_substream *substream)
72 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
73 struct hdac_stream *hstream = hdac_stream(stream);
74 struct hdac_bus *bus = hstream->bus;
76 return hbus_to_ebus(bus);
79 static int skl_substream_alloc_pages(struct hdac_ext_bus *ebus,
80 struct snd_pcm_substream *substream,
83 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
85 hdac_stream(stream)->bufsize = 0;
86 hdac_stream(stream)->period_bytes = 0;
87 hdac_stream(stream)->format_val = 0;
89 return snd_pcm_lib_malloc_pages(substream, size);
92 static int skl_substream_free_pages(struct hdac_bus *bus,
93 struct snd_pcm_substream *substream)
95 return snd_pcm_lib_free_pages(substream);
98 static void skl_set_pcm_constrains(struct hdac_ext_bus *ebus,
99 struct snd_pcm_runtime *runtime)
101 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
103 /* avoid wrap-around with wall-clock */
104 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
108 static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_ext_bus *ebus)
110 if ((ebus_to_hbus(ebus))->ppcap)
111 return HDAC_EXT_STREAM_TYPE_HOST;
113 return HDAC_EXT_STREAM_TYPE_COUPLED;
117 * check if the stream opened is marked as ignore_suspend by machine, if so
118 * then enable suspend_active refcount
120 * The count supend_active does not need lock as it is used in open/close
121 * and suspend context
123 static void skl_set_suspend_active(struct snd_pcm_substream *substream,
124 struct snd_soc_dai *dai, bool enable)
126 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
127 struct snd_soc_dapm_widget *w;
128 struct skl *skl = ebus_to_skl(ebus);
130 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
131 w = dai->playback_widget;
133 w = dai->capture_widget;
135 if (w->ignore_suspend && enable)
136 skl->supend_active++;
137 else if (w->ignore_suspend && !enable)
138 skl->supend_active--;
141 int skl_pcm_host_dma_prepare(struct device *dev, struct skl_pipe_params *params)
143 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
144 struct hdac_bus *bus = ebus_to_hbus(ebus);
145 unsigned int format_val;
146 struct hdac_stream *hstream;
147 struct hdac_ext_stream *stream;
150 hstream = snd_hdac_get_stream(bus, params->stream,
151 params->host_dma_id + 1);
155 stream = stream_to_hdac_ext_stream(hstream);
156 snd_hdac_ext_stream_decouple(ebus, stream, true);
158 format_val = snd_hdac_calc_stream_format(params->s_freq,
159 params->ch, params->format, params->host_bps, 0);
161 dev_dbg(dev, "format_val=%d, rate=%d, ch=%d, format=%d\n",
162 format_val, params->s_freq, params->ch, params->format);
164 snd_hdac_stream_reset(hdac_stream(stream));
165 err = snd_hdac_stream_set_params(hdac_stream(stream), format_val);
169 err = snd_hdac_stream_setup(hdac_stream(stream));
173 hdac_stream(stream)->prepared = 1;
178 int skl_pcm_link_dma_prepare(struct device *dev, struct skl_pipe_params *params)
180 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
181 struct hdac_bus *bus = ebus_to_hbus(ebus);
182 unsigned int format_val;
183 struct hdac_stream *hstream;
184 struct hdac_ext_stream *stream;
185 struct hdac_ext_link *link;
187 hstream = snd_hdac_get_stream(bus, params->stream,
188 params->link_dma_id + 1);
192 stream = stream_to_hdac_ext_stream(hstream);
193 snd_hdac_ext_stream_decouple(ebus, stream, true);
194 format_val = snd_hdac_calc_stream_format(params->s_freq, params->ch,
195 params->format, params->link_bps, 0);
197 dev_dbg(dev, "format_val=%d, rate=%d, ch=%d, format=%d\n",
198 format_val, params->s_freq, params->ch, params->format);
200 snd_hdac_ext_link_stream_reset(stream);
202 snd_hdac_ext_link_stream_setup(stream, format_val);
204 list_for_each_entry(link, &ebus->hlink_list, list) {
205 if (link->index == params->link_index)
206 snd_hdac_ext_link_set_stream_id(link,
207 hstream->stream_tag);
210 stream->link_prepared = 1;
215 static int skl_pcm_open(struct snd_pcm_substream *substream,
216 struct snd_soc_dai *dai)
218 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
219 struct hdac_ext_stream *stream;
220 struct snd_pcm_runtime *runtime = substream->runtime;
221 struct skl_dma_params *dma_params;
222 struct skl *skl = get_skl_ctx(dai->dev);
223 struct skl_module_cfg *mconfig;
225 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
227 stream = snd_hdac_ext_stream_assign(ebus, substream,
228 skl_get_host_stream_type(ebus));
232 skl_set_pcm_constrains(ebus, runtime);
235 * disable WALLCLOCK timestamps for capture streams
236 * until we figure out how to handle digital inputs
238 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
239 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK; /* legacy */
240 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
243 runtime->private_data = stream;
245 dma_params = kzalloc(sizeof(*dma_params), GFP_KERNEL);
249 dma_params->stream_tag = hdac_stream(stream)->stream_tag;
250 snd_soc_dai_set_dma_data(dai, substream, dma_params);
252 dev_dbg(dai->dev, "stream tag set in dma params=%d\n",
253 dma_params->stream_tag);
254 skl_set_suspend_active(substream, dai, true);
255 snd_pcm_set_sync(substream);
257 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
261 skl_tplg_d0i3_get(skl, mconfig->d0i3_caps);
266 static int skl_pcm_prepare(struct snd_pcm_substream *substream,
267 struct snd_soc_dai *dai)
269 struct skl *skl = get_skl_ctx(dai->dev);
270 struct skl_module_cfg *mconfig;
273 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
275 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
278 * In case of XRUN recovery or in the case when the application
279 * calls prepare another time, reset the FW pipe to clean state
282 (substream->runtime->status->state == SNDRV_PCM_STATE_XRUN ||
283 mconfig->pipe->state == SKL_PIPE_CREATED ||
284 mconfig->pipe->state == SKL_PIPE_PAUSED)) {
286 ret = skl_reset_pipe(skl->skl_sst, mconfig->pipe);
291 ret = skl_pcm_host_dma_prepare(dai->dev,
292 mconfig->pipe->p_params);
300 static int skl_pcm_hw_params(struct snd_pcm_substream *substream,
301 struct snd_pcm_hw_params *params,
302 struct snd_soc_dai *dai)
304 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
305 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
306 struct snd_pcm_runtime *runtime = substream->runtime;
307 struct skl_pipe_params p_params = {0};
308 struct skl_module_cfg *m_cfg;
311 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
312 ret = skl_substream_alloc_pages(ebus, substream,
313 params_buffer_bytes(params));
317 dev_dbg(dai->dev, "format_val, rate=%d, ch=%d, format=%d\n",
318 runtime->rate, runtime->channels, runtime->format);
320 dma_id = hdac_stream(stream)->stream_tag - 1;
321 dev_dbg(dai->dev, "dma_id=%d\n", dma_id);
323 p_params.s_fmt = snd_pcm_format_width(params_format(params));
324 p_params.ch = params_channels(params);
325 p_params.s_freq = params_rate(params);
326 p_params.host_dma_id = dma_id;
327 p_params.stream = substream->stream;
328 p_params.format = params_format(params);
329 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
330 p_params.host_bps = dai->driver->playback.sig_bits;
332 p_params.host_bps = dai->driver->capture.sig_bits;
335 m_cfg = skl_tplg_fe_get_cpr_module(dai, p_params.stream);
337 skl_tplg_update_pipe_params(dai->dev, m_cfg, &p_params);
342 static void skl_pcm_close(struct snd_pcm_substream *substream,
343 struct snd_soc_dai *dai)
345 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
346 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
347 struct skl_dma_params *dma_params = NULL;
348 struct skl *skl = ebus_to_skl(ebus);
349 struct skl_module_cfg *mconfig;
351 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
353 snd_hdac_ext_stream_release(stream, skl_get_host_stream_type(ebus));
355 dma_params = snd_soc_dai_get_dma_data(dai, substream);
357 * now we should set this to NULL as we are freeing by the
360 snd_soc_dai_set_dma_data(dai, substream, NULL);
361 skl_set_suspend_active(substream, dai, false);
364 * check if close is for "Reference Pin" and set back the
365 * CGCTL.MISCBDCGE if disabled by driver
367 if (!strncmp(dai->name, "Reference Pin", 13) &&
368 skl->skl_sst->miscbdcg_disabled) {
369 skl->skl_sst->enable_miscbdcge(dai->dev, true);
370 skl->skl_sst->miscbdcg_disabled = false;
373 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
375 skl_tplg_d0i3_put(skl, mconfig->d0i3_caps);
380 static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
381 struct snd_soc_dai *dai)
383 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
384 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
385 struct skl *skl = get_skl_ctx(dai->dev);
386 struct skl_module_cfg *mconfig;
389 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
391 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
394 ret = skl_reset_pipe(skl->skl_sst, mconfig->pipe);
396 dev_err(dai->dev, "%s:Reset failed ret =%d",
400 snd_hdac_stream_cleanup(hdac_stream(stream));
401 hdac_stream(stream)->prepared = 0;
403 return skl_substream_free_pages(ebus_to_hbus(ebus), substream);
406 static int skl_be_hw_params(struct snd_pcm_substream *substream,
407 struct snd_pcm_hw_params *params,
408 struct snd_soc_dai *dai)
410 struct skl_pipe_params p_params = {0};
412 p_params.s_fmt = snd_pcm_format_width(params_format(params));
413 p_params.ch = params_channels(params);
414 p_params.s_freq = params_rate(params);
415 p_params.stream = substream->stream;
417 return skl_tplg_be_update_params(dai, &p_params);
420 static int skl_decoupled_trigger(struct snd_pcm_substream *substream,
423 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
424 struct hdac_bus *bus = ebus_to_hbus(ebus);
425 struct hdac_ext_stream *stream;
427 unsigned long cookie;
428 struct hdac_stream *hstr;
430 stream = get_hdac_ext_stream(substream);
431 hstr = hdac_stream(stream);
437 case SNDRV_PCM_TRIGGER_START:
438 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
439 case SNDRV_PCM_TRIGGER_RESUME:
443 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
444 case SNDRV_PCM_TRIGGER_SUSPEND:
445 case SNDRV_PCM_TRIGGER_STOP:
453 spin_lock_irqsave(&bus->reg_lock, cookie);
456 snd_hdac_stream_start(hdac_stream(stream), true);
457 snd_hdac_stream_timecounter_init(hstr, 0);
459 snd_hdac_stream_stop(hdac_stream(stream));
462 spin_unlock_irqrestore(&bus->reg_lock, cookie);
467 static int skl_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
468 struct snd_soc_dai *dai)
470 struct skl *skl = get_skl_ctx(dai->dev);
471 struct skl_sst *ctx = skl->skl_sst;
472 struct skl_module_cfg *mconfig;
473 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
474 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
475 struct snd_soc_dapm_widget *w;
478 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
482 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
483 w = dai->playback_widget;
485 w = dai->capture_widget;
488 case SNDRV_PCM_TRIGGER_RESUME:
489 if (!w->ignore_suspend) {
491 * enable DMA Resume enable bit for the stream, set the
492 * dpib & lpib position to resume before starting the
495 snd_hdac_ext_stream_drsm_enable(ebus, true,
496 hdac_stream(stream)->index);
497 snd_hdac_ext_stream_set_dpibr(ebus, stream,
499 snd_hdac_ext_stream_set_lpib(stream, stream->lpib);
502 case SNDRV_PCM_TRIGGER_START:
503 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
505 * Start HOST DMA and Start FE Pipe.This is to make sure that
506 * there are no underrun/overrun in the case when the FE
507 * pipeline is started but there is a delay in starting the
508 * DMA channel on the host.
510 ret = skl_decoupled_trigger(substream, cmd);
513 return skl_run_pipe(ctx, mconfig->pipe);
516 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
517 case SNDRV_PCM_TRIGGER_SUSPEND:
518 case SNDRV_PCM_TRIGGER_STOP:
520 * Stop FE Pipe first and stop DMA. This is to make sure that
521 * there are no underrun/overrun in the case if there is a delay
522 * between the two operations.
524 ret = skl_stop_pipe(ctx, mconfig->pipe);
528 ret = skl_decoupled_trigger(substream, cmd);
529 if ((cmd == SNDRV_PCM_TRIGGER_SUSPEND) && !w->ignore_suspend) {
530 /* save the dpib and lpib positions */
531 stream->dpib = readl(ebus->bus.remap_addr +
532 AZX_REG_VS_SDXDPIB_XBASE +
533 (AZX_REG_VS_SDXDPIB_XINTERVAL *
534 hdac_stream(stream)->index));
536 stream->lpib = snd_hdac_stream_get_pos_lpib(
537 hdac_stream(stream));
538 snd_hdac_ext_stream_decouple(ebus, stream, false);
549 static int skl_link_hw_params(struct snd_pcm_substream *substream,
550 struct snd_pcm_hw_params *params,
551 struct snd_soc_dai *dai)
553 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
554 struct hdac_ext_stream *link_dev;
555 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
556 struct snd_soc_dai *codec_dai = rtd->codec_dai;
557 struct skl_pipe_params p_params = {0};
558 struct hdac_ext_link *link;
561 link_dev = snd_hdac_ext_stream_assign(ebus, substream,
562 HDAC_EXT_STREAM_TYPE_LINK);
566 snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev);
568 link = snd_hdac_ext_bus_get_link(ebus, codec_dai->component->name);
572 stream_tag = hdac_stream(link_dev)->stream_tag;
574 /* set the stream tag in the codec dai dma params */
575 snd_soc_dai_set_tdm_slot(codec_dai, stream_tag, 0, 0, 0);
577 p_params.s_fmt = snd_pcm_format_width(params_format(params));
578 p_params.ch = params_channels(params);
579 p_params.s_freq = params_rate(params);
580 p_params.stream = substream->stream;
581 p_params.link_dma_id = stream_tag - 1;
582 p_params.link_index = link->index;
583 p_params.format = params_format(params);
585 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
586 p_params.link_bps = codec_dai->driver->playback.sig_bits;
588 p_params.link_bps = codec_dai->driver->capture.sig_bits;
590 return skl_tplg_be_update_params(dai, &p_params);
593 static int skl_link_pcm_prepare(struct snd_pcm_substream *substream,
594 struct snd_soc_dai *dai)
596 struct skl *skl = get_skl_ctx(dai->dev);
597 struct skl_module_cfg *mconfig = NULL;
599 /* In case of XRUN recovery, reset the FW pipe to clean state */
600 mconfig = skl_tplg_be_get_cpr_module(dai, substream->stream);
601 if (mconfig && !mconfig->pipe->passthru &&
602 (substream->runtime->status->state == SNDRV_PCM_STATE_XRUN))
603 skl_reset_pipe(skl->skl_sst, mconfig->pipe);
608 static int skl_link_pcm_trigger(struct snd_pcm_substream *substream,
609 int cmd, struct snd_soc_dai *dai)
611 struct hdac_ext_stream *link_dev =
612 snd_soc_dai_get_dma_data(dai, substream);
613 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
614 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
616 dev_dbg(dai->dev, "In %s cmd=%d\n", __func__, cmd);
618 case SNDRV_PCM_TRIGGER_RESUME:
619 case SNDRV_PCM_TRIGGER_START:
620 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
621 snd_hdac_ext_link_stream_start(link_dev);
624 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
625 case SNDRV_PCM_TRIGGER_SUSPEND:
626 case SNDRV_PCM_TRIGGER_STOP:
627 snd_hdac_ext_link_stream_clear(link_dev);
628 if (cmd == SNDRV_PCM_TRIGGER_SUSPEND)
629 snd_hdac_ext_stream_decouple(ebus, stream, false);
638 static int skl_link_hw_free(struct snd_pcm_substream *substream,
639 struct snd_soc_dai *dai)
641 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
642 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
643 struct hdac_ext_stream *link_dev =
644 snd_soc_dai_get_dma_data(dai, substream);
645 struct hdac_ext_link *link;
647 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
649 link_dev->link_prepared = 0;
651 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec_dai->component->name);
655 snd_hdac_ext_link_clear_stream_id(link, hdac_stream(link_dev)->stream_tag);
656 snd_hdac_ext_stream_release(link_dev, HDAC_EXT_STREAM_TYPE_LINK);
660 static const struct snd_soc_dai_ops skl_pcm_dai_ops = {
661 .startup = skl_pcm_open,
662 .shutdown = skl_pcm_close,
663 .prepare = skl_pcm_prepare,
664 .hw_params = skl_pcm_hw_params,
665 .hw_free = skl_pcm_hw_free,
666 .trigger = skl_pcm_trigger,
669 static const struct snd_soc_dai_ops skl_dmic_dai_ops = {
670 .hw_params = skl_be_hw_params,
673 static const struct snd_soc_dai_ops skl_be_ssp_dai_ops = {
674 .hw_params = skl_be_hw_params,
677 static const struct snd_soc_dai_ops skl_link_dai_ops = {
678 .prepare = skl_link_pcm_prepare,
679 .hw_params = skl_link_hw_params,
680 .hw_free = skl_link_hw_free,
681 .trigger = skl_link_pcm_trigger,
684 static struct snd_soc_dai_driver skl_fe_dai[] = {
686 .name = "System Pin",
687 .ops = &skl_pcm_dai_ops,
689 .stream_name = "System Playback",
690 .channels_min = HDA_MONO,
691 .channels_max = HDA_STEREO,
692 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000,
693 .formats = SNDRV_PCM_FMTBIT_S16_LE |
694 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
698 .stream_name = "System Capture",
699 .channels_min = HDA_MONO,
700 .channels_max = HDA_STEREO,
701 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
702 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
707 .name = "System Pin2",
708 .ops = &skl_pcm_dai_ops,
710 .stream_name = "Headset Playback",
711 .channels_min = HDA_MONO,
712 .channels_max = HDA_STEREO,
713 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
715 .formats = SNDRV_PCM_FMTBIT_S16_LE |
716 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
720 .name = "Echoref Pin",
721 .ops = &skl_pcm_dai_ops,
723 .stream_name = "Echoreference Capture",
724 .channels_min = HDA_STEREO,
725 .channels_max = HDA_STEREO,
726 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
728 .formats = SNDRV_PCM_FMTBIT_S16_LE |
729 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
733 .name = "Reference Pin",
734 .ops = &skl_pcm_dai_ops,
736 .stream_name = "Reference Capture",
737 .channels_min = HDA_MONO,
738 .channels_max = HDA_QUAD,
739 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
740 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
745 .name = "Deepbuffer Pin",
746 .ops = &skl_pcm_dai_ops,
748 .stream_name = "Deepbuffer Playback",
749 .channels_min = HDA_STEREO,
750 .channels_max = HDA_STEREO,
751 .rates = SNDRV_PCM_RATE_48000,
752 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
757 .name = "LowLatency Pin",
758 .ops = &skl_pcm_dai_ops,
760 .stream_name = "Low Latency Playback",
761 .channels_min = HDA_STEREO,
762 .channels_max = HDA_STEREO,
763 .rates = SNDRV_PCM_RATE_48000,
764 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
770 .ops = &skl_pcm_dai_ops,
772 .stream_name = "DMIC Capture",
773 .channels_min = HDA_MONO,
774 .channels_max = HDA_QUAD,
775 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
776 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
782 .ops = &skl_pcm_dai_ops,
784 .stream_name = "HDMI1 Playback",
785 .channels_min = HDA_STEREO,
787 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
788 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
789 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
790 SNDRV_PCM_RATE_192000,
791 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
792 SNDRV_PCM_FMTBIT_S32_LE,
798 .ops = &skl_pcm_dai_ops,
800 .stream_name = "HDMI2 Playback",
801 .channels_min = HDA_STEREO,
803 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
804 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
805 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
806 SNDRV_PCM_RATE_192000,
807 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
808 SNDRV_PCM_FMTBIT_S32_LE,
814 .ops = &skl_pcm_dai_ops,
816 .stream_name = "HDMI3 Playback",
817 .channels_min = HDA_STEREO,
819 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
820 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
821 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
822 SNDRV_PCM_RATE_192000,
823 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
824 SNDRV_PCM_FMTBIT_S32_LE,
831 static struct snd_soc_dai_driver skl_platform_dai[] = {
834 .ops = &skl_be_ssp_dai_ops,
836 .stream_name = "ssp0 Tx",
837 .channels_min = HDA_STEREO,
838 .channels_max = HDA_STEREO,
839 .rates = SNDRV_PCM_RATE_48000,
840 .formats = SNDRV_PCM_FMTBIT_S16_LE,
843 .stream_name = "ssp0 Rx",
844 .channels_min = HDA_STEREO,
845 .channels_max = HDA_STEREO,
846 .rates = SNDRV_PCM_RATE_48000,
847 .formats = SNDRV_PCM_FMTBIT_S16_LE,
852 .ops = &skl_be_ssp_dai_ops,
854 .stream_name = "ssp1 Tx",
855 .channels_min = HDA_STEREO,
856 .channels_max = HDA_STEREO,
857 .rates = SNDRV_PCM_RATE_48000,
858 .formats = SNDRV_PCM_FMTBIT_S16_LE,
861 .stream_name = "ssp1 Rx",
862 .channels_min = HDA_STEREO,
863 .channels_max = HDA_STEREO,
864 .rates = SNDRV_PCM_RATE_48000,
865 .formats = SNDRV_PCM_FMTBIT_S16_LE,
870 .ops = &skl_be_ssp_dai_ops,
872 .stream_name = "ssp2 Tx",
873 .channels_min = HDA_STEREO,
874 .channels_max = HDA_STEREO,
875 .rates = SNDRV_PCM_RATE_48000,
876 .formats = SNDRV_PCM_FMTBIT_S16_LE,
879 .stream_name = "ssp2 Rx",
880 .channels_min = HDA_STEREO,
881 .channels_max = HDA_STEREO,
882 .rates = SNDRV_PCM_RATE_48000,
883 .formats = SNDRV_PCM_FMTBIT_S16_LE,
888 .ops = &skl_be_ssp_dai_ops,
890 .stream_name = "ssp3 Tx",
891 .channels_min = HDA_STEREO,
892 .channels_max = HDA_STEREO,
893 .rates = SNDRV_PCM_RATE_48000,
894 .formats = SNDRV_PCM_FMTBIT_S16_LE,
897 .stream_name = "ssp3 Rx",
898 .channels_min = HDA_STEREO,
899 .channels_max = HDA_STEREO,
900 .rates = SNDRV_PCM_RATE_48000,
901 .formats = SNDRV_PCM_FMTBIT_S16_LE,
906 .ops = &skl_be_ssp_dai_ops,
908 .stream_name = "ssp4 Tx",
909 .channels_min = HDA_STEREO,
910 .channels_max = HDA_STEREO,
911 .rates = SNDRV_PCM_RATE_48000,
912 .formats = SNDRV_PCM_FMTBIT_S16_LE,
915 .stream_name = "ssp4 Rx",
916 .channels_min = HDA_STEREO,
917 .channels_max = HDA_STEREO,
918 .rates = SNDRV_PCM_RATE_48000,
919 .formats = SNDRV_PCM_FMTBIT_S16_LE,
924 .ops = &skl_be_ssp_dai_ops,
926 .stream_name = "ssp5 Tx",
927 .channels_min = HDA_STEREO,
928 .channels_max = HDA_STEREO,
929 .rates = SNDRV_PCM_RATE_48000,
930 .formats = SNDRV_PCM_FMTBIT_S16_LE,
933 .stream_name = "ssp5 Rx",
934 .channels_min = HDA_STEREO,
935 .channels_max = HDA_STEREO,
936 .rates = SNDRV_PCM_RATE_48000,
937 .formats = SNDRV_PCM_FMTBIT_S16_LE,
941 .name = "iDisp1 Pin",
942 .ops = &skl_link_dai_ops,
944 .stream_name = "iDisp1 Tx",
945 .channels_min = HDA_STEREO,
947 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000,
948 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
949 SNDRV_PCM_FMTBIT_S24_LE,
953 .name = "iDisp2 Pin",
954 .ops = &skl_link_dai_ops,
956 .stream_name = "iDisp2 Tx",
957 .channels_min = HDA_STEREO,
959 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
960 SNDRV_PCM_RATE_48000,
961 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
962 SNDRV_PCM_FMTBIT_S24_LE,
966 .name = "iDisp3 Pin",
967 .ops = &skl_link_dai_ops,
969 .stream_name = "iDisp3 Tx",
970 .channels_min = HDA_STEREO,
972 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
973 SNDRV_PCM_RATE_48000,
974 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
975 SNDRV_PCM_FMTBIT_S24_LE,
979 .name = "DMIC01 Pin",
980 .ops = &skl_dmic_dai_ops,
982 .stream_name = "DMIC01 Rx",
983 .channels_min = HDA_MONO,
984 .channels_max = HDA_QUAD,
985 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
986 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
990 .name = "DMIC16k Pin",
991 .ops = &skl_dmic_dai_ops,
993 .stream_name = "DMIC16k Rx",
994 .channels_min = HDA_MONO,
995 .channels_max = HDA_QUAD,
996 .rates = SNDRV_PCM_RATE_16000,
997 .formats = SNDRV_PCM_FMTBIT_S16_LE,
1001 .name = "HD-Codec Pin",
1002 .ops = &skl_link_dai_ops,
1004 .stream_name = "HD-Codec Tx",
1005 .channels_min = HDA_STEREO,
1006 .channels_max = HDA_STEREO,
1007 .rates = SNDRV_PCM_RATE_48000,
1008 .formats = SNDRV_PCM_FMTBIT_S16_LE,
1011 .stream_name = "HD-Codec Rx",
1012 .channels_min = HDA_STEREO,
1013 .channels_max = HDA_STEREO,
1014 .rates = SNDRV_PCM_RATE_48000,
1015 .formats = SNDRV_PCM_FMTBIT_S16_LE,
1020 int skl_dai_load(struct snd_soc_component *cmp,
1021 struct snd_soc_dai_driver *pcm_dai)
1023 pcm_dai->ops = &skl_pcm_dai_ops;
1028 static int skl_platform_open(struct snd_pcm_substream *substream)
1030 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1031 struct snd_soc_dai_link *dai_link = rtd->dai_link;
1033 dev_dbg(rtd->cpu_dai->dev, "In %s:%s\n", __func__,
1034 dai_link->cpu_dai_name);
1036 snd_soc_set_runtime_hwparams(substream, &azx_pcm_hw);
1041 static int skl_coupled_trigger(struct snd_pcm_substream *substream,
1044 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
1045 struct hdac_bus *bus = ebus_to_hbus(ebus);
1046 struct hdac_ext_stream *stream;
1047 struct snd_pcm_substream *s;
1050 unsigned long cookie;
1051 struct hdac_stream *hstr;
1053 stream = get_hdac_ext_stream(substream);
1054 hstr = hdac_stream(stream);
1056 dev_dbg(bus->dev, "In %s cmd=%d\n", __func__, cmd);
1058 if (!hstr->prepared)
1062 case SNDRV_PCM_TRIGGER_START:
1063 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1064 case SNDRV_PCM_TRIGGER_RESUME:
1068 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1069 case SNDRV_PCM_TRIGGER_SUSPEND:
1070 case SNDRV_PCM_TRIGGER_STOP:
1078 snd_pcm_group_for_each_entry(s, substream) {
1079 if (s->pcm->card != substream->pcm->card)
1081 stream = get_hdac_ext_stream(s);
1082 sbits |= 1 << hdac_stream(stream)->index;
1083 snd_pcm_trigger_done(s, substream);
1086 spin_lock_irqsave(&bus->reg_lock, cookie);
1088 /* first, set SYNC bits of corresponding streams */
1089 snd_hdac_stream_sync_trigger(hstr, true, sbits, AZX_REG_SSYNC);
1091 snd_pcm_group_for_each_entry(s, substream) {
1092 if (s->pcm->card != substream->pcm->card)
1094 stream = get_hdac_ext_stream(s);
1096 snd_hdac_stream_start(hdac_stream(stream), true);
1098 snd_hdac_stream_stop(hdac_stream(stream));
1100 spin_unlock_irqrestore(&bus->reg_lock, cookie);
1102 snd_hdac_stream_sync(hstr, start, sbits);
1104 spin_lock_irqsave(&bus->reg_lock, cookie);
1106 /* reset SYNC bits */
1107 snd_hdac_stream_sync_trigger(hstr, false, sbits, AZX_REG_SSYNC);
1109 snd_hdac_stream_timecounter_init(hstr, sbits);
1110 spin_unlock_irqrestore(&bus->reg_lock, cookie);
1115 static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream,
1118 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
1120 if (!(ebus_to_hbus(ebus))->ppcap)
1121 return skl_coupled_trigger(substream, cmd);
1126 static snd_pcm_uframes_t skl_platform_pcm_pointer
1127 (struct snd_pcm_substream *substream)
1129 struct hdac_ext_stream *hstream = get_hdac_ext_stream(substream);
1130 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
1134 * Use DPIB for Playback stream as the periodic DMA Position-in-
1135 * Buffer Writes may be scheduled at the same time or later than
1136 * the MSI and does not guarantee to reflect the Position of the
1137 * last buffer that was transferred. Whereas DPIB register in
1138 * HAD space reflects the actual data that is transferred.
1139 * Use the position buffer for capture, as DPIB write gets
1140 * completed earlier than the actual data written to the DDR.
1142 * For capture stream following workaround is required to fix the
1143 * incorrect position reporting.
1145 * 1. Wait for 20us before reading the DMA position in buffer once
1146 * the interrupt is generated for stream completion as update happens
1147 * on the HDA frame boundary i.e. 20.833uSec.
1148 * 2. Read DPIB register to flush the DMA position value. This dummy
1149 * read is required to flush DMA position value.
1150 * 3. Read the DMA Position-in-Buffer. This value now will be equal to
1151 * or greater than period boundary.
1154 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1155 pos = readl(ebus->bus.remap_addr + AZX_REG_VS_SDXDPIB_XBASE +
1156 (AZX_REG_VS_SDXDPIB_XINTERVAL *
1157 hdac_stream(hstream)->index));
1160 readl(ebus->bus.remap_addr +
1161 AZX_REG_VS_SDXDPIB_XBASE +
1162 (AZX_REG_VS_SDXDPIB_XINTERVAL *
1163 hdac_stream(hstream)->index));
1164 pos = snd_hdac_stream_get_pos_posbuf(hdac_stream(hstream));
1167 if (pos >= hdac_stream(hstream)->bufsize)
1170 return bytes_to_frames(substream->runtime, pos);
1173 static u64 skl_adjust_codec_delay(struct snd_pcm_substream *substream,
1176 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
1177 struct snd_soc_dai *codec_dai = rtd->codec_dai;
1178 u64 codec_frames, codec_nsecs;
1180 if (!codec_dai->driver->ops->delay)
1183 codec_frames = codec_dai->driver->ops->delay(substream, codec_dai);
1184 codec_nsecs = div_u64(codec_frames * 1000000000LL,
1185 substream->runtime->rate);
1187 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
1188 return nsec + codec_nsecs;
1190 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
1193 static int skl_get_time_info(struct snd_pcm_substream *substream,
1194 struct timespec *system_ts, struct timespec *audio_ts,
1195 struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
1196 struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
1198 struct hdac_ext_stream *sstream = get_hdac_ext_stream(substream);
1199 struct hdac_stream *hstr = hdac_stream(sstream);
1202 if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
1203 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
1205 snd_pcm_gettime(substream->runtime, system_ts);
1207 nsec = timecounter_read(&hstr->tc);
1208 nsec = div_u64(nsec, 3); /* can be optimized */
1209 if (audio_tstamp_config->report_delay)
1210 nsec = skl_adjust_codec_delay(substream, nsec);
1212 *audio_ts = ns_to_timespec(nsec);
1214 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
1215 audio_tstamp_report->accuracy_report = 1; /* rest of struct is valid */
1216 audio_tstamp_report->accuracy = 42; /* 24MHzWallClk == 42ns resolution */
1219 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
1225 static const struct snd_pcm_ops skl_platform_ops = {
1226 .open = skl_platform_open,
1227 .ioctl = snd_pcm_lib_ioctl,
1228 .trigger = skl_platform_pcm_trigger,
1229 .pointer = skl_platform_pcm_pointer,
1230 .get_time_info = skl_get_time_info,
1231 .mmap = snd_pcm_lib_default_mmap,
1232 .page = snd_pcm_sgbuf_ops_page,
1235 static void skl_pcm_free(struct snd_pcm *pcm)
1237 snd_pcm_lib_preallocate_free_for_all(pcm);
1240 #define MAX_PREALLOC_SIZE (32 * 1024 * 1024)
1242 static int skl_pcm_new(struct snd_soc_pcm_runtime *rtd)
1244 struct snd_soc_dai *dai = rtd->cpu_dai;
1245 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
1246 struct snd_pcm *pcm = rtd->pcm;
1249 struct skl *skl = ebus_to_skl(ebus);
1251 if (dai->driver->playback.channels_min ||
1252 dai->driver->capture.channels_min) {
1253 /* buffer pre-allocation */
1254 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
1255 if (size > MAX_PREALLOC_SIZE)
1256 size = MAX_PREALLOC_SIZE;
1257 retval = snd_pcm_lib_preallocate_pages_for_all(pcm,
1258 SNDRV_DMA_TYPE_DEV_SG,
1259 snd_dma_pci_data(skl->pci),
1260 size, MAX_PREALLOC_SIZE);
1262 dev_err(dai->dev, "dma buffer allocation fail\n");
1270 static int skl_get_module_info(struct skl *skl, struct skl_module_cfg *mconfig)
1272 struct skl_sst *ctx = skl->skl_sst;
1273 struct skl_module_inst_id *pin_id;
1274 uuid_le *uuid_mod, *uuid_tplg;
1275 struct skl_module *skl_module;
1276 struct uuid_module *module;
1279 uuid_mod = (uuid_le *)mconfig->guid;
1281 if (list_empty(&ctx->uuid_list)) {
1282 dev_err(ctx->dev, "Module list is empty\n");
1286 list_for_each_entry(module, &ctx->uuid_list, list) {
1287 if (uuid_le_cmp(*uuid_mod, module->uuid) == 0) {
1288 mconfig->id.module_id = module->id;
1289 if (mconfig->module)
1290 mconfig->module->loadable = module->is_loadable;
1299 uuid_mod = &module->uuid;
1301 for (i = 0; i < skl->nr_modules; i++) {
1302 skl_module = skl->modules[i];
1303 uuid_tplg = &skl_module->uuid;
1304 if (!uuid_le_cmp(*uuid_mod, *uuid_tplg)) {
1305 mconfig->module = skl_module;
1310 if (skl->nr_modules && ret)
1313 list_for_each_entry(module, &ctx->uuid_list, list) {
1314 for (i = 0; i < MAX_IN_QUEUE; i++) {
1315 pin_id = &mconfig->m_in_pin[i].id;
1316 if (!uuid_le_cmp(pin_id->mod_uuid, module->uuid))
1317 pin_id->module_id = module->id;
1320 for (i = 0; i < MAX_OUT_QUEUE; i++) {
1321 pin_id = &mconfig->m_out_pin[i].id;
1322 if (!uuid_le_cmp(pin_id->mod_uuid, module->uuid))
1323 pin_id->module_id = module->id;
1330 static int skl_populate_modules(struct skl *skl)
1332 struct skl_pipeline *p;
1333 struct skl_pipe_module *m;
1334 struct snd_soc_dapm_widget *w;
1335 struct skl_module_cfg *mconfig;
1338 list_for_each_entry(p, &skl->ppl_list, node) {
1339 list_for_each_entry(m, &p->pipe->w_list, node) {
1343 ret = skl_get_module_info(skl, mconfig);
1345 dev_err(skl->skl_sst->dev,
1346 "query module info failed\n");
1350 skl_tplg_add_moduleid_in_bind_params(skl, w);
1357 static int skl_platform_soc_probe(struct snd_soc_component *component)
1359 struct hdac_ext_bus *ebus = dev_get_drvdata(component->dev);
1360 struct skl *skl = ebus_to_skl(ebus);
1361 const struct skl_dsp_ops *ops;
1364 pm_runtime_get_sync(component->dev);
1365 if ((ebus_to_hbus(ebus))->ppcap) {
1366 skl->component = component;
1369 skl->debugfs = skl_debugfs_init(skl);
1371 ret = skl_tplg_init(component, ebus);
1373 dev_err(component->dev, "Failed to init topology!\n");
1377 /* load the firmwares, since all is set */
1378 ops = skl_get_dsp_ops(skl->pci->device);
1382 if (skl->skl_sst->is_first_boot == false) {
1383 dev_err(component->dev, "DSP reports first boot done!!!\n");
1388 * Disable dynamic clock and power gating during firmware
1389 * and library download
1391 skl->skl_sst->enable_miscbdcge(component->dev, false);
1392 skl->skl_sst->clock_power_gating(component->dev, false);
1394 ret = ops->init_fw(component->dev, skl->skl_sst);
1395 skl->skl_sst->enable_miscbdcge(component->dev, true);
1396 skl->skl_sst->clock_power_gating(component->dev, true);
1398 dev_err(component->dev, "Failed to boot first fw: %d\n", ret);
1401 skl_populate_modules(skl);
1402 skl->skl_sst->update_d0i3c = skl_update_d0i3c;
1403 skl_dsp_enable_notification(skl->skl_sst, false);
1405 if (skl->cfg.astate_cfg != NULL) {
1406 skl_dsp_set_astate_cfg(skl->skl_sst,
1407 skl->cfg.astate_cfg->count,
1408 skl->cfg.astate_cfg);
1411 pm_runtime_mark_last_busy(component->dev);
1412 pm_runtime_put_autosuspend(component->dev);
1417 static const struct snd_soc_component_driver skl_component = {
1419 .probe = skl_platform_soc_probe,
1420 .ops = &skl_platform_ops,
1421 .pcm_new = skl_pcm_new,
1422 .pcm_free = skl_pcm_free,
1425 int skl_platform_register(struct device *dev)
1428 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
1429 struct skl *skl = ebus_to_skl(ebus);
1430 struct snd_soc_dai_driver *dais;
1431 int num_dais = ARRAY_SIZE(skl_platform_dai);
1433 INIT_LIST_HEAD(&skl->ppl_list);
1434 INIT_LIST_HEAD(&skl->bind_list);
1436 skl->dais = kmemdup(skl_platform_dai, sizeof(skl_platform_dai),
1443 if (!skl->use_tplg_pcm) {
1444 dais = krealloc(skl->dais, sizeof(skl_fe_dai) +
1445 sizeof(skl_platform_dai), GFP_KERNEL);
1452 memcpy(&skl->dais[ARRAY_SIZE(skl_platform_dai)], skl_fe_dai,
1453 sizeof(skl_fe_dai));
1454 num_dais += ARRAY_SIZE(skl_fe_dai);
1457 ret = devm_snd_soc_register_component(dev, &skl_component,
1458 skl->dais, num_dais);
1460 dev_err(dev, "soc component registration failed %d\n", ret);
1465 int skl_platform_unregister(struct device *dev)
1467 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
1468 struct skl *skl = ebus_to_skl(ebus);
1469 struct skl_module_deferred_bind *modules, *tmp;
1471 if (!list_empty(&skl->bind_list)) {
1472 list_for_each_entry_safe(modules, tmp, &skl->bind_list, node) {
1473 list_del(&modules->node);