sound/soc/intel/skylake/skl-pcm.c

   1 /*
   2  *  skl-pcm.c -ASoC HDA Platform driver file implementing PCM functionality
   3  *
   4  *  Copyright (C) 2014-2015 Intel Corp
   5  *  Author:  Jeeja KP <jeeja.kp@intel.com>
   6  *
   7  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   8  *
   9  *  This program is free software; you can redistribute it and/or modify
  10  *  it under the terms of the GNU General Public License as published by
  11  *  the Free Software Foundation; version 2 of the License.
  12  *
  13  *  This program is distributed in the hope that it will be useful, but
  14  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  *  General Public License for more details.
  17  *
  18  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  19  *
  20  */
  21
  22 #include <linux/pci.h>
  23 #include <linux/pm_runtime.h>
  24 #include <sound/pcm_params.h>
  25 #include <sound/soc.h>
  26 #include "skl.h"
  27 #include "skl-topology.h"
  28 #include "skl-sst-dsp.h"
  29 #include "skl-sst-ipc.h"
  30
  31 #define HDA_MONO 1
  32 #define HDA_STEREO 2
  33 #define HDA_QUAD 4
  34
  35 static struct snd_pcm_hardware azx_pcm_hw = {
  36         .info =                 (SNDRV_PCM_INFO_MMAP |
  37                                  SNDRV_PCM_INFO_INTERLEAVED |
  38                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
  39                                  SNDRV_PCM_INFO_MMAP_VALID |
  40                                  SNDRV_PCM_INFO_PAUSE |
  41                                  SNDRV_PCM_INFO_RESUME |
  42                                  SNDRV_PCM_INFO_SYNC_START |
  43                                  SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
  44                                  SNDRV_PCM_INFO_HAS_LINK_ATIME |
  45                                  SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
  46         .formats =              SNDRV_PCM_FMTBIT_S16_LE |
  47                                 SNDRV_PCM_FMTBIT_S32_LE |
  48                                 SNDRV_PCM_FMTBIT_S24_LE,
  49         .rates =                SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
  50                                 SNDRV_PCM_RATE_8000,
  51         .rate_min =             8000,
  52         .rate_max =             48000,
  53         .channels_min =         1,
  54         .channels_max =         8,
  55         .buffer_bytes_max =     AZX_MAX_BUF_SIZE,
  56         .period_bytes_min =     128,
  57         .period_bytes_max =     AZX_MAX_BUF_SIZE / 2,
  58         .periods_min =          2,
  59         .periods_max =          AZX_MAX_FRAG,
  60         .fifo_size =            0,
  61 };
  62
  63 static inline
  64 struct hdac_ext_stream *get_hdac_ext_stream(struct snd_pcm_substream *substream)
  65 {
  66         return substream->runtime->private_data;
  67 }
  68
  69 static struct hdac_ext_bus *get_bus_ctx(struct snd_pcm_substream *substream)
  70 {
  71         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
  72         struct hdac_stream *hstream = hdac_stream(stream);
  73         struct hdac_bus *bus = hstream->bus;
  74
  75         return hbus_to_ebus(bus);
  76 }
  77
  78 static int skl_substream_alloc_pages(struct hdac_ext_bus *ebus,
  79                                  struct snd_pcm_substream *substream,
  80                                  size_t size)
  81 {
  82         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
  83
  84         hdac_stream(stream)->bufsize = 0;
  85         hdac_stream(stream)->period_bytes = 0;
  86         hdac_stream(stream)->format_val = 0;
  87
  88         return snd_pcm_lib_malloc_pages(substream, size);
  89 }
  90
  91 static int skl_substream_free_pages(struct hdac_bus *bus,
  92                                 struct snd_pcm_substream *substream)
  93 {
  94         return snd_pcm_lib_free_pages(substream);
  95 }
  96
  97 static void skl_set_pcm_constrains(struct hdac_ext_bus *ebus,
  98                                  struct snd_pcm_runtime *runtime)
  99 {
 100         snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
 101
 102         /* avoid wrap-around with wall-clock */
 103         snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
 104                                      20, 178000000);
 105 }
 106
 107 static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_ext_bus *ebus)
 108 {
 109         if (ebus->ppcap)
 110                 return HDAC_EXT_STREAM_TYPE_HOST;
 111         else
 112                 return HDAC_EXT_STREAM_TYPE_COUPLED;
 113 }
 114
 115 /*
 116  * check if the stream opened is marked as ignore_suspend by machine, if so
 117  * then enable suspend_active refcount
 118  *
 119  * The count supend_active does not need lock as it is used in open/close
 120  * and suspend context
 121  */
 122 static void skl_set_suspend_active(struct snd_pcm_substream *substream,
 123                                          struct snd_soc_dai *dai, bool enable)
 124 {
 125         struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
 126         struct snd_soc_dapm_widget *w;
 127         struct skl *skl = ebus_to_skl(ebus);
 128
 129         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 130                 w = dai->playback_widget;
 131         else
 132                 w = dai->capture_widget;
 133
 134         if (w->ignore_suspend && enable)
 135                 skl->supend_active++;
 136         else if (w->ignore_suspend && !enable)
 137                 skl->supend_active--;
 138 }
 139
 140 static int skl_pcm_open(struct snd_pcm_substream *substream,
 141                 struct snd_soc_dai *dai)
 142 {
 143         struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
 144         struct hdac_ext_stream *stream;
 145         struct snd_pcm_runtime *runtime = substream->runtime;
 146         struct skl_dma_params *dma_params;
 147
 148         dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
 149
 150         stream = snd_hdac_ext_stream_assign(ebus, substream,
 151                                         skl_get_host_stream_type(ebus));
 152         if (stream == NULL)
 153                 return -EBUSY;
 154
 155         skl_set_pcm_constrains(ebus, runtime);
 156
 157         /*
 158          * disable WALLCLOCK timestamps for capture streams
 159          * until we figure out how to handle digital inputs
 160          */
 161         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
 162                 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK; /* legacy */
 163                 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
 164         }
 165
 166         runtime->private_data = stream;
 167
 168         dma_params = kzalloc(sizeof(*dma_params), GFP_KERNEL);
 169         if (!dma_params)
 170                 return -ENOMEM;
 171
 172         dma_params->stream_tag = hdac_stream(stream)->stream_tag;
 173         snd_soc_dai_set_dma_data(dai, substream, dma_params);
 174
 175         dev_dbg(dai->dev, "stream tag set in dma params=%d\n",
 176                                  dma_params->stream_tag);
 177         skl_set_suspend_active(substream, dai, true);
 178         snd_pcm_set_sync(substream);
 179
 180         return 0;
 181 }
 182
 183 static int skl_get_format(struct snd_pcm_substream *substream,
 184                 struct snd_soc_dai *dai)
 185 {
 186         struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
 187         struct skl_dma_params *dma_params;
 188         struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
 189         int format_val = 0;
 190
 191         if (ebus->ppcap) {
 192                 struct snd_pcm_runtime *runtime = substream->runtime;
 193
 194                 format_val = snd_hdac_calc_stream_format(runtime->rate,
 195                                                 runtime->channels,
 196                                                 runtime->format,
 197                                                 32, 0);
 198         } else {
 199                 struct snd_soc_dai *codec_dai = rtd->codec_dai;
 200
 201                 dma_params = snd_soc_dai_get_dma_data(codec_dai, substream);
 202                 if (dma_params)
 203                         format_val = dma_params->format;
 204         }
 205
 206         return format_val;
 207 }
 208
 209 static int skl_be_prepare(struct snd_pcm_substream *substream,
 210                 struct snd_soc_dai *dai)
 211 {
 212         struct skl *skl = get_skl_ctx(dai->dev);
 213         struct skl_sst *ctx = skl->skl_sst;
 214         struct skl_module_cfg *mconfig;
 215
 216         if (dai->playback_widget->power || dai->capture_widget->power)
 217                 return 0;
 218
 219         mconfig = skl_tplg_be_get_cpr_module(dai, substream->stream);
 220         if (mconfig == NULL)
 221                 return -EINVAL;
 222
 223         return skl_dsp_set_dma_control(ctx, mconfig);
 224 }
 225
 226 static int skl_pcm_prepare(struct snd_pcm_substream *substream,
 227                 struct snd_soc_dai *dai)
 228 {
 229         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
 230         struct skl *skl = get_skl_ctx(dai->dev);
 231         unsigned int format_val;
 232         int err;
 233         struct skl_module_cfg *mconfig;
 234
 235         dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
 236
 237         mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
 238
 239         format_val = skl_get_format(substream, dai);
 240         dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d\n",
 241                                 hdac_stream(stream)->stream_tag, format_val);
 242         snd_hdac_stream_reset(hdac_stream(stream));
 243
 244         /* In case of XRUN recovery, reset the FW pipe to clean state */
 245         if (mconfig && (substream->runtime->status->state ==
 246                                         SNDRV_PCM_STATE_XRUN))
 247                 skl_reset_pipe(skl->skl_sst, mconfig->pipe);
 248
 249         err = snd_hdac_stream_set_params(hdac_stream(stream), format_val);
 250         if (err < 0)
 251                 return err;
 252
 253         err = snd_hdac_stream_setup(hdac_stream(stream));
 254         if (err < 0)
 255                 return err;
 256
 257         hdac_stream(stream)->prepared = 1;
 258
 259         return err;
 260 }
 261
 262 static int skl_pcm_hw_params(struct snd_pcm_substream *substream,
 263                                 struct snd_pcm_hw_params *params,
 264                                 struct snd_soc_dai *dai)
 265 {
 266         struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
 267         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
 268         struct snd_pcm_runtime *runtime = substream->runtime;
 269         struct skl_pipe_params p_params = {0};
 270         struct skl_module_cfg *m_cfg;
 271         int ret, dma_id;
 272
 273         dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
 274         ret = skl_substream_alloc_pages(ebus, substream,
 275                                           params_buffer_bytes(params));
 276         if (ret < 0)
 277                 return ret;
 278
 279         dev_dbg(dai->dev, "format_val, rate=%d, ch=%d, format=%d\n",
 280                         runtime->rate, runtime->channels, runtime->format);
 281
 282         dma_id = hdac_stream(stream)->stream_tag - 1;
 283         dev_dbg(dai->dev, "dma_id=%d\n", dma_id);
 284
 285         p_params.s_fmt = snd_pcm_format_width(params_format(params));
 286         p_params.ch = params_channels(params);
 287         p_params.s_freq = params_rate(params);
 288         p_params.host_dma_id = dma_id;
 289         p_params.stream = substream->stream;
 290
 291         m_cfg = skl_tplg_fe_get_cpr_module(dai, p_params.stream);
 292         if (m_cfg)
 293                 skl_tplg_update_pipe_params(dai->dev, m_cfg, &p_params);
 294
 295         return 0;
 296 }
 297
 298 static void skl_pcm_close(struct snd_pcm_substream *substream,
 299                 struct snd_soc_dai *dai)
 300 {
 301         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
 302         struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
 303         struct skl_dma_params *dma_params = NULL;
 304         struct skl *skl = ebus_to_skl(ebus);
 305
 306         dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
 307
 308         snd_hdac_ext_stream_release(stream, skl_get_host_stream_type(ebus));
 309
 310         dma_params = snd_soc_dai_get_dma_data(dai, substream);
 311         /*
 312          * now we should set this to NULL as we are freeing by the
 313          * dma_params
 314          */
 315         snd_soc_dai_set_dma_data(dai, substream, NULL);
 316         skl_set_suspend_active(substream, dai, false);
 317
 318         /*
 319          * check if close is for "Reference Pin" and set back the
 320          * CGCTL.MISCBDCGE if disabled by driver
 321          */
 322         if (!strncmp(dai->name, "Reference Pin", 13) &&
 323                         skl->skl_sst->miscbdcg_disabled) {
 324                 skl->skl_sst->enable_miscbdcge(dai->dev, true);
 325                 skl->skl_sst->miscbdcg_disabled = false;
 326         }
 327
 328         kfree(dma_params);
 329 }
 330
 331 static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
 332                 struct snd_soc_dai *dai)
 333 {
 334         struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
 335         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
 336
 337         dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
 338
 339         snd_hdac_stream_cleanup(hdac_stream(stream));
 340         hdac_stream(stream)->prepared = 0;
 341
 342         return skl_substream_free_pages(ebus_to_hbus(ebus), substream);
 343 }
 344
 345 static int skl_be_hw_params(struct snd_pcm_substream *substream,
 346                                 struct snd_pcm_hw_params *params,
 347                                 struct snd_soc_dai *dai)
 348 {
 349         struct skl_pipe_params p_params = {0};
 350
 351         p_params.s_fmt = snd_pcm_format_width(params_format(params));
 352         p_params.ch = params_channels(params);
 353         p_params.s_freq = params_rate(params);
 354         p_params.stream = substream->stream;
 355
 356         return skl_tplg_be_update_params(dai, &p_params);
 357 }
 358
 359 static int skl_decoupled_trigger(struct snd_pcm_substream *substream,
 360                 int cmd)
 361 {
 362         struct hdac_ext_bus *ebus = get_bus_ctx(substream);
 363         struct hdac_bus *bus = ebus_to_hbus(ebus);
 364         struct hdac_ext_stream *stream;
 365         int start;
 366         unsigned long cookie;
 367         struct hdac_stream *hstr;
 368
 369         stream = get_hdac_ext_stream(substream);
 370         hstr = hdac_stream(stream);
 371
 372         if (!hstr->prepared)
 373                 return -EPIPE;
 374
 375         switch (cmd) {
 376         case SNDRV_PCM_TRIGGER_START:
 377         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 378         case SNDRV_PCM_TRIGGER_RESUME:
 379                 start = 1;
 380                 break;
 381
 382         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 383         case SNDRV_PCM_TRIGGER_SUSPEND:
 384         case SNDRV_PCM_TRIGGER_STOP:
 385                 start = 0;
 386                 break;
 387
 388         default:
 389                 return -EINVAL;
 390         }
 391
 392         spin_lock_irqsave(&bus->reg_lock, cookie);
 393
 394         if (start) {
 395                 snd_hdac_stream_start(hdac_stream(stream), true);
 396                 snd_hdac_stream_timecounter_init(hstr, 0);
 397         } else {
 398                 snd_hdac_stream_stop(hdac_stream(stream));
 399         }
 400
 401         spin_unlock_irqrestore(&bus->reg_lock, cookie);
 402
 403         return 0;
 404 }
 405
 406 static int skl_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
 407                 struct snd_soc_dai *dai)
 408 {
 409         struct skl *skl = get_skl_ctx(dai->dev);
 410         struct skl_sst *ctx = skl->skl_sst;
 411         struct skl_module_cfg *mconfig;
 412         struct hdac_ext_bus *ebus = get_bus_ctx(substream);
 413         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
 414         struct snd_soc_dapm_widget *w;
 415         int ret;
 416
 417         mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
 418         if (!mconfig)
 419                 return -EIO;
 420
 421         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 422                 w = dai->playback_widget;
 423         else
 424                 w = dai->capture_widget;
 425
 426         switch (cmd) {
 427         case SNDRV_PCM_TRIGGER_RESUME:
 428                 if (!w->ignore_suspend) {
 429                         skl_pcm_prepare(substream, dai);
 430                         /*
 431                          * enable DMA Resume enable bit for the stream, set the
 432                          * dpib & lpib position to resume before starting the
 433                          * DMA
 434                          */
 435                         snd_hdac_ext_stream_drsm_enable(ebus, true,
 436                                                 hdac_stream(stream)->index);
 437                         snd_hdac_ext_stream_set_dpibr(ebus, stream,
 438                                                         stream->dpib);
 439                         snd_hdac_ext_stream_set_lpib(stream, stream->lpib);
 440                 }
 441
 442         case SNDRV_PCM_TRIGGER_START:
 443         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 444                 /*
 445                  * Start HOST DMA and Start FE Pipe.This is to make sure that
 446                  * there are no underrun/overrun in the case when the FE
 447                  * pipeline is started but there is a delay in starting the
 448                  * DMA channel on the host.
 449                  */
 450                 snd_hdac_ext_stream_decouple(ebus, stream, true);
 451                 ret = skl_decoupled_trigger(substream, cmd);
 452                 if (ret < 0)
 453                         return ret;
 454                 return skl_run_pipe(ctx, mconfig->pipe);
 455                 break;
 456
 457         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 458         case SNDRV_PCM_TRIGGER_SUSPEND:
 459         case SNDRV_PCM_TRIGGER_STOP:
 460                 /*
 461                  * Stop FE Pipe first and stop DMA. This is to make sure that
 462                  * there are no underrun/overrun in the case if there is a delay
 463                  * between the two operations.
 464                  */
 465                 ret = skl_stop_pipe(ctx, mconfig->pipe);
 466                 if (ret < 0)
 467                         return ret;
 468
 469                 ret = skl_decoupled_trigger(substream, cmd);
 470                 if ((cmd == SNDRV_PCM_TRIGGER_SUSPEND) && !w->ignore_suspend) {
 471                         /* save the dpib and lpib positions */
 472                         stream->dpib = readl(ebus->bus.remap_addr +
 473                                         AZX_REG_VS_SDXDPIB_XBASE +
 474                                         (AZX_REG_VS_SDXDPIB_XINTERVAL *
 475                                         hdac_stream(stream)->index));
 476
 477                         stream->lpib = snd_hdac_stream_get_pos_lpib(
 478                                                         hdac_stream(stream));
 479                         snd_hdac_ext_stream_decouple(ebus, stream, false);
 480                 }
 481                 break;
 482
 483         default:
 484                 return -EINVAL;
 485         }
 486
 487         return 0;
 488 }
 489
 490 static int skl_link_hw_params(struct snd_pcm_substream *substream,
 491                                 struct snd_pcm_hw_params *params,
 492                                 struct snd_soc_dai *dai)
 493 {
 494         struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
 495         struct hdac_ext_stream *link_dev;
 496         struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
 497         struct hdac_ext_dma_params *dma_params;
 498         struct snd_soc_dai *codec_dai = rtd->codec_dai;
 499         struct skl_pipe_params p_params = {0};
 500
 501         link_dev = snd_hdac_ext_stream_assign(ebus, substream,
 502                                         HDAC_EXT_STREAM_TYPE_LINK);
 503         if (!link_dev)
 504                 return -EBUSY;
 505
 506         snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev);
 507
 508         /* set the stream tag in the codec dai dma params  */
 509         dma_params = snd_soc_dai_get_dma_data(codec_dai, substream);
 510         if (dma_params)
 511                 dma_params->stream_tag =  hdac_stream(link_dev)->stream_tag;
 512
 513         p_params.s_fmt = snd_pcm_format_width(params_format(params));
 514         p_params.ch = params_channels(params);
 515         p_params.s_freq = params_rate(params);
 516         p_params.stream = substream->stream;
 517         p_params.link_dma_id = hdac_stream(link_dev)->stream_tag - 1;
 518
 519         return skl_tplg_be_update_params(dai, &p_params);
 520 }
 521
 522 static int skl_link_pcm_prepare(struct snd_pcm_substream *substream,
 523                 struct snd_soc_dai *dai)
 524 {
 525         struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
 526         struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
 527         struct hdac_ext_stream *link_dev =
 528                         snd_soc_dai_get_dma_data(dai, substream);
 529         unsigned int format_val = 0;
 530         struct skl_dma_params *dma_params;
 531         struct snd_soc_dai *codec_dai = rtd->codec_dai;
 532         struct hdac_ext_link *link;
 533         struct skl *skl = get_skl_ctx(dai->dev);
 534         struct skl_module_cfg *mconfig = NULL;
 535
 536         dma_params  = (struct skl_dma_params *)
 537                         snd_soc_dai_get_dma_data(codec_dai, substream);
 538         if (dma_params)
 539                 format_val = dma_params->format;
 540         dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d codec_dai_name=%s\n",
 541                         hdac_stream(link_dev)->stream_tag, format_val, codec_dai->name);
 542
 543         link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
 544         if (!link)
 545                 return -EINVAL;
 546
 547         snd_hdac_ext_link_stream_reset(link_dev);
 548
 549         /* In case of XRUN recovery, reset the FW pipe to clean state */
 550         mconfig = skl_tplg_be_get_cpr_module(dai, substream->stream);
 551         if (mconfig && (substream->runtime->status->state ==
 552                                         SNDRV_PCM_STATE_XRUN))
 553                 skl_reset_pipe(skl->skl_sst, mconfig->pipe);
 554
 555         snd_hdac_ext_link_stream_setup(link_dev, format_val);
 556
 557         snd_hdac_ext_link_set_stream_id(link, hdac_stream(link_dev)->stream_tag);
 558         link_dev->link_prepared = 1;
 559
 560         return 0;
 561 }
 562
 563 static int skl_link_pcm_trigger(struct snd_pcm_substream *substream,
 564         int cmd, struct snd_soc_dai *dai)
 565 {
 566         struct hdac_ext_stream *link_dev =
 567                                 snd_soc_dai_get_dma_data(dai, substream);
 568         struct hdac_ext_bus *ebus = get_bus_ctx(substream);
 569         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
 570
 571         dev_dbg(dai->dev, "In %s cmd=%d\n", __func__, cmd);
 572         switch (cmd) {
 573         case SNDRV_PCM_TRIGGER_RESUME:
 574                 skl_link_pcm_prepare(substream, dai);
 575         case SNDRV_PCM_TRIGGER_START:
 576         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 577                 snd_hdac_ext_stream_decouple(ebus, stream, true);
 578                 snd_hdac_ext_link_stream_start(link_dev);
 579                 break;
 580
 581         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 582         case SNDRV_PCM_TRIGGER_SUSPEND:
 583         case SNDRV_PCM_TRIGGER_STOP:
 584                 snd_hdac_ext_link_stream_clear(link_dev);
 585                 if (cmd == SNDRV_PCM_TRIGGER_SUSPEND)
 586                         snd_hdac_ext_stream_decouple(ebus, stream, false);
 587                 break;
 588
 589         default:
 590                 return -EINVAL;
 591         }
 592         return 0;
 593 }
 594
 595 static int skl_link_hw_free(struct snd_pcm_substream *substream,
 596                 struct snd_soc_dai *dai)
 597 {
 598         struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
 599         struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
 600         struct hdac_ext_stream *link_dev =
 601                                 snd_soc_dai_get_dma_data(dai, substream);
 602         struct hdac_ext_link *link;
 603
 604         dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
 605
 606         link_dev->link_prepared = 0;
 607
 608         link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
 609         if (!link)
 610                 return -EINVAL;
 611
 612         snd_hdac_ext_link_clear_stream_id(link, hdac_stream(link_dev)->stream_tag);
 613         snd_hdac_ext_stream_release(link_dev, HDAC_EXT_STREAM_TYPE_LINK);
 614         return 0;
 615 }
 616
 617 static struct snd_soc_dai_ops skl_pcm_dai_ops = {
 618         .startup = skl_pcm_open,
 619         .shutdown = skl_pcm_close,
 620         .prepare = skl_pcm_prepare,
 621         .hw_params = skl_pcm_hw_params,
 622         .hw_free = skl_pcm_hw_free,
 623         .trigger = skl_pcm_trigger,
 624 };
 625
 626 static struct snd_soc_dai_ops skl_dmic_dai_ops = {
 627         .hw_params = skl_be_hw_params,
 628 };
 629
 630 static struct snd_soc_dai_ops skl_be_ssp_dai_ops = {
 631         .hw_params = skl_be_hw_params,
 632         .prepare = skl_be_prepare,
 633 };
 634
 635 static struct snd_soc_dai_ops skl_link_dai_ops = {
 636         .prepare = skl_link_pcm_prepare,
 637         .hw_params = skl_link_hw_params,
 638         .hw_free = skl_link_hw_free,
 639         .trigger = skl_link_pcm_trigger,
 640 };
 641
 642 static struct snd_soc_dai_driver skl_platform_dai[] = {
 643 {
 644         .name = "System Pin",
 645         .ops = &skl_pcm_dai_ops,
 646         .playback = {
 647                 .stream_name = "System Playback",
 648                 .channels_min = HDA_MONO,
 649                 .channels_max = HDA_STEREO,
 650                 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000,
 651                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 652         },
 653         .capture = {
 654                 .stream_name = "System Capture",
 655                 .channels_min = HDA_MONO,
 656                 .channels_max = HDA_STEREO,
 657                 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
 658                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 659         },
 660 },
 661 {
 662         .name = "Reference Pin",
 663         .ops = &skl_pcm_dai_ops,
 664         .capture = {
 665                 .stream_name = "Reference Capture",
 666                 .channels_min = HDA_MONO,
 667                 .channels_max = HDA_QUAD,
 668                 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
 669                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 670         },
 671 },
 672 {
 673         .name = "Deepbuffer Pin",
 674         .ops = &skl_pcm_dai_ops,
 675         .playback = {
 676                 .stream_name = "Deepbuffer Playback",
 677                 .channels_min = HDA_STEREO,
 678                 .channels_max = HDA_STEREO,
 679                 .rates = SNDRV_PCM_RATE_48000,
 680                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 681         },
 682 },
 683 {
 684         .name = "LowLatency Pin",
 685         .ops = &skl_pcm_dai_ops,
 686         .playback = {
 687                 .stream_name = "Low Latency Playback",
 688                 .channels_min = HDA_STEREO,
 689                 .channels_max = HDA_STEREO,
 690                 .rates = SNDRV_PCM_RATE_48000,
 691                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 692         },
 693 },
 694 {
 695         .name = "DMIC Pin",
 696         .ops = &skl_pcm_dai_ops,
 697         .capture = {
 698                 .stream_name = "DMIC Capture",
 699                 .channels_min = HDA_MONO,
 700                 .channels_max = HDA_QUAD,
 701                 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
 702                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 703         },
 704 },
 705 {
 706         .name = "HDMI1 Pin",
 707         .ops = &skl_pcm_dai_ops,
 708         .playback = {
 709                 .stream_name = "HDMI1 Playback",
 710                 .channels_min = HDA_STEREO,
 711                 .channels_max = 8,
 712                 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
 713                         SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
 714                         SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
 715                         SNDRV_PCM_RATE_192000,
 716                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
 717                         SNDRV_PCM_FMTBIT_S32_LE,
 718         },
 719 },
 720 {
 721         .name = "HDMI2 Pin",
 722         .ops = &skl_pcm_dai_ops,
 723         .playback = {
 724                 .stream_name = "HDMI2 Playback",
 725                 .channels_min = HDA_STEREO,
 726                 .channels_max = 8,
 727                 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
 728                         SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
 729                         SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
 730                         SNDRV_PCM_RATE_192000,
 731                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
 732                         SNDRV_PCM_FMTBIT_S32_LE,
 733         },
 734 },
 735 {
 736         .name = "HDMI3 Pin",
 737         .ops = &skl_pcm_dai_ops,
 738         .playback = {
 739                 .stream_name = "HDMI3 Playback",
 740                 .channels_min = HDA_STEREO,
 741                 .channels_max = 8,
 742                 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
 743                         SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
 744                         SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
 745                         SNDRV_PCM_RATE_192000,
 746                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
 747                         SNDRV_PCM_FMTBIT_S32_LE,
 748         },
 749 },
 750
 751 /* BE CPU  Dais */
 752 {
 753         .name = "SSP0 Pin",
 754         .ops = &skl_be_ssp_dai_ops,
 755         .playback = {
 756                 .stream_name = "ssp0 Tx",
 757                 .channels_min = HDA_STEREO,
 758                 .channels_max = HDA_STEREO,
 759                 .rates = SNDRV_PCM_RATE_48000,
 760                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 761         },
 762         .capture = {
 763                 .stream_name = "ssp0 Rx",
 764                 .channels_min = HDA_STEREO,
 765                 .channels_max = HDA_STEREO,
 766                 .rates = SNDRV_PCM_RATE_48000,
 767                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 768         },
 769 },
 770 {
 771         .name = "SSP1 Pin",
 772         .ops = &skl_be_ssp_dai_ops,
 773         .playback = {
 774                 .stream_name = "ssp1 Tx",
 775                 .channels_min = HDA_STEREO,
 776                 .channels_max = HDA_STEREO,
 777                 .rates = SNDRV_PCM_RATE_48000,
 778                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 779         },
 780         .capture = {
 781                 .stream_name = "ssp1 Rx",
 782                 .channels_min = HDA_STEREO,
 783                 .channels_max = HDA_STEREO,
 784                 .rates = SNDRV_PCM_RATE_48000,
 785                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 786         },
 787 },
 788 {
 789         .name = "SSP2 Pin",
 790         .ops = &skl_be_ssp_dai_ops,
 791         .playback = {
 792                 .stream_name = "ssp2 Tx",
 793                 .channels_min = HDA_STEREO,
 794                 .channels_max = HDA_STEREO,
 795                 .rates = SNDRV_PCM_RATE_48000,
 796                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 797         },
 798         .capture = {
 799                 .stream_name = "ssp2 Rx",
 800                 .channels_min = HDA_STEREO,
 801                 .channels_max = HDA_STEREO,
 802                 .rates = SNDRV_PCM_RATE_48000,
 803                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 804         },
 805 },
 806 {
 807         .name = "SSP3 Pin",
 808         .ops = &skl_be_ssp_dai_ops,
 809         .playback = {
 810                 .stream_name = "ssp3 Tx",
 811                 .channels_min = HDA_STEREO,
 812                 .channels_max = HDA_STEREO,
 813                 .rates = SNDRV_PCM_RATE_48000,
 814                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 815         },
 816         .capture = {
 817                 .stream_name = "ssp3 Rx",
 818                 .channels_min = HDA_STEREO,
 819                 .channels_max = HDA_STEREO,
 820                 .rates = SNDRV_PCM_RATE_48000,
 821                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 822         },
 823 },
 824 {
 825         .name = "SSP4 Pin",
 826         .ops = &skl_be_ssp_dai_ops,
 827         .playback = {
 828                 .stream_name = "ssp4 Tx",
 829                 .channels_min = HDA_STEREO,
 830                 .channels_max = HDA_STEREO,
 831                 .rates = SNDRV_PCM_RATE_48000,
 832                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 833         },
 834         .capture = {
 835                 .stream_name = "ssp4 Rx",
 836                 .channels_min = HDA_STEREO,
 837                 .channels_max = HDA_STEREO,
 838                 .rates = SNDRV_PCM_RATE_48000,
 839                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 840         },
 841 },
 842 {
 843         .name = "SSP5 Pin",
 844         .ops = &skl_be_ssp_dai_ops,
 845         .playback = {
 846                 .stream_name = "ssp5 Tx",
 847                 .channels_min = HDA_STEREO,
 848                 .channels_max = HDA_STEREO,
 849                 .rates = SNDRV_PCM_RATE_48000,
 850                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 851         },
 852         .capture = {
 853                 .stream_name = "ssp5 Rx",
 854                 .channels_min = HDA_STEREO,
 855                 .channels_max = HDA_STEREO,
 856                 .rates = SNDRV_PCM_RATE_48000,
 857                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 858         },
 859 },
 860 {
 861         .name = "iDisp1 Pin",
 862         .ops = &skl_link_dai_ops,
 863         .playback = {
 864                 .stream_name = "iDisp1 Tx",
 865                 .channels_min = HDA_STEREO,
 866                 .channels_max = 8,
 867                 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000,
 868                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
 869                         SNDRV_PCM_FMTBIT_S24_LE,
 870         },
 871 },
 872 {
 873         .name = "iDisp2 Pin",
 874         .ops = &skl_link_dai_ops,
 875         .playback = {
 876                 .stream_name = "iDisp2 Tx",
 877                 .channels_min = HDA_STEREO,
 878                 .channels_max = 8,
 879                 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
 880                         SNDRV_PCM_RATE_48000,
 881                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
 882                         SNDRV_PCM_FMTBIT_S24_LE,
 883         },
 884 },
 885 {
 886         .name = "iDisp3 Pin",
 887         .ops = &skl_link_dai_ops,
 888         .playback = {
 889                 .stream_name = "iDisp3 Tx",
 890                 .channels_min = HDA_STEREO,
 891                 .channels_max = 8,
 892                 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
 893                         SNDRV_PCM_RATE_48000,
 894                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
 895                         SNDRV_PCM_FMTBIT_S24_LE,
 896         },
 897 },
 898 {
 899         .name = "DMIC01 Pin",
 900         .ops = &skl_dmic_dai_ops,
 901         .capture = {
 902                 .stream_name = "DMIC01 Rx",
 903                 .channels_min = HDA_MONO,
 904                 .channels_max = HDA_QUAD,
 905                 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
 906                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 907         },
 908 },
 909 {
 910         .name = "HD-Codec Pin",
 911         .ops = &skl_link_dai_ops,
 912         .playback = {
 913                 .stream_name = "HD-Codec Tx",
 914                 .channels_min = HDA_STEREO,
 915                 .channels_max = HDA_STEREO,
 916                 .rates = SNDRV_PCM_RATE_48000,
 917                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 918         },
 919         .capture = {
 920                 .stream_name = "HD-Codec Rx",
 921                 .channels_min = HDA_STEREO,
 922                 .channels_max = HDA_STEREO,
 923                 .rates = SNDRV_PCM_RATE_48000,
 924                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 925         },
 926 },
 927 };
 928
 929 static int skl_platform_open(struct snd_pcm_substream *substream)
 930 {
 931         struct snd_pcm_runtime *runtime;
 932         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 933         struct snd_soc_dai_link *dai_link = rtd->dai_link;
 934
 935         dev_dbg(rtd->cpu_dai->dev, "In %s:%s\n", __func__,
 936                                         dai_link->cpu_dai_name);
 937
 938         runtime = substream->runtime;
 939         snd_soc_set_runtime_hwparams(substream, &azx_pcm_hw);
 940
 941         return 0;
 942 }
 943
 944 static int skl_coupled_trigger(struct snd_pcm_substream *substream,
 945                                         int cmd)
 946 {
 947         struct hdac_ext_bus *ebus = get_bus_ctx(substream);
 948         struct hdac_bus *bus = ebus_to_hbus(ebus);
 949         struct hdac_ext_stream *stream;
 950         struct snd_pcm_substream *s;
 951         bool start;
 952         int sbits = 0;
 953         unsigned long cookie;
 954         struct hdac_stream *hstr;
 955
 956         stream = get_hdac_ext_stream(substream);
 957         hstr = hdac_stream(stream);
 958
 959         dev_dbg(bus->dev, "In %s cmd=%d\n", __func__, cmd);
 960
 961         if (!hstr->prepared)
 962                 return -EPIPE;
 963
 964         switch (cmd) {
 965         case SNDRV_PCM_TRIGGER_START:
 966         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 967         case SNDRV_PCM_TRIGGER_RESUME:
 968                 start = true;
 969                 break;
 970
 971         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 972         case SNDRV_PCM_TRIGGER_SUSPEND:
 973         case SNDRV_PCM_TRIGGER_STOP:
 974                 start = false;
 975                 break;
 976
 977         default:
 978                 return -EINVAL;
 979         }
 980
 981         snd_pcm_group_for_each_entry(s, substream) {
 982                 if (s->pcm->card != substream->pcm->card)
 983                         continue;
 984                 stream = get_hdac_ext_stream(s);
 985                 sbits |= 1 << hdac_stream(stream)->index;
 986                 snd_pcm_trigger_done(s, substream);
 987         }
 988
 989         spin_lock_irqsave(&bus->reg_lock, cookie);
 990
 991         /* first, set SYNC bits of corresponding streams */
 992         snd_hdac_stream_sync_trigger(hstr, true, sbits, AZX_REG_SSYNC);
 993
 994         snd_pcm_group_for_each_entry(s, substream) {
 995                 if (s->pcm->card != substream->pcm->card)
 996                         continue;
 997                 stream = get_hdac_ext_stream(s);
 998                 if (start)
 999                         snd_hdac_stream_start(hdac_stream(stream), true);
1000                 else
1001                         snd_hdac_stream_stop(hdac_stream(stream));
1002         }
1003         spin_unlock_irqrestore(&bus->reg_lock, cookie);
1004
1005         snd_hdac_stream_sync(hstr, start, sbits);
1006
1007         spin_lock_irqsave(&bus->reg_lock, cookie);
1008
1009         /* reset SYNC bits */
1010         snd_hdac_stream_sync_trigger(hstr, false, sbits, AZX_REG_SSYNC);
1011         if (start)
1012                 snd_hdac_stream_timecounter_init(hstr, sbits);
1013         spin_unlock_irqrestore(&bus->reg_lock, cookie);
1014
1015         return 0;
1016 }
1017
1018 static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream,
1019                                         int cmd)
1020 {
1021         struct hdac_ext_bus *ebus = get_bus_ctx(substream);
1022
1023         if (!ebus->ppcap)
1024                 return skl_coupled_trigger(substream, cmd);
1025
1026         return 0;
1027 }
1028
1029 static snd_pcm_uframes_t skl_platform_pcm_pointer
1030                         (struct snd_pcm_substream *substream)
1031 {
1032         struct hdac_ext_stream *hstream = get_hdac_ext_stream(substream);
1033         unsigned int pos;
1034
1035         /* use the position buffer as default */
1036         pos = snd_hdac_stream_get_pos_posbuf(hdac_stream(hstream));
1037
1038         if (pos >= hdac_stream(hstream)->bufsize)
1039                 pos = 0;
1040
1041         return bytes_to_frames(substream->runtime, pos);
1042 }
1043
1044 static u64 skl_adjust_codec_delay(struct snd_pcm_substream *substream,
1045                                 u64 nsec)
1046 {
1047         struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
1048         struct snd_soc_dai *codec_dai = rtd->codec_dai;
1049         u64 codec_frames, codec_nsecs;
1050
1051         if (!codec_dai->driver->ops->delay)
1052                 return nsec;
1053
1054         codec_frames = codec_dai->driver->ops->delay(substream, codec_dai);
1055         codec_nsecs = div_u64(codec_frames * 1000000000LL,
1056                               substream->runtime->rate);
1057
1058         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
1059                 return nsec + codec_nsecs;
1060
1061         return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
1062 }
1063
1064 static int skl_get_time_info(struct snd_pcm_substream *substream,
1065                         struct timespec *system_ts, struct timespec *audio_ts,
1066                         struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
1067                         struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
1068 {
1069         struct hdac_ext_stream *sstream = get_hdac_ext_stream(substream);
1070         struct hdac_stream *hstr = hdac_stream(sstream);
1071         u64 nsec;
1072
1073         if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
1074                 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
1075
1076                 snd_pcm_gettime(substream->runtime, system_ts);
1077
1078                 nsec = timecounter_read(&hstr->tc);
1079                 nsec = div_u64(nsec, 3); /* can be optimized */
1080                 if (audio_tstamp_config->report_delay)
1081                         nsec = skl_adjust_codec_delay(substream, nsec);
1082
1083                 *audio_ts = ns_to_timespec(nsec);
1084
1085                 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
1086                 audio_tstamp_report->accuracy_report = 1; /* rest of struct is valid */
1087                 audio_tstamp_report->accuracy = 42; /* 24MHzWallClk == 42ns resolution */
1088
1089         } else {
1090                 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
1091         }
1092
1093         return 0;
1094 }
1095
1096 static struct snd_pcm_ops skl_platform_ops = {
1097         .open = skl_platform_open,
1098         .ioctl = snd_pcm_lib_ioctl,
1099         .trigger = skl_platform_pcm_trigger,
1100         .pointer = skl_platform_pcm_pointer,
1101         .get_time_info =  skl_get_time_info,
1102         .mmap = snd_pcm_lib_default_mmap,
1103         .page = snd_pcm_sgbuf_ops_page,
1104 };
1105
1106 static void skl_pcm_free(struct snd_pcm *pcm)
1107 {
1108         snd_pcm_lib_preallocate_free_for_all(pcm);
1109 }
1110
1111 #define MAX_PREALLOC_SIZE       (32 * 1024 * 1024)
1112
1113 static int skl_pcm_new(struct snd_soc_pcm_runtime *rtd)
1114 {
1115         struct snd_soc_dai *dai = rtd->cpu_dai;
1116         struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
1117         struct snd_pcm *pcm = rtd->pcm;
1118         unsigned int size;
1119         int retval = 0;
1120         struct skl *skl = ebus_to_skl(ebus);
1121
1122         if (dai->driver->playback.channels_min ||
1123                 dai->driver->capture.channels_min) {
1124                 /* buffer pre-allocation */
1125                 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
1126                 if (size > MAX_PREALLOC_SIZE)
1127                         size = MAX_PREALLOC_SIZE;
1128                 retval = snd_pcm_lib_preallocate_pages_for_all(pcm,
1129                                                 SNDRV_DMA_TYPE_DEV_SG,
1130                                                 snd_dma_pci_data(skl->pci),
1131                                                 size, MAX_PREALLOC_SIZE);
1132                 if (retval) {
1133                         dev_err(dai->dev, "dma buffer allocationf fail\n");
1134                         return retval;
1135                 }
1136         }
1137
1138         return retval;
1139 }
1140
1141 static int skl_platform_soc_probe(struct snd_soc_platform *platform)
1142 {
1143         struct hdac_ext_bus *ebus = dev_get_drvdata(platform->dev);
1144         struct skl *skl = ebus_to_skl(ebus);
1145         const struct skl_dsp_ops *ops;
1146         int ret;
1147
1148         pm_runtime_get_sync(platform->dev);
1149         if (ebus->ppcap) {
1150                 ret = skl_tplg_init(platform, ebus);
1151                 if (ret < 0) {
1152                         dev_err(platform->dev, "Failed to init topology!\n");
1153                         return ret;
1154                 }
1155                 skl->platform = platform;
1156
1157                 /* load the firmwares, since all is set */
1158                 ops = skl_get_dsp_ops(skl->pci->device);
1159                 if (!ops)
1160                         return -EIO;
1161
1162                 if (skl->skl_sst->is_first_boot == false) {
1163                         dev_err(platform->dev, "DSP reports first boot done!!!\n");
1164                         return -EIO;
1165                 }
1166
1167                 ret = ops->init_fw(platform->dev, skl->skl_sst);
1168                 if (ret < 0) {
1169                         dev_err(platform->dev, "Failed to boot first fw: %d\n", ret);
1170                         return ret;
1171                 }
1172         }
1173         pm_runtime_mark_last_busy(platform->dev);
1174         pm_runtime_put_autosuspend(platform->dev);
1175
1176         return 0;
1177 }
1178 static struct snd_soc_platform_driver skl_platform_drv  = {
1179         .probe          = skl_platform_soc_probe,
1180         .ops            = &skl_platform_ops,
1181         .pcm_new        = skl_pcm_new,
1182         .pcm_free       = skl_pcm_free,
1183 };
1184
1185 static const struct snd_soc_component_driver skl_component = {
1186         .name           = "pcm",
1187 };
1188
1189 int skl_platform_register(struct device *dev)
1190 {
1191         int ret;
1192         struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
1193         struct skl *skl = ebus_to_skl(ebus);
1194
1195         INIT_LIST_HEAD(&skl->ppl_list);
1196
1197         ret = snd_soc_register_platform(dev, &skl_platform_drv);
1198         if (ret) {
1199                 dev_err(dev, "soc platform registration failed %d\n", ret);
1200                 return ret;
1201         }
1202         ret = snd_soc_register_component(dev, &skl_component,
1203                                 skl_platform_dai,
1204                                 ARRAY_SIZE(skl_platform_dai));
1205         if (ret) {
1206                 dev_err(dev, "soc component registration failed %d\n", ret);
1207                 snd_soc_unregister_platform(dev);
1208         }
1209
1210         return ret;
1211
1212 }
1213
1214 int skl_platform_unregister(struct device *dev)
1215 {
1216         snd_soc_unregister_component(dev);
1217         snd_soc_unregister_platform(dev);
1218         return 0;
1219 }