2 * skl-message.c - HDA DSP interface for FW registration, Pipe and Module
5 * Copyright (C) 2015 Intel Corp
6 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
7 * Jeeja KP <jeeja.kp@intel.com>
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as version 2, as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include "skl-sst-dsp.h"
25 #include "cnl-sst-dsp.h"
26 #include "skl-sst-ipc.h"
28 #include "../common/sst-dsp.h"
29 #include "../common/sst-dsp-priv.h"
30 #include "skl-topology.h"
31 #include "skl-tplg-interface.h"
33 static int skl_alloc_dma_buf(struct device *dev,
34 struct snd_dma_buffer *dmab, size_t size)
36 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
37 struct hdac_bus *bus = ebus_to_hbus(ebus);
42 return bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab);
45 static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
47 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
48 struct hdac_bus *bus = ebus_to_hbus(ebus);
53 bus->io_ops->dma_free_pages(bus, dmab);
58 #define SKL_ASTATE_PARAM_ID 4
60 void skl_dsp_set_astate_cfg(struct skl_sst *ctx, u32 cnt, void *data)
62 struct skl_ipc_large_config_msg msg = {0};
64 msg.large_param_id = SKL_ASTATE_PARAM_ID;
65 msg.param_data_size = (cnt * sizeof(struct skl_astate_param) +
68 skl_ipc_set_large_config(&ctx->ipc, &msg, data);
71 #define NOTIFICATION_PARAM_ID 3
72 #define NOTIFICATION_MASK 0xf
74 /* disable notfication for underruns/overruns from firmware module */
75 void skl_dsp_enable_notification(struct skl_sst *ctx, bool enable)
77 struct notification_mask mask;
78 struct skl_ipc_large_config_msg msg = {0};
80 mask.notify = NOTIFICATION_MASK;
83 msg.large_param_id = NOTIFICATION_PARAM_ID;
84 msg.param_data_size = sizeof(mask);
86 skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask);
89 static int skl_dsp_setup_spib(struct device *dev, unsigned int size,
90 int stream_tag, int enable)
92 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
93 struct hdac_bus *bus = ebus_to_hbus(ebus);
94 struct hdac_stream *stream = snd_hdac_get_stream(bus,
95 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
96 struct hdac_ext_stream *estream;
101 estream = stream_to_hdac_ext_stream(stream);
102 /* enable/disable SPIB for this hdac stream */
103 snd_hdac_ext_stream_spbcap_enable(ebus, enable, stream->index);
105 /* set the spib value */
106 snd_hdac_ext_stream_set_spib(ebus, estream, size);
111 static int skl_dsp_prepare(struct device *dev, unsigned int format,
112 unsigned int size, struct snd_dma_buffer *dmab)
114 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
115 struct hdac_bus *bus = ebus_to_hbus(ebus);
116 struct hdac_ext_stream *estream;
117 struct hdac_stream *stream;
118 struct snd_pcm_substream substream;
124 memset(&substream, 0, sizeof(substream));
125 substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
127 estream = snd_hdac_ext_stream_assign(ebus, &substream,
128 HDAC_EXT_STREAM_TYPE_HOST);
132 stream = hdac_stream(estream);
134 /* assign decouple host dma channel */
135 ret = snd_hdac_dsp_prepare(stream, format, size, dmab);
139 skl_dsp_setup_spib(dev, size, stream->stream_tag, true);
141 return stream->stream_tag;
144 static int skl_dsp_trigger(struct device *dev, bool start, int stream_tag)
146 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
147 struct hdac_stream *stream;
148 struct hdac_bus *bus = ebus_to_hbus(ebus);
153 stream = snd_hdac_get_stream(bus,
154 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
158 snd_hdac_dsp_trigger(stream, start);
163 static int skl_dsp_cleanup(struct device *dev,
164 struct snd_dma_buffer *dmab, int stream_tag)
166 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
167 struct hdac_stream *stream;
168 struct hdac_ext_stream *estream;
169 struct hdac_bus *bus = ebus_to_hbus(ebus);
174 stream = snd_hdac_get_stream(bus,
175 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
179 estream = stream_to_hdac_ext_stream(stream);
180 skl_dsp_setup_spib(dev, 0, stream_tag, false);
181 snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
183 snd_hdac_dsp_cleanup(stream, dmab);
188 static struct skl_dsp_loader_ops skl_get_loader_ops(void)
190 struct skl_dsp_loader_ops loader_ops;
192 memset(&loader_ops, 0, sizeof(struct skl_dsp_loader_ops));
194 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
195 loader_ops.free_dma_buf = skl_free_dma_buf;
200 static struct skl_dsp_loader_ops bxt_get_loader_ops(void)
202 struct skl_dsp_loader_ops loader_ops;
204 memset(&loader_ops, 0, sizeof(loader_ops));
206 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
207 loader_ops.free_dma_buf = skl_free_dma_buf;
208 loader_ops.prepare = skl_dsp_prepare;
209 loader_ops.trigger = skl_dsp_trigger;
210 loader_ops.cleanup = skl_dsp_cleanup;
215 static const struct skl_dsp_ops dsp_ops[] = {
219 .loader_ops = skl_get_loader_ops,
220 .init = skl_sst_dsp_init,
221 .init_fw = skl_sst_init_fw,
222 .cleanup = skl_sst_dsp_cleanup
227 .loader_ops = skl_get_loader_ops,
228 .init = kbl_sst_dsp_init,
229 .init_fw = skl_sst_init_fw,
230 .cleanup = skl_sst_dsp_cleanup
235 .loader_ops = bxt_get_loader_ops,
236 .init = bxt_sst_dsp_init,
237 .init_fw = bxt_sst_init_fw,
238 .cleanup = bxt_sst_dsp_cleanup
243 .loader_ops = bxt_get_loader_ops,
244 .init = bxt_sst_dsp_init,
245 .init_fw = bxt_sst_init_fw,
246 .cleanup = bxt_sst_dsp_cleanup
251 .loader_ops = bxt_get_loader_ops,
252 .init = cnl_sst_dsp_init,
253 .init_fw = cnl_sst_init_fw,
254 .cleanup = cnl_sst_dsp_cleanup
258 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id)
262 for (i = 0; i < ARRAY_SIZE(dsp_ops); i++) {
263 if (dsp_ops[i].id == pci_id)
270 int skl_init_dsp(struct skl *skl)
272 void __iomem *mmio_base;
273 struct hdac_ext_bus *ebus = &skl->ebus;
274 struct hdac_bus *bus = ebus_to_hbus(ebus);
275 struct skl_dsp_loader_ops loader_ops;
277 const struct skl_dsp_ops *ops;
278 struct skl_dsp_cores *cores;
281 /* enable ppcap interrupt */
282 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
283 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
285 /* read the BAR of the ADSP MMIO */
286 mmio_base = pci_ioremap_bar(skl->pci, 4);
287 if (mmio_base == NULL) {
288 dev_err(bus->dev, "ioremap error\n");
292 ops = skl_get_dsp_ops(skl->pci->device);
298 loader_ops = ops->loader_ops();
299 ret = ops->init(bus->dev, mmio_base, irq,
300 skl->fw_name, loader_ops,
306 skl->skl_sst->dsp_ops = ops;
307 cores = &skl->skl_sst->cores;
308 cores->count = ops->num_cores;
310 cores->state = kcalloc(cores->count, sizeof(*cores->state), GFP_KERNEL);
316 cores->usage_count = kcalloc(cores->count, sizeof(*cores->usage_count),
318 if (!cores->usage_count) {
320 goto free_core_state;
323 dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
336 int skl_free_dsp(struct skl *skl)
338 struct hdac_ext_bus *ebus = &skl->ebus;
339 struct hdac_bus *bus = ebus_to_hbus(ebus);
340 struct skl_sst *ctx = skl->skl_sst;
342 /* disable ppcap interrupt */
343 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
345 ctx->dsp_ops->cleanup(bus->dev, ctx);
347 kfree(ctx->cores.state);
348 kfree(ctx->cores.usage_count);
350 if (ctx->dsp->addr.lpe)
351 iounmap(ctx->dsp->addr.lpe);
357 * In the case of "suspend_active" i.e, the Audio IP being active
358 * during system suspend, immediately excecute any pending D0i3 work
359 * before suspending. This is needed for the IP to work in low power
360 * mode during system suspend. In the case of normal suspend, cancel
361 * any pending D0i3 work.
363 int skl_suspend_late_dsp(struct skl *skl)
365 struct skl_sst *ctx = skl->skl_sst;
366 struct delayed_work *dwork;
371 dwork = &ctx->d0i3.work;
373 if (dwork->work.func) {
374 if (skl->supend_active)
375 flush_delayed_work(dwork);
377 cancel_delayed_work_sync(dwork);
383 int skl_suspend_dsp(struct skl *skl)
385 struct skl_sst *ctx = skl->skl_sst;
388 /* if ppcap is not supported return 0 */
389 if (!skl->ebus.bus.ppcap)
392 ret = skl_dsp_sleep(ctx->dsp);
396 /* disable ppcap interrupt */
397 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
398 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, false);
403 int skl_resume_dsp(struct skl *skl)
405 struct skl_sst *ctx = skl->skl_sst;
408 /* if ppcap is not supported return 0 */
409 if (!skl->ebus.bus.ppcap)
412 /* enable ppcap interrupt */
413 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
414 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
416 /* check if DSP 1st boot is done */
417 if (skl->skl_sst->is_first_boot == true)
420 /* disable dynamic clock gating during fw and lib download */
421 ctx->enable_miscbdcge(ctx->dev, false);
423 ret = skl_dsp_wake(ctx->dsp);
424 ctx->enable_miscbdcge(ctx->dev, true);
428 skl_dsp_enable_notification(skl->skl_sst, false);
430 if (skl->cfg.astate_cfg != NULL) {
431 skl_dsp_set_astate_cfg(skl->skl_sst, skl->cfg.astate_cfg->count,
432 skl->cfg.astate_cfg);
437 enum skl_bitdepth skl_get_bit_depth(int params)
441 return SKL_DEPTH_8BIT;
444 return SKL_DEPTH_16BIT;
447 return SKL_DEPTH_24BIT;
450 return SKL_DEPTH_32BIT;
453 return SKL_DEPTH_INVALID;
459 * Each module in DSP expects a base module configuration, which consists of
460 * PCM format information, which we calculate in driver and resource values
461 * which are read from widget information passed through topology binary
462 * This is send when we create a module with INIT_INSTANCE IPC msg
464 static void skl_set_base_module_format(struct skl_sst *ctx,
465 struct skl_module_cfg *mconfig,
466 struct skl_base_cfg *base_cfg)
468 struct skl_module *module = mconfig->module;
469 struct skl_module_res *res = &module->resources[mconfig->res_idx];
470 struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
471 struct skl_module_fmt *format = &fmt->inputs[0].fmt;
473 base_cfg->audio_fmt.number_of_channels = format->channels;
475 base_cfg->audio_fmt.s_freq = format->s_freq;
476 base_cfg->audio_fmt.bit_depth = format->bit_depth;
477 base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
478 base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
480 dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
481 format->bit_depth, format->valid_bit_depth,
484 base_cfg->audio_fmt.channel_map = format->ch_map;
486 base_cfg->audio_fmt.interleaving = format->interleaving_style;
488 base_cfg->cps = res->cps;
489 base_cfg->ibs = res->ibs;
490 base_cfg->obs = res->obs;
491 base_cfg->is_pages = res->is_pages;
495 * Copies copier capabilities into copier module and updates copier module
498 static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
499 struct skl_cpr_cfg *cpr_mconfig)
501 if (mconfig->formats_config.caps_size == 0)
504 memcpy(cpr_mconfig->gtw_cfg.config_data,
505 mconfig->formats_config.caps,
506 mconfig->formats_config.caps_size);
508 cpr_mconfig->gtw_cfg.config_length =
509 (mconfig->formats_config.caps_size) / 4;
512 #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF
514 * Calculate the gatewat settings required for copier module, type of
515 * gateway and index of gateway to use
517 static u32 skl_get_node_id(struct skl_sst *ctx,
518 struct skl_module_cfg *mconfig)
520 union skl_connector_node_id node_id = {0};
521 union skl_ssp_dma_node ssp_node = {0};
522 struct skl_pipe_params *params = mconfig->pipe->p_params;
524 switch (mconfig->dev_type) {
526 node_id.node.dma_type =
527 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
528 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
529 SKL_DMA_I2S_LINK_INPUT_CLASS;
530 node_id.node.vindex = params->host_dma_id +
531 (mconfig->vbus_id << 3);
535 node_id.node.dma_type =
536 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
537 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
538 SKL_DMA_I2S_LINK_INPUT_CLASS;
539 ssp_node.dma_node.time_slot_index = mconfig->time_slot;
540 ssp_node.dma_node.i2s_instance = mconfig->vbus_id;
541 node_id.node.vindex = ssp_node.val;
544 case SKL_DEVICE_DMIC:
545 node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
546 node_id.node.vindex = mconfig->vbus_id +
547 (mconfig->time_slot);
550 case SKL_DEVICE_HDALINK:
551 node_id.node.dma_type =
552 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
553 SKL_DMA_HDA_LINK_OUTPUT_CLASS :
554 SKL_DMA_HDA_LINK_INPUT_CLASS;
555 node_id.node.vindex = params->link_dma_id;
558 case SKL_DEVICE_HDAHOST:
559 node_id.node.dma_type =
560 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
561 SKL_DMA_HDA_HOST_OUTPUT_CLASS :
562 SKL_DMA_HDA_HOST_INPUT_CLASS;
563 node_id.node.vindex = params->host_dma_id;
567 node_id.val = 0xFFFFFFFF;
574 static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx,
575 struct skl_module_cfg *mconfig,
576 struct skl_cpr_cfg *cpr_mconfig)
579 struct skl_module_res *res;
580 int res_idx = mconfig->res_idx;
581 struct skl *skl = get_skl_ctx(ctx->dev);
583 cpr_mconfig->gtw_cfg.node_id = skl_get_node_id(ctx, mconfig);
585 if (cpr_mconfig->gtw_cfg.node_id == SKL_NON_GATEWAY_CPR_NODE_ID) {
586 cpr_mconfig->cpr_feature_mask = 0;
590 if (skl->nr_modules) {
591 res = &mconfig->module->resources[mconfig->res_idx];
592 cpr_mconfig->gtw_cfg.dma_buffer_size = res->dma_buffer_size;
593 goto skip_buf_size_calc;
595 res = &mconfig->module->resources[res_idx];
598 switch (mconfig->hw_conn_type) {
599 case SKL_CONN_SOURCE:
600 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
601 dma_io_buf = res->ibs;
603 dma_io_buf = res->obs;
607 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
608 dma_io_buf = res->obs;
610 dma_io_buf = res->ibs;
614 dev_warn(ctx->dev, "wrong connection type: %d\n",
615 mconfig->hw_conn_type);
619 cpr_mconfig->gtw_cfg.dma_buffer_size =
620 mconfig->dma_buffer_size * dma_io_buf;
622 /* fallback to 2ms default value */
623 if (!cpr_mconfig->gtw_cfg.dma_buffer_size) {
624 if (mconfig->hw_conn_type == SKL_CONN_SOURCE)
625 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->obs;
627 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->ibs;
631 cpr_mconfig->cpr_feature_mask = 0;
632 cpr_mconfig->gtw_cfg.config_length = 0;
634 skl_copy_copier_caps(mconfig, cpr_mconfig);
637 #define DMA_CONTROL_ID 5
638 #define DMA_I2S_BLOB_SIZE 21
640 int skl_dsp_set_dma_control(struct skl_sst *ctx, u32 *caps,
641 u32 caps_size, u32 node_id)
643 struct skl_dma_control *dma_ctrl;
644 struct skl_ipc_large_config_msg msg = {0};
649 * if blob size zero, then return
654 msg.large_param_id = DMA_CONTROL_ID;
655 msg.param_data_size = sizeof(struct skl_dma_control) + caps_size;
657 dma_ctrl = kzalloc(msg.param_data_size, GFP_KERNEL);
658 if (dma_ctrl == NULL)
661 dma_ctrl->node_id = node_id;
664 * NHLT blob may contain additional configs along with i2s blob.
665 * firmware expects only the i2s blob size as the config_length.
666 * So fix to i2s blob size.
669 dma_ctrl->config_length = DMA_I2S_BLOB_SIZE;
671 memcpy(dma_ctrl->config_data, caps, caps_size);
673 err = skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)dma_ctrl);
679 static void skl_setup_out_format(struct skl_sst *ctx,
680 struct skl_module_cfg *mconfig,
681 struct skl_audio_data_format *out_fmt)
683 struct skl_module *module = mconfig->module;
684 struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
685 struct skl_module_fmt *format = &fmt->outputs[0].fmt;
687 out_fmt->number_of_channels = (u8)format->channels;
688 out_fmt->s_freq = format->s_freq;
689 out_fmt->bit_depth = format->bit_depth;
690 out_fmt->valid_bit_depth = format->valid_bit_depth;
691 out_fmt->ch_cfg = format->ch_cfg;
693 out_fmt->channel_map = format->ch_map;
694 out_fmt->interleaving = format->interleaving_style;
695 out_fmt->sample_type = format->sample_type;
697 dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
698 out_fmt->number_of_channels, format->s_freq, format->bit_depth);
702 * DSP needs SRC module for frequency conversion, SRC takes base module
703 * configuration and the target frequency as extra parameter passed as src
706 static void skl_set_src_format(struct skl_sst *ctx,
707 struct skl_module_cfg *mconfig,
708 struct skl_src_module_cfg *src_mconfig)
710 struct skl_module *module = mconfig->module;
711 struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
712 struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
714 skl_set_base_module_format(ctx, mconfig,
715 (struct skl_base_cfg *)src_mconfig);
717 src_mconfig->src_cfg = fmt->s_freq;
721 * DSP needs updown module to do channel conversion. updown module take base
722 * module configuration and channel configuration
723 * It also take coefficients and now we have defaults applied here
725 static void skl_set_updown_mixer_format(struct skl_sst *ctx,
726 struct skl_module_cfg *mconfig,
727 struct skl_up_down_mixer_cfg *mixer_mconfig)
729 struct skl_module *module = mconfig->module;
730 struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
731 struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
734 skl_set_base_module_format(ctx, mconfig,
735 (struct skl_base_cfg *)mixer_mconfig);
736 mixer_mconfig->out_ch_cfg = fmt->ch_cfg;
738 /* Select F/W default coefficient */
739 mixer_mconfig->coeff_sel = 0x0;
741 /* User coeff, don't care since we are selecting F/W defaults */
742 for (i = 0; i < UP_DOWN_MIXER_MAX_COEFF; i++)
743 mixer_mconfig->coeff[i] = 0xDEADBEEF;
747 * 'copier' is DSP internal module which copies data from Host DMA (HDA host
748 * dma) or link (hda link, SSP, PDM)
749 * Here we calculate the copier module parameters, like PCM format, output
750 * format, gateway settings
751 * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
753 static void skl_set_copier_format(struct skl_sst *ctx,
754 struct skl_module_cfg *mconfig,
755 struct skl_cpr_cfg *cpr_mconfig)
757 struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
758 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
760 skl_set_base_module_format(ctx, mconfig, base_cfg);
762 skl_setup_out_format(ctx, mconfig, out_fmt);
763 skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig);
767 * Algo module are DSP pre processing modules. Algo module take base module
768 * configuration and params
771 static void skl_set_algo_format(struct skl_sst *ctx,
772 struct skl_module_cfg *mconfig,
773 struct skl_algo_cfg *algo_mcfg)
775 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)algo_mcfg;
777 skl_set_base_module_format(ctx, mconfig, base_cfg);
779 if (mconfig->formats_config.caps_size == 0)
782 memcpy(algo_mcfg->params,
783 mconfig->formats_config.caps,
784 mconfig->formats_config.caps_size);
789 * Mic select module allows selecting one or many input channels, thus
792 * Mic select module take base module configuration and out-format
795 static void skl_set_base_outfmt_format(struct skl_sst *ctx,
796 struct skl_module_cfg *mconfig,
797 struct skl_base_outfmt_cfg *base_outfmt_mcfg)
799 struct skl_audio_data_format *out_fmt = &base_outfmt_mcfg->out_fmt;
800 struct skl_base_cfg *base_cfg =
801 (struct skl_base_cfg *)base_outfmt_mcfg;
803 skl_set_base_module_format(ctx, mconfig, base_cfg);
804 skl_setup_out_format(ctx, mconfig, out_fmt);
807 static u16 skl_get_module_param_size(struct skl_sst *ctx,
808 struct skl_module_cfg *mconfig)
812 switch (mconfig->m_type) {
813 case SKL_MODULE_TYPE_COPIER:
814 param_size = sizeof(struct skl_cpr_cfg);
815 param_size += mconfig->formats_config.caps_size;
818 case SKL_MODULE_TYPE_SRCINT:
819 return sizeof(struct skl_src_module_cfg);
821 case SKL_MODULE_TYPE_UPDWMIX:
822 return sizeof(struct skl_up_down_mixer_cfg);
824 case SKL_MODULE_TYPE_ALGO:
825 param_size = sizeof(struct skl_base_cfg);
826 param_size += mconfig->formats_config.caps_size;
829 case SKL_MODULE_TYPE_BASE_OUTFMT:
830 case SKL_MODULE_TYPE_MIC_SELECT:
831 case SKL_MODULE_TYPE_KPB:
832 return sizeof(struct skl_base_outfmt_cfg);
836 * return only base cfg when no specific module type is
839 return sizeof(struct skl_base_cfg);
846 * DSP firmware supports various modules like copier, SRC, updown etc.
847 * These modules required various parameters to be calculated and sent for
848 * the module initialization to DSP. By default a generic module needs only
849 * base module format configuration
852 static int skl_set_module_format(struct skl_sst *ctx,
853 struct skl_module_cfg *module_config,
854 u16 *module_config_size,
859 param_size = skl_get_module_param_size(ctx, module_config);
861 *param_data = kzalloc(param_size, GFP_KERNEL);
862 if (NULL == *param_data)
865 *module_config_size = param_size;
867 switch (module_config->m_type) {
868 case SKL_MODULE_TYPE_COPIER:
869 skl_set_copier_format(ctx, module_config, *param_data);
872 case SKL_MODULE_TYPE_SRCINT:
873 skl_set_src_format(ctx, module_config, *param_data);
876 case SKL_MODULE_TYPE_UPDWMIX:
877 skl_set_updown_mixer_format(ctx, module_config, *param_data);
880 case SKL_MODULE_TYPE_ALGO:
881 skl_set_algo_format(ctx, module_config, *param_data);
884 case SKL_MODULE_TYPE_BASE_OUTFMT:
885 case SKL_MODULE_TYPE_MIC_SELECT:
886 case SKL_MODULE_TYPE_KPB:
887 skl_set_base_outfmt_format(ctx, module_config, *param_data);
891 skl_set_base_module_format(ctx, module_config, *param_data);
896 dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n",
897 module_config->id.module_id, param_size);
898 print_hex_dump_debug("Module params:", DUMP_PREFIX_OFFSET, 8, 4,
899 *param_data, param_size, false);
903 static int skl_get_queue_index(struct skl_module_pin *mpin,
904 struct skl_module_inst_id id, int max)
908 for (i = 0; i < max; i++) {
909 if (mpin[i].id.module_id == id.module_id &&
910 mpin[i].id.instance_id == id.instance_id)
918 * Allocates queue for each module.
919 * if dynamic, the pin_index is allocated 0 to max_pin.
920 * In static, the pin_index is fixed based on module_id and instance id
922 static int skl_alloc_queue(struct skl_module_pin *mpin,
923 struct skl_module_cfg *tgt_cfg, int max)
926 struct skl_module_inst_id id = tgt_cfg->id;
928 * if pin in dynamic, find first free pin
929 * otherwise find match module and instance id pin as topology will
930 * ensure a unique pin is assigned to this so no need to
933 for (i = 0; i < max; i++) {
934 if (mpin[i].is_dynamic) {
935 if (!mpin[i].in_use &&
936 mpin[i].pin_state == SKL_PIN_UNBIND) {
938 mpin[i].in_use = true;
939 mpin[i].id.module_id = id.module_id;
940 mpin[i].id.instance_id = id.instance_id;
941 mpin[i].id.pvt_id = id.pvt_id;
942 mpin[i].tgt_mcfg = tgt_cfg;
946 if (mpin[i].id.module_id == id.module_id &&
947 mpin[i].id.instance_id == id.instance_id &&
948 mpin[i].pin_state == SKL_PIN_UNBIND) {
950 mpin[i].tgt_mcfg = tgt_cfg;
959 static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
961 if (mpin[q_index].is_dynamic) {
962 mpin[q_index].in_use = false;
963 mpin[q_index].id.module_id = 0;
964 mpin[q_index].id.instance_id = 0;
965 mpin[q_index].id.pvt_id = 0;
967 mpin[q_index].pin_state = SKL_PIN_UNBIND;
968 mpin[q_index].tgt_mcfg = NULL;
971 /* Module state will be set to unint, if all the out pin state is UNBIND */
973 static void skl_clear_module_state(struct skl_module_pin *mpin, int max,
974 struct skl_module_cfg *mcfg)
979 for (i = 0; i < max; i++) {
980 if (mpin[i].pin_state == SKL_PIN_UNBIND)
987 mcfg->m_state = SKL_MODULE_INIT_DONE;
992 * A module needs to be instanataited in DSP. A mdoule is present in a
993 * collection of module referred as a PIPE.
994 * We first calculate the module format, based on module type and then
995 * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
997 int skl_init_module(struct skl_sst *ctx,
998 struct skl_module_cfg *mconfig)
1000 u16 module_config_size = 0;
1001 void *param_data = NULL;
1003 struct skl_ipc_init_instance_msg msg;
1005 dev_dbg(ctx->dev, "%s: module_id = %d instance=%d\n", __func__,
1006 mconfig->id.module_id, mconfig->id.pvt_id);
1008 if (mconfig->pipe->state != SKL_PIPE_CREATED) {
1009 dev_err(ctx->dev, "Pipe not created state= %d pipe_id= %d\n",
1010 mconfig->pipe->state, mconfig->pipe->ppl_id);
1014 ret = skl_set_module_format(ctx, mconfig,
1015 &module_config_size, ¶m_data);
1017 dev_err(ctx->dev, "Failed to set module format ret=%d\n", ret);
1021 msg.module_id = mconfig->id.module_id;
1022 msg.instance_id = mconfig->id.pvt_id;
1023 msg.ppl_instance_id = mconfig->pipe->ppl_id;
1024 msg.param_data_size = module_config_size;
1025 msg.core_id = mconfig->core_id;
1026 msg.domain = mconfig->domain;
1028 ret = skl_ipc_init_instance(&ctx->ipc, &msg, param_data);
1030 dev_err(ctx->dev, "Failed to init instance ret=%d\n", ret);
1034 mconfig->m_state = SKL_MODULE_INIT_DONE;
1039 static void skl_dump_bind_info(struct skl_sst *ctx, struct skl_module_cfg
1040 *src_module, struct skl_module_cfg *dst_module)
1042 dev_dbg(ctx->dev, "%s: src module_id = %d src_instance=%d\n",
1043 __func__, src_module->id.module_id, src_module->id.pvt_id);
1044 dev_dbg(ctx->dev, "%s: dst_module=%d dst_instance=%d\n", __func__,
1045 dst_module->id.module_id, dst_module->id.pvt_id);
1047 dev_dbg(ctx->dev, "src_module state = %d dst module state = %d\n",
1048 src_module->m_state, dst_module->m_state);
1052 * On module freeup, we need to unbind the module with modules
1053 * it is already bind.
1054 * Find the pin allocated and unbind then using bind_unbind IPC
1056 int skl_unbind_modules(struct skl_sst *ctx,
1057 struct skl_module_cfg *src_mcfg,
1058 struct skl_module_cfg *dst_mcfg)
1061 struct skl_ipc_bind_unbind_msg msg;
1062 struct skl_module_inst_id src_id = src_mcfg->id;
1063 struct skl_module_inst_id dst_id = dst_mcfg->id;
1064 int in_max = dst_mcfg->module->max_input_pins;
1065 int out_max = src_mcfg->module->max_output_pins;
1066 int src_index, dst_index, src_pin_state, dst_pin_state;
1068 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
1070 /* get src queue index */
1071 src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max);
1075 msg.src_queue = src_index;
1077 /* get dst queue index */
1078 dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max);
1082 msg.dst_queue = dst_index;
1084 src_pin_state = src_mcfg->m_out_pin[src_index].pin_state;
1085 dst_pin_state = dst_mcfg->m_in_pin[dst_index].pin_state;
1087 if (src_pin_state != SKL_PIN_BIND_DONE ||
1088 dst_pin_state != SKL_PIN_BIND_DONE)
1091 msg.module_id = src_mcfg->id.module_id;
1092 msg.instance_id = src_mcfg->id.pvt_id;
1093 msg.dst_module_id = dst_mcfg->id.module_id;
1094 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1097 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
1099 /* free queue only if unbind is success */
1100 skl_free_queue(src_mcfg->m_out_pin, src_index);
1101 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1104 * check only if src module bind state, bind is
1105 * always from src -> sink
1107 skl_clear_module_state(src_mcfg->m_out_pin, out_max, src_mcfg);
1113 static void fill_pin_params(struct skl_audio_data_format *pin_fmt,
1114 struct skl_module_fmt *format)
1116 pin_fmt->number_of_channels = format->channels;
1117 pin_fmt->s_freq = format->s_freq;
1118 pin_fmt->bit_depth = format->bit_depth;
1119 pin_fmt->valid_bit_depth = format->valid_bit_depth;
1120 pin_fmt->ch_cfg = format->ch_cfg;
1121 pin_fmt->sample_type = format->sample_type;
1122 pin_fmt->channel_map = format->ch_map;
1123 pin_fmt->interleaving = format->interleaving_style;
1126 #define CPR_SINK_FMT_PARAM_ID 2
1129 * Once a module is instantiated it need to be 'bind' with other modules in
1130 * the pipeline. For binding we need to find the module pins which are bind
1132 * This function finds the pins and then sends bund_unbind IPC message to
1133 * DSP using IPC helper
1135 int skl_bind_modules(struct skl_sst *ctx,
1136 struct skl_module_cfg *src_mcfg,
1137 struct skl_module_cfg *dst_mcfg)
1140 struct skl_ipc_bind_unbind_msg msg;
1141 int in_max = dst_mcfg->module->max_input_pins;
1142 int out_max = src_mcfg->module->max_output_pins;
1143 int src_index, dst_index;
1144 struct skl_module_fmt *format;
1145 struct skl_cpr_pin_fmt pin_fmt;
1146 struct skl_module *module;
1147 struct skl_module_iface *fmt;
1149 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
1151 if (src_mcfg->m_state < SKL_MODULE_INIT_DONE ||
1152 dst_mcfg->m_state < SKL_MODULE_INIT_DONE)
1155 src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_mcfg, out_max);
1159 msg.src_queue = src_index;
1160 dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_mcfg, in_max);
1161 if (dst_index < 0) {
1162 skl_free_queue(src_mcfg->m_out_pin, src_index);
1167 * Copier module requires the separate large_config_set_ipc to
1168 * configure the pins other than 0
1170 if (src_mcfg->m_type == SKL_MODULE_TYPE_COPIER && src_index > 0) {
1171 pin_fmt.sink_id = src_index;
1172 module = src_mcfg->module;
1173 fmt = &module->formats[src_mcfg->fmt_idx];
1175 /* Input fmt is same as that of src module input cfg */
1176 format = &fmt->inputs[0].fmt;
1177 fill_pin_params(&(pin_fmt.src_fmt), format);
1179 format = &fmt->outputs[src_index].fmt;
1180 fill_pin_params(&(pin_fmt.dst_fmt), format);
1181 ret = skl_set_module_params(ctx, (void *)&pin_fmt,
1182 sizeof(struct skl_cpr_pin_fmt),
1183 CPR_SINK_FMT_PARAM_ID, src_mcfg);
1189 msg.dst_queue = dst_index;
1191 dev_dbg(ctx->dev, "src queue = %d dst queue =%d\n",
1192 msg.src_queue, msg.dst_queue);
1194 msg.module_id = src_mcfg->id.module_id;
1195 msg.instance_id = src_mcfg->id.pvt_id;
1196 msg.dst_module_id = dst_mcfg->id.module_id;
1197 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1200 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
1203 src_mcfg->m_state = SKL_MODULE_BIND_DONE;
1204 src_mcfg->m_out_pin[src_index].pin_state = SKL_PIN_BIND_DONE;
1205 dst_mcfg->m_in_pin[dst_index].pin_state = SKL_PIN_BIND_DONE;
1209 /* error case , if IPC fails, clear the queue index */
1210 skl_free_queue(src_mcfg->m_out_pin, src_index);
1211 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1216 static int skl_set_pipe_state(struct skl_sst *ctx, struct skl_pipe *pipe,
1217 enum skl_ipc_pipeline_state state)
1219 dev_dbg(ctx->dev, "%s: pipe_satate = %d\n", __func__, state);
1221 return skl_ipc_set_pipeline_state(&ctx->ipc, pipe->ppl_id, state);
1225 * A pipeline is a collection of modules. Before a module in instantiated a
1226 * pipeline needs to be created for it.
1227 * This function creates pipeline, by sending create pipeline IPC messages
1230 int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe)
1234 dev_dbg(ctx->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id);
1236 ret = skl_ipc_create_pipeline(&ctx->ipc, pipe->memory_pages,
1237 pipe->pipe_priority, pipe->ppl_id,
1240 dev_err(ctx->dev, "Failed to create pipeline\n");
1244 pipe->state = SKL_PIPE_CREATED;
1250 * A pipeline needs to be deleted on cleanup. If a pipeline is running, then
1251 * pause the pipeline first and then delete it
1252 * The pipe delete is done by sending delete pipeline IPC. DSP will stop the
1253 * DMA engines and releases resources
1255 int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1259 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1261 /* If pipe is started, do stop the pipe in FW. */
1262 if (pipe->state >= SKL_PIPE_STARTED) {
1263 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1265 dev_err(ctx->dev, "Failed to stop pipeline\n");
1269 pipe->state = SKL_PIPE_PAUSED;
1272 /* If pipe was not created in FW, do not try to delete it */
1273 if (pipe->state < SKL_PIPE_CREATED)
1276 ret = skl_ipc_delete_pipeline(&ctx->ipc, pipe->ppl_id);
1278 dev_err(ctx->dev, "Failed to delete pipeline\n");
1282 pipe->state = SKL_PIPE_INVALID;
1288 * A pipeline is also a scheduling entity in DSP which can be run, stopped
1289 * For processing data the pipe need to be run by sending IPC set pipe state
1292 int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1296 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1298 /* If pipe was not created in FW, do not try to pause or delete */
1299 if (pipe->state < SKL_PIPE_CREATED)
1302 /* Pipe has to be paused before it is started */
1303 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1305 dev_err(ctx->dev, "Failed to pause pipe\n");
1309 pipe->state = SKL_PIPE_PAUSED;
1311 ret = skl_set_pipe_state(ctx, pipe, PPL_RUNNING);
1313 dev_err(ctx->dev, "Failed to start pipe\n");
1317 pipe->state = SKL_PIPE_STARTED;
1323 * Stop the pipeline by sending set pipe state IPC
1324 * DSP doesnt implement stop so we always send pause message
1326 int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1330 dev_dbg(ctx->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id);
1332 /* If pipe was not created in FW, do not try to pause or delete */
1333 if (pipe->state < SKL_PIPE_PAUSED)
1336 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1338 dev_dbg(ctx->dev, "Failed to stop pipe\n");
1342 pipe->state = SKL_PIPE_PAUSED;
1348 * Reset the pipeline by sending set pipe state IPC this will reset the DMA
1351 int skl_reset_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1355 /* If pipe was not created in FW, do not try to pause or delete */
1356 if (pipe->state < SKL_PIPE_PAUSED)
1359 ret = skl_set_pipe_state(ctx, pipe, PPL_RESET);
1361 dev_dbg(ctx->dev, "Failed to reset pipe ret=%d\n", ret);
1365 pipe->state = SKL_PIPE_RESET;
1370 /* Algo parameter set helper function */
1371 int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size,
1372 u32 param_id, struct skl_module_cfg *mcfg)
1374 struct skl_ipc_large_config_msg msg;
1376 msg.module_id = mcfg->id.module_id;
1377 msg.instance_id = mcfg->id.pvt_id;
1378 msg.param_data_size = size;
1379 msg.large_param_id = param_id;
1381 return skl_ipc_set_large_config(&ctx->ipc, &msg, params);
1384 int skl_get_module_params(struct skl_sst *ctx, u32 *params, int size,
1385 u32 param_id, struct skl_module_cfg *mcfg)
1387 struct skl_ipc_large_config_msg msg;
1389 msg.module_id = mcfg->id.module_id;
1390 msg.instance_id = mcfg->id.pvt_id;
1391 msg.param_data_size = size;
1392 msg.large_param_id = param_id;
1394 return skl_ipc_get_large_config(&ctx->ipc, &msg, params);