2 * skl-message.c - HDA DSP interface for FW registration, Pipe and Module
5 * Copyright (C) 2015 Intel Corp
6 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
7 * Jeeja KP <jeeja.kp@intel.com>
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as version 2, as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include "skl-sst-dsp.h"
25 #include "skl-sst-ipc.h"
27 #include "../common/sst-dsp.h"
28 #include "../common/sst-dsp-priv.h"
29 #include "skl-topology.h"
30 #include "skl-tplg-interface.h"
32 static int skl_alloc_dma_buf(struct device *dev,
33 struct snd_dma_buffer *dmab, size_t size)
35 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
36 struct hdac_bus *bus = ebus_to_hbus(ebus);
41 return bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab);
44 static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
46 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
47 struct hdac_bus *bus = ebus_to_hbus(ebus);
52 bus->io_ops->dma_free_pages(bus, dmab);
57 #define NOTIFICATION_PARAM_ID 3
58 #define NOTIFICATION_MASK 0xf
60 /* disable notfication for underruns/overruns from firmware module */
61 void skl_dsp_enable_notification(struct skl_sst *ctx, bool enable)
63 struct notification_mask mask;
64 struct skl_ipc_large_config_msg msg = {0};
66 mask.notify = NOTIFICATION_MASK;
69 msg.large_param_id = NOTIFICATION_PARAM_ID;
70 msg.param_data_size = sizeof(mask);
72 skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask);
75 static int skl_dsp_setup_spib(struct device *dev, unsigned int size,
76 int stream_tag, int enable)
78 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
79 struct hdac_bus *bus = ebus_to_hbus(ebus);
80 struct hdac_stream *stream = snd_hdac_get_stream(bus,
81 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
82 struct hdac_ext_stream *estream;
87 estream = stream_to_hdac_ext_stream(stream);
88 /* enable/disable SPIB for this hdac stream */
89 snd_hdac_ext_stream_spbcap_enable(ebus, enable, stream->index);
91 /* set the spib value */
92 snd_hdac_ext_stream_set_spib(ebus, estream, size);
97 static int skl_dsp_prepare(struct device *dev, unsigned int format,
98 unsigned int size, struct snd_dma_buffer *dmab)
100 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
101 struct hdac_bus *bus = ebus_to_hbus(ebus);
102 struct hdac_ext_stream *estream;
103 struct hdac_stream *stream;
104 struct snd_pcm_substream substream;
110 memset(&substream, 0, sizeof(substream));
111 substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
113 estream = snd_hdac_ext_stream_assign(ebus, &substream,
114 HDAC_EXT_STREAM_TYPE_HOST);
118 stream = hdac_stream(estream);
120 /* assign decouple host dma channel */
121 ret = snd_hdac_dsp_prepare(stream, format, size, dmab);
125 skl_dsp_setup_spib(dev, size, stream->stream_tag, true);
127 return stream->stream_tag;
130 static int skl_dsp_trigger(struct device *dev, bool start, int stream_tag)
132 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
133 struct hdac_stream *stream;
134 struct hdac_bus *bus = ebus_to_hbus(ebus);
139 stream = snd_hdac_get_stream(bus,
140 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
144 snd_hdac_dsp_trigger(stream, start);
149 static int skl_dsp_cleanup(struct device *dev,
150 struct snd_dma_buffer *dmab, int stream_tag)
152 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
153 struct hdac_stream *stream;
154 struct hdac_ext_stream *estream;
155 struct hdac_bus *bus = ebus_to_hbus(ebus);
160 stream = snd_hdac_get_stream(bus,
161 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
165 estream = stream_to_hdac_ext_stream(stream);
166 skl_dsp_setup_spib(dev, 0, stream_tag, false);
167 snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
169 snd_hdac_dsp_cleanup(stream, dmab);
174 static struct skl_dsp_loader_ops skl_get_loader_ops(void)
176 struct skl_dsp_loader_ops loader_ops;
178 memset(&loader_ops, 0, sizeof(struct skl_dsp_loader_ops));
180 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
181 loader_ops.free_dma_buf = skl_free_dma_buf;
186 static struct skl_dsp_loader_ops bxt_get_loader_ops(void)
188 struct skl_dsp_loader_ops loader_ops;
190 memset(&loader_ops, 0, sizeof(loader_ops));
192 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
193 loader_ops.free_dma_buf = skl_free_dma_buf;
194 loader_ops.prepare = skl_dsp_prepare;
195 loader_ops.trigger = skl_dsp_trigger;
196 loader_ops.cleanup = skl_dsp_cleanup;
201 static const struct skl_dsp_ops dsp_ops[] = {
204 .loader_ops = skl_get_loader_ops,
205 .init = skl_sst_dsp_init,
206 .init_fw = skl_sst_init_fw,
207 .cleanup = skl_sst_dsp_cleanup
211 .loader_ops = skl_get_loader_ops,
212 .init = kbl_sst_dsp_init,
213 .init_fw = skl_sst_init_fw,
214 .cleanup = skl_sst_dsp_cleanup
218 .loader_ops = bxt_get_loader_ops,
219 .init = bxt_sst_dsp_init,
220 .init_fw = bxt_sst_init_fw,
221 .cleanup = bxt_sst_dsp_cleanup
225 .loader_ops = bxt_get_loader_ops,
226 .init = bxt_sst_dsp_init,
227 .init_fw = bxt_sst_init_fw,
228 .cleanup = bxt_sst_dsp_cleanup
232 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id)
236 for (i = 0; i < ARRAY_SIZE(dsp_ops); i++) {
237 if (dsp_ops[i].id == pci_id)
244 int skl_init_dsp(struct skl *skl)
246 void __iomem *mmio_base;
247 struct hdac_ext_bus *ebus = &skl->ebus;
248 struct hdac_bus *bus = ebus_to_hbus(ebus);
249 struct skl_dsp_loader_ops loader_ops;
251 const struct skl_dsp_ops *ops;
254 /* enable ppcap interrupt */
255 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
256 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
258 /* read the BAR of the ADSP MMIO */
259 mmio_base = pci_ioremap_bar(skl->pci, 4);
260 if (mmio_base == NULL) {
261 dev_err(bus->dev, "ioremap error\n");
265 ops = skl_get_dsp_ops(skl->pci->device);
269 loader_ops = ops->loader_ops();
270 ret = ops->init(bus->dev, mmio_base, irq,
271 skl->fw_name, loader_ops,
277 skl->skl_sst->dsp_ops = ops;
278 dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
283 int skl_free_dsp(struct skl *skl)
285 struct hdac_ext_bus *ebus = &skl->ebus;
286 struct hdac_bus *bus = ebus_to_hbus(ebus);
287 struct skl_sst *ctx = skl->skl_sst;
289 /* disable ppcap interrupt */
290 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
292 ctx->dsp_ops->cleanup(bus->dev, ctx);
294 if (ctx->dsp->addr.lpe)
295 iounmap(ctx->dsp->addr.lpe);
301 * In the case of "suspend_active" i.e, the Audio IP being active
302 * during system suspend, immediately excecute any pending D0i3 work
303 * before suspending. This is needed for the IP to work in low power
304 * mode during system suspend. In the case of normal suspend, cancel
305 * any pending D0i3 work.
307 int skl_suspend_late_dsp(struct skl *skl)
309 struct skl_sst *ctx = skl->skl_sst;
310 struct delayed_work *dwork;
315 dwork = &ctx->d0i3.work;
317 if (dwork->work.func) {
318 if (skl->supend_active)
319 flush_delayed_work(dwork);
321 cancel_delayed_work_sync(dwork);
327 int skl_suspend_dsp(struct skl *skl)
329 struct skl_sst *ctx = skl->skl_sst;
332 /* if ppcap is not supported return 0 */
333 if (!skl->ebus.bus.ppcap)
336 ret = skl_dsp_sleep(ctx->dsp);
340 /* disable ppcap interrupt */
341 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
342 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, false);
347 int skl_resume_dsp(struct skl *skl)
349 struct skl_sst *ctx = skl->skl_sst;
352 /* if ppcap is not supported return 0 */
353 if (!skl->ebus.bus.ppcap)
356 /* enable ppcap interrupt */
357 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
358 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
360 /* check if DSP 1st boot is done */
361 if (skl->skl_sst->is_first_boot == true)
364 ret = skl_dsp_wake(ctx->dsp);
368 skl_dsp_enable_notification(skl->skl_sst, false);
372 enum skl_bitdepth skl_get_bit_depth(int params)
376 return SKL_DEPTH_8BIT;
379 return SKL_DEPTH_16BIT;
382 return SKL_DEPTH_24BIT;
385 return SKL_DEPTH_32BIT;
388 return SKL_DEPTH_INVALID;
394 * Each module in DSP expects a base module configuration, which consists of
395 * PCM format information, which we calculate in driver and resource values
396 * which are read from widget information passed through topology binary
397 * This is send when we create a module with INIT_INSTANCE IPC msg
399 static void skl_set_base_module_format(struct skl_sst *ctx,
400 struct skl_module_cfg *mconfig,
401 struct skl_base_cfg *base_cfg)
403 struct skl_module_fmt *format = &mconfig->in_fmt[0];
405 base_cfg->audio_fmt.number_of_channels = (u8)format->channels;
407 base_cfg->audio_fmt.s_freq = format->s_freq;
408 base_cfg->audio_fmt.bit_depth = format->bit_depth;
409 base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
410 base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
412 dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
413 format->bit_depth, format->valid_bit_depth,
416 base_cfg->audio_fmt.channel_map = format->ch_map;
418 base_cfg->audio_fmt.interleaving = format->interleaving_style;
420 base_cfg->cps = mconfig->mcps;
421 base_cfg->ibs = mconfig->ibs;
422 base_cfg->obs = mconfig->obs;
423 base_cfg->is_pages = mconfig->mem_pages;
427 * Copies copier capabilities into copier module and updates copier module
430 static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
431 struct skl_cpr_cfg *cpr_mconfig)
433 if (mconfig->formats_config.caps_size == 0)
436 memcpy(cpr_mconfig->gtw_cfg.config_data,
437 mconfig->formats_config.caps,
438 mconfig->formats_config.caps_size);
440 cpr_mconfig->gtw_cfg.config_length =
441 (mconfig->formats_config.caps_size) / 4;
444 #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF
446 * Calculate the gatewat settings required for copier module, type of
447 * gateway and index of gateway to use
449 static u32 skl_get_node_id(struct skl_sst *ctx,
450 struct skl_module_cfg *mconfig)
452 union skl_connector_node_id node_id = {0};
453 union skl_ssp_dma_node ssp_node = {0};
454 struct skl_pipe_params *params = mconfig->pipe->p_params;
456 switch (mconfig->dev_type) {
458 node_id.node.dma_type =
459 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
460 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
461 SKL_DMA_I2S_LINK_INPUT_CLASS;
462 node_id.node.vindex = params->host_dma_id +
463 (mconfig->vbus_id << 3);
467 node_id.node.dma_type =
468 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
469 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
470 SKL_DMA_I2S_LINK_INPUT_CLASS;
471 ssp_node.dma_node.time_slot_index = mconfig->time_slot;
472 ssp_node.dma_node.i2s_instance = mconfig->vbus_id;
473 node_id.node.vindex = ssp_node.val;
476 case SKL_DEVICE_DMIC:
477 node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
478 node_id.node.vindex = mconfig->vbus_id +
479 (mconfig->time_slot);
482 case SKL_DEVICE_HDALINK:
483 node_id.node.dma_type =
484 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
485 SKL_DMA_HDA_LINK_OUTPUT_CLASS :
486 SKL_DMA_HDA_LINK_INPUT_CLASS;
487 node_id.node.vindex = params->link_dma_id;
490 case SKL_DEVICE_HDAHOST:
491 node_id.node.dma_type =
492 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
493 SKL_DMA_HDA_HOST_OUTPUT_CLASS :
494 SKL_DMA_HDA_HOST_INPUT_CLASS;
495 node_id.node.vindex = params->host_dma_id;
499 node_id.val = 0xFFFFFFFF;
506 static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx,
507 struct skl_module_cfg *mconfig,
508 struct skl_cpr_cfg *cpr_mconfig)
510 cpr_mconfig->gtw_cfg.node_id = skl_get_node_id(ctx, mconfig);
512 if (cpr_mconfig->gtw_cfg.node_id == SKL_NON_GATEWAY_CPR_NODE_ID) {
513 cpr_mconfig->cpr_feature_mask = 0;
517 if (SKL_CONN_SOURCE == mconfig->hw_conn_type)
518 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->obs;
520 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->ibs;
522 cpr_mconfig->cpr_feature_mask = 0;
523 cpr_mconfig->gtw_cfg.config_length = 0;
525 skl_copy_copier_caps(mconfig, cpr_mconfig);
528 #define DMA_CONTROL_ID 5
530 int skl_dsp_set_dma_control(struct skl_sst *ctx, struct skl_module_cfg *mconfig)
532 struct skl_dma_control *dma_ctrl;
533 struct skl_ipc_large_config_msg msg = {0};
538 * if blob size zero, then return
540 if (mconfig->formats_config.caps_size == 0)
543 msg.large_param_id = DMA_CONTROL_ID;
544 msg.param_data_size = sizeof(struct skl_dma_control) +
545 mconfig->formats_config.caps_size;
547 dma_ctrl = kzalloc(msg.param_data_size, GFP_KERNEL);
548 if (dma_ctrl == NULL)
551 dma_ctrl->node_id = skl_get_node_id(ctx, mconfig);
554 dma_ctrl->config_length = mconfig->formats_config.caps_size / 4;
556 memcpy(dma_ctrl->config_data, mconfig->formats_config.caps,
557 mconfig->formats_config.caps_size);
559 err = skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)dma_ctrl);
565 static void skl_setup_out_format(struct skl_sst *ctx,
566 struct skl_module_cfg *mconfig,
567 struct skl_audio_data_format *out_fmt)
569 struct skl_module_fmt *format = &mconfig->out_fmt[0];
571 out_fmt->number_of_channels = (u8)format->channels;
572 out_fmt->s_freq = format->s_freq;
573 out_fmt->bit_depth = format->bit_depth;
574 out_fmt->valid_bit_depth = format->valid_bit_depth;
575 out_fmt->ch_cfg = format->ch_cfg;
577 out_fmt->channel_map = format->ch_map;
578 out_fmt->interleaving = format->interleaving_style;
579 out_fmt->sample_type = format->sample_type;
581 dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
582 out_fmt->number_of_channels, format->s_freq, format->bit_depth);
586 * DSP needs SRC module for frequency conversion, SRC takes base module
587 * configuration and the target frequency as extra parameter passed as src
590 static void skl_set_src_format(struct skl_sst *ctx,
591 struct skl_module_cfg *mconfig,
592 struct skl_src_module_cfg *src_mconfig)
594 struct skl_module_fmt *fmt = &mconfig->out_fmt[0];
596 skl_set_base_module_format(ctx, mconfig,
597 (struct skl_base_cfg *)src_mconfig);
599 src_mconfig->src_cfg = fmt->s_freq;
603 * DSP needs updown module to do channel conversion. updown module take base
604 * module configuration and channel configuration
605 * It also take coefficients and now we have defaults applied here
607 static void skl_set_updown_mixer_format(struct skl_sst *ctx,
608 struct skl_module_cfg *mconfig,
609 struct skl_up_down_mixer_cfg *mixer_mconfig)
611 struct skl_module_fmt *fmt = &mconfig->out_fmt[0];
614 skl_set_base_module_format(ctx, mconfig,
615 (struct skl_base_cfg *)mixer_mconfig);
616 mixer_mconfig->out_ch_cfg = fmt->ch_cfg;
618 /* Select F/W default coefficient */
619 mixer_mconfig->coeff_sel = 0x0;
621 /* User coeff, don't care since we are selecting F/W defaults */
622 for (i = 0; i < UP_DOWN_MIXER_MAX_COEFF; i++)
623 mixer_mconfig->coeff[i] = 0xDEADBEEF;
627 * 'copier' is DSP internal module which copies data from Host DMA (HDA host
628 * dma) or link (hda link, SSP, PDM)
629 * Here we calculate the copier module parameters, like PCM format, output
630 * format, gateway settings
631 * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
633 static void skl_set_copier_format(struct skl_sst *ctx,
634 struct skl_module_cfg *mconfig,
635 struct skl_cpr_cfg *cpr_mconfig)
637 struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
638 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
640 skl_set_base_module_format(ctx, mconfig, base_cfg);
642 skl_setup_out_format(ctx, mconfig, out_fmt);
643 skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig);
647 * Algo module are DSP pre processing modules. Algo module take base module
648 * configuration and params
651 static void skl_set_algo_format(struct skl_sst *ctx,
652 struct skl_module_cfg *mconfig,
653 struct skl_algo_cfg *algo_mcfg)
655 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)algo_mcfg;
657 skl_set_base_module_format(ctx, mconfig, base_cfg);
659 if (mconfig->formats_config.caps_size == 0)
662 memcpy(algo_mcfg->params,
663 mconfig->formats_config.caps,
664 mconfig->formats_config.caps_size);
669 * Mic select module allows selecting one or many input channels, thus
672 * Mic select module take base module configuration and out-format
675 static void skl_set_base_outfmt_format(struct skl_sst *ctx,
676 struct skl_module_cfg *mconfig,
677 struct skl_base_outfmt_cfg *base_outfmt_mcfg)
679 struct skl_audio_data_format *out_fmt = &base_outfmt_mcfg->out_fmt;
680 struct skl_base_cfg *base_cfg =
681 (struct skl_base_cfg *)base_outfmt_mcfg;
683 skl_set_base_module_format(ctx, mconfig, base_cfg);
684 skl_setup_out_format(ctx, mconfig, out_fmt);
687 static u16 skl_get_module_param_size(struct skl_sst *ctx,
688 struct skl_module_cfg *mconfig)
692 switch (mconfig->m_type) {
693 case SKL_MODULE_TYPE_COPIER:
694 param_size = sizeof(struct skl_cpr_cfg);
695 param_size += mconfig->formats_config.caps_size;
698 case SKL_MODULE_TYPE_SRCINT:
699 return sizeof(struct skl_src_module_cfg);
701 case SKL_MODULE_TYPE_UPDWMIX:
702 return sizeof(struct skl_up_down_mixer_cfg);
704 case SKL_MODULE_TYPE_ALGO:
705 param_size = sizeof(struct skl_base_cfg);
706 param_size += mconfig->formats_config.caps_size;
709 case SKL_MODULE_TYPE_BASE_OUTFMT:
710 case SKL_MODULE_TYPE_KPB:
711 return sizeof(struct skl_base_outfmt_cfg);
715 * return only base cfg when no specific module type is
718 return sizeof(struct skl_base_cfg);
725 * DSP firmware supports various modules like copier, SRC, updown etc.
726 * These modules required various parameters to be calculated and sent for
727 * the module initialization to DSP. By default a generic module needs only
728 * base module format configuration
731 static int skl_set_module_format(struct skl_sst *ctx,
732 struct skl_module_cfg *module_config,
733 u16 *module_config_size,
738 param_size = skl_get_module_param_size(ctx, module_config);
740 *param_data = kzalloc(param_size, GFP_KERNEL);
741 if (NULL == *param_data)
744 *module_config_size = param_size;
746 switch (module_config->m_type) {
747 case SKL_MODULE_TYPE_COPIER:
748 skl_set_copier_format(ctx, module_config, *param_data);
751 case SKL_MODULE_TYPE_SRCINT:
752 skl_set_src_format(ctx, module_config, *param_data);
755 case SKL_MODULE_TYPE_UPDWMIX:
756 skl_set_updown_mixer_format(ctx, module_config, *param_data);
759 case SKL_MODULE_TYPE_ALGO:
760 skl_set_algo_format(ctx, module_config, *param_data);
763 case SKL_MODULE_TYPE_BASE_OUTFMT:
764 case SKL_MODULE_TYPE_KPB:
765 skl_set_base_outfmt_format(ctx, module_config, *param_data);
769 skl_set_base_module_format(ctx, module_config, *param_data);
774 dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n",
775 module_config->id.module_id, param_size);
776 print_hex_dump_debug("Module params:", DUMP_PREFIX_OFFSET, 8, 4,
777 *param_data, param_size, false);
781 static int skl_get_queue_index(struct skl_module_pin *mpin,
782 struct skl_module_inst_id id, int max)
786 for (i = 0; i < max; i++) {
787 if (mpin[i].id.module_id == id.module_id &&
788 mpin[i].id.instance_id == id.instance_id)
796 * Allocates queue for each module.
797 * if dynamic, the pin_index is allocated 0 to max_pin.
798 * In static, the pin_index is fixed based on module_id and instance id
800 static int skl_alloc_queue(struct skl_module_pin *mpin,
801 struct skl_module_cfg *tgt_cfg, int max)
804 struct skl_module_inst_id id = tgt_cfg->id;
806 * if pin in dynamic, find first free pin
807 * otherwise find match module and instance id pin as topology will
808 * ensure a unique pin is assigned to this so no need to
811 for (i = 0; i < max; i++) {
812 if (mpin[i].is_dynamic) {
813 if (!mpin[i].in_use &&
814 mpin[i].pin_state == SKL_PIN_UNBIND) {
816 mpin[i].in_use = true;
817 mpin[i].id.module_id = id.module_id;
818 mpin[i].id.instance_id = id.instance_id;
819 mpin[i].id.pvt_id = id.pvt_id;
820 mpin[i].tgt_mcfg = tgt_cfg;
824 if (mpin[i].id.module_id == id.module_id &&
825 mpin[i].id.instance_id == id.instance_id &&
826 mpin[i].pin_state == SKL_PIN_UNBIND) {
828 mpin[i].tgt_mcfg = tgt_cfg;
837 static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
839 if (mpin[q_index].is_dynamic) {
840 mpin[q_index].in_use = false;
841 mpin[q_index].id.module_id = 0;
842 mpin[q_index].id.instance_id = 0;
843 mpin[q_index].id.pvt_id = 0;
845 mpin[q_index].pin_state = SKL_PIN_UNBIND;
846 mpin[q_index].tgt_mcfg = NULL;
849 /* Module state will be set to unint, if all the out pin state is UNBIND */
851 static void skl_clear_module_state(struct skl_module_pin *mpin, int max,
852 struct skl_module_cfg *mcfg)
857 for (i = 0; i < max; i++) {
858 if (mpin[i].pin_state == SKL_PIN_UNBIND)
865 mcfg->m_state = SKL_MODULE_INIT_DONE;
870 * A module needs to be instanataited in DSP. A mdoule is present in a
871 * collection of module referred as a PIPE.
872 * We first calculate the module format, based on module type and then
873 * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
875 int skl_init_module(struct skl_sst *ctx,
876 struct skl_module_cfg *mconfig)
878 u16 module_config_size = 0;
879 void *param_data = NULL;
881 struct skl_ipc_init_instance_msg msg;
883 dev_dbg(ctx->dev, "%s: module_id = %d instance=%d\n", __func__,
884 mconfig->id.module_id, mconfig->id.pvt_id);
886 if (mconfig->pipe->state != SKL_PIPE_CREATED) {
887 dev_err(ctx->dev, "Pipe not created state= %d pipe_id= %d\n",
888 mconfig->pipe->state, mconfig->pipe->ppl_id);
892 ret = skl_set_module_format(ctx, mconfig,
893 &module_config_size, ¶m_data);
895 dev_err(ctx->dev, "Failed to set module format ret=%d\n", ret);
899 msg.module_id = mconfig->id.module_id;
900 msg.instance_id = mconfig->id.pvt_id;
901 msg.ppl_instance_id = mconfig->pipe->ppl_id;
902 msg.param_data_size = module_config_size;
903 msg.core_id = mconfig->core_id;
904 msg.domain = mconfig->domain;
906 ret = skl_ipc_init_instance(&ctx->ipc, &msg, param_data);
908 dev_err(ctx->dev, "Failed to init instance ret=%d\n", ret);
912 mconfig->m_state = SKL_MODULE_INIT_DONE;
917 static void skl_dump_bind_info(struct skl_sst *ctx, struct skl_module_cfg
918 *src_module, struct skl_module_cfg *dst_module)
920 dev_dbg(ctx->dev, "%s: src module_id = %d src_instance=%d\n",
921 __func__, src_module->id.module_id, src_module->id.pvt_id);
922 dev_dbg(ctx->dev, "%s: dst_module=%d dst_instacne=%d\n", __func__,
923 dst_module->id.module_id, dst_module->id.pvt_id);
925 dev_dbg(ctx->dev, "src_module state = %d dst module state = %d\n",
926 src_module->m_state, dst_module->m_state);
930 * On module freeup, we need to unbind the module with modules
931 * it is already bind.
932 * Find the pin allocated and unbind then using bind_unbind IPC
934 int skl_unbind_modules(struct skl_sst *ctx,
935 struct skl_module_cfg *src_mcfg,
936 struct skl_module_cfg *dst_mcfg)
939 struct skl_ipc_bind_unbind_msg msg;
940 struct skl_module_inst_id src_id = src_mcfg->id;
941 struct skl_module_inst_id dst_id = dst_mcfg->id;
942 int in_max = dst_mcfg->max_in_queue;
943 int out_max = src_mcfg->max_out_queue;
944 int src_index, dst_index, src_pin_state, dst_pin_state;
946 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
948 /* get src queue index */
949 src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max);
953 msg.src_queue = src_index;
955 /* get dst queue index */
956 dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max);
960 msg.dst_queue = dst_index;
962 src_pin_state = src_mcfg->m_out_pin[src_index].pin_state;
963 dst_pin_state = dst_mcfg->m_in_pin[dst_index].pin_state;
965 if (src_pin_state != SKL_PIN_BIND_DONE ||
966 dst_pin_state != SKL_PIN_BIND_DONE)
969 msg.module_id = src_mcfg->id.module_id;
970 msg.instance_id = src_mcfg->id.pvt_id;
971 msg.dst_module_id = dst_mcfg->id.module_id;
972 msg.dst_instance_id = dst_mcfg->id.pvt_id;
975 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
977 /* free queue only if unbind is success */
978 skl_free_queue(src_mcfg->m_out_pin, src_index);
979 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
982 * check only if src module bind state, bind is
983 * always from src -> sink
985 skl_clear_module_state(src_mcfg->m_out_pin, out_max, src_mcfg);
992 * Once a module is instantiated it need to be 'bind' with other modules in
993 * the pipeline. For binding we need to find the module pins which are bind
995 * This function finds the pins and then sends bund_unbind IPC message to
996 * DSP using IPC helper
998 int skl_bind_modules(struct skl_sst *ctx,
999 struct skl_module_cfg *src_mcfg,
1000 struct skl_module_cfg *dst_mcfg)
1003 struct skl_ipc_bind_unbind_msg msg;
1004 int in_max = dst_mcfg->max_in_queue;
1005 int out_max = src_mcfg->max_out_queue;
1006 int src_index, dst_index;
1008 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
1010 if (src_mcfg->m_state < SKL_MODULE_INIT_DONE ||
1011 dst_mcfg->m_state < SKL_MODULE_INIT_DONE)
1014 src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_mcfg, out_max);
1018 msg.src_queue = src_index;
1019 dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_mcfg, in_max);
1020 if (dst_index < 0) {
1021 skl_free_queue(src_mcfg->m_out_pin, src_index);
1025 msg.dst_queue = dst_index;
1027 dev_dbg(ctx->dev, "src queue = %d dst queue =%d\n",
1028 msg.src_queue, msg.dst_queue);
1030 msg.module_id = src_mcfg->id.module_id;
1031 msg.instance_id = src_mcfg->id.pvt_id;
1032 msg.dst_module_id = dst_mcfg->id.module_id;
1033 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1036 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
1039 src_mcfg->m_state = SKL_MODULE_BIND_DONE;
1040 src_mcfg->m_out_pin[src_index].pin_state = SKL_PIN_BIND_DONE;
1041 dst_mcfg->m_in_pin[dst_index].pin_state = SKL_PIN_BIND_DONE;
1043 /* error case , if IPC fails, clear the queue index */
1044 skl_free_queue(src_mcfg->m_out_pin, src_index);
1045 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1051 static int skl_set_pipe_state(struct skl_sst *ctx, struct skl_pipe *pipe,
1052 enum skl_ipc_pipeline_state state)
1054 dev_dbg(ctx->dev, "%s: pipe_satate = %d\n", __func__, state);
1056 return skl_ipc_set_pipeline_state(&ctx->ipc, pipe->ppl_id, state);
1060 * A pipeline is a collection of modules. Before a module in instantiated a
1061 * pipeline needs to be created for it.
1062 * This function creates pipeline, by sending create pipeline IPC messages
1065 int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe)
1069 dev_dbg(ctx->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id);
1071 ret = skl_ipc_create_pipeline(&ctx->ipc, pipe->memory_pages,
1072 pipe->pipe_priority, pipe->ppl_id,
1075 dev_err(ctx->dev, "Failed to create pipeline\n");
1079 pipe->state = SKL_PIPE_CREATED;
1085 * A pipeline needs to be deleted on cleanup. If a pipeline is running, then
1086 * pause the pipeline first and then delete it
1087 * The pipe delete is done by sending delete pipeline IPC. DSP will stop the
1088 * DMA engines and releases resources
1090 int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1094 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1096 /* If pipe is started, do stop the pipe in FW. */
1097 if (pipe->state >= SKL_PIPE_STARTED) {
1098 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1100 dev_err(ctx->dev, "Failed to stop pipeline\n");
1104 pipe->state = SKL_PIPE_PAUSED;
1107 /* If pipe was not created in FW, do not try to delete it */
1108 if (pipe->state < SKL_PIPE_CREATED)
1111 ret = skl_ipc_delete_pipeline(&ctx->ipc, pipe->ppl_id);
1113 dev_err(ctx->dev, "Failed to delete pipeline\n");
1117 pipe->state = SKL_PIPE_INVALID;
1123 * A pipeline is also a scheduling entity in DSP which can be run, stopped
1124 * For processing data the pipe need to be run by sending IPC set pipe state
1127 int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1131 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1133 /* If pipe was not created in FW, do not try to pause or delete */
1134 if (pipe->state < SKL_PIPE_CREATED)
1137 /* Pipe has to be paused before it is started */
1138 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1140 dev_err(ctx->dev, "Failed to pause pipe\n");
1144 pipe->state = SKL_PIPE_PAUSED;
1146 ret = skl_set_pipe_state(ctx, pipe, PPL_RUNNING);
1148 dev_err(ctx->dev, "Failed to start pipe\n");
1152 pipe->state = SKL_PIPE_STARTED;
1158 * Stop the pipeline by sending set pipe state IPC
1159 * DSP doesnt implement stop so we always send pause message
1161 int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1165 dev_dbg(ctx->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id);
1167 /* If pipe was not created in FW, do not try to pause or delete */
1168 if (pipe->state < SKL_PIPE_PAUSED)
1171 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1173 dev_dbg(ctx->dev, "Failed to stop pipe\n");
1177 pipe->state = SKL_PIPE_PAUSED;
1183 * Reset the pipeline by sending set pipe state IPC this will reset the DMA
1186 int skl_reset_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1190 /* If pipe was not created in FW, do not try to pause or delete */
1191 if (pipe->state < SKL_PIPE_PAUSED)
1194 ret = skl_set_pipe_state(ctx, pipe, PPL_RESET);
1196 dev_dbg(ctx->dev, "Failed to reset pipe ret=%d\n", ret);
1200 pipe->state = SKL_PIPE_RESET;
1205 /* Algo parameter set helper function */
1206 int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size,
1207 u32 param_id, struct skl_module_cfg *mcfg)
1209 struct skl_ipc_large_config_msg msg;
1211 msg.module_id = mcfg->id.module_id;
1212 msg.instance_id = mcfg->id.pvt_id;
1213 msg.param_data_size = size;
1214 msg.large_param_id = param_id;
1216 return skl_ipc_set_large_config(&ctx->ipc, &msg, params);
1219 int skl_get_module_params(struct skl_sst *ctx, u32 *params, int size,
1220 u32 param_id, struct skl_module_cfg *mcfg)
1222 struct skl_ipc_large_config_msg msg;
1224 msg.module_id = mcfg->id.module_id;
1225 msg.instance_id = mcfg->id.pvt_id;
1226 msg.param_data_size = size;
1227 msg.large_param_id = param_id;
1229 return skl_ipc_get_large_config(&ctx->ipc, &msg, params);