2 * cht_bsw_rt5672.c - ASoc Machine driver for Intel Cherryview-based platforms
3 * Cherrytrail and Braswell, with RT5672 codec.
5 * Copyright (C) 2014 Intel Corp
6 * Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
7 * Mengdong Lin <mengdong.lin@intel.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
19 #include <linux/input.h>
20 #include <linux/module.h>
21 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <linux/clk.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc.h>
27 #include <sound/jack.h>
28 #include <sound/soc-acpi.h>
29 #include "../../codecs/rt5670.h"
30 #include "../atom/sst-atom-controls.h"
33 /* The platform clock #3 outputs 19.2Mhz clock to codec as I2S MCLK */
34 #define CHT_PLAT_CLK_3_HZ 19200000
35 #define CHT_CODEC_DAI "rt5670-aif1"
37 struct cht_mc_private {
38 struct snd_soc_jack headset;
39 char codec_name[SND_ACPI_I2C_ID_LEN];
43 /* Headset jack detection DAPM pins */
44 static struct snd_soc_jack_pin cht_bsw_headset_pins[] = {
47 .mask = SND_JACK_MICROPHONE,
51 .mask = SND_JACK_HEADPHONE,
55 static int platform_clock_control(struct snd_soc_dapm_widget *w,
56 struct snd_kcontrol *k, int event)
58 struct snd_soc_dapm_context *dapm = w->dapm;
59 struct snd_soc_card *card = dapm->card;
60 struct snd_soc_dai *codec_dai;
61 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
64 codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
66 dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
70 if (SND_SOC_DAPM_EVENT_ON(event)) {
72 ret = clk_prepare_enable(ctx->mclk);
75 "could not configure MCLK state");
80 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
81 ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
82 CHT_PLAT_CLK_3_HZ, 48000 * 512);
84 dev_err(card->dev, "can't set codec pll: %d\n", ret);
88 /* set codec sysclk source to PLL */
89 ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
90 48000 * 512, SND_SOC_CLOCK_IN);
92 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
96 /* Set codec sysclk source to its internal clock because codec
97 * PLL will be off when idle and MCLK will also be off by ACPI
98 * when codec is runtime suspended. Codec needs clock for jack
99 * detection and button press.
101 snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_RCCLK,
102 48000 * 512, SND_SOC_CLOCK_IN);
105 clk_disable_unprepare(ctx->mclk);
110 static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
111 SND_SOC_DAPM_HP("Headphone", NULL),
112 SND_SOC_DAPM_MIC("Headset Mic", NULL),
113 SND_SOC_DAPM_MIC("Int Mic", NULL),
114 SND_SOC_DAPM_SPK("Ext Spk", NULL),
115 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
116 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
117 SND_SOC_DAPM_POST_PMD),
120 static const struct snd_soc_dapm_route cht_audio_map[] = {
121 {"IN1P", NULL, "Headset Mic"},
122 {"IN1N", NULL, "Headset Mic"},
123 {"DMIC L1", NULL, "Int Mic"},
124 {"DMIC R1", NULL, "Int Mic"},
125 {"Headphone", NULL, "HPOL"},
126 {"Headphone", NULL, "HPOR"},
127 {"Ext Spk", NULL, "SPOLP"},
128 {"Ext Spk", NULL, "SPOLN"},
129 {"Ext Spk", NULL, "SPORP"},
130 {"Ext Spk", NULL, "SPORN"},
131 {"AIF1 Playback", NULL, "ssp2 Tx"},
132 {"ssp2 Tx", NULL, "codec_out0"},
133 {"ssp2 Tx", NULL, "codec_out1"},
134 {"codec_in0", NULL, "ssp2 Rx"},
135 {"codec_in1", NULL, "ssp2 Rx"},
136 {"ssp2 Rx", NULL, "AIF1 Capture"},
137 {"Headphone", NULL, "Platform Clock"},
138 {"Headset Mic", NULL, "Platform Clock"},
139 {"Int Mic", NULL, "Platform Clock"},
140 {"Ext Spk", NULL, "Platform Clock"},
143 static const struct snd_kcontrol_new cht_mc_controls[] = {
144 SOC_DAPM_PIN_SWITCH("Headphone"),
145 SOC_DAPM_PIN_SWITCH("Headset Mic"),
146 SOC_DAPM_PIN_SWITCH("Int Mic"),
147 SOC_DAPM_PIN_SWITCH("Ext Spk"),
150 static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
151 struct snd_pcm_hw_params *params)
153 struct snd_soc_pcm_runtime *rtd = substream->private_data;
154 struct snd_soc_dai *codec_dai = rtd->codec_dai;
157 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
158 ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
159 CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
161 dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
165 /* set codec sysclk source to PLL */
166 ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
167 params_rate(params) * 512,
170 dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
176 static const struct acpi_gpio_params headset_gpios = { 0, 0, false };
178 static const struct acpi_gpio_mapping cht_rt5672_gpios[] = {
179 { "headset-gpios", &headset_gpios, 1 },
183 static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
186 struct snd_soc_dai *codec_dai = runtime->codec_dai;
187 struct snd_soc_component *component = codec_dai->component;
188 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
190 if (devm_acpi_dev_add_driver_gpios(component->dev, cht_rt5672_gpios))
191 dev_warn(runtime->dev, "Unable to add GPIO mapping table\n");
193 /* Select codec ASRC clock source to track I2S1 clock, because codec
194 * is in slave mode and 100fs I2S format (BCLK = 100 * LRCLK) cannot
195 * be supported by RT5672. Otherwise, ASRC will be disabled and cause
198 rt5670_sel_asrc_clk_src(component,
199 RT5670_DA_STEREO_FILTER
200 | RT5670_DA_MONO_L_FILTER
201 | RT5670_DA_MONO_R_FILTER
202 | RT5670_AD_STEREO_FILTER
203 | RT5670_AD_MONO_L_FILTER
204 | RT5670_AD_MONO_R_FILTER,
205 RT5670_CLK_SEL_I2S1_ASRC);
207 ret = snd_soc_card_jack_new(runtime->card, "Headset",
208 SND_JACK_HEADSET | SND_JACK_BTN_0 |
209 SND_JACK_BTN_1 | SND_JACK_BTN_2,
211 cht_bsw_headset_pins,
212 ARRAY_SIZE(cht_bsw_headset_pins));
216 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
217 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
218 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
220 rt5670_set_jack_detect(component, &ctx->headset);
223 * The firmware might enable the clock at
224 * boot (this information may or may not
225 * be reflected in the enable clock register).
226 * To change the rate we must disable the clock
227 * first to cover these cases. Due to common
228 * clock framework restrictions that do not allow
229 * to disable a clock that has not been enabled,
230 * we need to enable the clock first.
232 ret = clk_prepare_enable(ctx->mclk);
234 clk_disable_unprepare(ctx->mclk);
236 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
239 dev_err(runtime->dev, "unable to set MCLK rate\n");
246 static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
247 struct snd_pcm_hw_params *params)
249 struct snd_interval *rate = hw_param_interval(params,
250 SNDRV_PCM_HW_PARAM_RATE);
251 struct snd_interval *channels = hw_param_interval(params,
252 SNDRV_PCM_HW_PARAM_CHANNELS);
255 /* The DSP will covert the FE rate to 48k, stereo, 24bits */
256 rate->min = rate->max = 48000;
257 channels->min = channels->max = 2;
259 /* set SSP2 to 24-bit */
260 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
263 * Default mode for SSP configuration is TDM 4 slot
265 ret = snd_soc_dai_set_fmt(rtd->codec_dai,
266 SND_SOC_DAIFMT_DSP_B |
267 SND_SOC_DAIFMT_IB_NF |
268 SND_SOC_DAIFMT_CBS_CFS);
270 dev_err(rtd->dev, "can't set format to TDM %d\n", ret);
274 /* TDM 4 slots 24 bit, set Rx & Tx bitmask to 4 active slots */
275 ret = snd_soc_dai_set_tdm_slot(rtd->codec_dai, 0xF, 0xF, 4, 24);
277 dev_err(rtd->dev, "can't set codec TDM slot %d\n", ret);
284 static int cht_aif1_startup(struct snd_pcm_substream *substream)
286 return snd_pcm_hw_constraint_single(substream->runtime,
287 SNDRV_PCM_HW_PARAM_RATE, 48000);
290 static const struct snd_soc_ops cht_aif1_ops = {
291 .startup = cht_aif1_startup,
294 static const struct snd_soc_ops cht_be_ssp2_ops = {
295 .hw_params = cht_aif1_hw_params,
298 SND_SOC_DAILINK_DEF(dummy,
299 DAILINK_COMP_ARRAY(COMP_DUMMY()));
301 SND_SOC_DAILINK_DEF(media,
302 DAILINK_COMP_ARRAY(COMP_CPU("media-cpu-dai")));
304 SND_SOC_DAILINK_DEF(deepbuffer,
305 DAILINK_COMP_ARRAY(COMP_CPU("deepbuffer-cpu-dai")));
307 SND_SOC_DAILINK_DEF(ssp2_port,
308 DAILINK_COMP_ARRAY(COMP_CPU("ssp2-port")));
309 SND_SOC_DAILINK_DEF(ssp2_codec,
310 DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5670:00",
313 SND_SOC_DAILINK_DEF(platform,
314 DAILINK_COMP_ARRAY(COMP_PLATFORM("sst-mfld-platform")));
316 static struct snd_soc_dai_link cht_dailink[] = {
317 /* Front End DAI links */
318 [MERR_DPCM_AUDIO] = {
319 .name = "Audio Port",
320 .stream_name = "Audio",
325 .ops = &cht_aif1_ops,
326 SND_SOC_DAILINK_REG(media, dummy, platform),
328 [MERR_DPCM_DEEP_BUFFER] = {
329 .name = "Deep-Buffer Audio Port",
330 .stream_name = "Deep-Buffer Audio",
334 .ops = &cht_aif1_ops,
335 SND_SOC_DAILINK_REG(deepbuffer, dummy, platform),
338 /* Back End DAI links */
341 .name = "SSP2-Codec",
345 .init = cht_codec_init,
346 .be_hw_params_fixup = cht_codec_fixup,
349 .ops = &cht_be_ssp2_ops,
350 SND_SOC_DAILINK_REG(ssp2_port, ssp2_codec, platform),
354 static int cht_suspend_pre(struct snd_soc_card *card)
356 struct snd_soc_component *component;
357 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
359 for_each_card_components(card, component) {
360 if (!strncmp(component->name,
361 ctx->codec_name, sizeof(ctx->codec_name))) {
363 dev_dbg(component->dev, "disabling jack detect before going to suspend.\n");
364 rt5670_jack_suspend(component);
371 static int cht_resume_post(struct snd_soc_card *card)
373 struct snd_soc_component *component;
374 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
376 for_each_card_components(card, component) {
377 if (!strncmp(component->name,
378 ctx->codec_name, sizeof(ctx->codec_name))) {
380 dev_dbg(component->dev, "enabling jack detect for resume.\n");
381 rt5670_jack_resume(component);
390 static struct snd_soc_card snd_soc_card_cht = {
391 .name = "cht-bsw-rt5672",
392 .owner = THIS_MODULE,
393 .dai_link = cht_dailink,
394 .num_links = ARRAY_SIZE(cht_dailink),
395 .dapm_widgets = cht_dapm_widgets,
396 .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
397 .dapm_routes = cht_audio_map,
398 .num_dapm_routes = ARRAY_SIZE(cht_audio_map),
399 .controls = cht_mc_controls,
400 .num_controls = ARRAY_SIZE(cht_mc_controls),
401 .suspend_pre = cht_suspend_pre,
402 .resume_post = cht_resume_post,
405 #define RT5672_I2C_DEFAULT "i2c-10EC5670:00"
407 static int snd_cht_mc_probe(struct platform_device *pdev)
410 struct cht_mc_private *drv;
411 struct snd_soc_acpi_mach *mach = pdev->dev.platform_data;
412 const char *platform_name;
413 struct acpi_device *adev;
416 drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL);
420 strcpy(drv->codec_name, RT5672_I2C_DEFAULT);
422 /* fixup codec name based on HID */
423 adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1);
425 snprintf(drv->codec_name, sizeof(drv->codec_name),
426 "i2c-%s", acpi_dev_name(adev));
427 put_device(&adev->dev);
428 for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) {
429 if (!strcmp(cht_dailink[i].codecs->name,
430 RT5672_I2C_DEFAULT)) {
431 cht_dailink[i].codecs->name = drv->codec_name;
437 /* override plaform name, if required */
438 platform_name = mach->mach_params.platform;
440 ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht,
445 drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
446 if (IS_ERR(drv->mclk)) {
448 "Failed to get MCLK from pmc_plt_clk_3: %ld\n",
450 return PTR_ERR(drv->mclk);
452 snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
454 /* register the soc card */
455 snd_soc_card_cht.dev = &pdev->dev;
456 ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
459 "snd_soc_register_card failed %d\n", ret_val);
462 platform_set_drvdata(pdev, &snd_soc_card_cht);
466 static struct platform_driver snd_cht_mc_driver = {
468 .name = "cht-bsw-rt5672",
470 .probe = snd_cht_mc_probe,
473 module_platform_driver(snd_cht_mc_driver);
475 MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
476 MODULE_AUTHOR("Subhransu S. Prusty, Mengdong Lin");
477 MODULE_LICENSE("GPL v2");
478 MODULE_ALIAS("platform:cht-bsw-rt5672");