sound/soc/intel/atom/sst/sst_acpi.c

   1 /*
   2  * sst_acpi.c - SST (LPE) driver init file for ACPI enumeration.
   3  *
   4  * Copyright (c) 2013, Intel Corporation.
   5  *
   6  *  Authors:    Ramesh Babu K V <Ramesh.Babu@intel.com>
   7  *  Authors:    Omair Mohammed Abdullah <omair.m.abdullah@intel.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms and conditions of the GNU General Public License,
  11  * version 2, as published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope it will be useful, but WITHOUT
  14  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  16  * more details.
  17  *
  18  *
  19  */
  20
  21 #include <linux/module.h>
  22 #include <linux/fs.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/slab.h>
  25 #include <linux/io.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/firmware.h>
  28 #include <linux/pm_runtime.h>
  29 #include <linux/pm_qos.h>
  30 #include <linux/dmi.h>
  31 #include <linux/acpi.h>
  32 #include <asm/platform_sst_audio.h>
  33 #include <sound/core.h>
  34 #include <sound/soc.h>
  35 #include <sound/compress_driver.h>
  36 #include <acpi/acbuffer.h>
  37 #include <acpi/platform/acenv.h>
  38 #include <acpi/platform/aclinux.h>
  39 #include <acpi/actypes.h>
  40 #include <acpi/acpi_bus.h>
  41 #include <asm/cpu_device_id.h>
  42 #include <asm/iosf_mbi.h>
  43 #include <sound/soc-acpi.h>
  44 #include <sound/soc-acpi-intel-match.h>
  45 #include "../sst-mfld-platform.h"
  46 #include "../../common/sst-dsp.h"
  47 #include "sst.h"
  48
  49 /* LPE viewpoint addresses */
  50 #define SST_BYT_IRAM_PHY_START  0xff2c0000
  51 #define SST_BYT_IRAM_PHY_END    0xff2d4000
  52 #define SST_BYT_DRAM_PHY_START  0xff300000
  53 #define SST_BYT_DRAM_PHY_END    0xff320000
  54 #define SST_BYT_IMR_VIRT_START  0xc0000000 /* virtual addr in LPE */
  55 #define SST_BYT_IMR_VIRT_END    0xc01fffff
  56 #define SST_BYT_SHIM_PHY_ADDR   0xff340000
  57 #define SST_BYT_MBOX_PHY_ADDR   0xff344000
  58 #define SST_BYT_DMA0_PHY_ADDR   0xff298000
  59 #define SST_BYT_DMA1_PHY_ADDR   0xff29c000
  60 #define SST_BYT_SSP0_PHY_ADDR   0xff2a0000
  61 #define SST_BYT_SSP2_PHY_ADDR   0xff2a2000
  62
  63 #define BYT_FW_MOD_TABLE_OFFSET 0x80000
  64 #define BYT_FW_MOD_TABLE_SIZE   0x100
  65 #define BYT_FW_MOD_OFFSET       (BYT_FW_MOD_TABLE_OFFSET + BYT_FW_MOD_TABLE_SIZE)
  66
  67 static const struct sst_info byt_fwparse_info = {
  68         .use_elf        = false,
  69         .max_streams    = 25,
  70         .iram_start     = SST_BYT_IRAM_PHY_START,
  71         .iram_end       = SST_BYT_IRAM_PHY_END,
  72         .iram_use       = true,
  73         .dram_start     = SST_BYT_DRAM_PHY_START,
  74         .dram_end       = SST_BYT_DRAM_PHY_END,
  75         .dram_use       = true,
  76         .imr_start      = SST_BYT_IMR_VIRT_START,
  77         .imr_end        = SST_BYT_IMR_VIRT_END,
  78         .imr_use        = true,
  79         .mailbox_start  = SST_BYT_MBOX_PHY_ADDR,
  80         .num_probes     = 0,
  81         .lpe_viewpt_rqd  = true,
  82 };
  83
  84 static const struct sst_ipc_info byt_ipc_info = {
  85         .ipc_offset = 0,
  86         .mbox_recv_off = 0x400,
  87 };
  88
  89 static const struct sst_lib_dnld_info  byt_lib_dnld_info = {
  90         .mod_base           = SST_BYT_IMR_VIRT_START,
  91         .mod_end            = SST_BYT_IMR_VIRT_END,
  92         .mod_table_offset   = BYT_FW_MOD_TABLE_OFFSET,
  93         .mod_table_size     = BYT_FW_MOD_TABLE_SIZE,
  94         .mod_ddr_dnld       = false,
  95 };
  96
  97 static const struct sst_res_info byt_rvp_res_info = {
  98         .shim_offset = 0x140000,
  99         .shim_size = 0x000100,
 100         .shim_phy_addr = SST_BYT_SHIM_PHY_ADDR,
 101         .ssp0_offset = 0xa0000,
 102         .ssp0_size = 0x1000,
 103         .dma0_offset = 0x98000,
 104         .dma0_size = 0x4000,
 105         .dma1_offset = 0x9c000,
 106         .dma1_size = 0x4000,
 107         .iram_offset = 0x0c0000,
 108         .iram_size = 0x14000,
 109         .dram_offset = 0x100000,
 110         .dram_size = 0x28000,
 111         .mbox_offset = 0x144000,
 112         .mbox_size = 0x1000,
 113         .acpi_lpe_res_index = 0,
 114         .acpi_ddr_index = 2,
 115         .acpi_ipc_irq_index = 5,
 116 };
 117
 118 /* BYTCR has different BIOS from BYT */
 119 static const struct sst_res_info bytcr_res_info = {
 120         .shim_offset = 0x140000,
 121         .shim_size = 0x000100,
 122         .shim_phy_addr = SST_BYT_SHIM_PHY_ADDR,
 123         .ssp0_offset = 0xa0000,
 124         .ssp0_size = 0x1000,
 125         .dma0_offset = 0x98000,
 126         .dma0_size = 0x4000,
 127         .dma1_offset = 0x9c000,
 128         .dma1_size = 0x4000,
 129         .iram_offset = 0x0c0000,
 130         .iram_size = 0x14000,
 131         .dram_offset = 0x100000,
 132         .dram_size = 0x28000,
 133         .mbox_offset = 0x144000,
 134         .mbox_size = 0x1000,
 135         .acpi_lpe_res_index = 0,
 136         .acpi_ddr_index = 2,
 137         .acpi_ipc_irq_index = 0
 138 };
 139
 140 static struct sst_platform_info byt_rvp_platform_data = {
 141         .probe_data = &byt_fwparse_info,
 142         .ipc_info = &byt_ipc_info,
 143         .lib_info = &byt_lib_dnld_info,
 144         .res_info = &byt_rvp_res_info,
 145         .platform = "sst-mfld-platform",
 146         .streams_lost_on_suspend = true,
 147 };
 148
 149 /* Cherryview (Cherrytrail and Braswell) uses same mrfld dpcm fw as Baytrail,
 150  * so pdata is same as Baytrail, minus the streams_lost_on_suspend quirk.
 151  */
 152 static struct sst_platform_info chv_platform_data = {
 153         .probe_data = &byt_fwparse_info,
 154         .ipc_info = &byt_ipc_info,
 155         .lib_info = &byt_lib_dnld_info,
 156         .res_info = &byt_rvp_res_info,
 157         .platform = "sst-mfld-platform",
 158 };
 159
 160 static int sst_platform_get_resources(struct intel_sst_drv *ctx)
 161 {
 162         struct resource *rsrc;
 163         struct platform_device *pdev = to_platform_device(ctx->dev);
 164
 165         /* All ACPI resource request here */
 166         /* Get Shim addr */
 167         rsrc = platform_get_resource(pdev, IORESOURCE_MEM,
 168                                         ctx->pdata->res_info->acpi_lpe_res_index);
 169         if (!rsrc) {
 170                 dev_err(ctx->dev, "Invalid SHIM base from IFWI\n");
 171                 return -EIO;
 172         }
 173         dev_info(ctx->dev, "LPE base: %#x size:%#x", (unsigned int) rsrc->start,
 174                                         (unsigned int)resource_size(rsrc));
 175
 176         ctx->iram_base = rsrc->start + ctx->pdata->res_info->iram_offset;
 177         ctx->iram_end =  ctx->iram_base + ctx->pdata->res_info->iram_size - 1;
 178         dev_info(ctx->dev, "IRAM base: %#x", ctx->iram_base);
 179         ctx->iram = devm_ioremap_nocache(ctx->dev, ctx->iram_base,
 180                                          ctx->pdata->res_info->iram_size);
 181         if (!ctx->iram) {
 182                 dev_err(ctx->dev, "unable to map IRAM\n");
 183                 return -EIO;
 184         }
 185
 186         ctx->dram_base = rsrc->start + ctx->pdata->res_info->dram_offset;
 187         ctx->dram_end = ctx->dram_base + ctx->pdata->res_info->dram_size - 1;
 188         dev_info(ctx->dev, "DRAM base: %#x", ctx->dram_base);
 189         ctx->dram = devm_ioremap_nocache(ctx->dev, ctx->dram_base,
 190                                          ctx->pdata->res_info->dram_size);
 191         if (!ctx->dram) {
 192                 dev_err(ctx->dev, "unable to map DRAM\n");
 193                 return -EIO;
 194         }
 195
 196         ctx->shim_phy_add = rsrc->start + ctx->pdata->res_info->shim_offset;
 197         dev_info(ctx->dev, "SHIM base: %#x", ctx->shim_phy_add);
 198         ctx->shim = devm_ioremap_nocache(ctx->dev, ctx->shim_phy_add,
 199                                         ctx->pdata->res_info->shim_size);
 200         if (!ctx->shim) {
 201                 dev_err(ctx->dev, "unable to map SHIM\n");
 202                 return -EIO;
 203         }
 204
 205         /* reassign physical address to LPE viewpoint address */
 206         ctx->shim_phy_add = ctx->pdata->res_info->shim_phy_addr;
 207
 208         /* Get mailbox addr */
 209         ctx->mailbox_add = rsrc->start + ctx->pdata->res_info->mbox_offset;
 210         dev_info(ctx->dev, "Mailbox base: %#x", ctx->mailbox_add);
 211         ctx->mailbox = devm_ioremap_nocache(ctx->dev, ctx->mailbox_add,
 212                                             ctx->pdata->res_info->mbox_size);
 213         if (!ctx->mailbox) {
 214                 dev_err(ctx->dev, "unable to map mailbox\n");
 215                 return -EIO;
 216         }
 217
 218         /* reassign physical address to LPE viewpoint address */
 219         ctx->mailbox_add = ctx->info.mailbox_start;
 220
 221         rsrc = platform_get_resource(pdev, IORESOURCE_MEM,
 222                                         ctx->pdata->res_info->acpi_ddr_index);
 223         if (!rsrc) {
 224                 dev_err(ctx->dev, "Invalid DDR base from IFWI\n");
 225                 return -EIO;
 226         }
 227         ctx->ddr_base = rsrc->start;
 228         ctx->ddr_end = rsrc->end;
 229         dev_info(ctx->dev, "DDR base: %#x", ctx->ddr_base);
 230         ctx->ddr = devm_ioremap_nocache(ctx->dev, ctx->ddr_base,
 231                                         resource_size(rsrc));
 232         if (!ctx->ddr) {
 233                 dev_err(ctx->dev, "unable to map DDR\n");
 234                 return -EIO;
 235         }
 236
 237         /* Find the IRQ */
 238         ctx->irq_num = platform_get_irq(pdev,
 239                                 ctx->pdata->res_info->acpi_ipc_irq_index);
 240         if (ctx->irq_num <= 0)
 241                 return ctx->irq_num < 0 ? ctx->irq_num : -EIO;
 242
 243         return 0;
 244 }
 245
 246 static int is_byt(void)
 247 {
 248         bool status = false;
 249         static const struct x86_cpu_id cpu_ids[] = {
 250                 { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
 251                 {}
 252         };
 253         if (x86_match_cpu(cpu_ids))
 254                 status = true;
 255         return status;
 256 }
 257
 258 static bool is_byt_cr(struct platform_device *pdev)
 259 {
 260         struct device *dev = &pdev->dev;
 261         int status = 0;
 262
 263         if (!is_byt())
 264                 return false;
 265
 266         if (iosf_mbi_available()) {
 267                 u32 bios_status;
 268                 status = iosf_mbi_read(BT_MBI_UNIT_PMC, /* 0x04 PUNIT */
 269                                        MBI_REG_READ, /* 0x10 */
 270                                        0x006, /* BIOS_CONFIG */
 271                                        &bios_status);
 272
 273                 if (status) {
 274                         dev_err(dev, "could not read PUNIT BIOS_CONFIG\n");
 275                 } else {
 276                         /* bits 26:27 mirror PMIC options */
 277                         bios_status = (bios_status >> 26) & 3;
 278
 279                         if (bios_status == 1 || bios_status == 3) {
 280                                 dev_info(dev, "Detected Baytrail-CR platform\n");
 281                                 return true;
 282                         }
 283
 284                         dev_info(dev, "BYT-CR not detected\n");
 285                 }
 286         } else {
 287                 dev_info(dev, "IOSF_MBI not available, no BYT-CR detection\n");
 288         }
 289
 290         if (platform_get_resource(pdev, IORESOURCE_IRQ, 5) == NULL) {
 291                 /*
 292                  * Some devices detected as BYT-T have only a single IRQ listed,
 293                  * causing platform_get_irq with index 5 to return -ENXIO.
 294                  * The correct IRQ in this case is at index 0, as on BYT-CR.
 295                  */
 296                 dev_info(dev, "Falling back to Baytrail-CR platform\n");
 297                 return true;
 298         }
 299
 300         return false;
 301 }
 302
 303
 304 static int sst_acpi_probe(struct platform_device *pdev)
 305 {
 306         struct device *dev = &pdev->dev;
 307         int ret = 0;
 308         struct intel_sst_drv *ctx;
 309         const struct acpi_device_id *id;
 310         struct snd_soc_acpi_mach *mach;
 311         struct platform_device *mdev;
 312         struct platform_device *plat_dev;
 313         struct sst_platform_info *pdata;
 314         unsigned int dev_id;
 315
 316         id = acpi_match_device(dev->driver->acpi_match_table, dev);
 317         if (!id)
 318                 return -ENODEV;
 319         dev_dbg(dev, "for %s\n", id->id);
 320
 321         mach = (struct snd_soc_acpi_mach *)id->driver_data;
 322         mach = snd_soc_acpi_find_machine(mach);
 323         if (mach == NULL) {
 324                 dev_err(dev, "No matching machine driver found\n");
 325                 return -ENODEV;
 326         }
 327
 328         if (is_byt())
 329                 mach->pdata = &byt_rvp_platform_data;
 330         else
 331                 mach->pdata = &chv_platform_data;
 332         pdata = mach->pdata;
 333
 334         ret = kstrtouint(id->id, 16, &dev_id);
 335         if (ret < 0) {
 336                 dev_err(dev, "Unique device id conversion error: %d\n", ret);
 337                 return ret;
 338         }
 339
 340         dev_dbg(dev, "ACPI device id: %x\n", dev_id);
 341
 342         ret = sst_alloc_drv_context(&ctx, dev, dev_id);
 343         if (ret < 0)
 344                 return ret;
 345
 346         if (is_byt_cr(pdev)) {
 347                 /* override resource info */
 348                 byt_rvp_platform_data.res_info = &bytcr_res_info;
 349         }
 350
 351         /* update machine parameters */
 352         mach->mach_params.acpi_ipc_irq_index =
 353                 pdata->res_info->acpi_ipc_irq_index;
 354
 355         plat_dev = platform_device_register_data(dev, pdata->platform, -1,
 356                                                 NULL, 0);
 357         if (IS_ERR(plat_dev)) {
 358                 dev_err(dev, "Failed to create machine device: %s\n",
 359                         pdata->platform);
 360                 return PTR_ERR(plat_dev);
 361         }
 362
 363         /*
 364          * Create platform device for sst machine driver,
 365          * pass machine info as pdata
 366          */
 367         mdev = platform_device_register_data(dev, mach->drv_name, -1,
 368                                         (const void *)mach, sizeof(*mach));
 369         if (IS_ERR(mdev)) {
 370                 dev_err(dev, "Failed to create machine device: %s\n",
 371                         mach->drv_name);
 372                 return PTR_ERR(mdev);
 373         }
 374
 375         /* Fill sst platform data */
 376         ctx->pdata = pdata;
 377         strcpy(ctx->firmware_name, mach->fw_filename);
 378
 379         ret = sst_platform_get_resources(ctx);
 380         if (ret)
 381                 return ret;
 382
 383         ret = sst_context_init(ctx);
 384         if (ret < 0)
 385                 return ret;
 386
 387         sst_configure_runtime_pm(ctx);
 388         platform_set_drvdata(pdev, ctx);
 389         return ret;
 390 }
 391
 392 /**
 393 * intel_sst_remove - remove function
 394 *
 395 * @pdev:        platform device structure
 396 *
 397 * This function is called by OS when a device is unloaded
 398 * This frees the interrupt etc
 399 */
 400 static int sst_acpi_remove(struct platform_device *pdev)
 401 {
 402         struct intel_sst_drv *ctx;
 403
 404         ctx = platform_get_drvdata(pdev);
 405         sst_context_cleanup(ctx);
 406         platform_set_drvdata(pdev, NULL);
 407         return 0;
 408 }
 409
 410 static const struct acpi_device_id sst_acpi_ids[] = {
 411         { "80860F28", (unsigned long)&snd_soc_acpi_intel_baytrail_machines},
 412         { "808622A8", (unsigned long)&snd_soc_acpi_intel_cherrytrail_machines},
 413         { },
 414 };
 415
 416 MODULE_DEVICE_TABLE(acpi, sst_acpi_ids);
 417
 418 static struct platform_driver sst_acpi_driver = {
 419         .driver = {
 420                 .name                   = "intel_sst_acpi",
 421                 .acpi_match_table       = ACPI_PTR(sst_acpi_ids),
 422                 .pm                     = &intel_sst_pm,
 423         },
 424         .probe  = sst_acpi_probe,
 425         .remove = sst_acpi_remove,
 426 };
 427
 428 module_platform_driver(sst_acpi_driver);
 429
 430 MODULE_DESCRIPTION("Intel (R) SST(R) Audio Engine ACPI Driver");
 431 MODULE_AUTHOR("Ramesh Babu K V");
 432 MODULE_AUTHOR("Omair Mohammed Abdullah");
 433 MODULE_LICENSE("GPL v2");
 434 MODULE_ALIAS("sst");