Merge branch 'fix/rt5645' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie...
[sfrench/cifs-2.6.git] / sound / soc / codecs / rt5645.c
1 /*
2  * rt5645.c  --  RT5645 ALSA SoC audio codec driver
3  *
4  * Copyright 2013 Realtek Semiconductor Corp.
5  * Author: Bard Liao <bardliao@realtek.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/pm.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/gpio.h>
21 #include <linux/acpi.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/jack.h>
26 #include <sound/soc.h>
27 #include <sound/soc-dapm.h>
28 #include <sound/initval.h>
29 #include <sound/tlv.h>
30
31 #include "rl6231.h"
32 #include "rt5645.h"
33
34 #define RT5645_DEVICE_ID 0x6308
35 #define RT5650_DEVICE_ID 0x6419
36
37 #define RT5645_PR_RANGE_BASE (0xff + 1)
38 #define RT5645_PR_SPACING 0x100
39
40 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
41
42 static const struct regmap_range_cfg rt5645_ranges[] = {
43         {
44                 .name = "PR",
45                 .range_min = RT5645_PR_BASE,
46                 .range_max = RT5645_PR_BASE + 0xf8,
47                 .selector_reg = RT5645_PRIV_INDEX,
48                 .selector_mask = 0xff,
49                 .selector_shift = 0x0,
50                 .window_start = RT5645_PRIV_DATA,
51                 .window_len = 0x1,
52         },
53 };
54
55 static const struct reg_default init_list[] = {
56         {RT5645_PR_BASE + 0x3d, 0x3600},
57         {RT5645_PR_BASE + 0x1c, 0xfd20},
58         {RT5645_PR_BASE + 0x20, 0x611f},
59         {RT5645_PR_BASE + 0x21, 0x4040},
60         {RT5645_PR_BASE + 0x23, 0x0004},
61 };
62 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
63
64 static const struct reg_default rt5650_init_list[] = {
65         {0xf6,  0x0100},
66 };
67
68 static const struct reg_default rt5645_reg[] = {
69         { 0x00, 0x0000 },
70         { 0x01, 0xc8c8 },
71         { 0x02, 0xc8c8 },
72         { 0x03, 0xc8c8 },
73         { 0x0a, 0x0002 },
74         { 0x0b, 0x2827 },
75         { 0x0c, 0xe000 },
76         { 0x0d, 0x0000 },
77         { 0x0e, 0x0000 },
78         { 0x0f, 0x0808 },
79         { 0x14, 0x3333 },
80         { 0x16, 0x4b00 },
81         { 0x18, 0x018b },
82         { 0x19, 0xafaf },
83         { 0x1a, 0xafaf },
84         { 0x1b, 0x0001 },
85         { 0x1c, 0x2f2f },
86         { 0x1d, 0x2f2f },
87         { 0x1e, 0x0000 },
88         { 0x20, 0x0000 },
89         { 0x27, 0x7060 },
90         { 0x28, 0x7070 },
91         { 0x29, 0x8080 },
92         { 0x2a, 0x5656 },
93         { 0x2b, 0x5454 },
94         { 0x2c, 0xaaa0 },
95         { 0x2d, 0x0000 },
96         { 0x2f, 0x1002 },
97         { 0x31, 0x5000 },
98         { 0x32, 0x0000 },
99         { 0x33, 0x0000 },
100         { 0x34, 0x0000 },
101         { 0x35, 0x0000 },
102         { 0x3b, 0x0000 },
103         { 0x3c, 0x007f },
104         { 0x3d, 0x0000 },
105         { 0x3e, 0x007f },
106         { 0x3f, 0x0000 },
107         { 0x40, 0x001f },
108         { 0x41, 0x0000 },
109         { 0x42, 0x001f },
110         { 0x45, 0x6000 },
111         { 0x46, 0x003e },
112         { 0x47, 0x003e },
113         { 0x48, 0xf807 },
114         { 0x4a, 0x0004 },
115         { 0x4d, 0x0000 },
116         { 0x4e, 0x0000 },
117         { 0x4f, 0x01ff },
118         { 0x50, 0x0000 },
119         { 0x51, 0x0000 },
120         { 0x52, 0x01ff },
121         { 0x53, 0xf000 },
122         { 0x56, 0x0111 },
123         { 0x57, 0x0064 },
124         { 0x58, 0xef0e },
125         { 0x59, 0xf0f0 },
126         { 0x5a, 0xef0e },
127         { 0x5b, 0xf0f0 },
128         { 0x5c, 0xef0e },
129         { 0x5d, 0xf0f0 },
130         { 0x5e, 0xf000 },
131         { 0x5f, 0x0000 },
132         { 0x61, 0x0300 },
133         { 0x62, 0x0000 },
134         { 0x63, 0x00c2 },
135         { 0x64, 0x0000 },
136         { 0x65, 0x0000 },
137         { 0x66, 0x0000 },
138         { 0x6a, 0x0000 },
139         { 0x6c, 0x0aaa },
140         { 0x70, 0x8000 },
141         { 0x71, 0x8000 },
142         { 0x72, 0x8000 },
143         { 0x73, 0x7770 },
144         { 0x74, 0x3e00 },
145         { 0x75, 0x2409 },
146         { 0x76, 0x000a },
147         { 0x77, 0x0c00 },
148         { 0x78, 0x0000 },
149         { 0x79, 0x0123 },
150         { 0x80, 0x0000 },
151         { 0x81, 0x0000 },
152         { 0x82, 0x0000 },
153         { 0x83, 0x0000 },
154         { 0x84, 0x0000 },
155         { 0x85, 0x0000 },
156         { 0x8a, 0x0000 },
157         { 0x8e, 0x0004 },
158         { 0x8f, 0x1100 },
159         { 0x90, 0x0646 },
160         { 0x91, 0x0c06 },
161         { 0x93, 0x0000 },
162         { 0x94, 0x0200 },
163         { 0x95, 0x0000 },
164         { 0x9a, 0x2184 },
165         { 0x9b, 0x010a },
166         { 0x9c, 0x0aea },
167         { 0x9d, 0x000c },
168         { 0x9e, 0x0400 },
169         { 0xa0, 0xa0a8 },
170         { 0xa1, 0x0059 },
171         { 0xa2, 0x0001 },
172         { 0xae, 0x6000 },
173         { 0xaf, 0x0000 },
174         { 0xb0, 0x6000 },
175         { 0xb1, 0x0000 },
176         { 0xb2, 0x0000 },
177         { 0xb3, 0x001f },
178         { 0xb4, 0x020c },
179         { 0xb5, 0x1f00 },
180         { 0xb6, 0x0000 },
181         { 0xbb, 0x0000 },
182         { 0xbc, 0x0000 },
183         { 0xbd, 0x0000 },
184         { 0xbe, 0x0000 },
185         { 0xbf, 0x3100 },
186         { 0xc0, 0x0000 },
187         { 0xc1, 0x0000 },
188         { 0xc2, 0x0000 },
189         { 0xc3, 0x2000 },
190         { 0xcd, 0x0000 },
191         { 0xce, 0x0000 },
192         { 0xcf, 0x1813 },
193         { 0xd0, 0x0690 },
194         { 0xd1, 0x1c17 },
195         { 0xd3, 0xb320 },
196         { 0xd4, 0x0000 },
197         { 0xd6, 0x0400 },
198         { 0xd9, 0x0809 },
199         { 0xda, 0x0000 },
200         { 0xdb, 0x0003 },
201         { 0xdc, 0x0049 },
202         { 0xdd, 0x001b },
203         { 0xdf, 0x0008 },
204         { 0xe0, 0x4000 },
205         { 0xe6, 0x8000 },
206         { 0xe7, 0x0200 },
207         { 0xec, 0xb300 },
208         { 0xed, 0x0000 },
209         { 0xf0, 0x001f },
210         { 0xf1, 0x020c },
211         { 0xf2, 0x1f00 },
212         { 0xf3, 0x0000 },
213         { 0xf4, 0x4000 },
214         { 0xf8, 0x0000 },
215         { 0xf9, 0x0000 },
216         { 0xfa, 0x2060 },
217         { 0xfb, 0x4040 },
218         { 0xfc, 0x0000 },
219         { 0xfd, 0x0002 },
220         { 0xfe, 0x10ec },
221         { 0xff, 0x6308 },
222 };
223
224 static int rt5645_reset(struct snd_soc_codec *codec)
225 {
226         return snd_soc_write(codec, RT5645_RESET, 0);
227 }
228
229 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
230 {
231         int i;
232
233         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
234                 if (reg >= rt5645_ranges[i].range_min &&
235                         reg <= rt5645_ranges[i].range_max) {
236                         return true;
237                 }
238         }
239
240         switch (reg) {
241         case RT5645_RESET:
242         case RT5645_PRIV_DATA:
243         case RT5645_IN1_CTRL1:
244         case RT5645_IN1_CTRL2:
245         case RT5645_IN1_CTRL3:
246         case RT5645_A_JD_CTRL1:
247         case RT5645_ADC_EQ_CTRL1:
248         case RT5645_EQ_CTRL1:
249         case RT5645_ALC_CTRL_1:
250         case RT5645_IRQ_CTRL2:
251         case RT5645_IRQ_CTRL3:
252         case RT5645_INT_IRQ_ST:
253         case RT5645_IL_CMD:
254         case RT5650_4BTN_IL_CMD1:
255         case RT5645_VENDOR_ID:
256         case RT5645_VENDOR_ID1:
257         case RT5645_VENDOR_ID2:
258                 return true;
259         default:
260                 return false;
261         }
262 }
263
264 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
265 {
266         int i;
267
268         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
269                 if (reg >= rt5645_ranges[i].range_min &&
270                         reg <= rt5645_ranges[i].range_max) {
271                         return true;
272                 }
273         }
274
275         switch (reg) {
276         case RT5645_RESET:
277         case RT5645_SPK_VOL:
278         case RT5645_HP_VOL:
279         case RT5645_LOUT1:
280         case RT5645_IN1_CTRL1:
281         case RT5645_IN1_CTRL2:
282         case RT5645_IN1_CTRL3:
283         case RT5645_IN2_CTRL:
284         case RT5645_INL1_INR1_VOL:
285         case RT5645_SPK_FUNC_LIM:
286         case RT5645_ADJ_HPF_CTRL:
287         case RT5645_DAC1_DIG_VOL:
288         case RT5645_DAC2_DIG_VOL:
289         case RT5645_DAC_CTRL:
290         case RT5645_STO1_ADC_DIG_VOL:
291         case RT5645_MONO_ADC_DIG_VOL:
292         case RT5645_ADC_BST_VOL1:
293         case RT5645_ADC_BST_VOL2:
294         case RT5645_STO1_ADC_MIXER:
295         case RT5645_MONO_ADC_MIXER:
296         case RT5645_AD_DA_MIXER:
297         case RT5645_STO_DAC_MIXER:
298         case RT5645_MONO_DAC_MIXER:
299         case RT5645_DIG_MIXER:
300         case RT5650_A_DAC_SOUR:
301         case RT5645_DIG_INF1_DATA:
302         case RT5645_PDM_OUT_CTRL:
303         case RT5645_REC_L1_MIXER:
304         case RT5645_REC_L2_MIXER:
305         case RT5645_REC_R1_MIXER:
306         case RT5645_REC_R2_MIXER:
307         case RT5645_HPMIXL_CTRL:
308         case RT5645_HPOMIXL_CTRL:
309         case RT5645_HPMIXR_CTRL:
310         case RT5645_HPOMIXR_CTRL:
311         case RT5645_HPO_MIXER:
312         case RT5645_SPK_L_MIXER:
313         case RT5645_SPK_R_MIXER:
314         case RT5645_SPO_MIXER:
315         case RT5645_SPO_CLSD_RATIO:
316         case RT5645_OUT_L1_MIXER:
317         case RT5645_OUT_R1_MIXER:
318         case RT5645_OUT_L_GAIN1:
319         case RT5645_OUT_L_GAIN2:
320         case RT5645_OUT_R_GAIN1:
321         case RT5645_OUT_R_GAIN2:
322         case RT5645_LOUT_MIXER:
323         case RT5645_HAPTIC_CTRL1:
324         case RT5645_HAPTIC_CTRL2:
325         case RT5645_HAPTIC_CTRL3:
326         case RT5645_HAPTIC_CTRL4:
327         case RT5645_HAPTIC_CTRL5:
328         case RT5645_HAPTIC_CTRL6:
329         case RT5645_HAPTIC_CTRL7:
330         case RT5645_HAPTIC_CTRL8:
331         case RT5645_HAPTIC_CTRL9:
332         case RT5645_HAPTIC_CTRL10:
333         case RT5645_PWR_DIG1:
334         case RT5645_PWR_DIG2:
335         case RT5645_PWR_ANLG1:
336         case RT5645_PWR_ANLG2:
337         case RT5645_PWR_MIXER:
338         case RT5645_PWR_VOL:
339         case RT5645_PRIV_INDEX:
340         case RT5645_PRIV_DATA:
341         case RT5645_I2S1_SDP:
342         case RT5645_I2S2_SDP:
343         case RT5645_ADDA_CLK1:
344         case RT5645_ADDA_CLK2:
345         case RT5645_DMIC_CTRL1:
346         case RT5645_DMIC_CTRL2:
347         case RT5645_TDM_CTRL_1:
348         case RT5645_TDM_CTRL_2:
349         case RT5645_TDM_CTRL_3:
350         case RT5645_GLB_CLK:
351         case RT5645_PLL_CTRL1:
352         case RT5645_PLL_CTRL2:
353         case RT5645_ASRC_1:
354         case RT5645_ASRC_2:
355         case RT5645_ASRC_3:
356         case RT5645_ASRC_4:
357         case RT5645_DEPOP_M1:
358         case RT5645_DEPOP_M2:
359         case RT5645_DEPOP_M3:
360         case RT5645_MICBIAS:
361         case RT5645_A_JD_CTRL1:
362         case RT5645_VAD_CTRL4:
363         case RT5645_CLSD_OUT_CTRL:
364         case RT5645_ADC_EQ_CTRL1:
365         case RT5645_ADC_EQ_CTRL2:
366         case RT5645_EQ_CTRL1:
367         case RT5645_EQ_CTRL2:
368         case RT5645_ALC_CTRL_1:
369         case RT5645_ALC_CTRL_2:
370         case RT5645_ALC_CTRL_3:
371         case RT5645_ALC_CTRL_4:
372         case RT5645_ALC_CTRL_5:
373         case RT5645_JD_CTRL:
374         case RT5645_IRQ_CTRL1:
375         case RT5645_IRQ_CTRL2:
376         case RT5645_IRQ_CTRL3:
377         case RT5645_INT_IRQ_ST:
378         case RT5645_GPIO_CTRL1:
379         case RT5645_GPIO_CTRL2:
380         case RT5645_GPIO_CTRL3:
381         case RT5645_BASS_BACK:
382         case RT5645_MP3_PLUS1:
383         case RT5645_MP3_PLUS2:
384         case RT5645_ADJ_HPF1:
385         case RT5645_ADJ_HPF2:
386         case RT5645_HP_CALIB_AMP_DET:
387         case RT5645_SV_ZCD1:
388         case RT5645_SV_ZCD2:
389         case RT5645_IL_CMD:
390         case RT5645_IL_CMD2:
391         case RT5645_IL_CMD3:
392         case RT5650_4BTN_IL_CMD1:
393         case RT5650_4BTN_IL_CMD2:
394         case RT5645_DRC1_HL_CTRL1:
395         case RT5645_DRC2_HL_CTRL1:
396         case RT5645_ADC_MONO_HP_CTRL1:
397         case RT5645_ADC_MONO_HP_CTRL2:
398         case RT5645_DRC2_CTRL1:
399         case RT5645_DRC2_CTRL2:
400         case RT5645_DRC2_CTRL3:
401         case RT5645_DRC2_CTRL4:
402         case RT5645_DRC2_CTRL5:
403         case RT5645_JD_CTRL3:
404         case RT5645_JD_CTRL4:
405         case RT5645_GEN_CTRL1:
406         case RT5645_GEN_CTRL2:
407         case RT5645_GEN_CTRL3:
408         case RT5645_VENDOR_ID:
409         case RT5645_VENDOR_ID1:
410         case RT5645_VENDOR_ID2:
411                 return true;
412         default:
413                 return false;
414         }
415 }
416
417 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
418 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
419 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
420 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
421 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
422
423 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
424 static unsigned int bst_tlv[] = {
425         TLV_DB_RANGE_HEAD(7),
426         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
427         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
428         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
429         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
430         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
431         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
432         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
433 };
434
435 static const char * const rt5645_tdm_data_swap_select[] = {
436         "L/R", "R/L", "L/L", "R/R"
437 };
438
439 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
440         RT5645_TDM_CTRL_1, 6, rt5645_tdm_data_swap_select);
441
442 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
443         RT5645_TDM_CTRL_1, 4, rt5645_tdm_data_swap_select);
444
445 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
446         RT5645_TDM_CTRL_1, 2, rt5645_tdm_data_swap_select);
447
448 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot6_7_enum,
449         RT5645_TDM_CTRL_1, 0, rt5645_tdm_data_swap_select);
450
451 static const char * const rt5645_tdm_adc_data_select[] = {
452         "1/2/R", "2/1/R", "R/1/2", "R/2/1"
453 };
454
455 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_sel_enum,
456                                 RT5645_TDM_CTRL_1, 8,
457                                 rt5645_tdm_adc_data_select);
458
459 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
460         /* Speaker Output Volume */
461         SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
462                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
463         SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
464                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
465
466         /* Headphone Output Volume */
467         SOC_DOUBLE("HP Channel Switch", RT5645_HP_VOL,
468                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
469         SOC_DOUBLE_TLV("HP Playback Volume", RT5645_HP_VOL,
470                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
471
472         /* OUTPUT Control */
473         SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
474                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
475         SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
476                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
477         SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
478                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
479
480         /* DAC Digital Volume */
481         SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
482                 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
483         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
484                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
485         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
486                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
487
488         /* IN1/IN2 Control */
489         SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
490                 RT5645_BST_SFT1, 8, 0, bst_tlv),
491         SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
492                 RT5645_BST_SFT2, 8, 0, bst_tlv),
493
494         /* INL/INR Volume Control */
495         SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
496                 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
497
498         /* ADC Digital Volume Control */
499         SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
500                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
501         SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
502                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
503         SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
504                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
505         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
506                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
507
508         /* ADC Boost Volume Control */
509         SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
510                 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
511                 adc_bst_tlv),
512         SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
513                 RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
514                 adc_bst_tlv),
515
516         /* I2S2 function select */
517         SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
518                 1, 1),
519
520         /* TDM */
521         SOC_ENUM("TDM Adc Slot0 1 Data", rt5645_tdm_adc_slot0_1_enum),
522         SOC_ENUM("TDM Adc Slot2 3 Data", rt5645_tdm_adc_slot2_3_enum),
523         SOC_ENUM("TDM Adc Slot4 5 Data", rt5645_tdm_adc_slot4_5_enum),
524         SOC_ENUM("TDM Adc Slot6 7 Data", rt5645_tdm_adc_slot6_7_enum),
525         SOC_ENUM("TDM IF1 ADC DATA Sel", rt5645_tdm_adc_sel_enum),
526         SOC_SINGLE("TDM IF1_DAC1_L Sel", RT5645_TDM_CTRL_3, 12, 7, 0),
527         SOC_SINGLE("TDM IF1_DAC1_R Sel", RT5645_TDM_CTRL_3, 8, 7, 0),
528         SOC_SINGLE("TDM IF1_DAC2_L Sel", RT5645_TDM_CTRL_3, 4, 7, 0),
529         SOC_SINGLE("TDM IF1_DAC2_R Sel", RT5645_TDM_CTRL_3, 0, 7, 0),
530 };
531
532 /**
533  * set_dmic_clk - Set parameter of dmic.
534  *
535  * @w: DAPM widget.
536  * @kcontrol: The kcontrol of this widget.
537  * @event: Event id.
538  *
539  */
540 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
541         struct snd_kcontrol *kcontrol, int event)
542 {
543         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
544         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
545         int idx = -EINVAL;
546
547         idx = rl6231_calc_dmic_clk(rt5645->sysclk);
548
549         if (idx < 0)
550                 dev_err(codec->dev, "Failed to set DMIC clock\n");
551         else
552                 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
553                         RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
554         return idx;
555 }
556
557 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
558                          struct snd_soc_dapm_widget *sink)
559 {
560         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
561         unsigned int val;
562
563         val = snd_soc_read(codec, RT5645_GLB_CLK);
564         val &= RT5645_SCLK_SRC_MASK;
565         if (val == RT5645_SCLK_SRC_PLL1)
566                 return 1;
567         else
568                 return 0;
569 }
570
571 static int is_using_asrc(struct snd_soc_dapm_widget *source,
572                          struct snd_soc_dapm_widget *sink)
573 {
574         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
575         unsigned int reg, shift, val;
576
577         switch (source->shift) {
578         case 0:
579                 reg = RT5645_ASRC_3;
580                 shift = 0;
581                 break;
582         case 1:
583                 reg = RT5645_ASRC_3;
584                 shift = 4;
585                 break;
586         case 3:
587                 reg = RT5645_ASRC_2;
588                 shift = 0;
589                 break;
590         case 8:
591                 reg = RT5645_ASRC_2;
592                 shift = 4;
593                 break;
594         case 9:
595                 reg = RT5645_ASRC_2;
596                 shift = 8;
597                 break;
598         case 10:
599                 reg = RT5645_ASRC_2;
600                 shift = 12;
601                 break;
602         default:
603                 return 0;
604         }
605
606         val = (snd_soc_read(codec, reg) >> shift) & 0xf;
607         switch (val) {
608         case 1:
609         case 2:
610         case 3:
611         case 4:
612                 return 1;
613         default:
614                 return 0;
615         }
616
617 }
618
619 /**
620  * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
621  * @codec: SoC audio codec device.
622  * @filter_mask: mask of filters.
623  * @clk_src: clock source
624  *
625  * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
626  * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
627  * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
628  * ASRC function will track i2s clock and generate a corresponding system clock
629  * for codec. This function provides an API to select the clock source for a
630  * set of filters specified by the mask. And the codec driver will turn on ASRC
631  * for these filters if ASRC is selected as their clock source.
632  */
633 int rt5645_sel_asrc_clk_src(struct snd_soc_codec *codec,
634                 unsigned int filter_mask, unsigned int clk_src)
635 {
636         unsigned int asrc2_mask = 0;
637         unsigned int asrc2_value = 0;
638         unsigned int asrc3_mask = 0;
639         unsigned int asrc3_value = 0;
640
641         switch (clk_src) {
642         case RT5645_CLK_SEL_SYS:
643         case RT5645_CLK_SEL_I2S1_ASRC:
644         case RT5645_CLK_SEL_I2S2_ASRC:
645         case RT5645_CLK_SEL_SYS2:
646                 break;
647
648         default:
649                 return -EINVAL;
650         }
651
652         if (filter_mask & RT5645_DA_STEREO_FILTER) {
653                 asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
654                 asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
655                         | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
656         }
657
658         if (filter_mask & RT5645_DA_MONO_L_FILTER) {
659                 asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
660                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
661                         | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
662         }
663
664         if (filter_mask & RT5645_DA_MONO_R_FILTER) {
665                 asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
666                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
667                         | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
668         }
669
670         if (filter_mask & RT5645_AD_STEREO_FILTER) {
671                 asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
672                 asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
673                         | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
674         }
675
676         if (filter_mask & RT5645_AD_MONO_L_FILTER) {
677                 asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
678                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
679                         | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
680         }
681
682         if (filter_mask & RT5645_AD_MONO_R_FILTER)  {
683                 asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
684                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
685                         | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
686         }
687
688         if (asrc2_mask)
689                 snd_soc_update_bits(codec, RT5645_ASRC_2,
690                         asrc2_mask, asrc2_value);
691
692         if (asrc3_mask)
693                 snd_soc_update_bits(codec, RT5645_ASRC_3,
694                         asrc3_mask, asrc3_value);
695
696         return 0;
697 }
698 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
699
700 /* Digital Mixer */
701 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
702         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
703                         RT5645_M_ADC_L1_SFT, 1, 1),
704         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
705                         RT5645_M_ADC_L2_SFT, 1, 1),
706 };
707
708 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
709         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
710                         RT5645_M_ADC_R1_SFT, 1, 1),
711         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
712                         RT5645_M_ADC_R2_SFT, 1, 1),
713 };
714
715 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
716         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
717                         RT5645_M_MONO_ADC_L1_SFT, 1, 1),
718         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
719                         RT5645_M_MONO_ADC_L2_SFT, 1, 1),
720 };
721
722 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
723         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
724                         RT5645_M_MONO_ADC_R1_SFT, 1, 1),
725         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
726                         RT5645_M_MONO_ADC_R2_SFT, 1, 1),
727 };
728
729 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
730         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
731                         RT5645_M_ADCMIX_L_SFT, 1, 1),
732         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
733                         RT5645_M_DAC1_L_SFT, 1, 1),
734 };
735
736 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
737         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
738                         RT5645_M_ADCMIX_R_SFT, 1, 1),
739         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
740                         RT5645_M_DAC1_R_SFT, 1, 1),
741 };
742
743 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
744         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
745                         RT5645_M_DAC_L1_SFT, 1, 1),
746         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
747                         RT5645_M_DAC_L2_SFT, 1, 1),
748         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
749                         RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
750 };
751
752 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
753         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
754                         RT5645_M_DAC_R1_SFT, 1, 1),
755         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
756                         RT5645_M_DAC_R2_SFT, 1, 1),
757         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
758                         RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
759 };
760
761 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
762         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
763                         RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
764         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
765                         RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
766         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
767                         RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
768 };
769
770 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
771         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
772                         RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
773         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
774                         RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
775         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
776                         RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
777 };
778
779 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
780         SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
781                         RT5645_M_STO_L_DAC_L_SFT, 1, 1),
782         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
783                         RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
784         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
785                         RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
786 };
787
788 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
789         SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
790                         RT5645_M_STO_R_DAC_R_SFT, 1, 1),
791         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
792                         RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
793         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
794                         RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
795 };
796
797 /* Analog Input Mixer */
798 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
799         SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
800                         RT5645_M_HP_L_RM_L_SFT, 1, 1),
801         SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
802                         RT5645_M_IN_L_RM_L_SFT, 1, 1),
803         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
804                         RT5645_M_BST2_RM_L_SFT, 1, 1),
805         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
806                         RT5645_M_BST1_RM_L_SFT, 1, 1),
807         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
808                         RT5645_M_OM_L_RM_L_SFT, 1, 1),
809 };
810
811 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
812         SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
813                         RT5645_M_HP_R_RM_R_SFT, 1, 1),
814         SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
815                         RT5645_M_IN_R_RM_R_SFT, 1, 1),
816         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
817                         RT5645_M_BST2_RM_R_SFT, 1, 1),
818         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
819                         RT5645_M_BST1_RM_R_SFT, 1, 1),
820         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
821                         RT5645_M_OM_R_RM_R_SFT, 1, 1),
822 };
823
824 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
825         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
826                         RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
827         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
828                         RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
829         SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
830                         RT5645_M_IN_L_SM_L_SFT, 1, 1),
831         SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
832                         RT5645_M_BST1_L_SM_L_SFT, 1, 1),
833 };
834
835 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
836         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
837                         RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
838         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
839                         RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
840         SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
841                         RT5645_M_IN_R_SM_R_SFT, 1, 1),
842         SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
843                         RT5645_M_BST2_R_SM_R_SFT, 1, 1),
844 };
845
846 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
847         SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
848                         RT5645_M_BST1_OM_L_SFT, 1, 1),
849         SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
850                         RT5645_M_IN_L_OM_L_SFT, 1, 1),
851         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
852                         RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
853         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
854                         RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
855 };
856
857 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
858         SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
859                         RT5645_M_BST2_OM_R_SFT, 1, 1),
860         SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
861                         RT5645_M_IN_R_OM_R_SFT, 1, 1),
862         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
863                         RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
864         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
865                         RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
866 };
867
868 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
869         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
870                         RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
871         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
872                         RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
873         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
874                         RT5645_M_SV_R_SPM_L_SFT, 1, 1),
875         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
876                         RT5645_M_SV_L_SPM_L_SFT, 1, 1),
877 };
878
879 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
880         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
881                         RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
882         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
883                         RT5645_M_SV_R_SPM_R_SFT, 1, 1),
884 };
885
886 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
887         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
888                         RT5645_M_DAC1_HM_SFT, 1, 1),
889         SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
890                         RT5645_M_HPVOL_HM_SFT, 1, 1),
891 };
892
893 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
894         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
895                         RT5645_M_DAC1_HV_SFT, 1, 1),
896         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
897                         RT5645_M_DAC2_HV_SFT, 1, 1),
898         SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
899                         RT5645_M_IN_HV_SFT, 1, 1),
900         SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
901                         RT5645_M_BST1_HV_SFT, 1, 1),
902 };
903
904 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
905         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
906                         RT5645_M_DAC1_HV_SFT, 1, 1),
907         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
908                         RT5645_M_DAC2_HV_SFT, 1, 1),
909         SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
910                         RT5645_M_IN_HV_SFT, 1, 1),
911         SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
912                         RT5645_M_BST2_HV_SFT, 1, 1),
913 };
914
915 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
916         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
917                         RT5645_M_DAC_L1_LM_SFT, 1, 1),
918         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
919                         RT5645_M_DAC_R1_LM_SFT, 1, 1),
920         SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
921                         RT5645_M_OV_L_LM_SFT, 1, 1),
922         SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
923                         RT5645_M_OV_R_LM_SFT, 1, 1),
924 };
925
926 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
927 static const char * const rt5645_dac1_src[] = {
928         "IF1 DAC", "IF2 DAC", "IF3 DAC"
929 };
930
931 static SOC_ENUM_SINGLE_DECL(
932         rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
933         RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
934
935 static const struct snd_kcontrol_new rt5645_dac1l_mux =
936         SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
937
938 static SOC_ENUM_SINGLE_DECL(
939         rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
940         RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
941
942 static const struct snd_kcontrol_new rt5645_dac1r_mux =
943         SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
944
945 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
946 static const char * const rt5645_dac12_src[] = {
947         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
948 };
949
950 static SOC_ENUM_SINGLE_DECL(
951         rt5645_dac2l_enum, RT5645_DAC_CTRL,
952         RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
953
954 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
955         SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
956
957 static const char * const rt5645_dacr2_src[] = {
958         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
959 };
960
961 static SOC_ENUM_SINGLE_DECL(
962         rt5645_dac2r_enum, RT5645_DAC_CTRL,
963         RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
964
965 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
966         SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
967
968
969 /* INL/R source */
970 static const char * const rt5645_inl_src[] = {
971         "IN2P", "MonoP"
972 };
973
974 static SOC_ENUM_SINGLE_DECL(
975         rt5645_inl_enum, RT5645_INL1_INR1_VOL,
976         RT5645_INL_SEL_SFT, rt5645_inl_src);
977
978 static const struct snd_kcontrol_new rt5645_inl_mux =
979         SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
980
981 static const char * const rt5645_inr_src[] = {
982         "IN2N", "MonoN"
983 };
984
985 static SOC_ENUM_SINGLE_DECL(
986         rt5645_inr_enum, RT5645_INL1_INR1_VOL,
987         RT5645_INR_SEL_SFT, rt5645_inr_src);
988
989 static const struct snd_kcontrol_new rt5645_inr_mux =
990         SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
991
992 /* Stereo1 ADC source */
993 /* MX-27 [12] */
994 static const char * const rt5645_stereo_adc1_src[] = {
995         "DAC MIX", "ADC"
996 };
997
998 static SOC_ENUM_SINGLE_DECL(
999         rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
1000         RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1001
1002 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1003         SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1004
1005 /* MX-27 [11] */
1006 static const char * const rt5645_stereo_adc2_src[] = {
1007         "DAC MIX", "DMIC"
1008 };
1009
1010 static SOC_ENUM_SINGLE_DECL(
1011         rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1012         RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1013
1014 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1015         SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1016
1017 /* MX-27 [8] */
1018 static const char * const rt5645_stereo_dmic_src[] = {
1019         "DMIC1", "DMIC2"
1020 };
1021
1022 static SOC_ENUM_SINGLE_DECL(
1023         rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1024         RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1025
1026 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1027         SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1028
1029 /* Mono ADC source */
1030 /* MX-28 [12] */
1031 static const char * const rt5645_mono_adc_l1_src[] = {
1032         "Mono DAC MIXL", "ADC"
1033 };
1034
1035 static SOC_ENUM_SINGLE_DECL(
1036         rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1037         RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1038
1039 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1040         SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1041 /* MX-28 [11] */
1042 static const char * const rt5645_mono_adc_l2_src[] = {
1043         "Mono DAC MIXL", "DMIC"
1044 };
1045
1046 static SOC_ENUM_SINGLE_DECL(
1047         rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1048         RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1049
1050 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1051         SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1052
1053 /* MX-28 [8] */
1054 static const char * const rt5645_mono_dmic_src[] = {
1055         "DMIC1", "DMIC2"
1056 };
1057
1058 static SOC_ENUM_SINGLE_DECL(
1059         rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1060         RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1061
1062 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1063         SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1064 /* MX-28 [1:0] */
1065 static SOC_ENUM_SINGLE_DECL(
1066         rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1067         RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1068
1069 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1070         SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1071 /* MX-28 [4] */
1072 static const char * const rt5645_mono_adc_r1_src[] = {
1073         "Mono DAC MIXR", "ADC"
1074 };
1075
1076 static SOC_ENUM_SINGLE_DECL(
1077         rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1078         RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1079
1080 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1081         SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1082 /* MX-28 [3] */
1083 static const char * const rt5645_mono_adc_r2_src[] = {
1084         "Mono DAC MIXR", "DMIC"
1085 };
1086
1087 static SOC_ENUM_SINGLE_DECL(
1088         rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1089         RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1090
1091 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1092         SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1093
1094 /* MX-77 [9:8] */
1095 static const char * const rt5645_if1_adc_in_src[] = {
1096         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1097 };
1098
1099 static SOC_ENUM_SINGLE_DECL(
1100         rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1101         RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1102
1103 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1104         SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1105
1106 /* MX-2d [3] [2] */
1107 static const char * const rt5650_a_dac1_src[] = {
1108         "DAC1", "Stereo DAC Mixer"
1109 };
1110
1111 static SOC_ENUM_SINGLE_DECL(
1112         rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1113         RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1114
1115 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1116         SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1117
1118 static SOC_ENUM_SINGLE_DECL(
1119         rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1120         RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1121
1122 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1123         SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1124
1125 /* MX-2d [1] [0] */
1126 static const char * const rt5650_a_dac2_src[] = {
1127         "Stereo DAC Mixer", "Mono DAC Mixer"
1128 };
1129
1130 static SOC_ENUM_SINGLE_DECL(
1131         rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1132         RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1133
1134 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1135         SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1136
1137 static SOC_ENUM_SINGLE_DECL(
1138         rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1139         RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1140
1141 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1142         SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1143
1144 /* MX-2F [13:12] */
1145 static const char * const rt5645_if2_adc_in_src[] = {
1146         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1147 };
1148
1149 static SOC_ENUM_SINGLE_DECL(
1150         rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1151         RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1152
1153 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1154         SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1155
1156 /* MX-2F [1:0] */
1157 static const char * const rt5645_if3_adc_in_src[] = {
1158         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1159 };
1160
1161 static SOC_ENUM_SINGLE_DECL(
1162         rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
1163         RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
1164
1165 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
1166         SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
1167
1168 /* MX-31 [15] [13] [11] [9] */
1169 static const char * const rt5645_pdm_src[] = {
1170         "Mono DAC", "Stereo DAC"
1171 };
1172
1173 static SOC_ENUM_SINGLE_DECL(
1174         rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1175         RT5645_PDM1_L_SFT, rt5645_pdm_src);
1176
1177 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1178         SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1179
1180 static SOC_ENUM_SINGLE_DECL(
1181         rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1182         RT5645_PDM1_R_SFT, rt5645_pdm_src);
1183
1184 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1185         SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1186
1187 /* MX-9D [9:8] */
1188 static const char * const rt5645_vad_adc_src[] = {
1189         "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1190 };
1191
1192 static SOC_ENUM_SINGLE_DECL(
1193         rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1194         RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1195
1196 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1197         SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1198
1199 static const struct snd_kcontrol_new spk_l_vol_control =
1200         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1201                 RT5645_L_MUTE_SFT, 1, 1);
1202
1203 static const struct snd_kcontrol_new spk_r_vol_control =
1204         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1205                 RT5645_R_MUTE_SFT, 1, 1);
1206
1207 static const struct snd_kcontrol_new hp_l_vol_control =
1208         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1209                 RT5645_L_MUTE_SFT, 1, 1);
1210
1211 static const struct snd_kcontrol_new hp_r_vol_control =
1212         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1213                 RT5645_R_MUTE_SFT, 1, 1);
1214
1215 static const struct snd_kcontrol_new pdm1_l_vol_control =
1216         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1217                 RT5645_M_PDM1_L, 1, 1);
1218
1219 static const struct snd_kcontrol_new pdm1_r_vol_control =
1220         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1221                 RT5645_M_PDM1_R, 1, 1);
1222
1223 static void hp_amp_power(struct snd_soc_codec *codec, int on)
1224 {
1225         static int hp_amp_power_count;
1226         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1227
1228         if (on) {
1229                 if (hp_amp_power_count <= 0) {
1230                         /* depop parameters */
1231                         snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1232                                 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1233                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1234                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1235                                 RT5645_HP_DCC_INT1, 0x9f01);
1236                         mdelay(150);
1237                         /* headphone amp power on */
1238                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1239                                 RT5645_PWR_FV1 | RT5645_PWR_FV2 , 0);
1240                         snd_soc_update_bits(codec, RT5645_PWR_VOL,
1241                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1242                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1243                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1244                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1245                                 RT5645_PWR_HA,
1246                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1247                                 RT5645_PWR_HA);
1248                         mdelay(5);
1249                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1250                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1251                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1252
1253                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1254                                 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1255                                 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1256                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1257                                 0x14, 0x1aaa);
1258                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1259                                 0x24, 0x0430);
1260                 }
1261                 hp_amp_power_count++;
1262         } else {
1263                 hp_amp_power_count--;
1264                 if (hp_amp_power_count <= 0) {
1265                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1266                                 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1267                                 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1268                                 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1269                         /* headphone amp power down */
1270                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1271                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1272                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1273                                 RT5645_PWR_HA, 0);
1274                         snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1275                                 RT5645_DEPOP_MASK, 0);
1276                 }
1277         }
1278 }
1279
1280 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1281         struct snd_kcontrol *kcontrol, int event)
1282 {
1283         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1284         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1285
1286         switch (event) {
1287         case SND_SOC_DAPM_POST_PMU:
1288                 hp_amp_power(codec, 1);
1289                 /* headphone unmute sequence */
1290                 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1291                         snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1292                 } else {
1293                         snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1294                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1295                                 RT5645_CP_FQ3_MASK,
1296                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1297                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1298                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1299                 }
1300                 regmap_write(rt5645->regmap,
1301                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1302                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1303                         RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1304                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1305                         RT5645_RSTN_MASK, RT5645_RSTN_EN);
1306                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1307                         RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1308                         RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1309                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1310                 msleep(40);
1311                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1312                         RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1313                         RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1314                         RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1315                 break;
1316
1317         case SND_SOC_DAPM_PRE_PMD:
1318                 /* headphone mute sequence */
1319                 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1320                         snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1321                 } else {
1322                         snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1323                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1324                                 RT5645_CP_FQ3_MASK,
1325                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1326                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1327                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1328                 }
1329                 regmap_write(rt5645->regmap,
1330                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1331                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1332                         RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1333                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1334                         RT5645_RSTP_MASK, RT5645_RSTP_EN);
1335                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1336                         RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1337                         RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1338                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1339                 msleep(30);
1340                 hp_amp_power(codec, 0);
1341                 break;
1342
1343         default:
1344                 return 0;
1345         }
1346
1347         return 0;
1348 }
1349
1350 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1351         struct snd_kcontrol *kcontrol, int event)
1352 {
1353         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1354
1355         switch (event) {
1356         case SND_SOC_DAPM_POST_PMU:
1357                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1358                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1359                         RT5645_PWR_CLS_D_L,
1360                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1361                         RT5645_PWR_CLS_D_L);
1362                 break;
1363
1364         case SND_SOC_DAPM_PRE_PMD:
1365                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1366                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1367                         RT5645_PWR_CLS_D_L, 0);
1368                 break;
1369
1370         default:
1371                 return 0;
1372         }
1373
1374         return 0;
1375 }
1376
1377 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1378         struct snd_kcontrol *kcontrol, int event)
1379 {
1380         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1381
1382         switch (event) {
1383         case SND_SOC_DAPM_POST_PMU:
1384                 hp_amp_power(codec, 1);
1385                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1386                         RT5645_PWR_LM, RT5645_PWR_LM);
1387                 snd_soc_update_bits(codec, RT5645_LOUT1,
1388                         RT5645_L_MUTE | RT5645_R_MUTE, 0);
1389                 break;
1390
1391         case SND_SOC_DAPM_PRE_PMD:
1392                 snd_soc_update_bits(codec, RT5645_LOUT1,
1393                         RT5645_L_MUTE | RT5645_R_MUTE,
1394                         RT5645_L_MUTE | RT5645_R_MUTE);
1395                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1396                         RT5645_PWR_LM, 0);
1397                 hp_amp_power(codec, 0);
1398                 break;
1399
1400         default:
1401                 return 0;
1402         }
1403
1404         return 0;
1405 }
1406
1407 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1408         struct snd_kcontrol *kcontrol, int event)
1409 {
1410         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1411
1412         switch (event) {
1413         case SND_SOC_DAPM_POST_PMU:
1414                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1415                         RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1416                 break;
1417
1418         case SND_SOC_DAPM_PRE_PMD:
1419                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1420                         RT5645_PWR_BST2_P, 0);
1421                 break;
1422
1423         default:
1424                 return 0;
1425         }
1426
1427         return 0;
1428 }
1429
1430 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1431         SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1432                 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1433         SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1434                 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1435
1436         SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1437                 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1438         SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1439                 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1440
1441         /* ASRC */
1442         SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1443                               11, 0, NULL, 0),
1444         SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1445                               12, 0, NULL, 0),
1446         SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1447                               10, 0, NULL, 0),
1448         SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1449                               9, 0, NULL, 0),
1450         SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
1451                               8, 0, NULL, 0),
1452         SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
1453                               7, 0, NULL, 0),
1454         SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
1455                               5, 0, NULL, 0),
1456         SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
1457                               4, 0, NULL, 0),
1458         SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
1459                               3, 0, NULL, 0),
1460         SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
1461                               1, 0, NULL, 0),
1462         SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
1463                               0, 0, NULL, 0),
1464
1465         /* Input Side */
1466         /* micbias */
1467         SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1468                         RT5645_PWR_MB1_BIT, 0),
1469         SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1470                         RT5645_PWR_MB2_BIT, 0),
1471         /* Input Lines */
1472         SND_SOC_DAPM_INPUT("DMIC L1"),
1473         SND_SOC_DAPM_INPUT("DMIC R1"),
1474         SND_SOC_DAPM_INPUT("DMIC L2"),
1475         SND_SOC_DAPM_INPUT("DMIC R2"),
1476
1477         SND_SOC_DAPM_INPUT("IN1P"),
1478         SND_SOC_DAPM_INPUT("IN1N"),
1479         SND_SOC_DAPM_INPUT("IN2P"),
1480         SND_SOC_DAPM_INPUT("IN2N"),
1481
1482         SND_SOC_DAPM_INPUT("Haptic Generator"),
1483
1484         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1485         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1486         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1487                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1488         SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
1489                 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
1490         SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
1491                 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
1492         /* Boost */
1493         SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
1494                 RT5645_PWR_BST1_BIT, 0, NULL, 0),
1495         SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
1496                 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
1497                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1498         /* Input Volume */
1499         SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
1500                 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
1501         SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
1502                 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
1503         /* REC Mixer */
1504         SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
1505                         0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
1506         SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
1507                         0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
1508         /* ADCs */
1509         SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1510         SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1511
1512         SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
1513                 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
1514         SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
1515                 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
1516
1517         /* ADC Mux */
1518         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1519                 &rt5645_sto1_dmic_mux),
1520         SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1521                 &rt5645_sto_adc2_mux),
1522         SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1523                 &rt5645_sto_adc2_mux),
1524         SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1525                 &rt5645_sto_adc1_mux),
1526         SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1527                 &rt5645_sto_adc1_mux),
1528         SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1529                 &rt5645_mono_dmic_l_mux),
1530         SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1531                 &rt5645_mono_dmic_r_mux),
1532         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1533                 &rt5645_mono_adc_l2_mux),
1534         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1535                 &rt5645_mono_adc_l1_mux),
1536         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1537                 &rt5645_mono_adc_r1_mux),
1538         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1539                 &rt5645_mono_adc_r2_mux),
1540         /* ADC Mixer */
1541
1542         SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
1543                 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
1544         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1545                 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
1546                 NULL, 0),
1547         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1548                 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
1549                 NULL, 0),
1550         SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
1551                 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1552         SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1553                 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
1554                 NULL, 0),
1555         SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
1556                 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1557         SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1558                 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
1559                 NULL, 0),
1560
1561         /* ADC PGA */
1562         SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1563         SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1564         SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1565         SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1566         SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1567         SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1568         SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1569         SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1570         SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1571         SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1572
1573         /* IF1 2 Mux */
1574         SND_SOC_DAPM_MUX("IF1 ADC Mux", SND_SOC_NOPM,
1575                 0, 0, &rt5645_if1_adc_in_mux),
1576         SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
1577                 0, 0, &rt5645_if2_adc_in_mux),
1578
1579         /* Digital Interface */
1580         SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
1581                 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
1582         SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1583         SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1584         SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1585         SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1586         SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1587         SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1588         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1589         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1590         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1591         SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
1592                 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
1593         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1594         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1595         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1596         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1597
1598         /* Digital Interface Select */
1599         SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
1600                 0, 0, &rt5645_vad_adc_mux),
1601
1602         /* Audio Interface */
1603         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1604         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1605         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1606         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1607
1608         /* Output Side */
1609         /* DAC mixer before sound effect  */
1610         SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1611                 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
1612         SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1613                 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
1614
1615         /* DAC2 channel Mux */
1616         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
1617         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
1618         SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
1619                 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
1620         SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
1621                 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
1622
1623         SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
1624         SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
1625
1626         /* DAC Mixer */
1627         SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
1628                 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
1629         SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
1630                 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1631         SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
1632                 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1633         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1634                 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
1635         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1636                 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
1637         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1638                 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
1639         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1640                 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
1641         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1642                 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
1643         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1644                 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
1645
1646         /* DACs */
1647         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
1648                 0),
1649         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
1650                 0),
1651         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
1652                 0),
1653         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
1654                 0),
1655         /* OUT Mixer */
1656         SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
1657                 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
1658         SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
1659                 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
1660         SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
1661                 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
1662         SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
1663                 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
1664         /* Ouput Volume */
1665         SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
1666                 &spk_l_vol_control),
1667         SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
1668                 &spk_r_vol_control),
1669         SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
1670                 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
1671         SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
1672                 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
1673         SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
1674                 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
1675         SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
1676                 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
1677         SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1678         SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1679         SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1680         SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
1681         SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
1682
1683         /* HPO/LOUT/Mono Mixer */
1684         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
1685                 ARRAY_SIZE(rt5645_spo_l_mix)),
1686         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
1687                 ARRAY_SIZE(rt5645_spo_r_mix)),
1688         SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
1689                 ARRAY_SIZE(rt5645_hpo_mix)),
1690         SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
1691                 ARRAY_SIZE(rt5645_lout_mix)),
1692
1693         SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
1694                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1695         SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
1696                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1697         SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
1698                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1699
1700         /* PDM */
1701         SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
1702                 0, NULL, 0),
1703         SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
1704         SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
1705
1706         SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
1707         SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
1708
1709         /* Output Lines */
1710         SND_SOC_DAPM_OUTPUT("HPOL"),
1711         SND_SOC_DAPM_OUTPUT("HPOR"),
1712         SND_SOC_DAPM_OUTPUT("LOUTL"),
1713         SND_SOC_DAPM_OUTPUT("LOUTR"),
1714         SND_SOC_DAPM_OUTPUT("PDM1L"),
1715         SND_SOC_DAPM_OUTPUT("PDM1R"),
1716         SND_SOC_DAPM_OUTPUT("SPOL"),
1717         SND_SOC_DAPM_OUTPUT("SPOR"),
1718 };
1719
1720 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
1721         SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
1722                 0, 0, &rt5650_a_dac1_l_mux),
1723         SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
1724                 0, 0, &rt5650_a_dac1_r_mux),
1725         SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
1726                 0, 0, &rt5650_a_dac2_l_mux),
1727         SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
1728                 0, 0, &rt5650_a_dac2_r_mux),
1729 };
1730
1731 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
1732         { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1733         { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1734         { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1735         { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1736         { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1737         { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
1738
1739         { "I2S1", NULL, "I2S1 ASRC" },
1740         { "I2S2", NULL, "I2S2 ASRC" },
1741
1742         { "IN1P", NULL, "LDO2" },
1743         { "IN2P", NULL, "LDO2" },
1744
1745         { "DMIC1", NULL, "DMIC L1" },
1746         { "DMIC1", NULL, "DMIC R1" },
1747         { "DMIC2", NULL, "DMIC L2" },
1748         { "DMIC2", NULL, "DMIC R2" },
1749
1750         { "BST1", NULL, "IN1P" },
1751         { "BST1", NULL, "IN1N" },
1752         { "BST1", NULL, "JD Power" },
1753         { "BST1", NULL, "Mic Det Power" },
1754         { "BST2", NULL, "IN2P" },
1755         { "BST2", NULL, "IN2N" },
1756
1757         { "INL VOL", NULL, "IN2P" },
1758         { "INR VOL", NULL, "IN2N" },
1759
1760         { "RECMIXL", "HPOL Switch", "HPOL" },
1761         { "RECMIXL", "INL Switch", "INL VOL" },
1762         { "RECMIXL", "BST2 Switch", "BST2" },
1763         { "RECMIXL", "BST1 Switch", "BST1" },
1764         { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1765
1766         { "RECMIXR", "HPOR Switch", "HPOR" },
1767         { "RECMIXR", "INR Switch", "INR VOL" },
1768         { "RECMIXR", "BST2 Switch", "BST2" },
1769         { "RECMIXR", "BST1 Switch", "BST1" },
1770         { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1771
1772         { "ADC L", NULL, "RECMIXL" },
1773         { "ADC L", NULL, "ADC L power" },
1774         { "ADC R", NULL, "RECMIXR" },
1775         { "ADC R", NULL, "ADC R power" },
1776
1777         {"DMIC L1", NULL, "DMIC CLK"},
1778         {"DMIC L1", NULL, "DMIC1 Power"},
1779         {"DMIC R1", NULL, "DMIC CLK"},
1780         {"DMIC R1", NULL, "DMIC1 Power"},
1781         {"DMIC L2", NULL, "DMIC CLK"},
1782         {"DMIC L2", NULL, "DMIC2 Power"},
1783         {"DMIC R2", NULL, "DMIC CLK"},
1784         {"DMIC R2", NULL, "DMIC2 Power"},
1785
1786         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1787         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1788         { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
1789
1790         { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1791         { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1792         { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
1793
1794         { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1795         { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1796         { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
1797
1798         { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1799         { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1800         { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
1801         { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1802
1803         { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
1804         { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1805         { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1806         { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1807
1808         { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1809         { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1810         { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1811         { "Mono ADC L1 Mux", "ADC", "ADC L" },
1812
1813         { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1814         { "Mono ADC R1 Mux", "ADC", "ADC R" },
1815         { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1816         { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1817
1818         { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1819         { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1820         { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1821         { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1822
1823         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1824         { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
1825         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1826
1827         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1828         { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
1829         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1830
1831         { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1832         { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1833         { "Mono ADC MIXL", NULL, "adc mono left filter" },
1834         { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
1835
1836         { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1837         { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1838         { "Mono ADC MIXR", NULL, "adc mono right filter" },
1839         { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
1840
1841         { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1842         { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1843         { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1844
1845         { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1846         { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1847         { "IF_ADC2", NULL, "Mono ADC MIXL" },
1848         { "IF_ADC2", NULL, "Mono ADC MIXR" },
1849         { "VAD_ADC", NULL, "VAD ADC Mux" },
1850
1851         { "IF1 ADC Mux", "IF_ADC1", "IF_ADC1" },
1852         { "IF1 ADC Mux", "IF_ADC2", "IF_ADC2" },
1853         { "IF1 ADC Mux", "VAD_ADC", "VAD_ADC" },
1854
1855         { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1856         { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1857         { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1858
1859         { "IF1 ADC", NULL, "I2S1" },
1860         { "IF1 ADC", NULL, "IF1 ADC Mux" },
1861         { "IF2 ADC", NULL, "I2S2" },
1862         { "IF2 ADC", NULL, "IF2 ADC Mux" },
1863
1864         { "AIF1TX", NULL, "IF1 ADC" },
1865         { "AIF1TX", NULL, "IF2 ADC" },
1866         { "AIF2TX", NULL, "IF2 ADC" },
1867
1868         { "IF1 DAC1", NULL, "AIF1RX" },
1869         { "IF1 DAC2", NULL, "AIF1RX" },
1870         { "IF2 DAC", NULL, "AIF2RX" },
1871
1872         { "IF1 DAC1", NULL, "I2S1" },
1873         { "IF1 DAC2", NULL, "I2S1" },
1874         { "IF2 DAC", NULL, "I2S2" },
1875
1876         { "IF1 DAC2 L", NULL, "IF1 DAC2" },
1877         { "IF1 DAC2 R", NULL, "IF1 DAC2" },
1878         { "IF1 DAC1 L", NULL, "IF1 DAC1" },
1879         { "IF1 DAC1 R", NULL, "IF1 DAC1" },
1880         { "IF2 DAC L", NULL, "IF2 DAC" },
1881         { "IF2 DAC R", NULL, "IF2 DAC" },
1882
1883         { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1884         { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1885
1886         { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1887         { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1888
1889         { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1890         { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1891         { "DAC1 MIXL", NULL, "dac stereo1 filter" },
1892         { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1893         { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
1894         { "DAC1 MIXR", NULL, "dac stereo1 filter" },
1895
1896         { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
1897         { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
1898         { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
1899         { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
1900         { "DAC L2 Volume", NULL, "DAC L2 Mux" },
1901         { "DAC L2 Volume", NULL, "dac mono left filter" },
1902
1903         { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
1904         { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
1905         { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
1906         { "DAC R2 Mux", "Haptic", "Haptic Generator" },
1907         { "DAC R2 Volume", NULL, "DAC R2 Mux" },
1908         { "DAC R2 Volume", NULL, "dac mono right filter" },
1909
1910         { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1911         { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
1912         { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1913         { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
1914         { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1915         { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
1916         { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1917         { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
1918
1919         { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1920         { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1921         { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1922         { "Mono DAC MIXL", NULL, "dac mono left filter" },
1923         { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1924         { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1925         { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1926         { "Mono DAC MIXR", NULL, "dac mono right filter" },
1927
1928         { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
1929         { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1930         { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1931         { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
1932         { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1933         { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1934
1935         { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
1936         { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
1937         { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
1938         { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
1939
1940         { "SPK MIXL", "BST1 Switch", "BST1" },
1941         { "SPK MIXL", "INL Switch", "INL VOL" },
1942         { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
1943         { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
1944         { "SPK MIXR", "BST2 Switch", "BST2" },
1945         { "SPK MIXR", "INR Switch", "INR VOL" },
1946         { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
1947         { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
1948
1949         { "OUT MIXL", "BST1 Switch", "BST1" },
1950         { "OUT MIXL", "INL Switch", "INL VOL" },
1951         { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
1952         { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
1953
1954         { "OUT MIXR", "BST2 Switch", "BST2" },
1955         { "OUT MIXR", "INR Switch", "INR VOL" },
1956         { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
1957         { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
1958
1959         { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
1960         { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
1961         { "HPOVOL MIXL", "INL Switch", "INL VOL" },
1962         { "HPOVOL MIXL", "BST1 Switch", "BST1" },
1963         { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
1964         { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
1965         { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
1966         { "HPOVOL MIXR", "INR Switch", "INR VOL" },
1967         { "HPOVOL MIXR", "BST2 Switch", "BST2" },
1968         { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
1969
1970         { "DAC 2", NULL, "DAC L2" },
1971         { "DAC 2", NULL, "DAC R2" },
1972         { "DAC 1", NULL, "DAC L1" },
1973         { "DAC 1", NULL, "DAC R1" },
1974         { "HPOVOL L", "Switch", "HPOVOL MIXL" },
1975         { "HPOVOL R", "Switch", "HPOVOL MIXR" },
1976         { "HPOVOL", NULL, "HPOVOL L" },
1977         { "HPOVOL", NULL, "HPOVOL R" },
1978         { "HPO MIX", "DAC1 Switch", "DAC 1" },
1979         { "HPO MIX", "HPVOL Switch", "HPOVOL" },
1980
1981         { "SPKVOL L", "Switch", "SPK MIXL" },
1982         { "SPKVOL R", "Switch", "SPK MIXR" },
1983
1984         { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
1985         { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
1986         { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
1987         { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
1988         { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
1989         { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
1990
1991         { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
1992         { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
1993         { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
1994         { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
1995
1996         { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
1997         { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
1998         { "PDM1 L Mux", NULL, "PDM1 Power" },
1999         { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2000         { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2001         { "PDM1 R Mux", NULL, "PDM1 Power" },
2002
2003         { "HP amp", NULL, "HPO MIX" },
2004         { "HP amp", NULL, "JD Power" },
2005         { "HP amp", NULL, "Mic Det Power" },
2006         { "HP amp", NULL, "LDO2" },
2007         { "HPOL", NULL, "HP amp" },
2008         { "HPOR", NULL, "HP amp" },
2009
2010         { "LOUT amp", NULL, "LOUT MIX" },
2011         { "LOUTL", NULL, "LOUT amp" },
2012         { "LOUTR", NULL, "LOUT amp" },
2013
2014         { "PDM1 L", "Switch", "PDM1 L Mux" },
2015         { "PDM1 R", "Switch", "PDM1 R Mux" },
2016
2017         { "PDM1L", NULL, "PDM1 L" },
2018         { "PDM1R", NULL, "PDM1 R" },
2019
2020         { "SPK amp", NULL, "SPOL MIX" },
2021         { "SPK amp", NULL, "SPOR MIX" },
2022         { "SPOL", NULL, "SPK amp" },
2023         { "SPOR", NULL, "SPK amp" },
2024 };
2025
2026 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2027         { "A DAC1 L Mux", "DAC1",  "DAC1 MIXL"},
2028         { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2029         { "A DAC1 R Mux", "DAC1",  "DAC1 MIXR"},
2030         { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2031
2032         { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2033         { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2034         { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2035         { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2036
2037         { "DAC L1", NULL, "A DAC1 L Mux" },
2038         { "DAC R1", NULL, "A DAC1 R Mux" },
2039         { "DAC L2", NULL, "A DAC2 L Mux" },
2040         { "DAC R2", NULL, "A DAC2 R Mux" },
2041 };
2042
2043 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2044         { "DAC L1", NULL, "Stereo DAC MIXL" },
2045         { "DAC R1", NULL, "Stereo DAC MIXR" },
2046         { "DAC L2", NULL, "Mono DAC MIXL" },
2047         { "DAC R2", NULL, "Mono DAC MIXR" },
2048 };
2049
2050 static int rt5645_hw_params(struct snd_pcm_substream *substream,
2051         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2052 {
2053         struct snd_soc_codec *codec = dai->codec;
2054         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2055         unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2056         int pre_div, bclk_ms, frame_size;
2057
2058         rt5645->lrck[dai->id] = params_rate(params);
2059         pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2060         if (pre_div < 0) {
2061                 dev_err(codec->dev, "Unsupported clock setting\n");
2062                 return -EINVAL;
2063         }
2064         frame_size = snd_soc_params_to_frame_size(params);
2065         if (frame_size < 0) {
2066                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2067                 return -EINVAL;
2068         }
2069
2070         switch (rt5645->codec_type) {
2071         case CODEC_TYPE_RT5650:
2072                 dl_sft = 4;
2073                 break;
2074         default:
2075                 dl_sft = 2;
2076                 break;
2077         }
2078
2079         bclk_ms = frame_size > 32;
2080         rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2081
2082         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2083                 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2084         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2085                                 bclk_ms, pre_div, dai->id);
2086
2087         switch (params_width(params)) {
2088         case 16:
2089                 break;
2090         case 20:
2091                 val_len = 0x1;
2092                 break;
2093         case 24:
2094                 val_len = 0x2;
2095                 break;
2096         case 8:
2097                 val_len = 0x3;
2098                 break;
2099         default:
2100                 return -EINVAL;
2101         }
2102
2103         switch (dai->id) {
2104         case RT5645_AIF1:
2105                 mask_clk = RT5645_I2S_BCLK_MS1_MASK | RT5645_I2S_PD1_MASK;
2106                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS1_SFT |
2107                         pre_div << RT5645_I2S_PD1_SFT;
2108                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2109                         (0x3 << dl_sft), (val_len << dl_sft));
2110                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2111                 break;
2112         case  RT5645_AIF2:
2113                 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2114                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2115                         pre_div << RT5645_I2S_PD2_SFT;
2116                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2117                         (0x3 << dl_sft), (val_len << dl_sft));
2118                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2119                 break;
2120         default:
2121                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2122                 return -EINVAL;
2123         }
2124
2125         return 0;
2126 }
2127
2128 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2129 {
2130         struct snd_soc_codec *codec = dai->codec;
2131         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2132         unsigned int reg_val = 0, pol_sft;
2133
2134         switch (rt5645->codec_type) {
2135         case CODEC_TYPE_RT5650:
2136                 pol_sft = 8;
2137                 break;
2138         default:
2139                 pol_sft = 7;
2140                 break;
2141         }
2142
2143         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2144         case SND_SOC_DAIFMT_CBM_CFM:
2145                 rt5645->master[dai->id] = 1;
2146                 break;
2147         case SND_SOC_DAIFMT_CBS_CFS:
2148                 reg_val |= RT5645_I2S_MS_S;
2149                 rt5645->master[dai->id] = 0;
2150                 break;
2151         default:
2152                 return -EINVAL;
2153         }
2154
2155         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2156         case SND_SOC_DAIFMT_NB_NF:
2157                 break;
2158         case SND_SOC_DAIFMT_IB_NF:
2159                 reg_val |= (1 << pol_sft);
2160                 break;
2161         default:
2162                 return -EINVAL;
2163         }
2164
2165         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2166         case SND_SOC_DAIFMT_I2S:
2167                 break;
2168         case SND_SOC_DAIFMT_LEFT_J:
2169                 reg_val |= RT5645_I2S_DF_LEFT;
2170                 break;
2171         case SND_SOC_DAIFMT_DSP_A:
2172                 reg_val |= RT5645_I2S_DF_PCM_A;
2173                 break;
2174         case SND_SOC_DAIFMT_DSP_B:
2175                 reg_val |= RT5645_I2S_DF_PCM_B;
2176                 break;
2177         default:
2178                 return -EINVAL;
2179         }
2180         switch (dai->id) {
2181         case RT5645_AIF1:
2182                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2183                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2184                         RT5645_I2S_DF_MASK, reg_val);
2185                 break;
2186         case RT5645_AIF2:
2187                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2188                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2189                         RT5645_I2S_DF_MASK, reg_val);
2190                 break;
2191         default:
2192                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2193                 return -EINVAL;
2194         }
2195         return 0;
2196 }
2197
2198 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2199                 int clk_id, unsigned int freq, int dir)
2200 {
2201         struct snd_soc_codec *codec = dai->codec;
2202         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2203         unsigned int reg_val = 0;
2204
2205         if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2206                 return 0;
2207
2208         switch (clk_id) {
2209         case RT5645_SCLK_S_MCLK:
2210                 reg_val |= RT5645_SCLK_SRC_MCLK;
2211                 break;
2212         case RT5645_SCLK_S_PLL1:
2213                 reg_val |= RT5645_SCLK_SRC_PLL1;
2214                 break;
2215         case RT5645_SCLK_S_RCCLK:
2216                 reg_val |= RT5645_SCLK_SRC_RCCLK;
2217                 break;
2218         default:
2219                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2220                 return -EINVAL;
2221         }
2222         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2223                 RT5645_SCLK_SRC_MASK, reg_val);
2224         rt5645->sysclk = freq;
2225         rt5645->sysclk_src = clk_id;
2226
2227         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2228
2229         return 0;
2230 }
2231
2232 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2233                         unsigned int freq_in, unsigned int freq_out)
2234 {
2235         struct snd_soc_codec *codec = dai->codec;
2236         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2237         struct rl6231_pll_code pll_code;
2238         int ret;
2239
2240         if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2241             freq_out == rt5645->pll_out)
2242                 return 0;
2243
2244         if (!freq_in || !freq_out) {
2245                 dev_dbg(codec->dev, "PLL disabled\n");
2246
2247                 rt5645->pll_in = 0;
2248                 rt5645->pll_out = 0;
2249                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2250                         RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2251                 return 0;
2252         }
2253
2254         switch (source) {
2255         case RT5645_PLL1_S_MCLK:
2256                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2257                         RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2258                 break;
2259         case RT5645_PLL1_S_BCLK1:
2260         case RT5645_PLL1_S_BCLK2:
2261                 switch (dai->id) {
2262                 case RT5645_AIF1:
2263                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2264                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2265                         break;
2266                 case  RT5645_AIF2:
2267                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2268                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2269                         break;
2270                 default:
2271                         dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2272                         return -EINVAL;
2273                 }
2274                 break;
2275         default:
2276                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2277                 return -EINVAL;
2278         }
2279
2280         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2281         if (ret < 0) {
2282                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2283                 return ret;
2284         }
2285
2286         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2287                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2288                 pll_code.n_code, pll_code.k_code);
2289
2290         snd_soc_write(codec, RT5645_PLL_CTRL1,
2291                 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2292         snd_soc_write(codec, RT5645_PLL_CTRL2,
2293                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2294                 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2295
2296         rt5645->pll_in = freq_in;
2297         rt5645->pll_out = freq_out;
2298         rt5645->pll_src = source;
2299
2300         return 0;
2301 }
2302
2303 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2304                         unsigned int rx_mask, int slots, int slot_width)
2305 {
2306         struct snd_soc_codec *codec = dai->codec;
2307         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2308         unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
2309         unsigned int mask, val = 0;
2310
2311         switch (rt5645->codec_type) {
2312         case CODEC_TYPE_RT5650:
2313                 en_sft = 15;
2314                 i_slot_sft = 10;
2315                 o_slot_sft = 8;
2316                 i_width_sht = 6;
2317                 o_width_sht = 4;
2318                 mask = 0x8ff0;
2319                 break;
2320         default:
2321                 en_sft = 14;
2322                 i_slot_sft = o_slot_sft = 12;
2323                 i_width_sht = o_width_sht = 10;
2324                 mask = 0x7c00;
2325                 break;
2326         }
2327         if (rx_mask || tx_mask) {
2328                 val |= (1 << en_sft);
2329                 if (rt5645->codec_type == CODEC_TYPE_RT5645)
2330                         snd_soc_update_bits(codec, RT5645_BASS_BACK,
2331                                 RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
2332         }
2333
2334         switch (slots) {
2335         case 4:
2336                 val |= (1 << i_slot_sft) | (1 << o_slot_sft);
2337                 break;
2338         case 6:
2339                 val |= (2 << i_slot_sft) | (2 << o_slot_sft);
2340                 break;
2341         case 8:
2342                 val |= (3 << i_slot_sft) | (3 << o_slot_sft);
2343                 break;
2344         case 2:
2345         default:
2346                 break;
2347         }
2348
2349         switch (slot_width) {
2350         case 20:
2351                 val |= (1 << i_width_sht) | (1 << o_width_sht);
2352                 break;
2353         case 24:
2354                 val |= (2 << i_width_sht) | (2 << o_width_sht);
2355                 break;
2356         case 32:
2357                 val |= (3 << i_width_sht) | (3 << o_width_sht);
2358                 break;
2359         case 16:
2360         default:
2361                 break;
2362         }
2363
2364         snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, mask, val);
2365
2366         return 0;
2367 }
2368
2369 static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2370                         enum snd_soc_bias_level level)
2371 {
2372         switch (level) {
2373         case SND_SOC_BIAS_PREPARE:
2374                 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) {
2375                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2376                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2377                                 RT5645_PWR_BG | RT5645_PWR_VREF2,
2378                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2379                                 RT5645_PWR_BG | RT5645_PWR_VREF2);
2380                         mdelay(10);
2381                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2382                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2383                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2384                         snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2385                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2386                 }
2387                 break;
2388
2389         case SND_SOC_BIAS_STANDBY:
2390                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2391                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
2392                         RT5645_PWR_BG | RT5645_PWR_VREF2,
2393                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
2394                         RT5645_PWR_BG | RT5645_PWR_VREF2);
2395                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2396                         RT5645_PWR_FV1 | RT5645_PWR_FV2,
2397                         RT5645_PWR_FV1 | RT5645_PWR_FV2);
2398                 break;
2399
2400         case SND_SOC_BIAS_OFF:
2401                 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2402                 snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2403                                 RT5645_DIG_GATE_CTRL, 0);
2404                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2405                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2406                                 RT5645_PWR_BG | RT5645_PWR_VREF2 |
2407                                 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
2408                 break;
2409
2410         default:
2411                 break;
2412         }
2413         codec->dapm.bias_level = level;
2414
2415         return 0;
2416 }
2417
2418 static int rt5645_jack_detect(struct snd_soc_codec *codec)
2419 {
2420         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2421         int gpio_state, jack_type = 0;
2422         unsigned int val;
2423
2424         if (!gpio_is_valid(rt5645->pdata.hp_det_gpio)) {
2425                 dev_err(codec->dev, "invalid gpio\n");
2426                 return -EINVAL;
2427         }
2428         gpio_state = gpio_get_value(rt5645->pdata.hp_det_gpio);
2429
2430         dev_dbg(codec->dev, "gpio = %d(%d)\n", rt5645->pdata.hp_det_gpio,
2431                 gpio_state);
2432
2433         if ((rt5645->pdata.gpio_hp_det_active_high && gpio_state) ||
2434                 (!rt5645->pdata.gpio_hp_det_active_high && !gpio_state)) {
2435                 snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias1");
2436                 snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias2");
2437                 snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2");
2438                 snd_soc_dapm_force_enable_pin(&codec->dapm, "Mic Det Power");
2439                 snd_soc_dapm_sync(&codec->dapm);
2440
2441                 snd_soc_write(codec, RT5645_IN1_CTRL1, 0x0006);
2442                 snd_soc_write(codec, RT5645_JD_CTRL3, 0x00b0);
2443
2444                 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2445                         RT5645_CBJ_MN_JD, 0);
2446                 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2447                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
2448
2449                 msleep(400);
2450                 val = snd_soc_read(codec, RT5645_IN1_CTRL3) & 0x7;
2451                 dev_dbg(codec->dev, "val = %d\n", val);
2452
2453                 if (val == 1 || val == 2)
2454                         jack_type = SND_JACK_HEADSET;
2455                 else
2456                         jack_type = SND_JACK_HEADPHONE;
2457
2458                 snd_soc_dapm_disable_pin(&codec->dapm, "micbias1");
2459                 snd_soc_dapm_disable_pin(&codec->dapm, "micbias2");
2460                 if (rt5645->pdata.jd_mode == 0)
2461                         snd_soc_dapm_disable_pin(&codec->dapm, "LDO2");
2462                 snd_soc_dapm_disable_pin(&codec->dapm, "Mic Det Power");
2463                 snd_soc_dapm_sync(&codec->dapm);
2464         }
2465
2466         snd_soc_jack_report(rt5645->hp_jack, jack_type, SND_JACK_HEADPHONE);
2467         snd_soc_jack_report(rt5645->mic_jack, jack_type, SND_JACK_MICROPHONE);
2468         return 0;
2469 }
2470
2471 int rt5645_set_jack_detect(struct snd_soc_codec *codec,
2472         struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack)
2473 {
2474         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2475
2476         rt5645->hp_jack = hp_jack;
2477         rt5645->mic_jack = mic_jack;
2478         rt5645_jack_detect(codec);
2479
2480         return 0;
2481 }
2482 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
2483
2484 static void rt5645_jack_detect_work(struct work_struct *work)
2485 {
2486         struct rt5645_priv *rt5645 =
2487                 container_of(work, struct rt5645_priv, jack_detect_work.work);
2488
2489         rt5645_jack_detect(rt5645->codec);
2490 }
2491
2492 static irqreturn_t rt5645_irq(int irq, void *data)
2493 {
2494         struct rt5645_priv *rt5645 = data;
2495
2496         queue_delayed_work(system_power_efficient_wq,
2497                            &rt5645->jack_detect_work, msecs_to_jiffies(250));
2498
2499         return IRQ_HANDLED;
2500 }
2501
2502 static int rt5645_probe(struct snd_soc_codec *codec)
2503 {
2504         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2505
2506         rt5645->codec = codec;
2507
2508         switch (rt5645->codec_type) {
2509         case CODEC_TYPE_RT5645:
2510                 snd_soc_dapm_add_routes(&codec->dapm,
2511                         rt5645_specific_dapm_routes,
2512                         ARRAY_SIZE(rt5645_specific_dapm_routes));
2513                 break;
2514         case CODEC_TYPE_RT5650:
2515                 snd_soc_dapm_new_controls(&codec->dapm,
2516                         rt5650_specific_dapm_widgets,
2517                         ARRAY_SIZE(rt5650_specific_dapm_widgets));
2518                 snd_soc_dapm_add_routes(&codec->dapm,
2519                         rt5650_specific_dapm_routes,
2520                         ARRAY_SIZE(rt5650_specific_dapm_routes));
2521                 break;
2522         }
2523
2524         rt5645_set_bias_level(codec, SND_SOC_BIAS_OFF);
2525
2526         snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
2527
2528         /* for JD function */
2529         if (rt5645->pdata.en_jd_func) {
2530                 snd_soc_dapm_force_enable_pin(&codec->dapm, "JD Power");
2531                 snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2");
2532                 snd_soc_dapm_sync(&codec->dapm);
2533         }
2534
2535         return 0;
2536 }
2537
2538 static int rt5645_remove(struct snd_soc_codec *codec)
2539 {
2540         rt5645_reset(codec);
2541         return 0;
2542 }
2543
2544 #ifdef CONFIG_PM
2545 static int rt5645_suspend(struct snd_soc_codec *codec)
2546 {
2547         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2548
2549         regcache_cache_only(rt5645->regmap, true);
2550         regcache_mark_dirty(rt5645->regmap);
2551
2552         return 0;
2553 }
2554
2555 static int rt5645_resume(struct snd_soc_codec *codec)
2556 {
2557         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2558
2559         regcache_cache_only(rt5645->regmap, false);
2560         regcache_sync(rt5645->regmap);
2561
2562         return 0;
2563 }
2564 #else
2565 #define rt5645_suspend NULL
2566 #define rt5645_resume NULL
2567 #endif
2568
2569 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2570 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2571                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2572
2573 static struct snd_soc_dai_ops rt5645_aif_dai_ops = {
2574         .hw_params = rt5645_hw_params,
2575         .set_fmt = rt5645_set_dai_fmt,
2576         .set_sysclk = rt5645_set_dai_sysclk,
2577         .set_tdm_slot = rt5645_set_tdm_slot,
2578         .set_pll = rt5645_set_dai_pll,
2579 };
2580
2581 static struct snd_soc_dai_driver rt5645_dai[] = {
2582         {
2583                 .name = "rt5645-aif1",
2584                 .id = RT5645_AIF1,
2585                 .playback = {
2586                         .stream_name = "AIF1 Playback",
2587                         .channels_min = 1,
2588                         .channels_max = 2,
2589                         .rates = RT5645_STEREO_RATES,
2590                         .formats = RT5645_FORMATS,
2591                 },
2592                 .capture = {
2593                         .stream_name = "AIF1 Capture",
2594                         .channels_min = 1,
2595                         .channels_max = 2,
2596                         .rates = RT5645_STEREO_RATES,
2597                         .formats = RT5645_FORMATS,
2598                 },
2599                 .ops = &rt5645_aif_dai_ops,
2600         },
2601         {
2602                 .name = "rt5645-aif2",
2603                 .id = RT5645_AIF2,
2604                 .playback = {
2605                         .stream_name = "AIF2 Playback",
2606                         .channels_min = 1,
2607                         .channels_max = 2,
2608                         .rates = RT5645_STEREO_RATES,
2609                         .formats = RT5645_FORMATS,
2610                 },
2611                 .capture = {
2612                         .stream_name = "AIF2 Capture",
2613                         .channels_min = 1,
2614                         .channels_max = 2,
2615                         .rates = RT5645_STEREO_RATES,
2616                         .formats = RT5645_FORMATS,
2617                 },
2618                 .ops = &rt5645_aif_dai_ops,
2619         },
2620 };
2621
2622 static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
2623         .probe = rt5645_probe,
2624         .remove = rt5645_remove,
2625         .suspend = rt5645_suspend,
2626         .resume = rt5645_resume,
2627         .set_bias_level = rt5645_set_bias_level,
2628         .idle_bias_off = true,
2629         .controls = rt5645_snd_controls,
2630         .num_controls = ARRAY_SIZE(rt5645_snd_controls),
2631         .dapm_widgets = rt5645_dapm_widgets,
2632         .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
2633         .dapm_routes = rt5645_dapm_routes,
2634         .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
2635 };
2636
2637 static const struct regmap_config rt5645_regmap = {
2638         .reg_bits = 8,
2639         .val_bits = 16,
2640         .use_single_rw = true,
2641         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
2642                                                RT5645_PR_SPACING),
2643         .volatile_reg = rt5645_volatile_register,
2644         .readable_reg = rt5645_readable_register,
2645
2646         .cache_type = REGCACHE_RBTREE,
2647         .reg_defaults = rt5645_reg,
2648         .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
2649         .ranges = rt5645_ranges,
2650         .num_ranges = ARRAY_SIZE(rt5645_ranges),
2651 };
2652
2653 static const struct i2c_device_id rt5645_i2c_id[] = {
2654         { "rt5645", 0 },
2655         { "rt5650", 0 },
2656         { }
2657 };
2658 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
2659
2660 #ifdef CONFIG_ACPI
2661 static struct acpi_device_id rt5645_acpi_match[] = {
2662         { "10EC5645", 0 },
2663         { "10EC5650", 0 },
2664         {},
2665 };
2666 MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
2667 #endif
2668
2669 static int rt5645_i2c_probe(struct i2c_client *i2c,
2670                     const struct i2c_device_id *id)
2671 {
2672         struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
2673         struct rt5645_priv *rt5645;
2674         int ret;
2675         unsigned int val;
2676
2677         rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
2678                                 GFP_KERNEL);
2679         if (rt5645 == NULL)
2680                 return -ENOMEM;
2681
2682         rt5645->i2c = i2c;
2683         i2c_set_clientdata(i2c, rt5645);
2684
2685         if (pdata)
2686                 rt5645->pdata = *pdata;
2687
2688         rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
2689         if (IS_ERR(rt5645->regmap)) {
2690                 ret = PTR_ERR(rt5645->regmap);
2691                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2692                         ret);
2693                 return ret;
2694         }
2695
2696         regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
2697
2698         switch (val) {
2699         case RT5645_DEVICE_ID:
2700                 rt5645->codec_type = CODEC_TYPE_RT5645;
2701                 break;
2702         case RT5650_DEVICE_ID:
2703                 rt5645->codec_type = CODEC_TYPE_RT5650;
2704                 break;
2705         default:
2706                 dev_err(&i2c->dev,
2707                         "Device with ID register %x is not rt5645 or rt5650\n",
2708                         val);
2709                 return -ENODEV;
2710         }
2711
2712         regmap_write(rt5645->regmap, RT5645_RESET, 0);
2713
2714         ret = regmap_register_patch(rt5645->regmap, init_list,
2715                                     ARRAY_SIZE(init_list));
2716         if (ret != 0)
2717                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2718
2719         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
2720                 ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
2721                                     ARRAY_SIZE(rt5650_init_list));
2722                 if (ret != 0)
2723                         dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
2724                                            ret);
2725         }
2726
2727         if (rt5645->pdata.in2_diff)
2728                 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
2729                                         RT5645_IN_DF2, RT5645_IN_DF2);
2730
2731         if (rt5645->pdata.dmic_en) {
2732                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2733                         RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
2734
2735                 switch (rt5645->pdata.dmic1_data_pin) {
2736                 case RT5645_DMIC_DATA_IN2N:
2737                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2738                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
2739                         break;
2740
2741                 case RT5645_DMIC_DATA_GPIO5:
2742                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2743                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
2744                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2745                                 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
2746                         break;
2747
2748                 case RT5645_DMIC_DATA_GPIO11:
2749                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2750                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
2751                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2752                                 RT5645_GP11_PIN_MASK,
2753                                 RT5645_GP11_PIN_DMIC1_SDA);
2754                         break;
2755
2756                 default:
2757                         break;
2758                 }
2759
2760                 switch (rt5645->pdata.dmic2_data_pin) {
2761                 case RT5645_DMIC_DATA_IN2P:
2762                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2763                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
2764                         break;
2765
2766                 case RT5645_DMIC_DATA_GPIO6:
2767                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2768                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
2769                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2770                                 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
2771                         break;
2772
2773                 case RT5645_DMIC_DATA_GPIO10:
2774                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2775                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
2776                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2777                                 RT5645_GP10_PIN_MASK,
2778                                 RT5645_GP10_PIN_DMIC2_SDA);
2779                         break;
2780
2781                 case RT5645_DMIC_DATA_GPIO12:
2782                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2783                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
2784                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2785                                 RT5645_GP12_PIN_MASK,
2786                                 RT5645_GP12_PIN_DMIC2_SDA);
2787                         break;
2788
2789                 default:
2790                         break;
2791                 }
2792
2793         }
2794
2795         if (rt5645->pdata.en_jd_func) {
2796                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
2797                         RT5645_IRQ_CLK_GATE_CTRL | RT5645_MICINDET_MANU,
2798                         RT5645_IRQ_CLK_GATE_CTRL | RT5645_MICINDET_MANU);
2799                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
2800                         RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
2801                 regmap_update_bits(rt5645->regmap, RT5645_JD_CTRL3,
2802                         RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL,
2803                         RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL);
2804                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
2805                         RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
2806         }
2807
2808         if (rt5645->pdata.jd_mode) {
2809                 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
2810                                    RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
2811                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
2812                                    RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
2813                 regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
2814                                    RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
2815                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
2816                                    RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
2817                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2818                                    RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
2819                 switch (rt5645->pdata.jd_mode) {
2820                 case 1:
2821                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
2822                                            RT5645_JD1_MODE_MASK,
2823                                            RT5645_JD1_MODE_0);
2824                         break;
2825                 case 2:
2826                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
2827                                            RT5645_JD1_MODE_MASK,
2828                                            RT5645_JD1_MODE_1);
2829                         break;
2830                 case 3:
2831                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
2832                                            RT5645_JD1_MODE_MASK,
2833                                            RT5645_JD1_MODE_2);
2834                         break;
2835                 default:
2836                         break;
2837                 }
2838         }
2839
2840         if (rt5645->i2c->irq) {
2841                 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
2842                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
2843                         | IRQF_ONESHOT, "rt5645", rt5645);
2844                 if (ret)
2845                         dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
2846         }
2847
2848         if (gpio_is_valid(rt5645->pdata.hp_det_gpio)) {
2849                 ret = gpio_request(rt5645->pdata.hp_det_gpio, "rt5645");
2850                 if (ret)
2851                         dev_err(&i2c->dev, "Fail gpio_request hp_det_gpio\n");
2852
2853                 ret = gpio_direction_input(rt5645->pdata.hp_det_gpio);
2854                 if (ret)
2855                         dev_err(&i2c->dev, "Fail gpio_direction hp_det_gpio\n");
2856         }
2857
2858         INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
2859
2860         return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
2861                                       rt5645_dai, ARRAY_SIZE(rt5645_dai));
2862 }
2863
2864 static int rt5645_i2c_remove(struct i2c_client *i2c)
2865 {
2866         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
2867
2868         if (i2c->irq)
2869                 free_irq(i2c->irq, rt5645);
2870
2871         cancel_delayed_work_sync(&rt5645->jack_detect_work);
2872
2873         if (gpio_is_valid(rt5645->pdata.hp_det_gpio))
2874                 gpio_free(rt5645->pdata.hp_det_gpio);
2875
2876         snd_soc_unregister_codec(&i2c->dev);
2877
2878         return 0;
2879 }
2880
2881 static struct i2c_driver rt5645_i2c_driver = {
2882         .driver = {
2883                 .name = "rt5645",
2884                 .owner = THIS_MODULE,
2885                 .acpi_match_table = ACPI_PTR(rt5645_acpi_match),
2886         },
2887         .probe = rt5645_i2c_probe,
2888         .remove   = rt5645_i2c_remove,
2889         .id_table = rt5645_i2c_id,
2890 };
2891 module_i2c_driver(rt5645_i2c_driver);
2892
2893 MODULE_DESCRIPTION("ASoC RT5645 driver");
2894 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2895 MODULE_LICENSE("GPL v2");