sound/soc/codecs/rt5514.c

   1 /*
   2  * rt5514.c  --  RT5514 ALSA SoC audio codec driver
   3  *
   4  * Copyright 2015 Realtek Semiconductor Corp.
   5  * Author: Oder Chiou <oder_chiou@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/acpi.h>
  13 #include <linux/fs.h>
  14 #include <linux/module.h>
  15 #include <linux/moduleparam.h>
  16 #include <linux/init.h>
  17 #include <linux/delay.h>
  18 #include <linux/pm.h>
  19 #include <linux/regmap.h>
  20 #include <linux/i2c.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/firmware.h>
  23 #include <linux/gpio.h>
  24 #include <sound/core.h>
  25 #include <sound/pcm.h>
  26 #include <sound/pcm_params.h>
  27 #include <sound/soc.h>
  28 #include <sound/soc-dapm.h>
  29 #include <sound/initval.h>
  30 #include <sound/tlv.h>
  31
  32 #include "rl6231.h"
  33 #include "rt5514.h"
  34 #if IS_ENABLED(CONFIG_SND_SOC_RT5514_SPI)
  35 #include "rt5514-spi.h"
  36 #endif
  37
  38 static const struct reg_sequence rt5514_i2c_patch[] = {
  39         {0x1800101c, 0x00000000},
  40         {0x18001100, 0x0000031f},
  41         {0x18001104, 0x00000007},
  42         {0x18001108, 0x00000000},
  43         {0x1800110c, 0x00000000},
  44         {0x18001110, 0x00000000},
  45         {0x18001114, 0x00000001},
  46         {0x18001118, 0x00000000},
  47         {0x18002f08, 0x00000006},
  48         {0x18002f00, 0x00055149},
  49         {0x18002f00, 0x0005514b},
  50         {0x18002f00, 0x00055149},
  51         {0xfafafafa, 0x00000001},
  52         {0x18002f10, 0x00000001},
  53         {0x18002f10, 0x00000000},
  54         {0x18002f10, 0x00000001},
  55         {0xfafafafa, 0x00000001},
  56         {0x18002000, 0x000010ec},
  57         {0xfafafafa, 0x00000000},
  58 };
  59
  60 static const struct reg_sequence rt5514_patch[] = {
  61         {RT5514_DIG_IO_CTRL,            0x00000040},
  62         {RT5514_CLK_CTRL1,              0x38020041},
  63         {RT5514_SRC_CTRL,               0x44000eee},
  64         {RT5514_ANA_CTRL_LDO10,         0x00028604},
  65         {RT5514_ANA_CTRL_ADCFED,        0x00000800},
  66         {RT5514_ASRC_IN_CTRL1,          0x00000003},
  67         {RT5514_DOWNFILTER0_CTRL3,      0x10000362},
  68         {RT5514_DOWNFILTER1_CTRL3,      0x10000362},
  69 };
  70
  71 static const struct reg_default rt5514_reg[] = {
  72         {RT5514_RESET,                  0x00000000},
  73         {RT5514_PWR_ANA1,               0x00808880},
  74         {RT5514_PWR_ANA2,               0x00220000},
  75         {RT5514_I2S_CTRL1,              0x00000330},
  76         {RT5514_I2S_CTRL2,              0x20000000},
  77         {RT5514_VAD_CTRL6,              0xc00007d2},
  78         {RT5514_EXT_VAD_CTRL,           0x80000080},
  79         {RT5514_DIG_IO_CTRL,            0x00000040},
  80         {RT5514_PAD_CTRL1,              0x00804000},
  81         {RT5514_DMIC_DATA_CTRL,         0x00000005},
  82         {RT5514_DIG_SOURCE_CTRL,        0x00000002},
  83         {RT5514_SRC_CTRL,               0x44000eee},
  84         {RT5514_DOWNFILTER2_CTRL1,      0x0000882f},
  85         {RT5514_PLL_SOURCE_CTRL,        0x00000004},
  86         {RT5514_CLK_CTRL1,              0x38020041},
  87         {RT5514_CLK_CTRL2,              0x00000000},
  88         {RT5514_PLL3_CALIB_CTRL1,       0x00400200},
  89         {RT5514_PLL3_CALIB_CTRL5,       0x40220012},
  90         {RT5514_DELAY_BUF_CTRL1,        0x7fff006a},
  91         {RT5514_DELAY_BUF_CTRL3,        0x00000000},
  92         {RT5514_DOWNFILTER0_CTRL1,      0x00020c2f},
  93         {RT5514_DOWNFILTER0_CTRL2,      0x00020c2f},
  94         {RT5514_DOWNFILTER0_CTRL3,      0x10000362},
  95         {RT5514_DOWNFILTER1_CTRL1,      0x00020c2f},
  96         {RT5514_DOWNFILTER1_CTRL2,      0x00020c2f},
  97         {RT5514_DOWNFILTER1_CTRL3,      0x10000362},
  98         {RT5514_ANA_CTRL_LDO10,         0x00028604},
  99         {RT5514_ANA_CTRL_LDO18_16,      0x02000345},
 100         {RT5514_ANA_CTRL_ADC12,         0x0000a2a8},
 101         {RT5514_ANA_CTRL_ADC21,         0x00001180},
 102         {RT5514_ANA_CTRL_ADC22,         0x0000aaa8},
 103         {RT5514_ANA_CTRL_ADC23,         0x00151427},
 104         {RT5514_ANA_CTRL_MICBST,        0x00002000},
 105         {RT5514_ANA_CTRL_ADCFED,        0x00000800},
 106         {RT5514_ANA_CTRL_INBUF,         0x00000143},
 107         {RT5514_ANA_CTRL_VREF,          0x00008d50},
 108         {RT5514_ANA_CTRL_PLL3,          0x0000000e},
 109         {RT5514_ANA_CTRL_PLL1_1,        0x00000000},
 110         {RT5514_ANA_CTRL_PLL1_2,        0x00030220},
 111         {RT5514_DMIC_LP_CTRL,           0x00000000},
 112         {RT5514_MISC_CTRL_DSP,          0x00000000},
 113         {RT5514_DSP_CTRL1,              0x00055149},
 114         {RT5514_DSP_CTRL3,              0x00000006},
 115         {RT5514_DSP_CTRL4,              0x00000001},
 116         {RT5514_VENDOR_ID1,             0x00000001},
 117         {RT5514_VENDOR_ID2,             0x10ec5514},
 118 };
 119
 120 static void rt5514_enable_dsp_prepare(struct rt5514_priv *rt5514)
 121 {
 122         /* Reset */
 123         regmap_write(rt5514->i2c_regmap, 0x18002000, 0x000010ec);
 124         /* LDO_I_limit */
 125         regmap_write(rt5514->i2c_regmap, 0x18002200, 0x00028604);
 126         /* I2C bypass enable */
 127         regmap_write(rt5514->i2c_regmap, 0xfafafafa, 0x00000001);
 128         /* mini-core reset */
 129         regmap_write(rt5514->i2c_regmap, 0x18002f00, 0x0005514b);
 130         regmap_write(rt5514->i2c_regmap, 0x18002f00, 0x00055149);
 131         /* I2C bypass disable */
 132         regmap_write(rt5514->i2c_regmap, 0xfafafafa, 0x00000000);
 133         /* PIN config */
 134         regmap_write(rt5514->i2c_regmap, 0x18002070, 0x00000040);
 135         /* PLL3(QN)=RCOSC*(10+2) */
 136         regmap_write(rt5514->i2c_regmap, 0x18002240, 0x0000000a);
 137         /* PLL3 source=RCOSC, fsi=rt_clk */
 138         regmap_write(rt5514->i2c_regmap, 0x18002100, 0x0000000b);
 139         /* Power on RCOSC, pll3 */
 140         regmap_write(rt5514->i2c_regmap, 0x18002004, 0x00808b81);
 141         /* DSP clk source = pll3, ENABLE DSP clk */
 142         regmap_write(rt5514->i2c_regmap, 0x18002f08, 0x00000005);
 143         /* Enable DSP clk auto switch */
 144         regmap_write(rt5514->i2c_regmap, 0x18001114, 0x00000001);
 145         /* Reduce DSP power */
 146         regmap_write(rt5514->i2c_regmap, 0x18001118, 0x00000001);
 147 }
 148
 149 static bool rt5514_volatile_register(struct device *dev, unsigned int reg)
 150 {
 151         switch (reg) {
 152         case RT5514_VENDOR_ID1:
 153         case RT5514_VENDOR_ID2:
 154                 return true;
 155
 156         default:
 157                 return false;
 158         }
 159 }
 160
 161 static bool rt5514_readable_register(struct device *dev, unsigned int reg)
 162 {
 163         switch (reg) {
 164         case RT5514_RESET:
 165         case RT5514_PWR_ANA1:
 166         case RT5514_PWR_ANA2:
 167         case RT5514_I2S_CTRL1:
 168         case RT5514_I2S_CTRL2:
 169         case RT5514_VAD_CTRL6:
 170         case RT5514_EXT_VAD_CTRL:
 171         case RT5514_DIG_IO_CTRL:
 172         case RT5514_PAD_CTRL1:
 173         case RT5514_DMIC_DATA_CTRL:
 174         case RT5514_DIG_SOURCE_CTRL:
 175         case RT5514_SRC_CTRL:
 176         case RT5514_DOWNFILTER2_CTRL1:
 177         case RT5514_PLL_SOURCE_CTRL:
 178         case RT5514_CLK_CTRL1:
 179         case RT5514_CLK_CTRL2:
 180         case RT5514_PLL3_CALIB_CTRL1:
 181         case RT5514_PLL3_CALIB_CTRL5:
 182         case RT5514_DELAY_BUF_CTRL1:
 183         case RT5514_DELAY_BUF_CTRL3:
 184         case RT5514_DOWNFILTER0_CTRL1:
 185         case RT5514_DOWNFILTER0_CTRL2:
 186         case RT5514_DOWNFILTER0_CTRL3:
 187         case RT5514_DOWNFILTER1_CTRL1:
 188         case RT5514_DOWNFILTER1_CTRL2:
 189         case RT5514_DOWNFILTER1_CTRL3:
 190         case RT5514_ANA_CTRL_LDO10:
 191         case RT5514_ANA_CTRL_LDO18_16:
 192         case RT5514_ANA_CTRL_ADC12:
 193         case RT5514_ANA_CTRL_ADC21:
 194         case RT5514_ANA_CTRL_ADC22:
 195         case RT5514_ANA_CTRL_ADC23:
 196         case RT5514_ANA_CTRL_MICBST:
 197         case RT5514_ANA_CTRL_ADCFED:
 198         case RT5514_ANA_CTRL_INBUF:
 199         case RT5514_ANA_CTRL_VREF:
 200         case RT5514_ANA_CTRL_PLL3:
 201         case RT5514_ANA_CTRL_PLL1_1:
 202         case RT5514_ANA_CTRL_PLL1_2:
 203         case RT5514_DMIC_LP_CTRL:
 204         case RT5514_MISC_CTRL_DSP:
 205         case RT5514_DSP_CTRL1:
 206         case RT5514_DSP_CTRL3:
 207         case RT5514_DSP_CTRL4:
 208         case RT5514_VENDOR_ID1:
 209         case RT5514_VENDOR_ID2:
 210                 return true;
 211
 212         default:
 213                 return false;
 214         }
 215 }
 216
 217 static bool rt5514_i2c_readable_register(struct device *dev,
 218         unsigned int reg)
 219 {
 220         switch (reg) {
 221         case RT5514_DSP_MAPPING | RT5514_RESET:
 222         case RT5514_DSP_MAPPING | RT5514_PWR_ANA1:
 223         case RT5514_DSP_MAPPING | RT5514_PWR_ANA2:
 224         case RT5514_DSP_MAPPING | RT5514_I2S_CTRL1:
 225         case RT5514_DSP_MAPPING | RT5514_I2S_CTRL2:
 226         case RT5514_DSP_MAPPING | RT5514_VAD_CTRL6:
 227         case RT5514_DSP_MAPPING | RT5514_EXT_VAD_CTRL:
 228         case RT5514_DSP_MAPPING | RT5514_DIG_IO_CTRL:
 229         case RT5514_DSP_MAPPING | RT5514_PAD_CTRL1:
 230         case RT5514_DSP_MAPPING | RT5514_DMIC_DATA_CTRL:
 231         case RT5514_DSP_MAPPING | RT5514_DIG_SOURCE_CTRL:
 232         case RT5514_DSP_MAPPING | RT5514_SRC_CTRL:
 233         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER2_CTRL1:
 234         case RT5514_DSP_MAPPING | RT5514_PLL_SOURCE_CTRL:
 235         case RT5514_DSP_MAPPING | RT5514_CLK_CTRL1:
 236         case RT5514_DSP_MAPPING | RT5514_CLK_CTRL2:
 237         case RT5514_DSP_MAPPING | RT5514_PLL3_CALIB_CTRL1:
 238         case RT5514_DSP_MAPPING | RT5514_PLL3_CALIB_CTRL5:
 239         case RT5514_DSP_MAPPING | RT5514_DELAY_BUF_CTRL1:
 240         case RT5514_DSP_MAPPING | RT5514_DELAY_BUF_CTRL3:
 241         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER0_CTRL1:
 242         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER0_CTRL2:
 243         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER0_CTRL3:
 244         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER1_CTRL1:
 245         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER1_CTRL2:
 246         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER1_CTRL3:
 247         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_LDO10:
 248         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_LDO18_16:
 249         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADC12:
 250         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADC21:
 251         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADC22:
 252         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADC23:
 253         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_MICBST:
 254         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADCFED:
 255         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_INBUF:
 256         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_VREF:
 257         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_PLL3:
 258         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_PLL1_1:
 259         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_PLL1_2:
 260         case RT5514_DSP_MAPPING | RT5514_DMIC_LP_CTRL:
 261         case RT5514_DSP_MAPPING | RT5514_MISC_CTRL_DSP:
 262         case RT5514_DSP_MAPPING | RT5514_DSP_CTRL1:
 263         case RT5514_DSP_MAPPING | RT5514_DSP_CTRL3:
 264         case RT5514_DSP_MAPPING | RT5514_DSP_CTRL4:
 265         case RT5514_DSP_MAPPING | RT5514_VENDOR_ID1:
 266         case RT5514_DSP_MAPPING | RT5514_VENDOR_ID2:
 267                 return true;
 268
 269         default:
 270                 return false;
 271         }
 272 }
 273
 274 /* {-3, 0, +3, +4.5, +7.5, +9.5, +12, +14, +17} dB */
 275 static const DECLARE_TLV_DB_RANGE(bst_tlv,
 276         0, 2, TLV_DB_SCALE_ITEM(-300, 300, 0),
 277         3, 3, TLV_DB_SCALE_ITEM(450, 0, 0),
 278         4, 4, TLV_DB_SCALE_ITEM(750, 0, 0),
 279         5, 5, TLV_DB_SCALE_ITEM(950, 0, 0),
 280         6, 6, TLV_DB_SCALE_ITEM(1200, 0, 0),
 281         7, 7, TLV_DB_SCALE_ITEM(1400, 0, 0),
 282         8, 8, TLV_DB_SCALE_ITEM(1700, 0, 0)
 283 );
 284
 285 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
 286
 287 static int rt5514_dsp_voice_wake_up_get(struct snd_kcontrol *kcontrol,
 288                 struct snd_ctl_elem_value *ucontrol)
 289 {
 290         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 291         struct rt5514_priv *rt5514 = snd_soc_component_get_drvdata(component);
 292
 293         ucontrol->value.integer.value[0] = rt5514->dsp_enabled;
 294
 295         return 0;
 296 }
 297
 298 static int rt5514_dsp_voice_wake_up_put(struct snd_kcontrol *kcontrol,
 299                 struct snd_ctl_elem_value *ucontrol)
 300 {
 301         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 302         struct rt5514_priv *rt5514 = snd_soc_component_get_drvdata(component);
 303         struct snd_soc_codec *codec = rt5514->codec;
 304         const struct firmware *fw = NULL;
 305
 306         if (ucontrol->value.integer.value[0] == rt5514->dsp_enabled)
 307                 return 0;
 308
 309         if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
 310                 rt5514->dsp_enabled = ucontrol->value.integer.value[0];
 311
 312                 if (rt5514->dsp_enabled) {
 313                         rt5514_enable_dsp_prepare(rt5514);
 314
 315                         request_firmware(&fw, RT5514_FIRMWARE1, codec->dev);
 316                         if (fw) {
 317 #if IS_ENABLED(CONFIG_SND_SOC_RT5514_SPI)
 318                                 rt5514_spi_burst_write(0x4ff60000, fw->data,
 319                                         ((fw->size/8)+1)*8);
 320 #else
 321                                 dev_err(codec->dev, "There is no SPI driver for"
 322                                         " loading the firmware\n");
 323 #endif
 324                                 release_firmware(fw);
 325                                 fw = NULL;
 326                         }
 327
 328                         request_firmware(&fw, RT5514_FIRMWARE2, codec->dev);
 329                         if (fw) {
 330 #if IS_ENABLED(CONFIG_SND_SOC_RT5514_SPI)
 331                                 rt5514_spi_burst_write(0x4ffc0000, fw->data,
 332                                         ((fw->size/8)+1)*8);
 333 #else
 334                                 dev_err(codec->dev, "There is no SPI driver for"
 335                                         " loading the firmware\n");
 336 #endif
 337                                 release_firmware(fw);
 338                                 fw = NULL;
 339                         }
 340
 341                         /* DSP run */
 342                         regmap_write(rt5514->i2c_regmap, 0x18002f00,
 343                                 0x00055148);
 344                 } else {
 345                         regmap_multi_reg_write(rt5514->i2c_regmap,
 346                                 rt5514_i2c_patch, ARRAY_SIZE(rt5514_i2c_patch));
 347                         regcache_mark_dirty(rt5514->regmap);
 348                         regcache_sync(rt5514->regmap);
 349                 }
 350         }
 351
 352         return 0;
 353 }
 354
 355 static const struct snd_kcontrol_new rt5514_snd_controls[] = {
 356         SOC_DOUBLE_TLV("MIC Boost Volume", RT5514_ANA_CTRL_MICBST,
 357                 RT5514_SEL_BSTL_SFT, RT5514_SEL_BSTR_SFT, 8, 0, bst_tlv),
 358         SOC_DOUBLE_R_TLV("ADC1 Capture Volume", RT5514_DOWNFILTER0_CTRL1,
 359                 RT5514_DOWNFILTER0_CTRL2, RT5514_AD_GAIN_SFT, 63, 0,
 360                 adc_vol_tlv),
 361         SOC_DOUBLE_R_TLV("ADC2 Capture Volume", RT5514_DOWNFILTER1_CTRL1,
 362                 RT5514_DOWNFILTER1_CTRL2, RT5514_AD_GAIN_SFT, 63, 0,
 363                 adc_vol_tlv),
 364         SOC_SINGLE_EXT("DSP Voice Wake Up", SND_SOC_NOPM, 0, 1, 0,
 365                 rt5514_dsp_voice_wake_up_get, rt5514_dsp_voice_wake_up_put),
 366 };
 367
 368 /* ADC Mixer*/
 369 static const struct snd_kcontrol_new rt5514_sto1_adc_l_mix[] = {
 370         SOC_DAPM_SINGLE("DMIC Switch", RT5514_DOWNFILTER0_CTRL1,
 371                 RT5514_AD_DMIC_MIX_BIT, 1, 1),
 372         SOC_DAPM_SINGLE("ADC Switch", RT5514_DOWNFILTER0_CTRL1,
 373                 RT5514_AD_AD_MIX_BIT, 1, 1),
 374 };
 375
 376 static const struct snd_kcontrol_new rt5514_sto1_adc_r_mix[] = {
 377         SOC_DAPM_SINGLE("DMIC Switch", RT5514_DOWNFILTER0_CTRL2,
 378                 RT5514_AD_DMIC_MIX_BIT, 1, 1),
 379         SOC_DAPM_SINGLE("ADC Switch", RT5514_DOWNFILTER0_CTRL2,
 380                 RT5514_AD_AD_MIX_BIT, 1, 1),
 381 };
 382
 383 static const struct snd_kcontrol_new rt5514_sto2_adc_l_mix[] = {
 384         SOC_DAPM_SINGLE("DMIC Switch", RT5514_DOWNFILTER1_CTRL1,
 385                 RT5514_AD_DMIC_MIX_BIT, 1, 1),
 386         SOC_DAPM_SINGLE("ADC Switch", RT5514_DOWNFILTER1_CTRL1,
 387                 RT5514_AD_AD_MIX_BIT, 1, 1),
 388 };
 389
 390 static const struct snd_kcontrol_new rt5514_sto2_adc_r_mix[] = {
 391         SOC_DAPM_SINGLE("DMIC Switch", RT5514_DOWNFILTER1_CTRL2,
 392                 RT5514_AD_DMIC_MIX_BIT, 1, 1),
 393         SOC_DAPM_SINGLE("ADC Switch", RT5514_DOWNFILTER1_CTRL2,
 394                 RT5514_AD_AD_MIX_BIT, 1, 1),
 395 };
 396
 397 /* DMIC Source */
 398 static const char * const rt5514_dmic_src[] = {
 399         "DMIC1", "DMIC2"
 400 };
 401
 402 static SOC_ENUM_SINGLE_DECL(
 403         rt5514_stereo1_dmic_enum, RT5514_DIG_SOURCE_CTRL,
 404         RT5514_AD0_DMIC_INPUT_SEL_SFT, rt5514_dmic_src);
 405
 406 static const struct snd_kcontrol_new rt5514_sto1_dmic_mux =
 407         SOC_DAPM_ENUM("Stereo1 DMIC Source", rt5514_stereo1_dmic_enum);
 408
 409 static SOC_ENUM_SINGLE_DECL(
 410         rt5514_stereo2_dmic_enum, RT5514_DIG_SOURCE_CTRL,
 411         RT5514_AD1_DMIC_INPUT_SEL_SFT, rt5514_dmic_src);
 412
 413 static const struct snd_kcontrol_new rt5514_sto2_dmic_mux =
 414         SOC_DAPM_ENUM("Stereo2 DMIC Source", rt5514_stereo2_dmic_enum);
 415
 416 /**
 417  * rt5514_calc_dmic_clk - Calculate the frequency divider parameter of dmic.
 418  *
 419  * @rate: base clock rate.
 420  *
 421  * Choose divider parameter that gives the highest possible DMIC frequency in
 422  * 1MHz - 3MHz range.
 423  */
 424 static int rt5514_calc_dmic_clk(struct snd_soc_codec *codec, int rate)
 425 {
 426         int div[] = {2, 3, 4, 8, 12, 16, 24, 32};
 427         int i;
 428
 429         if (rate < 1000000 * div[0]) {
 430                 pr_warn("Base clock rate %d is too low\n", rate);
 431                 return -EINVAL;
 432         }
 433
 434         for (i = 0; i < ARRAY_SIZE(div); i++) {
 435                 /* find divider that gives DMIC frequency below 3.072MHz */
 436                 if (3072000 * div[i] >= rate)
 437                         return i;
 438         }
 439
 440         dev_warn(codec->dev, "Base clock rate %d is too high\n", rate);
 441         return -EINVAL;
 442 }
 443
 444 static int rt5514_set_dmic_clk(struct snd_soc_dapm_widget *w,
 445         struct snd_kcontrol *kcontrol, int event)
 446 {
 447         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 448         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
 449         int idx;
 450
 451         idx = rt5514_calc_dmic_clk(codec, rt5514->sysclk);
 452         if (idx < 0)
 453                 dev_err(codec->dev, "Failed to set DMIC clock\n");
 454         else
 455                 regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL1,
 456                         RT5514_CLK_DMIC_OUT_SEL_MASK,
 457                         idx << RT5514_CLK_DMIC_OUT_SEL_SFT);
 458
 459         if (rt5514->pdata.dmic_init_delay)
 460                 msleep(rt5514->pdata.dmic_init_delay);
 461
 462         return idx;
 463 }
 464
 465 static int rt5514_is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 466                          struct snd_soc_dapm_widget *sink)
 467 {
 468         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 469         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
 470
 471         if (rt5514->sysclk_src == RT5514_SCLK_S_PLL1)
 472                 return 1;
 473         else
 474                 return 0;
 475 }
 476
 477 static int rt5514_i2s_use_asrc(struct snd_soc_dapm_widget *source,
 478         struct snd_soc_dapm_widget *sink)
 479 {
 480         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 481         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
 482
 483         return (rt5514->sysclk > rt5514->lrck * 384);
 484 }
 485
 486 static const struct snd_soc_dapm_widget rt5514_dapm_widgets[] = {
 487         /* Input Lines */
 488         SND_SOC_DAPM_INPUT("DMIC1L"),
 489         SND_SOC_DAPM_INPUT("DMIC1R"),
 490         SND_SOC_DAPM_INPUT("DMIC2L"),
 491         SND_SOC_DAPM_INPUT("DMIC2R"),
 492
 493         SND_SOC_DAPM_INPUT("AMICL"),
 494         SND_SOC_DAPM_INPUT("AMICR"),
 495
 496         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
 497         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
 498
 499         SND_SOC_DAPM_SUPPLY_S("DMIC CLK", 1, SND_SOC_NOPM, 0, 0,
 500                 rt5514_set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
 501
 502         SND_SOC_DAPM_SUPPLY("ADC CLK", RT5514_CLK_CTRL1,
 503                 RT5514_CLK_AD_ANA1_EN_BIT, 0, NULL, 0),
 504
 505         SND_SOC_DAPM_SUPPLY("LDO18 IN", RT5514_PWR_ANA1,
 506                 RT5514_POW_LDO18_IN_BIT, 0, NULL, 0),
 507         SND_SOC_DAPM_SUPPLY("LDO18 ADC", RT5514_PWR_ANA1,
 508                 RT5514_POW_LDO18_ADC_BIT, 0, NULL, 0),
 509         SND_SOC_DAPM_SUPPLY("LDO21", RT5514_PWR_ANA1, RT5514_POW_LDO21_BIT, 0,
 510                 NULL, 0),
 511         SND_SOC_DAPM_SUPPLY("BG LDO18 IN", RT5514_PWR_ANA1,
 512                 RT5514_POW_BG_LDO18_IN_BIT, 0, NULL, 0),
 513         SND_SOC_DAPM_SUPPLY("BG LDO21", RT5514_PWR_ANA1,
 514                 RT5514_POW_BG_LDO21_BIT, 0, NULL, 0),
 515         SND_SOC_DAPM_SUPPLY("BG MBIAS", RT5514_PWR_ANA2,
 516                 RT5514_POW_BG_MBIAS_BIT, 0, NULL, 0),
 517         SND_SOC_DAPM_SUPPLY("MBIAS", RT5514_PWR_ANA2, RT5514_POW_MBIAS_BIT, 0,
 518                 NULL, 0),
 519         SND_SOC_DAPM_SUPPLY("VREF2", RT5514_PWR_ANA2, RT5514_POW_VREF2_BIT, 0,
 520                 NULL, 0),
 521         SND_SOC_DAPM_SUPPLY("VREF1", RT5514_PWR_ANA2, RT5514_POW_VREF1_BIT, 0,
 522                 NULL, 0),
 523         SND_SOC_DAPM_SUPPLY("ADC Power", SND_SOC_NOPM, 0, 0, NULL, 0),
 524
 525
 526         SND_SOC_DAPM_SUPPLY("LDO16L", RT5514_PWR_ANA2, RT5514_POWL_LDO16_BIT, 0,
 527                 NULL, 0),
 528         SND_SOC_DAPM_SUPPLY("ADC1L", RT5514_PWR_ANA2, RT5514_POW_ADC1_L_BIT, 0,
 529                 NULL, 0),
 530         SND_SOC_DAPM_SUPPLY("BSTL2", RT5514_PWR_ANA2, RT5514_POW2_BSTL_BIT, 0,
 531                 NULL, 0),
 532         SND_SOC_DAPM_SUPPLY("BSTL", RT5514_PWR_ANA2, RT5514_POW_BSTL_BIT, 0,
 533                 NULL, 0),
 534         SND_SOC_DAPM_SUPPLY("ADCFEDL", RT5514_PWR_ANA2, RT5514_POW_ADCFEDL_BIT,
 535                 0, NULL, 0),
 536         SND_SOC_DAPM_SUPPLY("ADCL Power", SND_SOC_NOPM, 0, 0, NULL, 0),
 537
 538         SND_SOC_DAPM_SUPPLY("LDO16R", RT5514_PWR_ANA2, RT5514_POWR_LDO16_BIT, 0,
 539                 NULL, 0),
 540         SND_SOC_DAPM_SUPPLY("ADC1R", RT5514_PWR_ANA2, RT5514_POW_ADC1_R_BIT, 0,
 541                 NULL, 0),
 542         SND_SOC_DAPM_SUPPLY("BSTR2", RT5514_PWR_ANA2, RT5514_POW2_BSTR_BIT, 0,
 543                 NULL, 0),
 544         SND_SOC_DAPM_SUPPLY("BSTR", RT5514_PWR_ANA2, RT5514_POW_BSTR_BIT, 0,
 545                 NULL, 0),
 546         SND_SOC_DAPM_SUPPLY("ADCFEDR", RT5514_PWR_ANA2, RT5514_POW_ADCFEDR_BIT,
 547                 0, NULL, 0),
 548         SND_SOC_DAPM_SUPPLY("ADCR Power", SND_SOC_NOPM, 0, 0, NULL, 0),
 549
 550         SND_SOC_DAPM_SUPPLY("PLL1 LDO ENABLE", RT5514_ANA_CTRL_PLL1_2,
 551                 RT5514_EN_LDO_PLL1_BIT, 0, NULL, 0),
 552         SND_SOC_DAPM_SUPPLY("PLL1 LDO", RT5514_PWR_ANA2,
 553                 RT5514_POW_PLL1_LDO_BIT, 0, NULL, 0),
 554         SND_SOC_DAPM_SUPPLY("PLL1", RT5514_PWR_ANA2, RT5514_POW_PLL1_BIT, 0,
 555                 NULL, 0),
 556         SND_SOC_DAPM_SUPPLY_S("ASRC AD1", 1, RT5514_CLK_CTRL2,
 557                 RT5514_CLK_AD0_ASRC_EN_BIT, 0, NULL, 0),
 558         SND_SOC_DAPM_SUPPLY_S("ASRC AD2", 1, RT5514_CLK_CTRL2,
 559                 RT5514_CLK_AD1_ASRC_EN_BIT, 0, NULL, 0),
 560
 561         /* ADC Mux */
 562         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
 563                                 &rt5514_sto1_dmic_mux),
 564         SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
 565                                 &rt5514_sto2_dmic_mux),
 566
 567         /* ADC Mixer */
 568         SND_SOC_DAPM_SUPPLY("adc stereo1 filter", RT5514_CLK_CTRL1,
 569                 RT5514_CLK_AD0_EN_BIT, 0, NULL, 0),
 570         SND_SOC_DAPM_SUPPLY("adc stereo2 filter", RT5514_CLK_CTRL1,
 571                 RT5514_CLK_AD1_EN_BIT, 0, NULL, 0),
 572
 573         SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
 574                 rt5514_sto1_adc_l_mix, ARRAY_SIZE(rt5514_sto1_adc_l_mix)),
 575         SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
 576                 rt5514_sto1_adc_r_mix, ARRAY_SIZE(rt5514_sto1_adc_r_mix)),
 577         SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
 578                 rt5514_sto2_adc_l_mix, ARRAY_SIZE(rt5514_sto2_adc_l_mix)),
 579         SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
 580                 rt5514_sto2_adc_r_mix, ARRAY_SIZE(rt5514_sto2_adc_r_mix)),
 581
 582         SND_SOC_DAPM_ADC("Stereo1 ADC MIXL", NULL, RT5514_DOWNFILTER0_CTRL1,
 583                 RT5514_AD_AD_MUTE_BIT, 1),
 584         SND_SOC_DAPM_ADC("Stereo1 ADC MIXR", NULL, RT5514_DOWNFILTER0_CTRL2,
 585                 RT5514_AD_AD_MUTE_BIT, 1),
 586         SND_SOC_DAPM_ADC("Stereo2 ADC MIXL", NULL, RT5514_DOWNFILTER1_CTRL1,
 587                 RT5514_AD_AD_MUTE_BIT, 1),
 588         SND_SOC_DAPM_ADC("Stereo2 ADC MIXR", NULL, RT5514_DOWNFILTER1_CTRL2,
 589                 RT5514_AD_AD_MUTE_BIT, 1),
 590
 591         /* ADC PGA */
 592         SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
 593         SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
 594
 595         /* Audio Interface */
 596         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
 597 };
 598
 599 static const struct snd_soc_dapm_route rt5514_dapm_routes[] = {
 600         { "DMIC1", NULL, "DMIC1L" },
 601         { "DMIC1", NULL, "DMIC1R" },
 602         { "DMIC2", NULL, "DMIC2L" },
 603         { "DMIC2", NULL, "DMIC2R" },
 604
 605         { "DMIC1L", NULL, "DMIC CLK" },
 606         { "DMIC1R", NULL, "DMIC CLK" },
 607         { "DMIC2L", NULL, "DMIC CLK" },
 608         { "DMIC2R", NULL, "DMIC CLK" },
 609
 610         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
 611         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
 612
 613         { "Sto1 ADC MIXL", "DMIC Switch", "Stereo1 DMIC Mux" },
 614         { "Sto1 ADC MIXL", "ADC Switch", "AMICL" },
 615         { "Sto1 ADC MIXR", "DMIC Switch", "Stereo1 DMIC Mux" },
 616         { "Sto1 ADC MIXR", "ADC Switch", "AMICR" },
 617
 618         { "ADC Power", NULL, "LDO18 IN" },
 619         { "ADC Power", NULL, "LDO18 ADC" },
 620         { "ADC Power", NULL, "LDO21" },
 621         { "ADC Power", NULL, "BG LDO18 IN" },
 622         { "ADC Power", NULL, "BG LDO21" },
 623         { "ADC Power", NULL, "BG MBIAS" },
 624         { "ADC Power", NULL, "MBIAS" },
 625         { "ADC Power", NULL, "VREF2" },
 626         { "ADC Power", NULL, "VREF1" },
 627
 628         { "ADCL Power", NULL, "LDO16L" },
 629         { "ADCL Power", NULL, "ADC1L" },
 630         { "ADCL Power", NULL, "BSTL2" },
 631         { "ADCL Power", NULL, "BSTL" },
 632         { "ADCL Power", NULL, "ADCFEDL" },
 633
 634         { "ADCR Power", NULL, "LDO16R" },
 635         { "ADCR Power", NULL, "ADC1R" },
 636         { "ADCR Power", NULL, "BSTR2" },
 637         { "ADCR Power", NULL, "BSTR" },
 638         { "ADCR Power", NULL, "ADCFEDR" },
 639
 640         { "AMICL", NULL, "ADC CLK" },
 641         { "AMICL", NULL, "ADC Power" },
 642         { "AMICL", NULL, "ADCL Power" },
 643         { "AMICR", NULL, "ADC CLK" },
 644         { "AMICR", NULL, "ADC Power" },
 645         { "AMICR", NULL, "ADCR Power" },
 646
 647         { "PLL1 LDO", NULL, "PLL1 LDO ENABLE" },
 648         { "PLL1", NULL, "PLL1 LDO" },
 649
 650         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
 651         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
 652
 653         { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
 654         { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
 655         { "Stereo1 ADC MIX", NULL, "adc stereo1 filter" },
 656         { "adc stereo1 filter", NULL, "PLL1", rt5514_is_sys_clk_from_pll },
 657         { "adc stereo1 filter", NULL, "ASRC AD1", rt5514_i2s_use_asrc },
 658
 659         { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
 660         { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
 661
 662         { "Sto2 ADC MIXL", "DMIC Switch", "Stereo2 DMIC Mux" },
 663         { "Sto2 ADC MIXL", "ADC Switch", "AMICL" },
 664         { "Sto2 ADC MIXR", "DMIC Switch", "Stereo2 DMIC Mux" },
 665         { "Sto2 ADC MIXR", "ADC Switch", "AMICR" },
 666
 667         { "Stereo2 ADC MIXL", NULL, "Sto2 ADC MIXL" },
 668         { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
 669
 670         { "Stereo2 ADC MIX", NULL, "Stereo2 ADC MIXL" },
 671         { "Stereo2 ADC MIX", NULL, "Stereo2 ADC MIXR" },
 672         { "Stereo2 ADC MIX", NULL, "adc stereo2 filter" },
 673         { "adc stereo2 filter", NULL, "PLL1", rt5514_is_sys_clk_from_pll },
 674         { "adc stereo2 filter", NULL, "ASRC AD2", rt5514_i2s_use_asrc },
 675
 676         { "AIF1TX", NULL, "Stereo1 ADC MIX"},
 677         { "AIF1TX", NULL, "Stereo2 ADC MIX"},
 678 };
 679
 680 static int rt5514_hw_params(struct snd_pcm_substream *substream,
 681         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 682 {
 683         struct snd_soc_codec *codec = dai->codec;
 684         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
 685         int pre_div, bclk_ms, frame_size;
 686         unsigned int val_len = 0;
 687
 688         rt5514->lrck = params_rate(params);
 689         pre_div = rl6231_get_clk_info(rt5514->sysclk, rt5514->lrck);
 690         if (pre_div < 0) {
 691                 dev_err(codec->dev, "Unsupported clock setting\n");
 692                 return -EINVAL;
 693         }
 694
 695         frame_size = snd_soc_params_to_frame_size(params);
 696         if (frame_size < 0) {
 697                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
 698                 return -EINVAL;
 699         }
 700
 701         bclk_ms = frame_size > 32;
 702         rt5514->bclk = rt5514->lrck * (32 << bclk_ms);
 703
 704         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
 705                 rt5514->bclk, rt5514->lrck);
 706         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
 707                                 bclk_ms, pre_div, dai->id);
 708
 709         switch (params_format(params)) {
 710         case SNDRV_PCM_FORMAT_S16_LE:
 711                 break;
 712         case SNDRV_PCM_FORMAT_S20_3LE:
 713                 val_len = RT5514_I2S_DL_20;
 714                 break;
 715         case SNDRV_PCM_FORMAT_S24_LE:
 716                 val_len = RT5514_I2S_DL_24;
 717                 break;
 718         case SNDRV_PCM_FORMAT_S8:
 719                 val_len = RT5514_I2S_DL_8;
 720                 break;
 721         default:
 722                 return -EINVAL;
 723         }
 724
 725         regmap_update_bits(rt5514->regmap, RT5514_I2S_CTRL1, RT5514_I2S_DL_MASK,
 726                 val_len);
 727         regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL1,
 728                 RT5514_CLK_AD_ANA1_SEL_MASK,
 729                 (pre_div + 1) << RT5514_CLK_AD_ANA1_SEL_SFT);
 730         regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL2,
 731                 RT5514_CLK_SYS_DIV_OUT_MASK | RT5514_SEL_ADC_OSR_MASK,
 732                 pre_div << RT5514_CLK_SYS_DIV_OUT_SFT |
 733                 pre_div << RT5514_SEL_ADC_OSR_SFT);
 734
 735         return 0;
 736 }
 737
 738 static int rt5514_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 739 {
 740         struct snd_soc_codec *codec = dai->codec;
 741         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
 742         unsigned int reg_val = 0;
 743
 744         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 745         case SND_SOC_DAIFMT_NB_NF:
 746                 break;
 747
 748         case SND_SOC_DAIFMT_NB_IF:
 749                 reg_val |= RT5514_I2S_LR_INV;
 750                 break;
 751
 752         case SND_SOC_DAIFMT_IB_NF:
 753                 reg_val |= RT5514_I2S_BP_INV;
 754                 break;
 755
 756         case SND_SOC_DAIFMT_IB_IF:
 757                 reg_val |= RT5514_I2S_BP_INV | RT5514_I2S_LR_INV;
 758                 break;
 759
 760         default:
 761                 return -EINVAL;
 762         }
 763
 764         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 765         case SND_SOC_DAIFMT_I2S:
 766                 break;
 767
 768         case SND_SOC_DAIFMT_LEFT_J:
 769                 reg_val |= RT5514_I2S_DF_LEFT;
 770                 break;
 771
 772         case SND_SOC_DAIFMT_DSP_A:
 773                 reg_val |= RT5514_I2S_DF_PCM_A;
 774                 break;
 775
 776         case SND_SOC_DAIFMT_DSP_B:
 777                 reg_val |= RT5514_I2S_DF_PCM_B;
 778                 break;
 779
 780         default:
 781                 return -EINVAL;
 782         }
 783
 784         regmap_update_bits(rt5514->regmap, RT5514_I2S_CTRL1,
 785                 RT5514_I2S_DF_MASK | RT5514_I2S_BP_MASK | RT5514_I2S_LR_MASK,
 786                 reg_val);
 787
 788         return 0;
 789 }
 790
 791 static int rt5514_set_dai_sysclk(struct snd_soc_dai *dai,
 792                 int clk_id, unsigned int freq, int dir)
 793 {
 794         struct snd_soc_codec *codec = dai->codec;
 795         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
 796         unsigned int reg_val = 0;
 797
 798         if (freq == rt5514->sysclk && clk_id == rt5514->sysclk_src)
 799                 return 0;
 800
 801         switch (clk_id) {
 802         case RT5514_SCLK_S_MCLK:
 803                 reg_val |= RT5514_CLK_SYS_PRE_SEL_MCLK;
 804                 break;
 805
 806         case RT5514_SCLK_S_PLL1:
 807                 reg_val |= RT5514_CLK_SYS_PRE_SEL_PLL;
 808                 break;
 809
 810         default:
 811                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
 812                 return -EINVAL;
 813         }
 814
 815         regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL2,
 816                 RT5514_CLK_SYS_PRE_SEL_MASK, reg_val);
 817
 818         rt5514->sysclk = freq;
 819         rt5514->sysclk_src = clk_id;
 820
 821         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
 822
 823         return 0;
 824 }
 825
 826 static int rt5514_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
 827                         unsigned int freq_in, unsigned int freq_out)
 828 {
 829         struct snd_soc_codec *codec = dai->codec;
 830         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
 831         struct rl6231_pll_code pll_code;
 832         int ret;
 833
 834         if (!freq_in || !freq_out) {
 835                 dev_dbg(codec->dev, "PLL disabled\n");
 836
 837                 rt5514->pll_in = 0;
 838                 rt5514->pll_out = 0;
 839                 regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL2,
 840                         RT5514_CLK_SYS_PRE_SEL_MASK,
 841                         RT5514_CLK_SYS_PRE_SEL_MCLK);
 842
 843                 return 0;
 844         }
 845
 846         if (source == rt5514->pll_src && freq_in == rt5514->pll_in &&
 847             freq_out == rt5514->pll_out)
 848                 return 0;
 849
 850         switch (source) {
 851         case RT5514_PLL1_S_MCLK:
 852                 regmap_update_bits(rt5514->regmap, RT5514_PLL_SOURCE_CTRL,
 853                         RT5514_PLL_1_SEL_MASK, RT5514_PLL_1_SEL_MCLK);
 854                 break;
 855
 856         case RT5514_PLL1_S_BCLK:
 857                 regmap_update_bits(rt5514->regmap, RT5514_PLL_SOURCE_CTRL,
 858                         RT5514_PLL_1_SEL_MASK, RT5514_PLL_1_SEL_SCLK);
 859                 break;
 860
 861         default:
 862                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
 863                 return -EINVAL;
 864         }
 865
 866         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
 867         if (ret < 0) {
 868                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
 869                 return ret;
 870         }
 871
 872         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
 873                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
 874                 pll_code.n_code, pll_code.k_code);
 875
 876         regmap_write(rt5514->regmap, RT5514_ANA_CTRL_PLL1_1,
 877                 pll_code.k_code << RT5514_PLL_K_SFT |
 878                 pll_code.n_code << RT5514_PLL_N_SFT |
 879                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5514_PLL_M_SFT);
 880         regmap_update_bits(rt5514->regmap, RT5514_ANA_CTRL_PLL1_2,
 881                 RT5514_PLL_M_BP, pll_code.m_bp << RT5514_PLL_M_BP_SFT);
 882
 883         rt5514->pll_in = freq_in;
 884         rt5514->pll_out = freq_out;
 885         rt5514->pll_src = source;
 886
 887         return 0;
 888 }
 889
 890 static int rt5514_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
 891                         unsigned int rx_mask, int slots, int slot_width)
 892 {
 893         struct snd_soc_codec *codec = dai->codec;
 894         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
 895         unsigned int val = 0, val2 = 0;
 896
 897         if (rx_mask || tx_mask)
 898                 val |= RT5514_TDM_MODE;
 899
 900         switch (tx_mask) {
 901         case 0x3:
 902                 val2 |= RT5514_TDM_DOCKING_MODE | RT5514_TDM_DOCKING_VALID_CH2 |
 903                         RT5514_TDM_DOCKING_START_SLOT0;
 904                 break;
 905
 906         case 0x30:
 907                 val2 |= RT5514_TDM_DOCKING_MODE | RT5514_TDM_DOCKING_VALID_CH2 |
 908                         RT5514_TDM_DOCKING_START_SLOT4;
 909                 break;
 910
 911         case 0xf:
 912                 val2 |= RT5514_TDM_DOCKING_MODE | RT5514_TDM_DOCKING_VALID_CH4 |
 913                         RT5514_TDM_DOCKING_START_SLOT0;
 914                 break;
 915
 916         case 0xf0:
 917                 val2 |= RT5514_TDM_DOCKING_MODE | RT5514_TDM_DOCKING_VALID_CH4 |
 918                         RT5514_TDM_DOCKING_START_SLOT4;
 919                 break;
 920
 921         default:
 922                 break;
 923         }
 924
 925
 926
 927         switch (slots) {
 928         case 4:
 929                 val |= RT5514_TDMSLOT_SEL_RX_4CH | RT5514_TDMSLOT_SEL_TX_4CH;
 930                 break;
 931
 932         case 6:
 933                 val |= RT5514_TDMSLOT_SEL_RX_6CH | RT5514_TDMSLOT_SEL_TX_6CH;
 934                 break;
 935
 936         case 8:
 937                 val |= RT5514_TDMSLOT_SEL_RX_8CH | RT5514_TDMSLOT_SEL_TX_8CH;
 938                 break;
 939
 940         case 2:
 941         default:
 942                 break;
 943         }
 944
 945         switch (slot_width) {
 946         case 20:
 947                 val |= RT5514_CH_LEN_RX_20 | RT5514_CH_LEN_TX_20;
 948                 break;
 949
 950         case 24:
 951                 val |= RT5514_CH_LEN_RX_24 | RT5514_CH_LEN_TX_24;
 952                 break;
 953
 954         case 25:
 955                 val |= RT5514_TDM_MODE2;
 956                 break;
 957
 958         case 32:
 959                 val |= RT5514_CH_LEN_RX_32 | RT5514_CH_LEN_TX_32;
 960                 break;
 961
 962         case 16:
 963         default:
 964                 break;
 965         }
 966
 967         regmap_update_bits(rt5514->regmap, RT5514_I2S_CTRL1, RT5514_TDM_MODE |
 968                 RT5514_TDMSLOT_SEL_RX_MASK | RT5514_TDMSLOT_SEL_TX_MASK |
 969                 RT5514_CH_LEN_RX_MASK | RT5514_CH_LEN_TX_MASK |
 970                 RT5514_TDM_MODE2, val);
 971
 972         regmap_update_bits(rt5514->regmap, RT5514_I2S_CTRL2,
 973                 RT5514_TDM_DOCKING_MODE | RT5514_TDM_DOCKING_VALID_CH_MASK |
 974                 RT5514_TDM_DOCKING_START_MASK, val2);
 975
 976         return 0;
 977 }
 978
 979 static int rt5514_set_bias_level(struct snd_soc_codec *codec,
 980                         enum snd_soc_bias_level level)
 981 {
 982         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
 983         int ret;
 984
 985         switch (level) {
 986         case SND_SOC_BIAS_PREPARE:
 987                 if (IS_ERR(rt5514->mclk))
 988                         break;
 989
 990                 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON) {
 991                         clk_disable_unprepare(rt5514->mclk);
 992                 } else {
 993                         ret = clk_prepare_enable(rt5514->mclk);
 994                         if (ret)
 995                                 return ret;
 996                 }
 997                 break;
 998
 999         case SND_SOC_BIAS_STANDBY:
1000                 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
1001                         /*
1002                          * If the DSP is enabled in start of recording, the DSP
1003                          * should be disabled, and sync back to normal recording
1004                          * settings to make sure recording properly.
1005                          */
1006                         if (rt5514->dsp_enabled) {
1007                                 rt5514->dsp_enabled = 0;
1008                                 regmap_multi_reg_write(rt5514->i2c_regmap,
1009                                         rt5514_i2c_patch,
1010                                         ARRAY_SIZE(rt5514_i2c_patch));
1011                                 regcache_mark_dirty(rt5514->regmap);
1012                                 regcache_sync(rt5514->regmap);
1013                         }
1014                 }
1015                 break;
1016
1017         default:
1018                 break;
1019         }
1020
1021         return 0;
1022 }
1023
1024 static int rt5514_probe(struct snd_soc_codec *codec)
1025 {
1026         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
1027
1028         rt5514->mclk = devm_clk_get(codec->dev, "mclk");
1029         if (PTR_ERR(rt5514->mclk) == -EPROBE_DEFER)
1030                 return -EPROBE_DEFER;
1031
1032         rt5514->codec = codec;
1033
1034         return 0;
1035 }
1036
1037 static int rt5514_i2c_read(void *context, unsigned int reg, unsigned int *val)
1038 {
1039         struct i2c_client *client = context;
1040         struct rt5514_priv *rt5514 = i2c_get_clientdata(client);
1041
1042         regmap_read(rt5514->i2c_regmap, reg | RT5514_DSP_MAPPING, val);
1043
1044         return 0;
1045 }
1046
1047 static int rt5514_i2c_write(void *context, unsigned int reg, unsigned int val)
1048 {
1049         struct i2c_client *client = context;
1050         struct rt5514_priv *rt5514 = i2c_get_clientdata(client);
1051
1052         regmap_write(rt5514->i2c_regmap, reg | RT5514_DSP_MAPPING, val);
1053
1054         return 0;
1055 }
1056
1057 #define RT5514_STEREO_RATES SNDRV_PCM_RATE_8000_192000
1058 #define RT5514_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1059                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1060
1061 static const struct snd_soc_dai_ops rt5514_aif_dai_ops = {
1062         .hw_params = rt5514_hw_params,
1063         .set_fmt = rt5514_set_dai_fmt,
1064         .set_sysclk = rt5514_set_dai_sysclk,
1065         .set_pll = rt5514_set_dai_pll,
1066         .set_tdm_slot = rt5514_set_tdm_slot,
1067 };
1068
1069 static struct snd_soc_dai_driver rt5514_dai[] = {
1070         {
1071                 .name = "rt5514-aif1",
1072                 .id = 0,
1073                 .capture = {
1074                         .stream_name = "AIF1 Capture",
1075                         .channels_min = 1,
1076                         .channels_max = 4,
1077                         .rates = RT5514_STEREO_RATES,
1078                         .formats = RT5514_FORMATS,
1079                 },
1080                 .ops = &rt5514_aif_dai_ops,
1081         }
1082 };
1083
1084 static const struct snd_soc_codec_driver soc_codec_dev_rt5514 = {
1085         .probe = rt5514_probe,
1086         .idle_bias_off = true,
1087         .set_bias_level = rt5514_set_bias_level,
1088         .component_driver = {
1089                 .controls               = rt5514_snd_controls,
1090                 .num_controls           = ARRAY_SIZE(rt5514_snd_controls),
1091                 .dapm_widgets           = rt5514_dapm_widgets,
1092                 .num_dapm_widgets       = ARRAY_SIZE(rt5514_dapm_widgets),
1093                 .dapm_routes            = rt5514_dapm_routes,
1094                 .num_dapm_routes        = ARRAY_SIZE(rt5514_dapm_routes),
1095         },
1096 };
1097
1098 static const struct regmap_config rt5514_i2c_regmap = {
1099         .name = "i2c",
1100         .reg_bits = 32,
1101         .val_bits = 32,
1102
1103         .readable_reg = rt5514_i2c_readable_register,
1104
1105         .cache_type = REGCACHE_NONE,
1106 };
1107
1108 static const struct regmap_config rt5514_regmap = {
1109         .reg_bits = 16,
1110         .val_bits = 32,
1111
1112         .max_register = RT5514_VENDOR_ID2,
1113         .volatile_reg = rt5514_volatile_register,
1114         .readable_reg = rt5514_readable_register,
1115         .reg_read = rt5514_i2c_read,
1116         .reg_write = rt5514_i2c_write,
1117
1118         .cache_type = REGCACHE_RBTREE,
1119         .reg_defaults = rt5514_reg,
1120         .num_reg_defaults = ARRAY_SIZE(rt5514_reg),
1121         .use_single_rw = true,
1122 };
1123
1124 static const struct i2c_device_id rt5514_i2c_id[] = {
1125         { "rt5514", 0 },
1126         { }
1127 };
1128 MODULE_DEVICE_TABLE(i2c, rt5514_i2c_id);
1129
1130 #if defined(CONFIG_OF)
1131 static const struct of_device_id rt5514_of_match[] = {
1132         { .compatible = "realtek,rt5514", },
1133         {},
1134 };
1135 MODULE_DEVICE_TABLE(of, rt5514_of_match);
1136 #endif
1137
1138 #ifdef CONFIG_ACPI
1139 static const struct acpi_device_id rt5514_acpi_match[] = {
1140         { "10EC5514", 0},
1141         {},
1142 };
1143 MODULE_DEVICE_TABLE(acpi, rt5514_acpi_match);
1144 #endif
1145
1146 static int rt5514_parse_dp(struct rt5514_priv *rt5514, struct device *dev)
1147 {
1148         device_property_read_u32(dev, "realtek,dmic-init-delay-ms",
1149                 &rt5514->pdata.dmic_init_delay);
1150
1151         return 0;
1152 }
1153
1154 static __maybe_unused int rt5514_i2c_resume(struct device *dev)
1155 {
1156         struct rt5514_priv *rt5514 = dev_get_drvdata(dev);
1157         unsigned int val;
1158
1159         /*
1160          * Add a bogus read to avoid rt5514's confusion after s2r in case it
1161          * saw glitches on the i2c lines and thought the other side sent a
1162          * start bit.
1163          */
1164         regmap_read(rt5514->regmap, RT5514_VENDOR_ID2, &val);
1165
1166         return 0;
1167 }
1168
1169 static int rt5514_i2c_probe(struct i2c_client *i2c,
1170                     const struct i2c_device_id *id)
1171 {
1172         struct rt5514_platform_data *pdata = dev_get_platdata(&i2c->dev);
1173         struct rt5514_priv *rt5514;
1174         int ret;
1175         unsigned int val = ~0;
1176
1177         rt5514 = devm_kzalloc(&i2c->dev, sizeof(struct rt5514_priv),
1178                                 GFP_KERNEL);
1179         if (rt5514 == NULL)
1180                 return -ENOMEM;
1181
1182         i2c_set_clientdata(i2c, rt5514);
1183
1184         if (pdata)
1185                 rt5514->pdata = *pdata;
1186         else
1187                 rt5514_parse_dp(rt5514, &i2c->dev);
1188
1189         rt5514->i2c_regmap = devm_regmap_init_i2c(i2c, &rt5514_i2c_regmap);
1190         if (IS_ERR(rt5514->i2c_regmap)) {
1191                 ret = PTR_ERR(rt5514->i2c_regmap);
1192                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1193                         ret);
1194                 return ret;
1195         }
1196
1197         rt5514->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt5514_regmap);
1198         if (IS_ERR(rt5514->regmap)) {
1199                 ret = PTR_ERR(rt5514->regmap);
1200                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1201                         ret);
1202                 return ret;
1203         }
1204
1205         /*
1206          * The rt5514 can get confused if the i2c lines glitch together, as
1207          * can happen at bootup as regulators are turned off and on.  If it's
1208          * in this glitched state the first i2c read will fail, so we'll give
1209          * it one change to retry.
1210          */
1211         ret = regmap_read(rt5514->regmap, RT5514_VENDOR_ID2, &val);
1212         if (ret || val != RT5514_DEVICE_ID)
1213                 ret = regmap_read(rt5514->regmap, RT5514_VENDOR_ID2, &val);
1214         if (ret || val != RT5514_DEVICE_ID) {
1215                 dev_err(&i2c->dev,
1216                         "Device with ID register %x is not rt5514\n", val);
1217                 return -ENODEV;
1218         }
1219
1220         ret = regmap_multi_reg_write(rt5514->i2c_regmap, rt5514_i2c_patch,
1221                                     ARRAY_SIZE(rt5514_i2c_patch));
1222         if (ret != 0)
1223                 dev_warn(&i2c->dev, "Failed to apply i2c_regmap patch: %d\n",
1224                         ret);
1225
1226         ret = regmap_register_patch(rt5514->regmap, rt5514_patch,
1227                                     ARRAY_SIZE(rt5514_patch));
1228         if (ret != 0)
1229                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
1230
1231         return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5514,
1232                         rt5514_dai, ARRAY_SIZE(rt5514_dai));
1233 }
1234
1235 static int rt5514_i2c_remove(struct i2c_client *i2c)
1236 {
1237         snd_soc_unregister_codec(&i2c->dev);
1238
1239         return 0;
1240 }
1241
1242 static const struct dev_pm_ops rt5514_i2_pm_ops = {
1243         SET_SYSTEM_SLEEP_PM_OPS(NULL, rt5514_i2c_resume)
1244 };
1245
1246 static struct i2c_driver rt5514_i2c_driver = {
1247         .driver = {
1248                 .name = "rt5514",
1249                 .acpi_match_table = ACPI_PTR(rt5514_acpi_match),
1250                 .of_match_table = of_match_ptr(rt5514_of_match),
1251                 .pm = &rt5514_i2_pm_ops,
1252         },
1253         .probe = rt5514_i2c_probe,
1254         .remove   = rt5514_i2c_remove,
1255         .id_table = rt5514_i2c_id,
1256 };
1257 module_i2c_driver(rt5514_i2c_driver);
1258
1259 MODULE_DESCRIPTION("ASoC RT5514 driver");
1260 MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
1261 MODULE_LICENSE("GPL v2");