Merge remote-tracking branches 'asoc/topic/rl6231', 'asoc/topic/rt5514', 'asoc/topic...
[sfrench/cifs-2.6.git] / sound / soc / codecs / rt5514.c
1 /*
2  * rt5514.c  --  RT5514 ALSA SoC audio codec driver
3  *
4  * Copyright 2015 Realtek Semiconductor Corp.
5  * Author: Oder Chiou <oder_chiou@realtek.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11
12 #include <linux/acpi.h>
13 #include <linux/fs.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/init.h>
17 #include <linux/delay.h>
18 #include <linux/pm.h>
19 #include <linux/regmap.h>
20 #include <linux/i2c.h>
21 #include <linux/platform_device.h>
22 #include <linux/firmware.h>
23 #include <linux/gpio.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30 #include <sound/tlv.h>
31
32 #include "rl6231.h"
33 #include "rt5514.h"
34 #if IS_ENABLED(CONFIG_SND_SOC_RT5514_SPI)
35 #include "rt5514-spi.h"
36 #endif
37
38 static const struct reg_sequence rt5514_i2c_patch[] = {
39         {0x1800101c, 0x00000000},
40         {0x18001100, 0x0000031f},
41         {0x18001104, 0x00000007},
42         {0x18001108, 0x00000000},
43         {0x1800110c, 0x00000000},
44         {0x18001110, 0x00000000},
45         {0x18001114, 0x00000001},
46         {0x18001118, 0x00000000},
47         {0x18002f08, 0x00000006},
48         {0x18002f00, 0x00055149},
49         {0x18002f00, 0x0005514b},
50         {0x18002f00, 0x00055149},
51         {0xfafafafa, 0x00000001},
52         {0x18002f10, 0x00000001},
53         {0x18002f10, 0x00000000},
54         {0x18002f10, 0x00000001},
55         {0xfafafafa, 0x00000001},
56         {0x18002000, 0x000010ec},
57         {0xfafafafa, 0x00000000},
58 };
59
60 static const struct reg_sequence rt5514_patch[] = {
61         {RT5514_DIG_IO_CTRL,            0x00000040},
62         {RT5514_CLK_CTRL1,              0x38020041},
63         {RT5514_SRC_CTRL,               0x44000eee},
64         {RT5514_ANA_CTRL_LDO10,         0x00028604},
65         {RT5514_ANA_CTRL_ADCFED,        0x00000800},
66         {RT5514_ASRC_IN_CTRL1,          0x00000003},
67         {RT5514_DOWNFILTER0_CTRL3,      0x10000362},
68         {RT5514_DOWNFILTER1_CTRL3,      0x10000362},
69 };
70
71 static const struct reg_default rt5514_reg[] = {
72         {RT5514_RESET,                  0x00000000},
73         {RT5514_PWR_ANA1,               0x00808880},
74         {RT5514_PWR_ANA2,               0x00220000},
75         {RT5514_I2S_CTRL1,              0x00000330},
76         {RT5514_I2S_CTRL2,              0x20000000},
77         {RT5514_VAD_CTRL6,              0xc00007d2},
78         {RT5514_EXT_VAD_CTRL,           0x80000080},
79         {RT5514_DIG_IO_CTRL,            0x00000040},
80         {RT5514_PAD_CTRL1,              0x00804000},
81         {RT5514_DMIC_DATA_CTRL,         0x00000005},
82         {RT5514_DIG_SOURCE_CTRL,        0x00000002},
83         {RT5514_SRC_CTRL,               0x44000eee},
84         {RT5514_DOWNFILTER2_CTRL1,      0x0000882f},
85         {RT5514_PLL_SOURCE_CTRL,        0x00000004},
86         {RT5514_CLK_CTRL1,              0x38020041},
87         {RT5514_CLK_CTRL2,              0x00000000},
88         {RT5514_PLL3_CALIB_CTRL1,       0x00400200},
89         {RT5514_PLL3_CALIB_CTRL5,       0x40220012},
90         {RT5514_DELAY_BUF_CTRL1,        0x7fff006a},
91         {RT5514_DELAY_BUF_CTRL3,        0x00000000},
92         {RT5514_DOWNFILTER0_CTRL1,      0x00020c2f},
93         {RT5514_DOWNFILTER0_CTRL2,      0x00020c2f},
94         {RT5514_DOWNFILTER0_CTRL3,      0x10000362},
95         {RT5514_DOWNFILTER1_CTRL1,      0x00020c2f},
96         {RT5514_DOWNFILTER1_CTRL2,      0x00020c2f},
97         {RT5514_DOWNFILTER1_CTRL3,      0x10000362},
98         {RT5514_ANA_CTRL_LDO10,         0x00028604},
99         {RT5514_ANA_CTRL_LDO18_16,      0x02000345},
100         {RT5514_ANA_CTRL_ADC12,         0x0000a2a8},
101         {RT5514_ANA_CTRL_ADC21,         0x00001180},
102         {RT5514_ANA_CTRL_ADC22,         0x0000aaa8},
103         {RT5514_ANA_CTRL_ADC23,         0x00151427},
104         {RT5514_ANA_CTRL_MICBST,        0x00002000},
105         {RT5514_ANA_CTRL_ADCFED,        0x00000800},
106         {RT5514_ANA_CTRL_INBUF,         0x00000143},
107         {RT5514_ANA_CTRL_VREF,          0x00008d50},
108         {RT5514_ANA_CTRL_PLL3,          0x0000000e},
109         {RT5514_ANA_CTRL_PLL1_1,        0x00000000},
110         {RT5514_ANA_CTRL_PLL1_2,        0x00030220},
111         {RT5514_DMIC_LP_CTRL,           0x00000000},
112         {RT5514_MISC_CTRL_DSP,          0x00000000},
113         {RT5514_DSP_CTRL1,              0x00055149},
114         {RT5514_DSP_CTRL3,              0x00000006},
115         {RT5514_DSP_CTRL4,              0x00000001},
116         {RT5514_VENDOR_ID1,             0x00000001},
117         {RT5514_VENDOR_ID2,             0x10ec5514},
118 };
119
120 static void rt5514_enable_dsp_prepare(struct rt5514_priv *rt5514)
121 {
122         /* Reset */
123         regmap_write(rt5514->i2c_regmap, 0x18002000, 0x000010ec);
124         /* LDO_I_limit */
125         regmap_write(rt5514->i2c_regmap, 0x18002200, 0x00028604);
126         /* I2C bypass enable */
127         regmap_write(rt5514->i2c_regmap, 0xfafafafa, 0x00000001);
128         /* mini-core reset */
129         regmap_write(rt5514->i2c_regmap, 0x18002f00, 0x0005514b);
130         regmap_write(rt5514->i2c_regmap, 0x18002f00, 0x00055149);
131         /* I2C bypass disable */
132         regmap_write(rt5514->i2c_regmap, 0xfafafafa, 0x00000000);
133         /* PIN config */
134         regmap_write(rt5514->i2c_regmap, 0x18002070, 0x00000040);
135         /* PLL3(QN)=RCOSC*(10+2) */
136         regmap_write(rt5514->i2c_regmap, 0x18002240, 0x0000000a);
137         /* PLL3 source=RCOSC, fsi=rt_clk */
138         regmap_write(rt5514->i2c_regmap, 0x18002100, 0x0000000b);
139         /* Power on RCOSC, pll3 */
140         regmap_write(rt5514->i2c_regmap, 0x18002004, 0x00808b81);
141         /* DSP clk source = pll3, ENABLE DSP clk */
142         regmap_write(rt5514->i2c_regmap, 0x18002f08, 0x00000005);
143         /* Enable DSP clk auto switch */
144         regmap_write(rt5514->i2c_regmap, 0x18001114, 0x00000001);
145         /* Reduce DSP power */
146         regmap_write(rt5514->i2c_regmap, 0x18001118, 0x00000001);
147 }
148
149 static bool rt5514_volatile_register(struct device *dev, unsigned int reg)
150 {
151         switch (reg) {
152         case RT5514_VENDOR_ID1:
153         case RT5514_VENDOR_ID2:
154                 return true;
155
156         default:
157                 return false;
158         }
159 }
160
161 static bool rt5514_readable_register(struct device *dev, unsigned int reg)
162 {
163         switch (reg) {
164         case RT5514_RESET:
165         case RT5514_PWR_ANA1:
166         case RT5514_PWR_ANA2:
167         case RT5514_I2S_CTRL1:
168         case RT5514_I2S_CTRL2:
169         case RT5514_VAD_CTRL6:
170         case RT5514_EXT_VAD_CTRL:
171         case RT5514_DIG_IO_CTRL:
172         case RT5514_PAD_CTRL1:
173         case RT5514_DMIC_DATA_CTRL:
174         case RT5514_DIG_SOURCE_CTRL:
175         case RT5514_SRC_CTRL:
176         case RT5514_DOWNFILTER2_CTRL1:
177         case RT5514_PLL_SOURCE_CTRL:
178         case RT5514_CLK_CTRL1:
179         case RT5514_CLK_CTRL2:
180         case RT5514_PLL3_CALIB_CTRL1:
181         case RT5514_PLL3_CALIB_CTRL5:
182         case RT5514_DELAY_BUF_CTRL1:
183         case RT5514_DELAY_BUF_CTRL3:
184         case RT5514_DOWNFILTER0_CTRL1:
185         case RT5514_DOWNFILTER0_CTRL2:
186         case RT5514_DOWNFILTER0_CTRL3:
187         case RT5514_DOWNFILTER1_CTRL1:
188         case RT5514_DOWNFILTER1_CTRL2:
189         case RT5514_DOWNFILTER1_CTRL3:
190         case RT5514_ANA_CTRL_LDO10:
191         case RT5514_ANA_CTRL_LDO18_16:
192         case RT5514_ANA_CTRL_ADC12:
193         case RT5514_ANA_CTRL_ADC21:
194         case RT5514_ANA_CTRL_ADC22:
195         case RT5514_ANA_CTRL_ADC23:
196         case RT5514_ANA_CTRL_MICBST:
197         case RT5514_ANA_CTRL_ADCFED:
198         case RT5514_ANA_CTRL_INBUF:
199         case RT5514_ANA_CTRL_VREF:
200         case RT5514_ANA_CTRL_PLL3:
201         case RT5514_ANA_CTRL_PLL1_1:
202         case RT5514_ANA_CTRL_PLL1_2:
203         case RT5514_DMIC_LP_CTRL:
204         case RT5514_MISC_CTRL_DSP:
205         case RT5514_DSP_CTRL1:
206         case RT5514_DSP_CTRL3:
207         case RT5514_DSP_CTRL4:
208         case RT5514_VENDOR_ID1:
209         case RT5514_VENDOR_ID2:
210                 return true;
211
212         default:
213                 return false;
214         }
215 }
216
217 static bool rt5514_i2c_readable_register(struct device *dev,
218         unsigned int reg)
219 {
220         switch (reg) {
221         case RT5514_DSP_MAPPING | RT5514_RESET:
222         case RT5514_DSP_MAPPING | RT5514_PWR_ANA1:
223         case RT5514_DSP_MAPPING | RT5514_PWR_ANA2:
224         case RT5514_DSP_MAPPING | RT5514_I2S_CTRL1:
225         case RT5514_DSP_MAPPING | RT5514_I2S_CTRL2:
226         case RT5514_DSP_MAPPING | RT5514_VAD_CTRL6:
227         case RT5514_DSP_MAPPING | RT5514_EXT_VAD_CTRL:
228         case RT5514_DSP_MAPPING | RT5514_DIG_IO_CTRL:
229         case RT5514_DSP_MAPPING | RT5514_PAD_CTRL1:
230         case RT5514_DSP_MAPPING | RT5514_DMIC_DATA_CTRL:
231         case RT5514_DSP_MAPPING | RT5514_DIG_SOURCE_CTRL:
232         case RT5514_DSP_MAPPING | RT5514_SRC_CTRL:
233         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER2_CTRL1:
234         case RT5514_DSP_MAPPING | RT5514_PLL_SOURCE_CTRL:
235         case RT5514_DSP_MAPPING | RT5514_CLK_CTRL1:
236         case RT5514_DSP_MAPPING | RT5514_CLK_CTRL2:
237         case RT5514_DSP_MAPPING | RT5514_PLL3_CALIB_CTRL1:
238         case RT5514_DSP_MAPPING | RT5514_PLL3_CALIB_CTRL5:
239         case RT5514_DSP_MAPPING | RT5514_DELAY_BUF_CTRL1:
240         case RT5514_DSP_MAPPING | RT5514_DELAY_BUF_CTRL3:
241         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER0_CTRL1:
242         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER0_CTRL2:
243         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER0_CTRL3:
244         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER1_CTRL1:
245         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER1_CTRL2:
246         case RT5514_DSP_MAPPING | RT5514_DOWNFILTER1_CTRL3:
247         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_LDO10:
248         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_LDO18_16:
249         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADC12:
250         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADC21:
251         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADC22:
252         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADC23:
253         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_MICBST:
254         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADCFED:
255         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_INBUF:
256         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_VREF:
257         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_PLL3:
258         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_PLL1_1:
259         case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_PLL1_2:
260         case RT5514_DSP_MAPPING | RT5514_DMIC_LP_CTRL:
261         case RT5514_DSP_MAPPING | RT5514_MISC_CTRL_DSP:
262         case RT5514_DSP_MAPPING | RT5514_DSP_CTRL1:
263         case RT5514_DSP_MAPPING | RT5514_DSP_CTRL3:
264         case RT5514_DSP_MAPPING | RT5514_DSP_CTRL4:
265         case RT5514_DSP_MAPPING | RT5514_VENDOR_ID1:
266         case RT5514_DSP_MAPPING | RT5514_VENDOR_ID2:
267                 return true;
268
269         default:
270                 return false;
271         }
272 }
273
274 /* {-3, 0, +3, +4.5, +7.5, +9.5, +12, +14, +17} dB */
275 static const DECLARE_TLV_DB_RANGE(bst_tlv,
276         0, 2, TLV_DB_SCALE_ITEM(-300, 300, 0),
277         3, 3, TLV_DB_SCALE_ITEM(450, 0, 0),
278         4, 4, TLV_DB_SCALE_ITEM(750, 0, 0),
279         5, 5, TLV_DB_SCALE_ITEM(950, 0, 0),
280         6, 6, TLV_DB_SCALE_ITEM(1200, 0, 0),
281         7, 7, TLV_DB_SCALE_ITEM(1400, 0, 0),
282         8, 8, TLV_DB_SCALE_ITEM(1700, 0, 0)
283 );
284
285 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
286
287 static int rt5514_dsp_voice_wake_up_get(struct snd_kcontrol *kcontrol,
288                 struct snd_ctl_elem_value *ucontrol)
289 {
290         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
291         struct rt5514_priv *rt5514 = snd_soc_component_get_drvdata(component);
292
293         ucontrol->value.integer.value[0] = rt5514->dsp_enabled;
294
295         return 0;
296 }
297
298 static int rt5514_calibration(struct rt5514_priv *rt5514, bool on)
299 {
300         if (on) {
301                 regmap_write(rt5514->regmap, RT5514_ANA_CTRL_PLL3, 0x0000000a);
302                 regmap_update_bits(rt5514->regmap, RT5514_PLL_SOURCE_CTRL, 0xf,
303                         0xa);
304                 regmap_update_bits(rt5514->regmap, RT5514_PWR_ANA1, 0x301,
305                         0x301);
306                 regmap_write(rt5514->regmap, RT5514_PLL3_CALIB_CTRL4,
307                         0x80000000 | rt5514->pll3_cal_value);
308                 regmap_write(rt5514->regmap, RT5514_PLL3_CALIB_CTRL1,
309                         0x8bb80800);
310                 regmap_update_bits(rt5514->regmap, RT5514_PLL3_CALIB_CTRL5,
311                         0xc0000000, 0x80000000);
312                 regmap_update_bits(rt5514->regmap, RT5514_PLL3_CALIB_CTRL5,
313                         0xc0000000, 0xc0000000);
314         } else {
315                 regmap_update_bits(rt5514->regmap, RT5514_PLL3_CALIB_CTRL5,
316                         0xc0000000, 0x40000000);
317                 regmap_update_bits(rt5514->regmap, RT5514_PWR_ANA1, 0x301, 0);
318                 regmap_update_bits(rt5514->regmap, RT5514_PLL_SOURCE_CTRL, 0xf,
319                         0x4);
320         }
321
322         return 0;
323 }
324
325 static int rt5514_dsp_voice_wake_up_put(struct snd_kcontrol *kcontrol,
326                 struct snd_ctl_elem_value *ucontrol)
327 {
328         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
329         struct rt5514_priv *rt5514 = snd_soc_component_get_drvdata(component);
330         struct snd_soc_codec *codec = rt5514->codec;
331         const struct firmware *fw = NULL;
332         u8 buf[8];
333
334         if (ucontrol->value.integer.value[0] == rt5514->dsp_enabled)
335                 return 0;
336
337         if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
338                 rt5514->dsp_enabled = ucontrol->value.integer.value[0];
339
340                 if (rt5514->dsp_enabled) {
341                         if (rt5514->pdata.dsp_calib_clk_name &&
342                                 !IS_ERR(rt5514->dsp_calib_clk)) {
343                                 if (clk_set_rate(rt5514->dsp_calib_clk,
344                                         rt5514->pdata.dsp_calib_clk_rate))
345                                         dev_err(codec->dev,
346                                                 "Can't set rate for mclk");
347
348                                 if (clk_prepare_enable(rt5514->dsp_calib_clk))
349                                         dev_err(codec->dev,
350                                                 "Can't enable dsp_calib_clk");
351
352                                 rt5514_calibration(rt5514, true);
353
354                                 msleep(20);
355 #if IS_ENABLED(CONFIG_SND_SOC_RT5514_SPI)
356                                 rt5514_spi_burst_read(RT5514_PLL3_CALIB_CTRL6 |
357                                         RT5514_DSP_MAPPING,
358                                         (u8 *)&buf, sizeof(buf));
359 #else
360                                 dev_err(codec->dev, "There is no SPI driver for"
361                                         " loading the firmware\n");
362 #endif
363                                 rt5514->pll3_cal_value = buf[0] | buf[1] << 8 |
364                                         buf[2] << 16 | buf[3] << 24;
365
366                                 rt5514_calibration(rt5514, false);
367                                 clk_disable_unprepare(rt5514->dsp_calib_clk);
368                         }
369
370                         rt5514_enable_dsp_prepare(rt5514);
371
372                         request_firmware(&fw, RT5514_FIRMWARE1, codec->dev);
373                         if (fw) {
374 #if IS_ENABLED(CONFIG_SND_SOC_RT5514_SPI)
375                                 rt5514_spi_burst_write(0x4ff60000, fw->data,
376                                         ((fw->size/8)+1)*8);
377 #else
378                                 dev_err(codec->dev, "There is no SPI driver for"
379                                         " loading the firmware\n");
380 #endif
381                                 release_firmware(fw);
382                                 fw = NULL;
383                         }
384
385                         request_firmware(&fw, RT5514_FIRMWARE2, codec->dev);
386                         if (fw) {
387 #if IS_ENABLED(CONFIG_SND_SOC_RT5514_SPI)
388                                 rt5514_spi_burst_write(0x4ffc0000, fw->data,
389                                         ((fw->size/8)+1)*8);
390 #else
391                                 dev_err(codec->dev, "There is no SPI driver for"
392                                         " loading the firmware\n");
393 #endif
394                                 release_firmware(fw);
395                                 fw = NULL;
396                         }
397
398                         /* DSP run */
399                         regmap_write(rt5514->i2c_regmap, 0x18002f00,
400                                 0x00055148);
401
402                         if (rt5514->pdata.dsp_calib_clk_name &&
403                                 !IS_ERR(rt5514->dsp_calib_clk)) {
404                                 msleep(20);
405
406                                 regmap_write(rt5514->i2c_regmap, 0x1800211c,
407                                         rt5514->pll3_cal_value);
408                                 regmap_write(rt5514->i2c_regmap, 0x18002124,
409                                         0x00220012);
410                                 regmap_write(rt5514->i2c_regmap, 0x18002124,
411                                         0x80220042);
412                                 regmap_write(rt5514->i2c_regmap, 0x18002124,
413                                         0xe0220042);
414                         }
415                 } else {
416                         regmap_multi_reg_write(rt5514->i2c_regmap,
417                                 rt5514_i2c_patch, ARRAY_SIZE(rt5514_i2c_patch));
418                         regcache_mark_dirty(rt5514->regmap);
419                         regcache_sync(rt5514->regmap);
420                 }
421         }
422
423         return 0;
424 }
425
426 static const struct snd_kcontrol_new rt5514_snd_controls[] = {
427         SOC_DOUBLE_TLV("MIC Boost Volume", RT5514_ANA_CTRL_MICBST,
428                 RT5514_SEL_BSTL_SFT, RT5514_SEL_BSTR_SFT, 8, 0, bst_tlv),
429         SOC_DOUBLE_R_TLV("ADC1 Capture Volume", RT5514_DOWNFILTER0_CTRL1,
430                 RT5514_DOWNFILTER0_CTRL2, RT5514_AD_GAIN_SFT, 63, 0,
431                 adc_vol_tlv),
432         SOC_DOUBLE_R_TLV("ADC2 Capture Volume", RT5514_DOWNFILTER1_CTRL1,
433                 RT5514_DOWNFILTER1_CTRL2, RT5514_AD_GAIN_SFT, 63, 0,
434                 adc_vol_tlv),
435         SOC_SINGLE_EXT("DSP Voice Wake Up", SND_SOC_NOPM, 0, 1, 0,
436                 rt5514_dsp_voice_wake_up_get, rt5514_dsp_voice_wake_up_put),
437 };
438
439 /* ADC Mixer*/
440 static const struct snd_kcontrol_new rt5514_sto1_adc_l_mix[] = {
441         SOC_DAPM_SINGLE("DMIC Switch", RT5514_DOWNFILTER0_CTRL1,
442                 RT5514_AD_DMIC_MIX_BIT, 1, 1),
443         SOC_DAPM_SINGLE("ADC Switch", RT5514_DOWNFILTER0_CTRL1,
444                 RT5514_AD_AD_MIX_BIT, 1, 1),
445 };
446
447 static const struct snd_kcontrol_new rt5514_sto1_adc_r_mix[] = {
448         SOC_DAPM_SINGLE("DMIC Switch", RT5514_DOWNFILTER0_CTRL2,
449                 RT5514_AD_DMIC_MIX_BIT, 1, 1),
450         SOC_DAPM_SINGLE("ADC Switch", RT5514_DOWNFILTER0_CTRL2,
451                 RT5514_AD_AD_MIX_BIT, 1, 1),
452 };
453
454 static const struct snd_kcontrol_new rt5514_sto2_adc_l_mix[] = {
455         SOC_DAPM_SINGLE("DMIC Switch", RT5514_DOWNFILTER1_CTRL1,
456                 RT5514_AD_DMIC_MIX_BIT, 1, 1),
457         SOC_DAPM_SINGLE("ADC Switch", RT5514_DOWNFILTER1_CTRL1,
458                 RT5514_AD_AD_MIX_BIT, 1, 1),
459 };
460
461 static const struct snd_kcontrol_new rt5514_sto2_adc_r_mix[] = {
462         SOC_DAPM_SINGLE("DMIC Switch", RT5514_DOWNFILTER1_CTRL2,
463                 RT5514_AD_DMIC_MIX_BIT, 1, 1),
464         SOC_DAPM_SINGLE("ADC Switch", RT5514_DOWNFILTER1_CTRL2,
465                 RT5514_AD_AD_MIX_BIT, 1, 1),
466 };
467
468 /* DMIC Source */
469 static const char * const rt5514_dmic_src[] = {
470         "DMIC1", "DMIC2"
471 };
472
473 static SOC_ENUM_SINGLE_DECL(
474         rt5514_stereo1_dmic_enum, RT5514_DIG_SOURCE_CTRL,
475         RT5514_AD0_DMIC_INPUT_SEL_SFT, rt5514_dmic_src);
476
477 static const struct snd_kcontrol_new rt5514_sto1_dmic_mux =
478         SOC_DAPM_ENUM("Stereo1 DMIC Source", rt5514_stereo1_dmic_enum);
479
480 static SOC_ENUM_SINGLE_DECL(
481         rt5514_stereo2_dmic_enum, RT5514_DIG_SOURCE_CTRL,
482         RT5514_AD1_DMIC_INPUT_SEL_SFT, rt5514_dmic_src);
483
484 static const struct snd_kcontrol_new rt5514_sto2_dmic_mux =
485         SOC_DAPM_ENUM("Stereo2 DMIC Source", rt5514_stereo2_dmic_enum);
486
487 /**
488  * rt5514_calc_dmic_clk - Calculate the frequency divider parameter of dmic.
489  *
490  * @rate: base clock rate.
491  *
492  * Choose divider parameter that gives the highest possible DMIC frequency in
493  * 1MHz - 3MHz range.
494  */
495 static int rt5514_calc_dmic_clk(struct snd_soc_codec *codec, int rate)
496 {
497         int div[] = {2, 3, 4, 8, 12, 16, 24, 32};
498         int i;
499
500         if (rate < 1000000 * div[0]) {
501                 pr_warn("Base clock rate %d is too low\n", rate);
502                 return -EINVAL;
503         }
504
505         for (i = 0; i < ARRAY_SIZE(div); i++) {
506                 /* find divider that gives DMIC frequency below 3.072MHz */
507                 if (3072000 * div[i] >= rate)
508                         return i;
509         }
510
511         dev_warn(codec->dev, "Base clock rate %d is too high\n", rate);
512         return -EINVAL;
513 }
514
515 static int rt5514_set_dmic_clk(struct snd_soc_dapm_widget *w,
516         struct snd_kcontrol *kcontrol, int event)
517 {
518         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
519         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
520         int idx;
521
522         idx = rt5514_calc_dmic_clk(codec, rt5514->sysclk);
523         if (idx < 0)
524                 dev_err(codec->dev, "Failed to set DMIC clock\n");
525         else
526                 regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL1,
527                         RT5514_CLK_DMIC_OUT_SEL_MASK,
528                         idx << RT5514_CLK_DMIC_OUT_SEL_SFT);
529
530         if (rt5514->pdata.dmic_init_delay)
531                 msleep(rt5514->pdata.dmic_init_delay);
532
533         return idx;
534 }
535
536 static int rt5514_is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
537                          struct snd_soc_dapm_widget *sink)
538 {
539         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
540         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
541
542         if (rt5514->sysclk_src == RT5514_SCLK_S_PLL1)
543                 return 1;
544         else
545                 return 0;
546 }
547
548 static int rt5514_i2s_use_asrc(struct snd_soc_dapm_widget *source,
549         struct snd_soc_dapm_widget *sink)
550 {
551         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
552         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
553
554         return (rt5514->sysclk > rt5514->lrck * 384);
555 }
556
557 static const struct snd_soc_dapm_widget rt5514_dapm_widgets[] = {
558         /* Input Lines */
559         SND_SOC_DAPM_INPUT("DMIC1L"),
560         SND_SOC_DAPM_INPUT("DMIC1R"),
561         SND_SOC_DAPM_INPUT("DMIC2L"),
562         SND_SOC_DAPM_INPUT("DMIC2R"),
563
564         SND_SOC_DAPM_INPUT("AMICL"),
565         SND_SOC_DAPM_INPUT("AMICR"),
566
567         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
568         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
569
570         SND_SOC_DAPM_SUPPLY_S("DMIC CLK", 1, SND_SOC_NOPM, 0, 0,
571                 rt5514_set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
572
573         SND_SOC_DAPM_SUPPLY("ADC CLK", RT5514_CLK_CTRL1,
574                 RT5514_CLK_AD_ANA1_EN_BIT, 0, NULL, 0),
575
576         SND_SOC_DAPM_SUPPLY("LDO18 IN", RT5514_PWR_ANA1,
577                 RT5514_POW_LDO18_IN_BIT, 0, NULL, 0),
578         SND_SOC_DAPM_SUPPLY("LDO18 ADC", RT5514_PWR_ANA1,
579                 RT5514_POW_LDO18_ADC_BIT, 0, NULL, 0),
580         SND_SOC_DAPM_SUPPLY("LDO21", RT5514_PWR_ANA1, RT5514_POW_LDO21_BIT, 0,
581                 NULL, 0),
582         SND_SOC_DAPM_SUPPLY("BG LDO18 IN", RT5514_PWR_ANA1,
583                 RT5514_POW_BG_LDO18_IN_BIT, 0, NULL, 0),
584         SND_SOC_DAPM_SUPPLY("BG LDO21", RT5514_PWR_ANA1,
585                 RT5514_POW_BG_LDO21_BIT, 0, NULL, 0),
586         SND_SOC_DAPM_SUPPLY("BG MBIAS", RT5514_PWR_ANA2,
587                 RT5514_POW_BG_MBIAS_BIT, 0, NULL, 0),
588         SND_SOC_DAPM_SUPPLY("MBIAS", RT5514_PWR_ANA2, RT5514_POW_MBIAS_BIT, 0,
589                 NULL, 0),
590         SND_SOC_DAPM_SUPPLY("VREF2", RT5514_PWR_ANA2, RT5514_POW_VREF2_BIT, 0,
591                 NULL, 0),
592         SND_SOC_DAPM_SUPPLY("VREF1", RT5514_PWR_ANA2, RT5514_POW_VREF1_BIT, 0,
593                 NULL, 0),
594         SND_SOC_DAPM_SUPPLY("ADC Power", SND_SOC_NOPM, 0, 0, NULL, 0),
595
596
597         SND_SOC_DAPM_SUPPLY("LDO16L", RT5514_PWR_ANA2, RT5514_POWL_LDO16_BIT, 0,
598                 NULL, 0),
599         SND_SOC_DAPM_SUPPLY("ADC1L", RT5514_PWR_ANA2, RT5514_POW_ADC1_L_BIT, 0,
600                 NULL, 0),
601         SND_SOC_DAPM_SUPPLY("BSTL2", RT5514_PWR_ANA2, RT5514_POW2_BSTL_BIT, 0,
602                 NULL, 0),
603         SND_SOC_DAPM_SUPPLY("BSTL", RT5514_PWR_ANA2, RT5514_POW_BSTL_BIT, 0,
604                 NULL, 0),
605         SND_SOC_DAPM_SUPPLY("ADCFEDL", RT5514_PWR_ANA2, RT5514_POW_ADCFEDL_BIT,
606                 0, NULL, 0),
607         SND_SOC_DAPM_SUPPLY("ADCL Power", SND_SOC_NOPM, 0, 0, NULL, 0),
608
609         SND_SOC_DAPM_SUPPLY("LDO16R", RT5514_PWR_ANA2, RT5514_POWR_LDO16_BIT, 0,
610                 NULL, 0),
611         SND_SOC_DAPM_SUPPLY("ADC1R", RT5514_PWR_ANA2, RT5514_POW_ADC1_R_BIT, 0,
612                 NULL, 0),
613         SND_SOC_DAPM_SUPPLY("BSTR2", RT5514_PWR_ANA2, RT5514_POW2_BSTR_BIT, 0,
614                 NULL, 0),
615         SND_SOC_DAPM_SUPPLY("BSTR", RT5514_PWR_ANA2, RT5514_POW_BSTR_BIT, 0,
616                 NULL, 0),
617         SND_SOC_DAPM_SUPPLY("ADCFEDR", RT5514_PWR_ANA2, RT5514_POW_ADCFEDR_BIT,
618                 0, NULL, 0),
619         SND_SOC_DAPM_SUPPLY("ADCR Power", SND_SOC_NOPM, 0, 0, NULL, 0),
620
621         SND_SOC_DAPM_SUPPLY("PLL1 LDO ENABLE", RT5514_ANA_CTRL_PLL1_2,
622                 RT5514_EN_LDO_PLL1_BIT, 0, NULL, 0),
623         SND_SOC_DAPM_SUPPLY("PLL1 LDO", RT5514_PWR_ANA2,
624                 RT5514_POW_PLL1_LDO_BIT, 0, NULL, 0),
625         SND_SOC_DAPM_SUPPLY("PLL1", RT5514_PWR_ANA2, RT5514_POW_PLL1_BIT, 0,
626                 NULL, 0),
627         SND_SOC_DAPM_SUPPLY_S("ASRC AD1", 1, RT5514_CLK_CTRL2,
628                 RT5514_CLK_AD0_ASRC_EN_BIT, 0, NULL, 0),
629         SND_SOC_DAPM_SUPPLY_S("ASRC AD2", 1, RT5514_CLK_CTRL2,
630                 RT5514_CLK_AD1_ASRC_EN_BIT, 0, NULL, 0),
631
632         /* ADC Mux */
633         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
634                                 &rt5514_sto1_dmic_mux),
635         SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
636                                 &rt5514_sto2_dmic_mux),
637
638         /* ADC Mixer */
639         SND_SOC_DAPM_SUPPLY("adc stereo1 filter", RT5514_CLK_CTRL1,
640                 RT5514_CLK_AD0_EN_BIT, 0, NULL, 0),
641         SND_SOC_DAPM_SUPPLY("adc stereo2 filter", RT5514_CLK_CTRL1,
642                 RT5514_CLK_AD1_EN_BIT, 0, NULL, 0),
643
644         SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
645                 rt5514_sto1_adc_l_mix, ARRAY_SIZE(rt5514_sto1_adc_l_mix)),
646         SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
647                 rt5514_sto1_adc_r_mix, ARRAY_SIZE(rt5514_sto1_adc_r_mix)),
648         SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
649                 rt5514_sto2_adc_l_mix, ARRAY_SIZE(rt5514_sto2_adc_l_mix)),
650         SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
651                 rt5514_sto2_adc_r_mix, ARRAY_SIZE(rt5514_sto2_adc_r_mix)),
652
653         SND_SOC_DAPM_ADC("Stereo1 ADC MIXL", NULL, RT5514_DOWNFILTER0_CTRL1,
654                 RT5514_AD_AD_MUTE_BIT, 1),
655         SND_SOC_DAPM_ADC("Stereo1 ADC MIXR", NULL, RT5514_DOWNFILTER0_CTRL2,
656                 RT5514_AD_AD_MUTE_BIT, 1),
657         SND_SOC_DAPM_ADC("Stereo2 ADC MIXL", NULL, RT5514_DOWNFILTER1_CTRL1,
658                 RT5514_AD_AD_MUTE_BIT, 1),
659         SND_SOC_DAPM_ADC("Stereo2 ADC MIXR", NULL, RT5514_DOWNFILTER1_CTRL2,
660                 RT5514_AD_AD_MUTE_BIT, 1),
661
662         /* ADC PGA */
663         SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
664         SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
665
666         /* Audio Interface */
667         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
668 };
669
670 static const struct snd_soc_dapm_route rt5514_dapm_routes[] = {
671         { "DMIC1", NULL, "DMIC1L" },
672         { "DMIC1", NULL, "DMIC1R" },
673         { "DMIC2", NULL, "DMIC2L" },
674         { "DMIC2", NULL, "DMIC2R" },
675
676         { "DMIC1L", NULL, "DMIC CLK" },
677         { "DMIC1R", NULL, "DMIC CLK" },
678         { "DMIC2L", NULL, "DMIC CLK" },
679         { "DMIC2R", NULL, "DMIC CLK" },
680
681         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
682         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
683
684         { "Sto1 ADC MIXL", "DMIC Switch", "Stereo1 DMIC Mux" },
685         { "Sto1 ADC MIXL", "ADC Switch", "AMICL" },
686         { "Sto1 ADC MIXR", "DMIC Switch", "Stereo1 DMIC Mux" },
687         { "Sto1 ADC MIXR", "ADC Switch", "AMICR" },
688
689         { "ADC Power", NULL, "LDO18 IN" },
690         { "ADC Power", NULL, "LDO18 ADC" },
691         { "ADC Power", NULL, "LDO21" },
692         { "ADC Power", NULL, "BG LDO18 IN" },
693         { "ADC Power", NULL, "BG LDO21" },
694         { "ADC Power", NULL, "BG MBIAS" },
695         { "ADC Power", NULL, "MBIAS" },
696         { "ADC Power", NULL, "VREF2" },
697         { "ADC Power", NULL, "VREF1" },
698
699         { "ADCL Power", NULL, "LDO16L" },
700         { "ADCL Power", NULL, "ADC1L" },
701         { "ADCL Power", NULL, "BSTL2" },
702         { "ADCL Power", NULL, "BSTL" },
703         { "ADCL Power", NULL, "ADCFEDL" },
704
705         { "ADCR Power", NULL, "LDO16R" },
706         { "ADCR Power", NULL, "ADC1R" },
707         { "ADCR Power", NULL, "BSTR2" },
708         { "ADCR Power", NULL, "BSTR" },
709         { "ADCR Power", NULL, "ADCFEDR" },
710
711         { "AMICL", NULL, "ADC CLK" },
712         { "AMICL", NULL, "ADC Power" },
713         { "AMICL", NULL, "ADCL Power" },
714         { "AMICR", NULL, "ADC CLK" },
715         { "AMICR", NULL, "ADC Power" },
716         { "AMICR", NULL, "ADCR Power" },
717
718         { "PLL1 LDO", NULL, "PLL1 LDO ENABLE" },
719         { "PLL1", NULL, "PLL1 LDO" },
720
721         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
722         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
723
724         { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
725         { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
726         { "Stereo1 ADC MIX", NULL, "adc stereo1 filter" },
727         { "adc stereo1 filter", NULL, "PLL1", rt5514_is_sys_clk_from_pll },
728         { "adc stereo1 filter", NULL, "ASRC AD1", rt5514_i2s_use_asrc },
729
730         { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
731         { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
732
733         { "Sto2 ADC MIXL", "DMIC Switch", "Stereo2 DMIC Mux" },
734         { "Sto2 ADC MIXL", "ADC Switch", "AMICL" },
735         { "Sto2 ADC MIXR", "DMIC Switch", "Stereo2 DMIC Mux" },
736         { "Sto2 ADC MIXR", "ADC Switch", "AMICR" },
737
738         { "Stereo2 ADC MIXL", NULL, "Sto2 ADC MIXL" },
739         { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
740
741         { "Stereo2 ADC MIX", NULL, "Stereo2 ADC MIXL" },
742         { "Stereo2 ADC MIX", NULL, "Stereo2 ADC MIXR" },
743         { "Stereo2 ADC MIX", NULL, "adc stereo2 filter" },
744         { "adc stereo2 filter", NULL, "PLL1", rt5514_is_sys_clk_from_pll },
745         { "adc stereo2 filter", NULL, "ASRC AD2", rt5514_i2s_use_asrc },
746
747         { "AIF1TX", NULL, "Stereo1 ADC MIX"},
748         { "AIF1TX", NULL, "Stereo2 ADC MIX"},
749 };
750
751 static int rt5514_hw_params(struct snd_pcm_substream *substream,
752         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
753 {
754         struct snd_soc_codec *codec = dai->codec;
755         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
756         int pre_div, bclk_ms, frame_size;
757         unsigned int val_len = 0;
758
759         rt5514->lrck = params_rate(params);
760         pre_div = rl6231_get_clk_info(rt5514->sysclk, rt5514->lrck);
761         if (pre_div < 0) {
762                 dev_err(codec->dev, "Unsupported clock setting\n");
763                 return -EINVAL;
764         }
765
766         frame_size = snd_soc_params_to_frame_size(params);
767         if (frame_size < 0) {
768                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
769                 return -EINVAL;
770         }
771
772         bclk_ms = frame_size > 32;
773         rt5514->bclk = rt5514->lrck * (32 << bclk_ms);
774
775         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
776                 rt5514->bclk, rt5514->lrck);
777         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
778                                 bclk_ms, pre_div, dai->id);
779
780         switch (params_format(params)) {
781         case SNDRV_PCM_FORMAT_S16_LE:
782                 break;
783         case SNDRV_PCM_FORMAT_S20_3LE:
784                 val_len = RT5514_I2S_DL_20;
785                 break;
786         case SNDRV_PCM_FORMAT_S24_LE:
787                 val_len = RT5514_I2S_DL_24;
788                 break;
789         case SNDRV_PCM_FORMAT_S8:
790                 val_len = RT5514_I2S_DL_8;
791                 break;
792         default:
793                 return -EINVAL;
794         }
795
796         regmap_update_bits(rt5514->regmap, RT5514_I2S_CTRL1, RT5514_I2S_DL_MASK,
797                 val_len);
798         regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL1,
799                 RT5514_CLK_AD_ANA1_SEL_MASK,
800                 (pre_div + 1) << RT5514_CLK_AD_ANA1_SEL_SFT);
801         regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL2,
802                 RT5514_CLK_SYS_DIV_OUT_MASK | RT5514_SEL_ADC_OSR_MASK,
803                 pre_div << RT5514_CLK_SYS_DIV_OUT_SFT |
804                 pre_div << RT5514_SEL_ADC_OSR_SFT);
805
806         return 0;
807 }
808
809 static int rt5514_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
810 {
811         struct snd_soc_codec *codec = dai->codec;
812         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
813         unsigned int reg_val = 0;
814
815         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
816         case SND_SOC_DAIFMT_NB_NF:
817                 break;
818
819         case SND_SOC_DAIFMT_NB_IF:
820                 reg_val |= RT5514_I2S_LR_INV;
821                 break;
822
823         case SND_SOC_DAIFMT_IB_NF:
824                 reg_val |= RT5514_I2S_BP_INV;
825                 break;
826
827         case SND_SOC_DAIFMT_IB_IF:
828                 reg_val |= RT5514_I2S_BP_INV | RT5514_I2S_LR_INV;
829                 break;
830
831         default:
832                 return -EINVAL;
833         }
834
835         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
836         case SND_SOC_DAIFMT_I2S:
837                 break;
838
839         case SND_SOC_DAIFMT_LEFT_J:
840                 reg_val |= RT5514_I2S_DF_LEFT;
841                 break;
842
843         case SND_SOC_DAIFMT_DSP_A:
844                 reg_val |= RT5514_I2S_DF_PCM_A;
845                 break;
846
847         case SND_SOC_DAIFMT_DSP_B:
848                 reg_val |= RT5514_I2S_DF_PCM_B;
849                 break;
850
851         default:
852                 return -EINVAL;
853         }
854
855         regmap_update_bits(rt5514->regmap, RT5514_I2S_CTRL1,
856                 RT5514_I2S_DF_MASK | RT5514_I2S_BP_MASK | RT5514_I2S_LR_MASK,
857                 reg_val);
858
859         return 0;
860 }
861
862 static int rt5514_set_dai_sysclk(struct snd_soc_dai *dai,
863                 int clk_id, unsigned int freq, int dir)
864 {
865         struct snd_soc_codec *codec = dai->codec;
866         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
867         unsigned int reg_val = 0;
868
869         if (freq == rt5514->sysclk && clk_id == rt5514->sysclk_src)
870                 return 0;
871
872         switch (clk_id) {
873         case RT5514_SCLK_S_MCLK:
874                 reg_val |= RT5514_CLK_SYS_PRE_SEL_MCLK;
875                 break;
876
877         case RT5514_SCLK_S_PLL1:
878                 reg_val |= RT5514_CLK_SYS_PRE_SEL_PLL;
879                 break;
880
881         default:
882                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
883                 return -EINVAL;
884         }
885
886         regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL2,
887                 RT5514_CLK_SYS_PRE_SEL_MASK, reg_val);
888
889         rt5514->sysclk = freq;
890         rt5514->sysclk_src = clk_id;
891
892         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
893
894         return 0;
895 }
896
897 static int rt5514_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
898                         unsigned int freq_in, unsigned int freq_out)
899 {
900         struct snd_soc_codec *codec = dai->codec;
901         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
902         struct rl6231_pll_code pll_code;
903         int ret;
904
905         if (!freq_in || !freq_out) {
906                 dev_dbg(codec->dev, "PLL disabled\n");
907
908                 rt5514->pll_in = 0;
909                 rt5514->pll_out = 0;
910                 regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL2,
911                         RT5514_CLK_SYS_PRE_SEL_MASK,
912                         RT5514_CLK_SYS_PRE_SEL_MCLK);
913
914                 return 0;
915         }
916
917         if (source == rt5514->pll_src && freq_in == rt5514->pll_in &&
918             freq_out == rt5514->pll_out)
919                 return 0;
920
921         switch (source) {
922         case RT5514_PLL1_S_MCLK:
923                 regmap_update_bits(rt5514->regmap, RT5514_PLL_SOURCE_CTRL,
924                         RT5514_PLL_1_SEL_MASK, RT5514_PLL_1_SEL_MCLK);
925                 break;
926
927         case RT5514_PLL1_S_BCLK:
928                 regmap_update_bits(rt5514->regmap, RT5514_PLL_SOURCE_CTRL,
929                         RT5514_PLL_1_SEL_MASK, RT5514_PLL_1_SEL_SCLK);
930                 break;
931
932         default:
933                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
934                 return -EINVAL;
935         }
936
937         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
938         if (ret < 0) {
939                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
940                 return ret;
941         }
942
943         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
944                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
945                 pll_code.n_code, pll_code.k_code);
946
947         regmap_write(rt5514->regmap, RT5514_ANA_CTRL_PLL1_1,
948                 pll_code.k_code << RT5514_PLL_K_SFT |
949                 pll_code.n_code << RT5514_PLL_N_SFT |
950                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5514_PLL_M_SFT);
951         regmap_update_bits(rt5514->regmap, RT5514_ANA_CTRL_PLL1_2,
952                 RT5514_PLL_M_BP, pll_code.m_bp << RT5514_PLL_M_BP_SFT);
953
954         rt5514->pll_in = freq_in;
955         rt5514->pll_out = freq_out;
956         rt5514->pll_src = source;
957
958         return 0;
959 }
960
961 static int rt5514_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
962                         unsigned int rx_mask, int slots, int slot_width)
963 {
964         struct snd_soc_codec *codec = dai->codec;
965         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
966         unsigned int val = 0, val2 = 0;
967
968         if (rx_mask || tx_mask)
969                 val |= RT5514_TDM_MODE;
970
971         switch (tx_mask) {
972         case 0x3:
973                 val2 |= RT5514_TDM_DOCKING_MODE | RT5514_TDM_DOCKING_VALID_CH2 |
974                         RT5514_TDM_DOCKING_START_SLOT0;
975                 break;
976
977         case 0x30:
978                 val2 |= RT5514_TDM_DOCKING_MODE | RT5514_TDM_DOCKING_VALID_CH2 |
979                         RT5514_TDM_DOCKING_START_SLOT4;
980                 break;
981
982         case 0xf:
983                 val2 |= RT5514_TDM_DOCKING_MODE | RT5514_TDM_DOCKING_VALID_CH4 |
984                         RT5514_TDM_DOCKING_START_SLOT0;
985                 break;
986
987         case 0xf0:
988                 val2 |= RT5514_TDM_DOCKING_MODE | RT5514_TDM_DOCKING_VALID_CH4 |
989                         RT5514_TDM_DOCKING_START_SLOT4;
990                 break;
991
992         default:
993                 break;
994         }
995
996
997
998         switch (slots) {
999         case 4:
1000                 val |= RT5514_TDMSLOT_SEL_RX_4CH | RT5514_TDMSLOT_SEL_TX_4CH;
1001                 break;
1002
1003         case 6:
1004                 val |= RT5514_TDMSLOT_SEL_RX_6CH | RT5514_TDMSLOT_SEL_TX_6CH;
1005                 break;
1006
1007         case 8:
1008                 val |= RT5514_TDMSLOT_SEL_RX_8CH | RT5514_TDMSLOT_SEL_TX_8CH;
1009                 break;
1010
1011         case 2:
1012         default:
1013                 break;
1014         }
1015
1016         switch (slot_width) {
1017         case 20:
1018                 val |= RT5514_CH_LEN_RX_20 | RT5514_CH_LEN_TX_20;
1019                 break;
1020
1021         case 24:
1022                 val |= RT5514_CH_LEN_RX_24 | RT5514_CH_LEN_TX_24;
1023                 break;
1024
1025         case 25:
1026                 val |= RT5514_TDM_MODE2;
1027                 break;
1028
1029         case 32:
1030                 val |= RT5514_CH_LEN_RX_32 | RT5514_CH_LEN_TX_32;
1031                 break;
1032
1033         case 16:
1034         default:
1035                 break;
1036         }
1037
1038         regmap_update_bits(rt5514->regmap, RT5514_I2S_CTRL1, RT5514_TDM_MODE |
1039                 RT5514_TDMSLOT_SEL_RX_MASK | RT5514_TDMSLOT_SEL_TX_MASK |
1040                 RT5514_CH_LEN_RX_MASK | RT5514_CH_LEN_TX_MASK |
1041                 RT5514_TDM_MODE2, val);
1042
1043         regmap_update_bits(rt5514->regmap, RT5514_I2S_CTRL2,
1044                 RT5514_TDM_DOCKING_MODE | RT5514_TDM_DOCKING_VALID_CH_MASK |
1045                 RT5514_TDM_DOCKING_START_MASK, val2);
1046
1047         return 0;
1048 }
1049
1050 static int rt5514_set_bias_level(struct snd_soc_codec *codec,
1051                         enum snd_soc_bias_level level)
1052 {
1053         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
1054         int ret;
1055
1056         switch (level) {
1057         case SND_SOC_BIAS_PREPARE:
1058                 if (IS_ERR(rt5514->mclk))
1059                         break;
1060
1061                 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON) {
1062                         clk_disable_unprepare(rt5514->mclk);
1063                 } else {
1064                         ret = clk_prepare_enable(rt5514->mclk);
1065                         if (ret)
1066                                 return ret;
1067                 }
1068                 break;
1069
1070         case SND_SOC_BIAS_STANDBY:
1071                 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
1072                         /*
1073                          * If the DSP is enabled in start of recording, the DSP
1074                          * should be disabled, and sync back to normal recording
1075                          * settings to make sure recording properly.
1076                          */
1077                         if (rt5514->dsp_enabled) {
1078                                 rt5514->dsp_enabled = 0;
1079                                 regmap_multi_reg_write(rt5514->i2c_regmap,
1080                                         rt5514_i2c_patch,
1081                                         ARRAY_SIZE(rt5514_i2c_patch));
1082                                 regcache_mark_dirty(rt5514->regmap);
1083                                 regcache_sync(rt5514->regmap);
1084                         }
1085                 }
1086                 break;
1087
1088         default:
1089                 break;
1090         }
1091
1092         return 0;
1093 }
1094
1095 static int rt5514_probe(struct snd_soc_codec *codec)
1096 {
1097         struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
1098         struct platform_device *pdev = container_of(codec->dev,
1099                                                    struct platform_device, dev);
1100
1101         rt5514->mclk = devm_clk_get(codec->dev, "mclk");
1102         if (PTR_ERR(rt5514->mclk) == -EPROBE_DEFER)
1103                 return -EPROBE_DEFER;
1104
1105         if (rt5514->pdata.dsp_calib_clk_name) {
1106                 rt5514->dsp_calib_clk = devm_clk_get(&pdev->dev,
1107                                 rt5514->pdata.dsp_calib_clk_name);
1108                 if (PTR_ERR(rt5514->dsp_calib_clk) == -EPROBE_DEFER)
1109                         return -EPROBE_DEFER;
1110         }
1111
1112         rt5514->codec = codec;
1113         rt5514->pll3_cal_value = 0x0078b000;
1114
1115         return 0;
1116 }
1117
1118 static int rt5514_i2c_read(void *context, unsigned int reg, unsigned int *val)
1119 {
1120         struct i2c_client *client = context;
1121         struct rt5514_priv *rt5514 = i2c_get_clientdata(client);
1122
1123         regmap_read(rt5514->i2c_regmap, reg | RT5514_DSP_MAPPING, val);
1124
1125         return 0;
1126 }
1127
1128 static int rt5514_i2c_write(void *context, unsigned int reg, unsigned int val)
1129 {
1130         struct i2c_client *client = context;
1131         struct rt5514_priv *rt5514 = i2c_get_clientdata(client);
1132
1133         regmap_write(rt5514->i2c_regmap, reg | RT5514_DSP_MAPPING, val);
1134
1135         return 0;
1136 }
1137
1138 #define RT5514_STEREO_RATES SNDRV_PCM_RATE_8000_192000
1139 #define RT5514_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1140                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1141
1142 static const struct snd_soc_dai_ops rt5514_aif_dai_ops = {
1143         .hw_params = rt5514_hw_params,
1144         .set_fmt = rt5514_set_dai_fmt,
1145         .set_sysclk = rt5514_set_dai_sysclk,
1146         .set_pll = rt5514_set_dai_pll,
1147         .set_tdm_slot = rt5514_set_tdm_slot,
1148 };
1149
1150 static struct snd_soc_dai_driver rt5514_dai[] = {
1151         {
1152                 .name = "rt5514-aif1",
1153                 .id = 0,
1154                 .capture = {
1155                         .stream_name = "AIF1 Capture",
1156                         .channels_min = 1,
1157                         .channels_max = 4,
1158                         .rates = RT5514_STEREO_RATES,
1159                         .formats = RT5514_FORMATS,
1160                 },
1161                 .ops = &rt5514_aif_dai_ops,
1162         }
1163 };
1164
1165 static const struct snd_soc_codec_driver soc_codec_dev_rt5514 = {
1166         .probe = rt5514_probe,
1167         .idle_bias_off = true,
1168         .set_bias_level = rt5514_set_bias_level,
1169         .component_driver = {
1170                 .controls               = rt5514_snd_controls,
1171                 .num_controls           = ARRAY_SIZE(rt5514_snd_controls),
1172                 .dapm_widgets           = rt5514_dapm_widgets,
1173                 .num_dapm_widgets       = ARRAY_SIZE(rt5514_dapm_widgets),
1174                 .dapm_routes            = rt5514_dapm_routes,
1175                 .num_dapm_routes        = ARRAY_SIZE(rt5514_dapm_routes),
1176         },
1177 };
1178
1179 static const struct regmap_config rt5514_i2c_regmap = {
1180         .name = "i2c",
1181         .reg_bits = 32,
1182         .val_bits = 32,
1183
1184         .readable_reg = rt5514_i2c_readable_register,
1185
1186         .cache_type = REGCACHE_NONE,
1187 };
1188
1189 static const struct regmap_config rt5514_regmap = {
1190         .reg_bits = 16,
1191         .val_bits = 32,
1192
1193         .max_register = RT5514_VENDOR_ID2,
1194         .volatile_reg = rt5514_volatile_register,
1195         .readable_reg = rt5514_readable_register,
1196         .reg_read = rt5514_i2c_read,
1197         .reg_write = rt5514_i2c_write,
1198
1199         .cache_type = REGCACHE_RBTREE,
1200         .reg_defaults = rt5514_reg,
1201         .num_reg_defaults = ARRAY_SIZE(rt5514_reg),
1202         .use_single_rw = true,
1203 };
1204
1205 static const struct i2c_device_id rt5514_i2c_id[] = {
1206         { "rt5514", 0 },
1207         { }
1208 };
1209 MODULE_DEVICE_TABLE(i2c, rt5514_i2c_id);
1210
1211 #if defined(CONFIG_OF)
1212 static const struct of_device_id rt5514_of_match[] = {
1213         { .compatible = "realtek,rt5514", },
1214         {},
1215 };
1216 MODULE_DEVICE_TABLE(of, rt5514_of_match);
1217 #endif
1218
1219 #ifdef CONFIG_ACPI
1220 static const struct acpi_device_id rt5514_acpi_match[] = {
1221         { "10EC5514", 0},
1222         {},
1223 };
1224 MODULE_DEVICE_TABLE(acpi, rt5514_acpi_match);
1225 #endif
1226
1227 static int rt5514_parse_dp(struct rt5514_priv *rt5514, struct device *dev)
1228 {
1229         device_property_read_u32(dev, "realtek,dmic-init-delay-ms",
1230                 &rt5514->pdata.dmic_init_delay);
1231         device_property_read_string(dev, "realtek,dsp-calib-clk-name",
1232                 &rt5514->pdata.dsp_calib_clk_name);
1233         device_property_read_u32(dev, "realtek,dsp-calib-clk-rate",
1234                 &rt5514->pdata.dsp_calib_clk_rate);
1235
1236         return 0;
1237 }
1238
1239 static __maybe_unused int rt5514_i2c_resume(struct device *dev)
1240 {
1241         struct rt5514_priv *rt5514 = dev_get_drvdata(dev);
1242         unsigned int val;
1243
1244         /*
1245          * Add a bogus read to avoid rt5514's confusion after s2r in case it
1246          * saw glitches on the i2c lines and thought the other side sent a
1247          * start bit.
1248          */
1249         regmap_read(rt5514->regmap, RT5514_VENDOR_ID2, &val);
1250
1251         return 0;
1252 }
1253
1254 static int rt5514_i2c_probe(struct i2c_client *i2c,
1255                     const struct i2c_device_id *id)
1256 {
1257         struct rt5514_platform_data *pdata = dev_get_platdata(&i2c->dev);
1258         struct rt5514_priv *rt5514;
1259         int ret;
1260         unsigned int val = ~0;
1261
1262         rt5514 = devm_kzalloc(&i2c->dev, sizeof(struct rt5514_priv),
1263                                 GFP_KERNEL);
1264         if (rt5514 == NULL)
1265                 return -ENOMEM;
1266
1267         i2c_set_clientdata(i2c, rt5514);
1268
1269         if (pdata)
1270                 rt5514->pdata = *pdata;
1271         else
1272                 rt5514_parse_dp(rt5514, &i2c->dev);
1273
1274         rt5514->i2c_regmap = devm_regmap_init_i2c(i2c, &rt5514_i2c_regmap);
1275         if (IS_ERR(rt5514->i2c_regmap)) {
1276                 ret = PTR_ERR(rt5514->i2c_regmap);
1277                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1278                         ret);
1279                 return ret;
1280         }
1281
1282         rt5514->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt5514_regmap);
1283         if (IS_ERR(rt5514->regmap)) {
1284                 ret = PTR_ERR(rt5514->regmap);
1285                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1286                         ret);
1287                 return ret;
1288         }
1289
1290         /*
1291          * The rt5514 can get confused if the i2c lines glitch together, as
1292          * can happen at bootup as regulators are turned off and on.  If it's
1293          * in this glitched state the first i2c read will fail, so we'll give
1294          * it one change to retry.
1295          */
1296         ret = regmap_read(rt5514->regmap, RT5514_VENDOR_ID2, &val);
1297         if (ret || val != RT5514_DEVICE_ID)
1298                 ret = regmap_read(rt5514->regmap, RT5514_VENDOR_ID2, &val);
1299         if (ret || val != RT5514_DEVICE_ID) {
1300                 dev_err(&i2c->dev,
1301                         "Device with ID register %x is not rt5514\n", val);
1302                 return -ENODEV;
1303         }
1304
1305         ret = regmap_multi_reg_write(rt5514->i2c_regmap, rt5514_i2c_patch,
1306                                     ARRAY_SIZE(rt5514_i2c_patch));
1307         if (ret != 0)
1308                 dev_warn(&i2c->dev, "Failed to apply i2c_regmap patch: %d\n",
1309                         ret);
1310
1311         ret = regmap_register_patch(rt5514->regmap, rt5514_patch,
1312                                     ARRAY_SIZE(rt5514_patch));
1313         if (ret != 0)
1314                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
1315
1316         return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5514,
1317                         rt5514_dai, ARRAY_SIZE(rt5514_dai));
1318 }
1319
1320 static int rt5514_i2c_remove(struct i2c_client *i2c)
1321 {
1322         snd_soc_unregister_codec(&i2c->dev);
1323
1324         return 0;
1325 }
1326
1327 static const struct dev_pm_ops rt5514_i2_pm_ops = {
1328         SET_SYSTEM_SLEEP_PM_OPS(NULL, rt5514_i2c_resume)
1329 };
1330
1331 static struct i2c_driver rt5514_i2c_driver = {
1332         .driver = {
1333                 .name = "rt5514",
1334                 .acpi_match_table = ACPI_PTR(rt5514_acpi_match),
1335                 .of_match_table = of_match_ptr(rt5514_of_match),
1336                 .pm = &rt5514_i2_pm_ops,
1337         },
1338         .probe = rt5514_i2c_probe,
1339         .remove   = rt5514_i2c_remove,
1340         .id_table = rt5514_i2c_id,
1341 };
1342 module_i2c_driver(rt5514_i2c_driver);
1343
1344 MODULE_DESCRIPTION("ASoC RT5514 driver");
1345 MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
1346 MODULE_LICENSE("GPL v2");