sound/soc/codecs/rt286.c

   1 /*
   2  * rt286.c  --  RT286 ALSA SoC audio codec driver
   3  *
   4  * Copyright 2013 Realtek Semiconductor Corp.
   5  * Author: Bard Liao <bardliao@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/moduleparam.h>
  14 #include <linux/init.h>
  15 #include <linux/delay.h>
  16 #include <linux/pm.h>
  17 #include <linux/i2c.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/dmi.h>
  21 #include <linux/acpi.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include <sound/soc.h>
  26 #include <sound/soc-dapm.h>
  27 #include <sound/initval.h>
  28 #include <sound/tlv.h>
  29 #include <sound/jack.h>
  30 #include <linux/workqueue.h>
  31 #include <sound/rt286.h>
  32
  33 #include "rl6347a.h"
  34 #include "rt286.h"
  35
  36 #define RT286_VENDOR_ID 0x10ec0286
  37 #define RT288_VENDOR_ID 0x10ec0288
  38
  39 struct rt286_priv {
  40         struct reg_default *index_cache;
  41         int index_cache_size;
  42         struct regmap *regmap;
  43         struct snd_soc_codec *codec;
  44         struct rt286_platform_data pdata;
  45         struct i2c_client *i2c;
  46         struct snd_soc_jack *jack;
  47         struct delayed_work jack_detect_work;
  48         int sys_clk;
  49         int clk_id;
  50 };
  51
  52 static const struct reg_default rt286_index_def[] = {
  53         { 0x01, 0xaaaa },
  54         { 0x02, 0x8aaa },
  55         { 0x03, 0x0002 },
  56         { 0x04, 0xaf01 },
  57         { 0x08, 0x000d },
  58         { 0x09, 0xd810 },
  59         { 0x0a, 0x0120 },
  60         { 0x0b, 0x0000 },
  61         { 0x0d, 0x2800 },
  62         { 0x0f, 0x0000 },
  63         { 0x19, 0x0a17 },
  64         { 0x20, 0x0020 },
  65         { 0x33, 0x0208 },
  66         { 0x49, 0x0004 },
  67         { 0x4f, 0x50e9 },
  68         { 0x50, 0x2000 },
  69         { 0x63, 0x2902 },
  70         { 0x67, 0x1111 },
  71         { 0x68, 0x1016 },
  72         { 0x69, 0x273f },
  73 };
  74 #define INDEX_CACHE_SIZE ARRAY_SIZE(rt286_index_def)
  75
  76 static const struct reg_default rt286_reg[] = {
  77         { 0x00170500, 0x00000400 },
  78         { 0x00220000, 0x00000031 },
  79         { 0x00239000, 0x0000007f },
  80         { 0x0023a000, 0x0000007f },
  81         { 0x00270500, 0x00000400 },
  82         { 0x00370500, 0x00000400 },
  83         { 0x00870500, 0x00000400 },
  84         { 0x00920000, 0x00000031 },
  85         { 0x00935000, 0x000000c3 },
  86         { 0x00936000, 0x000000c3 },
  87         { 0x00970500, 0x00000400 },
  88         { 0x00b37000, 0x00000097 },
  89         { 0x00b37200, 0x00000097 },
  90         { 0x00b37300, 0x00000097 },
  91         { 0x00c37000, 0x00000000 },
  92         { 0x00c37100, 0x00000080 },
  93         { 0x01270500, 0x00000400 },
  94         { 0x01370500, 0x00000400 },
  95         { 0x01371f00, 0x411111f0 },
  96         { 0x01439000, 0x00000080 },
  97         { 0x0143a000, 0x00000080 },
  98         { 0x01470700, 0x00000000 },
  99         { 0x01470500, 0x00000400 },
 100         { 0x01470c00, 0x00000000 },
 101         { 0x01470100, 0x00000000 },
 102         { 0x01837000, 0x00000000 },
 103         { 0x01870500, 0x00000400 },
 104         { 0x02050000, 0x00000000 },
 105         { 0x02139000, 0x00000080 },
 106         { 0x0213a000, 0x00000080 },
 107         { 0x02170100, 0x00000000 },
 108         { 0x02170500, 0x00000400 },
 109         { 0x02170700, 0x00000000 },
 110         { 0x02270100, 0x00000000 },
 111         { 0x02370100, 0x00000000 },
 112         { 0x01870700, 0x00000020 },
 113         { 0x00830000, 0x000000c3 },
 114         { 0x00930000, 0x000000c3 },
 115         { 0x01270700, 0x00000000 },
 116 };
 117
 118 static bool rt286_volatile_register(struct device *dev, unsigned int reg)
 119 {
 120         switch (reg) {
 121         case 0 ... 0xff:
 122         case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
 123         case RT286_GET_HP_SENSE:
 124         case RT286_GET_MIC1_SENSE:
 125         case RT286_PROC_COEF:
 126                 return true;
 127         default:
 128                 return false;
 129         }
 130
 131
 132 }
 133
 134 static bool rt286_readable_register(struct device *dev, unsigned int reg)
 135 {
 136         switch (reg) {
 137         case 0 ... 0xff:
 138         case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
 139         case RT286_GET_HP_SENSE:
 140         case RT286_GET_MIC1_SENSE:
 141         case RT286_SET_AUDIO_POWER:
 142         case RT286_SET_HPO_POWER:
 143         case RT286_SET_SPK_POWER:
 144         case RT286_SET_DMIC1_POWER:
 145         case RT286_SPK_MUX:
 146         case RT286_HPO_MUX:
 147         case RT286_ADC0_MUX:
 148         case RT286_ADC1_MUX:
 149         case RT286_SET_MIC1:
 150         case RT286_SET_PIN_HPO:
 151         case RT286_SET_PIN_SPK:
 152         case RT286_SET_PIN_DMIC1:
 153         case RT286_SPK_EAPD:
 154         case RT286_SET_AMP_GAIN_HPO:
 155         case RT286_SET_DMIC2_DEFAULT:
 156         case RT286_DACL_GAIN:
 157         case RT286_DACR_GAIN:
 158         case RT286_ADCL_GAIN:
 159         case RT286_ADCR_GAIN:
 160         case RT286_MIC_GAIN:
 161         case RT286_SPOL_GAIN:
 162         case RT286_SPOR_GAIN:
 163         case RT286_HPOL_GAIN:
 164         case RT286_HPOR_GAIN:
 165         case RT286_F_DAC_SWITCH:
 166         case RT286_F_RECMIX_SWITCH:
 167         case RT286_REC_MIC_SWITCH:
 168         case RT286_REC_I2S_SWITCH:
 169         case RT286_REC_LINE_SWITCH:
 170         case RT286_REC_BEEP_SWITCH:
 171         case RT286_DAC_FORMAT:
 172         case RT286_ADC_FORMAT:
 173         case RT286_COEF_INDEX:
 174         case RT286_PROC_COEF:
 175         case RT286_SET_AMP_GAIN_ADC_IN1:
 176         case RT286_SET_AMP_GAIN_ADC_IN2:
 177         case RT286_SET_POWER(RT286_DAC_OUT1):
 178         case RT286_SET_POWER(RT286_DAC_OUT2):
 179         case RT286_SET_POWER(RT286_ADC_IN1):
 180         case RT286_SET_POWER(RT286_ADC_IN2):
 181         case RT286_SET_POWER(RT286_DMIC2):
 182         case RT286_SET_POWER(RT286_MIC1):
 183                 return true;
 184         default:
 185                 return false;
 186         }
 187 }
 188
 189 #ifdef CONFIG_PM
 190 static void rt286_index_sync(struct snd_soc_codec *codec)
 191 {
 192         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 193         int i;
 194
 195         for (i = 0; i < INDEX_CACHE_SIZE; i++) {
 196                 snd_soc_write(codec, rt286->index_cache[i].reg,
 197                                   rt286->index_cache[i].def);
 198         }
 199 }
 200 #endif
 201
 202 static int rt286_support_power_controls[] = {
 203         RT286_DAC_OUT1,
 204         RT286_DAC_OUT2,
 205         RT286_ADC_IN1,
 206         RT286_ADC_IN2,
 207         RT286_MIC1,
 208         RT286_DMIC1,
 209         RT286_DMIC2,
 210         RT286_SPK_OUT,
 211         RT286_HP_OUT,
 212 };
 213 #define RT286_POWER_REG_LEN ARRAY_SIZE(rt286_support_power_controls)
 214
 215 static int rt286_jack_detect(struct rt286_priv *rt286, bool *hp, bool *mic)
 216 {
 217         struct snd_soc_dapm_context *dapm;
 218         unsigned int val, buf;
 219
 220         *hp = false;
 221         *mic = false;
 222
 223         if (!rt286->codec)
 224                 return -EINVAL;
 225
 226         dapm = snd_soc_codec_get_dapm(rt286->codec);
 227
 228         if (rt286->pdata.cbj_en) {
 229                 regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf);
 230                 *hp = buf & 0x80000000;
 231                 if (*hp) {
 232                         /* power on HV,VERF */
 233                         regmap_update_bits(rt286->regmap,
 234                                 RT286_DC_GAIN, 0x200, 0x200);
 235
 236                         snd_soc_dapm_force_enable_pin(dapm, "HV");
 237                         snd_soc_dapm_force_enable_pin(dapm, "VREF");
 238                         /* power LDO1 */
 239                         snd_soc_dapm_force_enable_pin(dapm, "LDO1");
 240                         snd_soc_dapm_sync(dapm);
 241
 242                         regmap_write(rt286->regmap, RT286_SET_MIC1, 0x24);
 243                         msleep(50);
 244
 245                         regmap_update_bits(rt286->regmap,
 246                                 RT286_CBJ_CTRL1, 0xfcc0, 0xd400);
 247                         msleep(300);
 248                         regmap_read(rt286->regmap, RT286_CBJ_CTRL2, &val);
 249
 250                         if (0x0070 == (val & 0x0070)) {
 251                                 *mic = true;
 252                         } else {
 253                                 regmap_update_bits(rt286->regmap,
 254                                         RT286_CBJ_CTRL1, 0xfcc0, 0xe400);
 255                                 msleep(300);
 256                                 regmap_read(rt286->regmap,
 257                                         RT286_CBJ_CTRL2, &val);
 258                                 if (0x0070 == (val & 0x0070))
 259                                         *mic = true;
 260                                 else
 261                                         *mic = false;
 262                         }
 263                         regmap_update_bits(rt286->regmap,
 264                                 RT286_DC_GAIN, 0x200, 0x0);
 265
 266                 } else {
 267                         *mic = false;
 268                         regmap_write(rt286->regmap, RT286_SET_MIC1, 0x20);
 269                         regmap_update_bits(rt286->regmap,
 270                                 RT286_CBJ_CTRL1, 0x0400, 0x0000);
 271                 }
 272         } else {
 273                 regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf);
 274                 *hp = buf & 0x80000000;
 275                 regmap_read(rt286->regmap, RT286_GET_MIC1_SENSE, &buf);
 276                 *mic = buf & 0x80000000;
 277         }
 278
 279         snd_soc_dapm_disable_pin(dapm, "HV");
 280         snd_soc_dapm_disable_pin(dapm, "VREF");
 281         if (!*hp)
 282                 snd_soc_dapm_disable_pin(dapm, "LDO1");
 283         snd_soc_dapm_sync(dapm);
 284
 285         return 0;
 286 }
 287
 288 static void rt286_jack_detect_work(struct work_struct *work)
 289 {
 290         struct rt286_priv *rt286 =
 291                 container_of(work, struct rt286_priv, jack_detect_work.work);
 292         int status = 0;
 293         bool hp = false;
 294         bool mic = false;
 295
 296         rt286_jack_detect(rt286, &hp, &mic);
 297
 298         if (hp == true)
 299                 status |= SND_JACK_HEADPHONE;
 300
 301         if (mic == true)
 302                 status |= SND_JACK_MICROPHONE;
 303
 304         snd_soc_jack_report(rt286->jack, status,
 305                 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 306 }
 307
 308 int rt286_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack)
 309 {
 310         struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
 311         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 312
 313         rt286->jack = jack;
 314
 315         if (jack) {
 316                 /* enable IRQ */
 317                 if (rt286->jack->status & SND_JACK_HEADPHONE)
 318                         snd_soc_dapm_force_enable_pin(dapm, "LDO1");
 319                 regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x2, 0x2);
 320                 /* Send an initial empty report */
 321                 snd_soc_jack_report(rt286->jack, rt286->jack->status,
 322                         SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 323         } else {
 324                 /* disable IRQ */
 325                 regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x2, 0x0);
 326                 snd_soc_dapm_disable_pin(dapm, "LDO1");
 327         }
 328         snd_soc_dapm_sync(dapm);
 329
 330         return 0;
 331 }
 332 EXPORT_SYMBOL_GPL(rt286_mic_detect);
 333
 334 static int is_mclk_mode(struct snd_soc_dapm_widget *source,
 335                          struct snd_soc_dapm_widget *sink)
 336 {
 337         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 338         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 339
 340         if (rt286->clk_id == RT286_SCLK_S_MCLK)
 341                 return 1;
 342         else
 343                 return 0;
 344 }
 345
 346 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0);
 347 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
 348
 349 static const struct snd_kcontrol_new rt286_snd_controls[] = {
 350         SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT286_DACL_GAIN,
 351                             RT286_DACR_GAIN, 0, 0x7f, 0, out_vol_tlv),
 352         SOC_DOUBLE_R("ADC0 Capture Switch", RT286_ADCL_GAIN,
 353                             RT286_ADCR_GAIN, 7, 1, 1),
 354         SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT286_ADCL_GAIN,
 355                             RT286_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv),
 356         SOC_SINGLE_TLV("AMIC Volume", RT286_MIC_GAIN,
 357                             0, 0x3, 0, mic_vol_tlv),
 358         SOC_DOUBLE_R("Speaker Playback Switch", RT286_SPOL_GAIN,
 359                             RT286_SPOR_GAIN, RT286_MUTE_SFT, 1, 1),
 360 };
 361
 362 /* Digital Mixer */
 363 static const struct snd_kcontrol_new rt286_front_mix[] = {
 364         SOC_DAPM_SINGLE("DAC Switch",  RT286_F_DAC_SWITCH,
 365                         RT286_MUTE_SFT, 1, 1),
 366         SOC_DAPM_SINGLE("RECMIX Switch", RT286_F_RECMIX_SWITCH,
 367                         RT286_MUTE_SFT, 1, 1),
 368 };
 369
 370 /* Analog Input Mixer */
 371 static const struct snd_kcontrol_new rt286_rec_mix[] = {
 372         SOC_DAPM_SINGLE("Mic1 Switch", RT286_REC_MIC_SWITCH,
 373                         RT286_MUTE_SFT, 1, 1),
 374         SOC_DAPM_SINGLE("I2S Switch", RT286_REC_I2S_SWITCH,
 375                         RT286_MUTE_SFT, 1, 1),
 376         SOC_DAPM_SINGLE("Line1 Switch", RT286_REC_LINE_SWITCH,
 377                         RT286_MUTE_SFT, 1, 1),
 378         SOC_DAPM_SINGLE("Beep Switch", RT286_REC_BEEP_SWITCH,
 379                         RT286_MUTE_SFT, 1, 1),
 380 };
 381
 382 static const struct snd_kcontrol_new spo_enable_control =
 383         SOC_DAPM_SINGLE("Switch", RT286_SET_PIN_SPK,
 384                         RT286_SET_PIN_SFT, 1, 0);
 385
 386 static const struct snd_kcontrol_new hpol_enable_control =
 387         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOL_GAIN,
 388                         RT286_MUTE_SFT, 1, 1);
 389
 390 static const struct snd_kcontrol_new hpor_enable_control =
 391         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOR_GAIN,
 392                         RT286_MUTE_SFT, 1, 1);
 393
 394 /* ADC0 source */
 395 static const char * const rt286_adc_src[] = {
 396         "Mic", "RECMIX", "Dmic"
 397 };
 398
 399 static const int rt286_adc_values[] = {
 400         0, 4, 5,
 401 };
 402
 403 static SOC_VALUE_ENUM_SINGLE_DECL(
 404         rt286_adc0_enum, RT286_ADC0_MUX, RT286_ADC_SEL_SFT,
 405         RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values);
 406
 407 static const struct snd_kcontrol_new rt286_adc0_mux =
 408         SOC_DAPM_ENUM("ADC 0 source", rt286_adc0_enum);
 409
 410 static SOC_VALUE_ENUM_SINGLE_DECL(
 411         rt286_adc1_enum, RT286_ADC1_MUX, RT286_ADC_SEL_SFT,
 412         RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values);
 413
 414 static const struct snd_kcontrol_new rt286_adc1_mux =
 415         SOC_DAPM_ENUM("ADC 1 source", rt286_adc1_enum);
 416
 417 static const char * const rt286_dac_src[] = {
 418         "Front", "Surround"
 419 };
 420 /* HP-OUT source */
 421 static SOC_ENUM_SINGLE_DECL(rt286_hpo_enum, RT286_HPO_MUX,
 422                                 0, rt286_dac_src);
 423
 424 static const struct snd_kcontrol_new rt286_hpo_mux =
 425 SOC_DAPM_ENUM("HPO source", rt286_hpo_enum);
 426
 427 /* SPK-OUT source */
 428 static SOC_ENUM_SINGLE_DECL(rt286_spo_enum, RT286_SPK_MUX,
 429                                 0, rt286_dac_src);
 430
 431 static const struct snd_kcontrol_new rt286_spo_mux =
 432 SOC_DAPM_ENUM("SPO source", rt286_spo_enum);
 433
 434 static int rt286_spk_event(struct snd_soc_dapm_widget *w,
 435                             struct snd_kcontrol *kcontrol, int event)
 436 {
 437         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 438
 439         switch (event) {
 440         case SND_SOC_DAPM_POST_PMU:
 441                 snd_soc_write(codec,
 442                         RT286_SPK_EAPD, RT286_SET_EAPD_HIGH);
 443                 break;
 444         case SND_SOC_DAPM_PRE_PMD:
 445                 snd_soc_write(codec,
 446                         RT286_SPK_EAPD, RT286_SET_EAPD_LOW);
 447                 break;
 448
 449         default:
 450                 return 0;
 451         }
 452
 453         return 0;
 454 }
 455
 456 static int rt286_set_dmic1_event(struct snd_soc_dapm_widget *w,
 457                                   struct snd_kcontrol *kcontrol, int event)
 458 {
 459         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 460
 461         switch (event) {
 462         case SND_SOC_DAPM_POST_PMU:
 463                 snd_soc_write(codec, RT286_SET_PIN_DMIC1, 0x20);
 464                 break;
 465         case SND_SOC_DAPM_PRE_PMD:
 466                 snd_soc_write(codec, RT286_SET_PIN_DMIC1, 0);
 467                 break;
 468         default:
 469                 return 0;
 470         }
 471
 472         return 0;
 473 }
 474
 475 static int rt286_ldo2_event(struct snd_soc_dapm_widget *w,
 476                              struct snd_kcontrol *kcontrol, int event)
 477 {
 478         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 479
 480         switch (event) {
 481         case SND_SOC_DAPM_POST_PMU:
 482                 snd_soc_update_bits(codec, RT286_POWER_CTRL2, 0x38, 0x08);
 483                 break;
 484         case SND_SOC_DAPM_PRE_PMD:
 485                 snd_soc_update_bits(codec, RT286_POWER_CTRL2, 0x38, 0x30);
 486                 break;
 487         default:
 488                 return 0;
 489         }
 490
 491         return 0;
 492 }
 493
 494 static int rt286_mic1_event(struct snd_soc_dapm_widget *w,
 495                              struct snd_kcontrol *kcontrol, int event)
 496 {
 497         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 498
 499         switch (event) {
 500         case SND_SOC_DAPM_PRE_PMU:
 501                 snd_soc_update_bits(codec,
 502                         RT286_A_BIAS_CTRL3, 0xc000, 0x8000);
 503                 snd_soc_update_bits(codec,
 504                         RT286_A_BIAS_CTRL2, 0xc000, 0x8000);
 505                 break;
 506         case SND_SOC_DAPM_POST_PMD:
 507                 snd_soc_update_bits(codec,
 508                         RT286_A_BIAS_CTRL3, 0xc000, 0x0000);
 509                 snd_soc_update_bits(codec,
 510                         RT286_A_BIAS_CTRL2, 0xc000, 0x0000);
 511                 break;
 512         default:
 513                 return 0;
 514         }
 515
 516         return 0;
 517 }
 518
 519 static const struct snd_soc_dapm_widget rt286_dapm_widgets[] = {
 520         SND_SOC_DAPM_SUPPLY_S("HV", 1, RT286_POWER_CTRL1,
 521                 12, 1, NULL, 0),
 522         SND_SOC_DAPM_SUPPLY("VREF", RT286_POWER_CTRL1,
 523                 0, 1, NULL, 0),
 524         SND_SOC_DAPM_SUPPLY_S("LDO1", 1, RT286_POWER_CTRL2,
 525                 2, 0, NULL, 0),
 526         SND_SOC_DAPM_SUPPLY_S("LDO2", 2, RT286_POWER_CTRL1,
 527                 13, 1, rt286_ldo2_event, SND_SOC_DAPM_PRE_PMD |
 528                 SND_SOC_DAPM_POST_PMU),
 529         SND_SOC_DAPM_SUPPLY("MCLK MODE", RT286_PLL_CTRL1,
 530                 5, 0, NULL, 0),
 531         SND_SOC_DAPM_SUPPLY("MIC1 Input Buffer", SND_SOC_NOPM,
 532                 0, 0, rt286_mic1_event, SND_SOC_DAPM_PRE_PMU |
 533                 SND_SOC_DAPM_POST_PMD),
 534
 535         /* Input Lines */
 536         SND_SOC_DAPM_INPUT("DMIC1 Pin"),
 537         SND_SOC_DAPM_INPUT("DMIC2 Pin"),
 538         SND_SOC_DAPM_INPUT("MIC1"),
 539         SND_SOC_DAPM_INPUT("LINE1"),
 540         SND_SOC_DAPM_INPUT("Beep"),
 541
 542         /* DMIC */
 543         SND_SOC_DAPM_PGA_E("DMIC1", RT286_SET_POWER(RT286_DMIC1), 0, 1,
 544                 NULL, 0, rt286_set_dmic1_event,
 545                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 546         SND_SOC_DAPM_PGA("DMIC2", RT286_SET_POWER(RT286_DMIC2), 0, 1,
 547                 NULL, 0),
 548         SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM,
 549                 0, 0, NULL, 0),
 550
 551         /* REC Mixer */
 552         SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0,
 553                 rt286_rec_mix, ARRAY_SIZE(rt286_rec_mix)),
 554
 555         /* ADCs */
 556         SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0),
 557         SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
 558
 559         /* ADC Mux */
 560         SND_SOC_DAPM_MUX("ADC 0 Mux", RT286_SET_POWER(RT286_ADC_IN1), 0, 1,
 561                 &rt286_adc0_mux),
 562         SND_SOC_DAPM_MUX("ADC 1 Mux", RT286_SET_POWER(RT286_ADC_IN2), 0, 1,
 563                 &rt286_adc1_mux),
 564
 565         /* Audio Interface */
 566         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
 567         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
 568         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
 569         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
 570
 571         /* Output Side */
 572         /* DACs */
 573         SND_SOC_DAPM_DAC("DAC 0", NULL, SND_SOC_NOPM, 0, 0),
 574         SND_SOC_DAPM_DAC("DAC 1", NULL, SND_SOC_NOPM, 0, 0),
 575
 576         /* Output Mux */
 577         SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM, 0, 0, &rt286_spo_mux),
 578         SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt286_hpo_mux),
 579
 580         SND_SOC_DAPM_SUPPLY("HP Power", RT286_SET_PIN_HPO,
 581                 RT286_SET_PIN_SFT, 0, NULL, 0),
 582
 583         /* Output Mixer */
 584         SND_SOC_DAPM_MIXER("Front", RT286_SET_POWER(RT286_DAC_OUT1), 0, 1,
 585                         rt286_front_mix, ARRAY_SIZE(rt286_front_mix)),
 586         SND_SOC_DAPM_PGA("Surround", RT286_SET_POWER(RT286_DAC_OUT2), 0, 1,
 587                         NULL, 0),
 588
 589         /* Output Pga */
 590         SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM, 0, 0,
 591                 &spo_enable_control, rt286_spk_event,
 592                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 593         SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0,
 594                 &hpol_enable_control),
 595         SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0,
 596                 &hpor_enable_control),
 597
 598         /* Output Lines */
 599         SND_SOC_DAPM_OUTPUT("SPOL"),
 600         SND_SOC_DAPM_OUTPUT("SPOR"),
 601         SND_SOC_DAPM_OUTPUT("HPO Pin"),
 602         SND_SOC_DAPM_OUTPUT("SPDIF"),
 603 };
 604
 605 static const struct snd_soc_dapm_route rt286_dapm_routes[] = {
 606         {"ADC 0", NULL, "MCLK MODE", is_mclk_mode},
 607         {"ADC 1", NULL, "MCLK MODE", is_mclk_mode},
 608         {"Front", NULL, "MCLK MODE", is_mclk_mode},
 609         {"Surround", NULL, "MCLK MODE", is_mclk_mode},
 610
 611         {"HP Power", NULL, "LDO1"},
 612         {"HP Power", NULL, "LDO2"},
 613
 614         {"MIC1", NULL, "LDO1"},
 615         {"MIC1", NULL, "LDO2"},
 616         {"MIC1", NULL, "HV"},
 617         {"MIC1", NULL, "VREF"},
 618         {"MIC1", NULL, "MIC1 Input Buffer"},
 619
 620         {"SPO", NULL, "LDO1"},
 621         {"SPO", NULL, "LDO2"},
 622         {"SPO", NULL, "HV"},
 623         {"SPO", NULL, "VREF"},
 624
 625         {"DMIC1", NULL, "DMIC1 Pin"},
 626         {"DMIC2", NULL, "DMIC2 Pin"},
 627         {"DMIC1", NULL, "DMIC Receiver"},
 628         {"DMIC2", NULL, "DMIC Receiver"},
 629
 630         {"RECMIX", "Beep Switch", "Beep"},
 631         {"RECMIX", "Line1 Switch", "LINE1"},
 632         {"RECMIX", "Mic1 Switch", "MIC1"},
 633
 634         {"ADC 0 Mux", "Dmic", "DMIC1"},
 635         {"ADC 0 Mux", "RECMIX", "RECMIX"},
 636         {"ADC 0 Mux", "Mic", "MIC1"},
 637         {"ADC 1 Mux", "Dmic", "DMIC2"},
 638         {"ADC 1 Mux", "RECMIX", "RECMIX"},
 639         {"ADC 1 Mux", "Mic", "MIC1"},
 640
 641         {"ADC 0", NULL, "ADC 0 Mux"},
 642         {"ADC 1", NULL, "ADC 1 Mux"},
 643
 644         {"AIF1TX", NULL, "ADC 0"},
 645         {"AIF2TX", NULL, "ADC 1"},
 646
 647         {"DAC 0", NULL, "AIF1RX"},
 648         {"DAC 1", NULL, "AIF2RX"},
 649
 650         {"Front", "DAC Switch", "DAC 0"},
 651         {"Front", "RECMIX Switch", "RECMIX"},
 652
 653         {"Surround", NULL, "DAC 1"},
 654
 655         {"SPK Mux", "Front", "Front"},
 656         {"SPK Mux", "Surround", "Surround"},
 657
 658         {"HPO Mux", "Front", "Front"},
 659         {"HPO Mux", "Surround", "Surround"},
 660
 661         {"SPO", "Switch", "SPK Mux"},
 662         {"HPO L", "Switch", "HPO Mux"},
 663         {"HPO R", "Switch", "HPO Mux"},
 664         {"HPO L", NULL, "HP Power"},
 665         {"HPO R", NULL, "HP Power"},
 666
 667         {"SPOL", NULL, "SPO"},
 668         {"SPOR", NULL, "SPO"},
 669         {"HPO Pin", NULL, "HPO L"},
 670         {"HPO Pin", NULL, "HPO R"},
 671 };
 672
 673 static int rt286_hw_params(struct snd_pcm_substream *substream,
 674                             struct snd_pcm_hw_params *params,
 675                             struct snd_soc_dai *dai)
 676 {
 677         struct snd_soc_codec *codec = dai->codec;
 678         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 679         unsigned int val = 0;
 680         int d_len_code;
 681
 682         switch (params_rate(params)) {
 683         /* bit 14 0:48K 1:44.1K */
 684         case 44100:
 685                 val |= 0x4000;
 686                 break;
 687         case 48000:
 688                 break;
 689         default:
 690                 dev_err(codec->dev, "Unsupported sample rate %d\n",
 691                                         params_rate(params));
 692                 return -EINVAL;
 693         }
 694         switch (rt286->sys_clk) {
 695         case 12288000:
 696         case 24576000:
 697                 if (params_rate(params) != 48000) {
 698                         dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
 699                                         params_rate(params), rt286->sys_clk);
 700                         return -EINVAL;
 701                 }
 702                 break;
 703         case 11289600:
 704         case 22579200:
 705                 if (params_rate(params) != 44100) {
 706                         dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
 707                                         params_rate(params), rt286->sys_clk);
 708                         return -EINVAL;
 709                 }
 710                 break;
 711         }
 712
 713         if (params_channels(params) <= 16) {
 714                 /* bit 3:0 Number of Channel */
 715                 val |= (params_channels(params) - 1);
 716         } else {
 717                 dev_err(codec->dev, "Unsupported channels %d\n",
 718                                         params_channels(params));
 719                 return -EINVAL;
 720         }
 721
 722         d_len_code = 0;
 723         switch (params_width(params)) {
 724         /* bit 6:4 Bits per Sample */
 725         case 16:
 726                 d_len_code = 0;
 727                 val |= (0x1 << 4);
 728                 break;
 729         case 32:
 730                 d_len_code = 2;
 731                 val |= (0x4 << 4);
 732                 break;
 733         case 20:
 734                 d_len_code = 1;
 735                 val |= (0x2 << 4);
 736                 break;
 737         case 24:
 738                 d_len_code = 2;
 739                 val |= (0x3 << 4);
 740                 break;
 741         case 8:
 742                 d_len_code = 3;
 743                 break;
 744         default:
 745                 return -EINVAL;
 746         }
 747
 748         snd_soc_update_bits(codec,
 749                 RT286_I2S_CTRL1, 0x0018, d_len_code << 3);
 750         dev_dbg(codec->dev, "format val = 0x%x\n", val);
 751
 752         snd_soc_update_bits(codec, RT286_DAC_FORMAT, 0x407f, val);
 753         snd_soc_update_bits(codec, RT286_ADC_FORMAT, 0x407f, val);
 754
 755         return 0;
 756 }
 757
 758 static int rt286_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 759 {
 760         struct snd_soc_codec *codec = dai->codec;
 761
 762         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 763         case SND_SOC_DAIFMT_CBM_CFM:
 764                 snd_soc_update_bits(codec,
 765                         RT286_I2S_CTRL1, 0x800, 0x800);
 766                 break;
 767         case SND_SOC_DAIFMT_CBS_CFS:
 768                 snd_soc_update_bits(codec,
 769                         RT286_I2S_CTRL1, 0x800, 0x0);
 770                 break;
 771         default:
 772                 return -EINVAL;
 773         }
 774
 775         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 776         case SND_SOC_DAIFMT_I2S:
 777                 snd_soc_update_bits(codec,
 778                         RT286_I2S_CTRL1, 0x300, 0x0);
 779                 break;
 780         case SND_SOC_DAIFMT_LEFT_J:
 781                 snd_soc_update_bits(codec,
 782                         RT286_I2S_CTRL1, 0x300, 0x1 << 8);
 783                 break;
 784         case SND_SOC_DAIFMT_DSP_A:
 785                 snd_soc_update_bits(codec,
 786                         RT286_I2S_CTRL1, 0x300, 0x2 << 8);
 787                 break;
 788         case SND_SOC_DAIFMT_DSP_B:
 789                 snd_soc_update_bits(codec,
 790                         RT286_I2S_CTRL1, 0x300, 0x3 << 8);
 791                 break;
 792         default:
 793                 return -EINVAL;
 794         }
 795         /* bit 15 Stream Type 0:PCM 1:Non-PCM */
 796         snd_soc_update_bits(codec, RT286_DAC_FORMAT, 0x8000, 0);
 797         snd_soc_update_bits(codec, RT286_ADC_FORMAT, 0x8000, 0);
 798
 799         return 0;
 800 }
 801
 802 static int rt286_set_dai_sysclk(struct snd_soc_dai *dai,
 803                                 int clk_id, unsigned int freq, int dir)
 804 {
 805         struct snd_soc_codec *codec = dai->codec;
 806         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 807
 808         dev_dbg(codec->dev, "%s freq=%d\n", __func__, freq);
 809
 810         if (RT286_SCLK_S_MCLK == clk_id) {
 811                 snd_soc_update_bits(codec,
 812                         RT286_I2S_CTRL2, 0x0100, 0x0);
 813                 snd_soc_update_bits(codec,
 814                         RT286_PLL_CTRL1, 0x20, 0x20);
 815         } else {
 816                 snd_soc_update_bits(codec,
 817                         RT286_I2S_CTRL2, 0x0100, 0x0100);
 818                 snd_soc_update_bits(codec,
 819                         RT286_PLL_CTRL, 0x4, 0x4);
 820                 snd_soc_update_bits(codec,
 821                         RT286_PLL_CTRL1, 0x20, 0x0);
 822         }
 823
 824         switch (freq) {
 825         case 19200000:
 826                 if (RT286_SCLK_S_MCLK == clk_id) {
 827                         dev_err(codec->dev, "Should not use MCLK\n");
 828                         return -EINVAL;
 829                 }
 830                 snd_soc_update_bits(codec,
 831                         RT286_I2S_CTRL2, 0x40, 0x40);
 832                 break;
 833         case 24000000:
 834                 if (RT286_SCLK_S_MCLK == clk_id) {
 835                         dev_err(codec->dev, "Should not use MCLK\n");
 836                         return -EINVAL;
 837                 }
 838                 snd_soc_update_bits(codec,
 839                         RT286_I2S_CTRL2, 0x40, 0x0);
 840                 break;
 841         case 12288000:
 842         case 11289600:
 843                 snd_soc_update_bits(codec,
 844                         RT286_I2S_CTRL2, 0x8, 0x0);
 845                 snd_soc_update_bits(codec,
 846                         RT286_CLK_DIV, 0xfc1e, 0x0004);
 847                 break;
 848         case 24576000:
 849         case 22579200:
 850                 snd_soc_update_bits(codec,
 851                         RT286_I2S_CTRL2, 0x8, 0x8);
 852                 snd_soc_update_bits(codec,
 853                         RT286_CLK_DIV, 0xfc1e, 0x5406);
 854                 break;
 855         default:
 856                 dev_err(codec->dev, "Unsupported system clock\n");
 857                 return -EINVAL;
 858         }
 859
 860         rt286->sys_clk = freq;
 861         rt286->clk_id = clk_id;
 862
 863         return 0;
 864 }
 865
 866 static int rt286_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
 867 {
 868         struct snd_soc_codec *codec = dai->codec;
 869
 870         dev_dbg(codec->dev, "%s ratio=%d\n", __func__, ratio);
 871         if (50 == ratio)
 872                 snd_soc_update_bits(codec,
 873                         RT286_I2S_CTRL1, 0x1000, 0x1000);
 874         else
 875                 snd_soc_update_bits(codec,
 876                         RT286_I2S_CTRL1, 0x1000, 0x0);
 877
 878
 879         return 0;
 880 }
 881
 882 static int rt286_set_bias_level(struct snd_soc_codec *codec,
 883                                  enum snd_soc_bias_level level)
 884 {
 885         switch (level) {
 886         case SND_SOC_BIAS_PREPARE:
 887                 if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) {
 888                         snd_soc_write(codec,
 889                                 RT286_SET_AUDIO_POWER, AC_PWRST_D0);
 890                         snd_soc_update_bits(codec,
 891                                 RT286_DC_GAIN, 0x200, 0x200);
 892                 }
 893                 break;
 894
 895         case SND_SOC_BIAS_ON:
 896                 mdelay(10);
 897                 snd_soc_update_bits(codec,
 898                         RT286_DC_GAIN, 0x200, 0x0);
 899
 900                 break;
 901
 902         case SND_SOC_BIAS_STANDBY:
 903                 snd_soc_write(codec,
 904                         RT286_SET_AUDIO_POWER, AC_PWRST_D3);
 905                 break;
 906
 907         default:
 908                 break;
 909         }
 910
 911         return 0;
 912 }
 913
 914 static irqreturn_t rt286_irq(int irq, void *data)
 915 {
 916         struct rt286_priv *rt286 = data;
 917         bool hp = false;
 918         bool mic = false;
 919         int status = 0;
 920
 921         rt286_jack_detect(rt286, &hp, &mic);
 922
 923         /* Clear IRQ */
 924         regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x1, 0x1);
 925
 926         if (hp == true)
 927                 status |= SND_JACK_HEADPHONE;
 928
 929         if (mic == true)
 930                 status |= SND_JACK_MICROPHONE;
 931
 932         snd_soc_jack_report(rt286->jack, status,
 933                 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 934
 935         pm_wakeup_event(&rt286->i2c->dev, 300);
 936
 937         return IRQ_HANDLED;
 938 }
 939
 940 static int rt286_probe(struct snd_soc_codec *codec)
 941 {
 942         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 943
 944         rt286->codec = codec;
 945
 946         if (rt286->i2c->irq) {
 947                 regmap_update_bits(rt286->regmap,
 948                                         RT286_IRQ_CTRL, 0x2, 0x2);
 949
 950                 INIT_DELAYED_WORK(&rt286->jack_detect_work,
 951                                         rt286_jack_detect_work);
 952                 schedule_delayed_work(&rt286->jack_detect_work,
 953                                         msecs_to_jiffies(1250));
 954         }
 955
 956         return 0;
 957 }
 958
 959 static int rt286_remove(struct snd_soc_codec *codec)
 960 {
 961         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 962
 963         cancel_delayed_work_sync(&rt286->jack_detect_work);
 964
 965         return 0;
 966 }
 967
 968 #ifdef CONFIG_PM
 969 static int rt286_suspend(struct snd_soc_codec *codec)
 970 {
 971         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 972
 973         regcache_cache_only(rt286->regmap, true);
 974         regcache_mark_dirty(rt286->regmap);
 975
 976         return 0;
 977 }
 978
 979 static int rt286_resume(struct snd_soc_codec *codec)
 980 {
 981         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 982
 983         regcache_cache_only(rt286->regmap, false);
 984         rt286_index_sync(codec);
 985         regcache_sync(rt286->regmap);
 986
 987         return 0;
 988 }
 989 #else
 990 #define rt286_suspend NULL
 991 #define rt286_resume NULL
 992 #endif
 993
 994 #define RT286_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
 995 #define RT286_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
 996                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
 997
 998 static const struct snd_soc_dai_ops rt286_aif_dai_ops = {
 999         .hw_params = rt286_hw_params,
1000         .set_fmt = rt286_set_dai_fmt,
1001         .set_sysclk = rt286_set_dai_sysclk,
1002         .set_bclk_ratio = rt286_set_bclk_ratio,
1003 };
1004
1005 static struct snd_soc_dai_driver rt286_dai[] = {
1006         {
1007                 .name = "rt286-aif1",
1008                 .id = RT286_AIF1,
1009                 .playback = {
1010                         .stream_name = "AIF1 Playback",
1011                         .channels_min = 1,
1012                         .channels_max = 2,
1013                         .rates = RT286_STEREO_RATES,
1014                         .formats = RT286_FORMATS,
1015                 },
1016                 .capture = {
1017                         .stream_name = "AIF1 Capture",
1018                         .channels_min = 1,
1019                         .channels_max = 2,
1020                         .rates = RT286_STEREO_RATES,
1021                         .formats = RT286_FORMATS,
1022                 },
1023                 .ops = &rt286_aif_dai_ops,
1024                 .symmetric_rates = 1,
1025         },
1026         {
1027                 .name = "rt286-aif2",
1028                 .id = RT286_AIF2,
1029                 .playback = {
1030                         .stream_name = "AIF2 Playback",
1031                         .channels_min = 1,
1032                         .channels_max = 2,
1033                         .rates = RT286_STEREO_RATES,
1034                         .formats = RT286_FORMATS,
1035                 },
1036                 .capture = {
1037                         .stream_name = "AIF2 Capture",
1038                         .channels_min = 1,
1039                         .channels_max = 2,
1040                         .rates = RT286_STEREO_RATES,
1041                         .formats = RT286_FORMATS,
1042                 },
1043                 .ops = &rt286_aif_dai_ops,
1044                 .symmetric_rates = 1,
1045         },
1046
1047 };
1048
1049 static struct snd_soc_codec_driver soc_codec_dev_rt286 = {
1050         .probe = rt286_probe,
1051         .remove = rt286_remove,
1052         .suspend = rt286_suspend,
1053         .resume = rt286_resume,
1054         .set_bias_level = rt286_set_bias_level,
1055         .idle_bias_off = true,
1056         .controls = rt286_snd_controls,
1057         .num_controls = ARRAY_SIZE(rt286_snd_controls),
1058         .dapm_widgets = rt286_dapm_widgets,
1059         .num_dapm_widgets = ARRAY_SIZE(rt286_dapm_widgets),
1060         .dapm_routes = rt286_dapm_routes,
1061         .num_dapm_routes = ARRAY_SIZE(rt286_dapm_routes),
1062 };
1063
1064 static const struct regmap_config rt286_regmap = {
1065         .reg_bits = 32,
1066         .val_bits = 32,
1067         .max_register = 0x02370100,
1068         .volatile_reg = rt286_volatile_register,
1069         .readable_reg = rt286_readable_register,
1070         .reg_write = rl6347a_hw_write,
1071         .reg_read = rl6347a_hw_read,
1072         .cache_type = REGCACHE_RBTREE,
1073         .reg_defaults = rt286_reg,
1074         .num_reg_defaults = ARRAY_SIZE(rt286_reg),
1075 };
1076
1077 static const struct i2c_device_id rt286_i2c_id[] = {
1078         {"rt286", 0},
1079         {"rt288", 0},
1080         {}
1081 };
1082 MODULE_DEVICE_TABLE(i2c, rt286_i2c_id);
1083
1084 static const struct acpi_device_id rt286_acpi_match[] = {
1085         { "INT343A", 0 },
1086         {},
1087 };
1088 MODULE_DEVICE_TABLE(acpi, rt286_acpi_match);
1089
1090 static const struct dmi_system_id force_combo_jack_table[] = {
1091         {
1092                 .ident = "Intel Wilson Beach",
1093                 .matches = {
1094                         DMI_MATCH(DMI_BOARD_NAME, "Wilson Beach SDS")
1095                 }
1096         },
1097         {
1098                 .ident = "Intel Skylake RVP",
1099                 .matches = {
1100                         DMI_MATCH(DMI_PRODUCT_NAME, "Skylake Client platform")
1101                 }
1102         },
1103         { }
1104 };
1105
1106 static const struct dmi_system_id dmi_dell_dino[] = {
1107         {
1108                 .ident = "Dell Dino",
1109                 .matches = {
1110                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
1111                         DMI_MATCH(DMI_PRODUCT_NAME, "XPS 13 9343")
1112                 }
1113         },
1114         { }
1115 };
1116
1117 static int rt286_i2c_probe(struct i2c_client *i2c,
1118                            const struct i2c_device_id *id)
1119 {
1120         struct rt286_platform_data *pdata = dev_get_platdata(&i2c->dev);
1121         struct rt286_priv *rt286;
1122         int i, ret, val;
1123
1124         rt286 = devm_kzalloc(&i2c->dev, sizeof(*rt286),
1125                                 GFP_KERNEL);
1126         if (NULL == rt286)
1127                 return -ENOMEM;
1128
1129         rt286->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt286_regmap);
1130         if (IS_ERR(rt286->regmap)) {
1131                 ret = PTR_ERR(rt286->regmap);
1132                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1133                         ret);
1134                 return ret;
1135         }
1136
1137         ret = regmap_read(rt286->regmap,
1138                 RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &val);
1139         if (ret != 0) {
1140                 dev_err(&i2c->dev, "I2C error %d\n", ret);
1141                 return ret;
1142         }
1143         if (val != RT286_VENDOR_ID && val != RT288_VENDOR_ID) {
1144                 dev_err(&i2c->dev,
1145                         "Device with ID register %#x is not rt286\n", val);
1146                 return -ENODEV;
1147         }
1148
1149         rt286->index_cache = devm_kmemdup(&i2c->dev, rt286_index_def,
1150                                           sizeof(rt286_index_def), GFP_KERNEL);
1151         if (!rt286->index_cache)
1152                 return -ENOMEM;
1153
1154         rt286->index_cache_size = INDEX_CACHE_SIZE;
1155         rt286->i2c = i2c;
1156         i2c_set_clientdata(i2c, rt286);
1157
1158         /* restore codec default */
1159         for (i = 0; i < INDEX_CACHE_SIZE; i++)
1160                 regmap_write(rt286->regmap, rt286->index_cache[i].reg,
1161                                 rt286->index_cache[i].def);
1162         for (i = 0; i < ARRAY_SIZE(rt286_reg); i++)
1163                 regmap_write(rt286->regmap, rt286_reg[i].reg,
1164                                 rt286_reg[i].def);
1165
1166         if (pdata)
1167                 rt286->pdata = *pdata;
1168
1169         if (dmi_check_system(force_combo_jack_table) ||
1170                 dmi_check_system(dmi_dell_dino))
1171                 rt286->pdata.cbj_en = true;
1172
1173         regmap_write(rt286->regmap, RT286_SET_AUDIO_POWER, AC_PWRST_D3);
1174
1175         for (i = 0; i < RT286_POWER_REG_LEN; i++)
1176                 regmap_write(rt286->regmap,
1177                         RT286_SET_POWER(rt286_support_power_controls[i]),
1178                         AC_PWRST_D1);
1179
1180         if (!rt286->pdata.cbj_en) {
1181                 regmap_write(rt286->regmap, RT286_CBJ_CTRL2, 0x0000);
1182                 regmap_write(rt286->regmap, RT286_MIC1_DET_CTRL, 0x0816);
1183                 regmap_update_bits(rt286->regmap,
1184                                         RT286_CBJ_CTRL1, 0xf000, 0xb000);
1185         } else {
1186                 regmap_update_bits(rt286->regmap,
1187                                         RT286_CBJ_CTRL1, 0xf000, 0x5000);
1188         }
1189
1190         mdelay(10);
1191
1192         if (!rt286->pdata.gpio2_en)
1193                 regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0x4000);
1194         else
1195                 regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0);
1196
1197         mdelay(10);
1198
1199         regmap_write(rt286->regmap, RT286_MISC_CTRL1, 0x0000);
1200         /* Power down LDO, VREF */
1201         regmap_update_bits(rt286->regmap, RT286_POWER_CTRL2, 0xc, 0x0);
1202         regmap_update_bits(rt286->regmap, RT286_POWER_CTRL1, 0x1001, 0x1001);
1203
1204         /* Set depop parameter */
1205         regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL2, 0x403a, 0x401a);
1206         regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL3, 0xf777, 0x4737);
1207         regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL4, 0x00ff, 0x003f);
1208
1209         if (dmi_check_system(dmi_dell_dino)) {
1210                 regmap_update_bits(rt286->regmap,
1211                         RT286_SET_GPIO_MASK, 0x40, 0x40);
1212                 regmap_update_bits(rt286->regmap,
1213                         RT286_SET_GPIO_DIRECTION, 0x40, 0x40);
1214                 regmap_update_bits(rt286->regmap,
1215                         RT286_SET_GPIO_DATA, 0x40, 0x40);
1216                 regmap_update_bits(rt286->regmap,
1217                         RT286_GPIO_CTRL, 0xc, 0x8);
1218         }
1219
1220         if (rt286->i2c->irq) {
1221                 ret = request_threaded_irq(rt286->i2c->irq, NULL, rt286_irq,
1222                         IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt286", rt286);
1223                 if (ret != 0) {
1224                         dev_err(&i2c->dev,
1225                                 "Failed to reguest IRQ: %d\n", ret);
1226                         return ret;
1227                 }
1228         }
1229
1230         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt286,
1231                                      rt286_dai, ARRAY_SIZE(rt286_dai));
1232
1233         return ret;
1234 }
1235
1236 static int rt286_i2c_remove(struct i2c_client *i2c)
1237 {
1238         struct rt286_priv *rt286 = i2c_get_clientdata(i2c);
1239
1240         if (i2c->irq)
1241                 free_irq(i2c->irq, rt286);
1242         snd_soc_unregister_codec(&i2c->dev);
1243
1244         return 0;
1245 }
1246
1247
1248 static struct i2c_driver rt286_i2c_driver = {
1249         .driver = {
1250                    .name = "rt286",
1251                    .acpi_match_table = ACPI_PTR(rt286_acpi_match),
1252                    },
1253         .probe = rt286_i2c_probe,
1254         .remove = rt286_i2c_remove,
1255         .id_table = rt286_i2c_id,
1256 };
1257
1258 module_i2c_driver(rt286_i2c_driver);
1259
1260 MODULE_DESCRIPTION("ASoC RT286 driver");
1261 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1262 MODULE_LICENSE("GPL");