ASoC: rt5665: fix wrong register for bclk ratio control
[sfrench/cifs-2.6.git] / sound / soc / codecs / rl6231.h
1 /*
2  * rl6231.h - RL6231 class device shared support
3  *
4  * Copyright 2014 Realtek Semiconductor Corp.
5  *
6  * Author: Oder Chiou <oder_chiou@realtek.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12
13 #ifndef __RL6231_H__
14 #define __RL6231_H__
15
16 #define RL6231_PLL_INP_MAX      40000000
17 #define RL6231_PLL_INP_MIN      256000
18 #define RL6231_PLL_N_MAX        0x1ff
19 #define RL6231_PLL_K_MAX        0x1f
20 #define RL6231_PLL_M_MAX        0xf
21
22 struct rl6231_pll_code {
23         bool m_bp; /* Indicates bypass m code or not. */
24         int m_code;
25         int n_code;
26         int k_code;
27 };
28
29 int rl6231_calc_dmic_clk(int rate);
30 int rl6231_pll_calc(const unsigned int freq_in,
31         const unsigned int freq_out, struct rl6231_pll_code *pll_code);
32 int rl6231_get_clk_info(int sclk, int rate);
33 int rl6231_get_pre_div(struct regmap *map, unsigned int reg, int sft);
34
35 #endif /* __RL6231_H__ */