ASoC: amd: add acp3x system resume pm op
[sfrench/cifs-2.6.git] / sound / soc / amd / raven / acp3x-pcm-dma.c
1 /*
2  * AMD ALSA SoC PCM Driver
3  *
4  * Copyright 2016 Advanced Micro Devices, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  */
15
16 #include <linux/platform_device.h>
17 #include <linux/module.h>
18 #include <linux/err.h>
19 #include <linux/io.h>
20 #include <linux/pm_runtime.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/soc.h>
24 #include <sound/soc-dai.h>
25
26 #include "acp3x.h"
27
28 #define DRV_NAME "acp3x-i2s-audio"
29
30 struct i2s_dev_data {
31         bool tdm_mode;
32         unsigned int i2s_irq;
33         u32 tdm_fmt;
34         void __iomem *acp3x_base;
35         struct snd_pcm_substream *play_stream;
36         struct snd_pcm_substream *capture_stream;
37 };
38
39 struct i2s_stream_instance {
40         u16 num_pages;
41         u16 channels;
42         u32 xfer_resolution;
43         struct page *pg;
44         void __iomem *acp3x_base;
45 };
46
47 static const struct snd_pcm_hardware acp3x_pcm_hardware_playback = {
48         .info = SNDRV_PCM_INFO_INTERLEAVED |
49                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
50                 SNDRV_PCM_INFO_BATCH |
51                 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
52         .formats = SNDRV_PCM_FMTBIT_S16_LE |  SNDRV_PCM_FMTBIT_S8 |
53                    SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
54                    SNDRV_PCM_FMTBIT_S32_LE,
55         .channels_min = 2,
56         .channels_max = 8,
57         .rates = SNDRV_PCM_RATE_8000_96000,
58         .rate_min = 8000,
59         .rate_max = 96000,
60         .buffer_bytes_max = PLAYBACK_MAX_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE,
61         .period_bytes_min = PLAYBACK_MIN_PERIOD_SIZE,
62         .period_bytes_max = PLAYBACK_MAX_PERIOD_SIZE,
63         .periods_min = PLAYBACK_MIN_NUM_PERIODS,
64         .periods_max = PLAYBACK_MAX_NUM_PERIODS,
65 };
66
67 static const struct snd_pcm_hardware acp3x_pcm_hardware_capture = {
68         .info = SNDRV_PCM_INFO_INTERLEAVED |
69                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
70                 SNDRV_PCM_INFO_BATCH |
71             SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
72         .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
73                    SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
74                    SNDRV_PCM_FMTBIT_S32_LE,
75         .channels_min = 2,
76         .channels_max = 2,
77         .rates = SNDRV_PCM_RATE_8000_48000,
78         .rate_min = 8000,
79         .rate_max = 48000,
80         .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE,
81         .period_bytes_min = CAPTURE_MIN_PERIOD_SIZE,
82         .period_bytes_max = CAPTURE_MAX_PERIOD_SIZE,
83         .periods_min = CAPTURE_MIN_NUM_PERIODS,
84         .periods_max = CAPTURE_MAX_NUM_PERIODS,
85 };
86
87 static int acp3x_power_on(void __iomem *acp3x_base, bool on)
88 {
89         u16 val, mask;
90         u32 timeout;
91
92         if (on == true) {
93                 val = 1;
94                 mask = ACP3x_POWER_ON;
95         } else {
96                 val = 0;
97                 mask = ACP3x_POWER_OFF;
98         }
99
100         rv_writel(val, acp3x_base + mmACP_PGFSM_CONTROL);
101         timeout = 0;
102         while (true) {
103                 val = rv_readl(acp3x_base + mmACP_PGFSM_STATUS);
104                 if ((val & ACP3x_POWER_OFF_IN_PROGRESS) == mask)
105                         break;
106                 if (timeout > 100) {
107                         pr_err("ACP3x power state change failure\n");
108                         return -ENODEV;
109                 }
110                 timeout++;
111                 cpu_relax();
112         }
113         return 0;
114 }
115
116 static int acp3x_reset(void __iomem *acp3x_base)
117 {
118         u32 val, timeout;
119
120         rv_writel(1, acp3x_base + mmACP_SOFT_RESET);
121         timeout = 0;
122         while (true) {
123                 val = rv_readl(acp3x_base + mmACP_SOFT_RESET);
124                 if ((val & ACP3x_SOFT_RESET__SoftResetAudDone_MASK) ||
125                      timeout > 100) {
126                         if (val & ACP3x_SOFT_RESET__SoftResetAudDone_MASK)
127                                 break;
128                         return -ENODEV;
129                 }
130                 timeout++;
131                 cpu_relax();
132         }
133
134         rv_writel(0, acp3x_base + mmACP_SOFT_RESET);
135         timeout = 0;
136         while (true) {
137                 val = rv_readl(acp3x_base + mmACP_SOFT_RESET);
138                 if (!val || timeout > 100) {
139                         if (!val)
140                                 break;
141                         return -ENODEV;
142                 }
143                 timeout++;
144                 cpu_relax();
145         }
146         return 0;
147 }
148
149 static int acp3x_init(void __iomem *acp3x_base)
150 {
151         int ret;
152
153         /* power on */
154         ret = acp3x_power_on(acp3x_base, true);
155         if (ret) {
156                 pr_err("ACP3x power on failed\n");
157                 return ret;
158         }
159         /* Reset */
160         ret = acp3x_reset(acp3x_base);
161         if (ret) {
162                 pr_err("ACP3x reset failed\n");
163                 return ret;
164         }
165         return 0;
166 }
167
168 static int acp3x_deinit(void __iomem *acp3x_base)
169 {
170         int ret;
171
172         /* Reset */
173         ret = acp3x_reset(acp3x_base);
174         if (ret) {
175                 pr_err("ACP3x reset failed\n");
176                 return ret;
177         }
178         /* power off */
179         ret = acp3x_power_on(acp3x_base, false);
180         if (ret) {
181                 pr_err("ACP3x power off failed\n");
182                 return ret;
183         }
184         return 0;
185 }
186
187 static irqreturn_t i2s_irq_handler(int irq, void *dev_id)
188 {
189         u16 play_flag, cap_flag;
190         u32 val;
191         struct i2s_dev_data *rv_i2s_data = dev_id;
192
193         if (!rv_i2s_data)
194                 return IRQ_NONE;
195
196         play_flag = 0;
197         cap_flag = 0;
198         val = rv_readl(rv_i2s_data->acp3x_base + mmACP_EXTERNAL_INTR_STAT);
199         if ((val & BIT(BT_TX_THRESHOLD)) && rv_i2s_data->play_stream) {
200                 rv_writel(BIT(BT_TX_THRESHOLD), rv_i2s_data->acp3x_base +
201                           mmACP_EXTERNAL_INTR_STAT);
202                 snd_pcm_period_elapsed(rv_i2s_data->play_stream);
203                 play_flag = 1;
204         }
205
206         if ((val & BIT(BT_RX_THRESHOLD)) && rv_i2s_data->capture_stream) {
207                 rv_writel(BIT(BT_RX_THRESHOLD), rv_i2s_data->acp3x_base +
208                           mmACP_EXTERNAL_INTR_STAT);
209                 snd_pcm_period_elapsed(rv_i2s_data->capture_stream);
210                 cap_flag = 1;
211         }
212
213         if (play_flag | cap_flag)
214                 return IRQ_HANDLED;
215         else
216                 return IRQ_NONE;
217 }
218
219 static void config_acp3x_dma(struct i2s_stream_instance *rtd, int direction)
220 {
221         u16 page_idx;
222         u64 addr;
223         u32 low, high, val, acp_fifo_addr;
224         struct page *pg = rtd->pg;
225
226         /* 8 scratch registers used to map one 64 bit address */
227         if (direction == SNDRV_PCM_STREAM_PLAYBACK)
228                 val = 0;
229         else
230                 val = rtd->num_pages * 8;
231
232         /* Group Enable */
233         rv_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp3x_base +
234                   mmACPAXI2AXI_ATU_BASE_ADDR_GRP_1);
235         rv_writel(PAGE_SIZE_4K_ENABLE, rtd->acp3x_base +
236                   mmACPAXI2AXI_ATU_PAGE_SIZE_GRP_1);
237
238         for (page_idx = 0; page_idx < rtd->num_pages; page_idx++) {
239                 /* Load the low address of page int ACP SRAM through SRBM */
240                 addr = page_to_phys(pg);
241                 low = lower_32_bits(addr);
242                 high = upper_32_bits(addr);
243
244                 rv_writel(low, rtd->acp3x_base + mmACP_SCRATCH_REG_0 + val);
245                 high |= BIT(31);
246                 rv_writel(high, rtd->acp3x_base + mmACP_SCRATCH_REG_0 + val
247                                 + 4);
248                 /* Move to next physically contiguos page */
249                 val += 8;
250                 pg++;
251         }
252
253         if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
254                 /* Config ringbuffer */
255                 rv_writel(MEM_WINDOW_START, rtd->acp3x_base +
256                           mmACP_BT_TX_RINGBUFADDR);
257                 rv_writel(MAX_BUFFER, rtd->acp3x_base +
258                           mmACP_BT_TX_RINGBUFSIZE);
259                 rv_writel(DMA_SIZE, rtd->acp3x_base + mmACP_BT_TX_DMA_SIZE);
260
261                 /* Config audio fifo */
262                 acp_fifo_addr = ACP_SRAM_PTE_OFFSET + (rtd->num_pages * 8)
263                                 + PLAYBACK_FIFO_ADDR_OFFSET;
264                 rv_writel(acp_fifo_addr, rtd->acp3x_base +
265                           mmACP_BT_TX_FIFOADDR);
266                 rv_writel(FIFO_SIZE, rtd->acp3x_base + mmACP_BT_TX_FIFOSIZE);
267         } else {
268                 /* Config ringbuffer */
269                 rv_writel(MEM_WINDOW_START + MAX_BUFFER, rtd->acp3x_base +
270                           mmACP_BT_RX_RINGBUFADDR);
271                 rv_writel(MAX_BUFFER, rtd->acp3x_base +
272                           mmACP_BT_RX_RINGBUFSIZE);
273                 rv_writel(DMA_SIZE, rtd->acp3x_base + mmACP_BT_RX_DMA_SIZE);
274
275                 /* Config audio fifo */
276                 acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
277                                 (rtd->num_pages * 8) + CAPTURE_FIFO_ADDR_OFFSET;
278                 rv_writel(acp_fifo_addr, rtd->acp3x_base +
279                           mmACP_BT_RX_FIFOADDR);
280                 rv_writel(FIFO_SIZE, rtd->acp3x_base + mmACP_BT_RX_FIFOSIZE);
281         }
282
283         /* Enable  watermark/period interrupt to host */
284         rv_writel(BIT(BT_TX_THRESHOLD) | BIT(BT_RX_THRESHOLD),
285                   rtd->acp3x_base + mmACP_EXTERNAL_INTR_CNTL);
286 }
287
288 static int acp3x_dma_open(struct snd_pcm_substream *substream)
289 {
290         int ret = 0;
291
292         struct snd_pcm_runtime *runtime = substream->runtime;
293         struct snd_soc_pcm_runtime *prtd = substream->private_data;
294         struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd,
295                                                                     DRV_NAME);
296         struct i2s_dev_data *adata = dev_get_drvdata(component->dev);
297
298         struct i2s_stream_instance *i2s_data = kzalloc(sizeof(struct i2s_stream_instance),
299                                                        GFP_KERNEL);
300         if (!i2s_data)
301                 return -EINVAL;
302
303         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
304                 runtime->hw = acp3x_pcm_hardware_playback;
305         else
306                 runtime->hw = acp3x_pcm_hardware_capture;
307
308         ret = snd_pcm_hw_constraint_integer(runtime,
309                                             SNDRV_PCM_HW_PARAM_PERIODS);
310         if (ret < 0) {
311                 dev_err(component->dev, "set integer constraint failed\n");
312                 return ret;
313         }
314
315         if (!adata->play_stream && !adata->capture_stream)
316                 rv_writel(1, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
317
318         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
319                 adata->play_stream = substream;
320         else
321                 adata->capture_stream = substream;
322
323         i2s_data->acp3x_base = adata->acp3x_base;
324         runtime->private_data = i2s_data;
325         return 0;
326 }
327
328 static int acp3x_dma_hw_params(struct snd_pcm_substream *substream,
329                                struct snd_pcm_hw_params *params)
330 {
331         int status;
332         u64 size;
333         struct snd_dma_buffer *dma_buffer;
334         struct page *pg;
335         struct snd_pcm_runtime *runtime = substream->runtime;
336         struct i2s_stream_instance *rtd = runtime->private_data;
337
338         if (!rtd)
339                 return -EINVAL;
340
341         dma_buffer = &substream->dma_buffer;
342         size = params_buffer_bytes(params);
343         status = snd_pcm_lib_malloc_pages(substream, size);
344         if (status < 0)
345                 return status;
346
347         memset(substream->runtime->dma_area, 0, params_buffer_bytes(params));
348         pg = virt_to_page(substream->dma_buffer.area);
349         if (pg) {
350                 rtd->pg = pg;
351                 rtd->num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT);
352                 config_acp3x_dma(rtd, substream->stream);
353                 status = 0;
354         } else {
355                 status = -ENOMEM;
356         }
357         return status;
358 }
359
360 static snd_pcm_uframes_t acp3x_dma_pointer(struct snd_pcm_substream *substream)
361 {
362         u32 pos = 0;
363         struct i2s_stream_instance *rtd = substream->runtime->private_data;
364
365         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
366                 pos = rv_readl(rtd->acp3x_base +
367                                mmACP_BT_TX_LINKPOSITIONCNTR);
368         else
369                 pos = rv_readl(rtd->acp3x_base +
370                                mmACP_BT_RX_LINKPOSITIONCNTR);
371
372         if (pos >= MAX_BUFFER)
373                 pos = 0;
374
375         return bytes_to_frames(substream->runtime, pos);
376 }
377
378 static int acp3x_dma_new(struct snd_soc_pcm_runtime *rtd)
379 {
380         return snd_pcm_lib_preallocate_pages_for_all(rtd->pcm,
381                                                      SNDRV_DMA_TYPE_DEV,
382                                                      NULL, MIN_BUFFER,
383                                                      MAX_BUFFER);
384 }
385
386 static int acp3x_dma_hw_free(struct snd_pcm_substream *substream)
387 {
388         return snd_pcm_lib_free_pages(substream);
389 }
390
391 static int acp3x_dma_mmap(struct snd_pcm_substream *substream,
392                           struct vm_area_struct *vma)
393 {
394         return snd_pcm_lib_default_mmap(substream, vma);
395 }
396
397 static int acp3x_dma_close(struct snd_pcm_substream *substream)
398 {
399         struct snd_soc_pcm_runtime *prtd = substream->private_data;
400         struct i2s_stream_instance *rtd = substream->runtime->private_data;
401         struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd,
402                                                                     DRV_NAME);
403         struct i2s_dev_data *adata = dev_get_drvdata(component->dev);
404
405         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
406                 adata->play_stream = NULL;
407         else
408                 adata->capture_stream = NULL;
409
410         /* Disable ACP irq, when the current stream is being closed and
411          * another stream is also not active.
412          */
413         if (!adata->play_stream && !adata->capture_stream)
414                 rv_writel(0, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
415         kfree(rtd);
416         return 0;
417 }
418
419 static struct snd_pcm_ops acp3x_dma_ops = {
420         .open = acp3x_dma_open,
421         .close = acp3x_dma_close,
422         .ioctl = snd_pcm_lib_ioctl,
423         .hw_params = acp3x_dma_hw_params,
424         .hw_free = acp3x_dma_hw_free,
425         .pointer = acp3x_dma_pointer,
426         .mmap = acp3x_dma_mmap,
427 };
428
429
430 static int acp3x_dai_i2s_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
431 {
432
433         struct i2s_dev_data *adata = snd_soc_dai_get_drvdata(cpu_dai);
434
435         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
436         case SND_SOC_DAIFMT_I2S:
437                 adata->tdm_mode = false;
438                 break;
439         case SND_SOC_DAIFMT_DSP_A:
440                 adata->tdm_mode = true;
441                 break;
442         default:
443                 return -EINVAL;
444         }
445
446         return 0;
447 }
448
449 static int acp3x_dai_set_tdm_slot(struct snd_soc_dai *cpu_dai, u32 tx_mask,
450                                   u32 rx_mask, int slots, int slot_width)
451 {
452         u32 val = 0;
453         u16 slot_len;
454
455         struct i2s_dev_data *adata = snd_soc_dai_get_drvdata(cpu_dai);
456
457         switch (slot_width) {
458         case SLOT_WIDTH_8:
459                 slot_len = 8;
460                 break;
461         case SLOT_WIDTH_16:
462                 slot_len = 16;
463                 break;
464         case SLOT_WIDTH_24:
465                 slot_len = 24;
466                 break;
467         case SLOT_WIDTH_32:
468                 slot_len = 0;
469                 break;
470         default:
471                 return -EINVAL;
472         }
473
474         val = rv_readl(adata->acp3x_base + mmACP_BTTDM_ITER);
475         rv_writel((val | 0x2), adata->acp3x_base + mmACP_BTTDM_ITER);
476         val = rv_readl(adata->acp3x_base + mmACP_BTTDM_IRER);
477         rv_writel((val | 0x2), adata->acp3x_base + mmACP_BTTDM_IRER);
478
479         val = (FRM_LEN | (slots << 15) | (slot_len << 18));
480         rv_writel(val, adata->acp3x_base + mmACP_BTTDM_TXFRMT);
481         rv_writel(val, adata->acp3x_base + mmACP_BTTDM_RXFRMT);
482
483         adata->tdm_fmt = val;
484         return 0;
485 }
486
487 static int acp3x_dai_i2s_hwparams(struct snd_pcm_substream *substream,
488                                   struct snd_pcm_hw_params *params,
489                                   struct snd_soc_dai *dai)
490 {
491         u32 val = 0;
492         struct i2s_stream_instance *rtd = substream->runtime->private_data;
493
494         switch (params_format(params)) {
495         case SNDRV_PCM_FORMAT_U8:
496         case SNDRV_PCM_FORMAT_S8:
497                 rtd->xfer_resolution = 0x0;
498                 break;
499         case SNDRV_PCM_FORMAT_S16_LE:
500                 rtd->xfer_resolution = 0x02;
501                 break;
502         case SNDRV_PCM_FORMAT_S24_LE:
503                 rtd->xfer_resolution = 0x04;
504                 break;
505         case SNDRV_PCM_FORMAT_S32_LE:
506                 rtd->xfer_resolution = 0x05;
507                 break;
508         default:
509                 return -EINVAL;
510         }
511         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER);
512         val = val | (rtd->xfer_resolution  << 3);
513         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
514                 rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_ITER);
515         else
516                 rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_IRER);
517
518         return 0;
519 }
520
521 static int acp3x_dai_i2s_trigger(struct snd_pcm_substream *substream,
522                                  int cmd, struct snd_soc_dai *dai)
523 {
524         int ret = 0;
525         struct i2s_stream_instance *rtd = substream->runtime->private_data;
526         u32 val, period_bytes;
527
528         period_bytes = frames_to_bytes(substream->runtime,
529                                        substream->runtime->period_size);
530         switch (cmd) {
531         case SNDRV_PCM_TRIGGER_START:
532         case SNDRV_PCM_TRIGGER_RESUME:
533         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
534                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
535                         rv_writel(period_bytes, rtd->acp3x_base +
536                                   mmACP_BT_TX_INTR_WATERMARK_SIZE);
537                         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER);
538                         val = val | BIT(0);
539                         rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_ITER);
540                 } else {
541                         rv_writel(period_bytes, rtd->acp3x_base +
542                                   mmACP_BT_RX_INTR_WATERMARK_SIZE);
543                         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_IRER);
544                         val = val | BIT(0);
545                         rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_IRER);
546                 }
547                 rv_writel(1, rtd->acp3x_base + mmACP_BTTDM_IER);
548                 break;
549         case SNDRV_PCM_TRIGGER_STOP:
550         case SNDRV_PCM_TRIGGER_SUSPEND:
551         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
552                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
553                         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER);
554                         val = val & ~BIT(0);
555                         rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_ITER);
556                 } else {
557                         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_IRER);
558                         val = val & ~BIT(0);
559                         rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_IRER);
560                 }
561                 rv_writel(0, rtd->acp3x_base + mmACP_BTTDM_IER);
562                 break;
563         default:
564                 ret = -EINVAL;
565                 break;
566         }
567
568         return ret;
569 }
570
571 struct snd_soc_dai_ops acp3x_dai_i2s_ops = {
572         .hw_params = acp3x_dai_i2s_hwparams,
573         .trigger   = acp3x_dai_i2s_trigger,
574         .set_fmt = acp3x_dai_i2s_set_fmt,
575         .set_tdm_slot = acp3x_dai_set_tdm_slot,
576 };
577
578 static struct snd_soc_dai_driver acp3x_i2s_dai_driver = {
579         .playback = {
580                 .rates = SNDRV_PCM_RATE_8000_96000,
581                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
582                                         SNDRV_PCM_FMTBIT_U8 |
583                                         SNDRV_PCM_FMTBIT_S24_LE |
584                                         SNDRV_PCM_FMTBIT_S32_LE,
585                 .channels_min = 2,
586                 .channels_max = 8,
587
588                 .rate_min = 8000,
589                 .rate_max = 96000,
590         },
591         .capture = {
592                 .rates = SNDRV_PCM_RATE_8000_48000,
593                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
594                                         SNDRV_PCM_FMTBIT_U8 |
595                                         SNDRV_PCM_FMTBIT_S24_LE |
596                                         SNDRV_PCM_FMTBIT_S32_LE,
597                 .channels_min = 2,
598                 .channels_max = 2,
599                 .rate_min = 8000,
600                 .rate_max = 48000,
601         },
602         .ops = &acp3x_dai_i2s_ops,
603 };
604
605 static const struct snd_soc_component_driver acp3x_i2s_component = {
606         .name           = DRV_NAME,
607         .ops            = &acp3x_dma_ops,
608         .pcm_new        = acp3x_dma_new,
609 };
610
611 static int acp3x_audio_probe(struct platform_device *pdev)
612 {
613         int status;
614         struct resource *res;
615         struct i2s_dev_data *adata;
616         unsigned int irqflags;
617
618         if (!pdev->dev.platform_data) {
619                 dev_err(&pdev->dev, "platform_data not retrieved\n");
620                 return -ENODEV;
621         }
622         irqflags = *((unsigned int *)(pdev->dev.platform_data));
623
624         adata = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dev_data),
625                              GFP_KERNEL);
626         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
627         if (!res) {
628                 dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
629                         return -ENODEV;
630         }
631
632         adata->acp3x_base = devm_ioremap(&pdev->dev, res->start,
633                                          resource_size(res));
634
635         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
636         if (!res) {
637                 dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
638                 return -ENODEV;
639         }
640
641         adata->i2s_irq = res->start;
642         adata->play_stream = NULL;
643         adata->capture_stream = NULL;
644
645         dev_set_drvdata(&pdev->dev, adata);
646         /* Initialize ACP */
647         status = acp3x_init(adata->acp3x_base);
648         if (status)
649                 return -ENODEV;
650         status = devm_snd_soc_register_component(&pdev->dev,
651                                                  &acp3x_i2s_component,
652                                                  &acp3x_i2s_dai_driver, 1);
653         if (status) {
654                 dev_err(&pdev->dev, "Fail to register acp i2s dai\n");
655                 goto dev_err;
656         }
657         status = devm_request_irq(&pdev->dev, adata->i2s_irq, i2s_irq_handler,
658                                   irqflags, "ACP3x_I2S_IRQ", adata);
659         if (status) {
660                 dev_err(&pdev->dev, "ACP3x I2S IRQ request failed\n");
661                 goto dev_err;
662         }
663
664         pm_runtime_set_autosuspend_delay(&pdev->dev, 10000);
665         pm_runtime_use_autosuspend(&pdev->dev);
666         pm_runtime_enable(&pdev->dev);
667         return 0;
668 dev_err:
669         status = acp3x_deinit(adata->acp3x_base);
670         if (status)
671                 dev_err(&pdev->dev, "ACP de-init failed\n");
672         else
673                 dev_info(&pdev->dev, "ACP de-initialized\n");
674         /*ignore device status and return driver probe error*/
675         return -ENODEV;
676 }
677
678 static int acp3x_audio_remove(struct platform_device *pdev)
679 {
680         int ret;
681         struct i2s_dev_data *adata = dev_get_drvdata(&pdev->dev);
682
683         ret = acp3x_deinit(adata->acp3x_base);
684         if (ret)
685                 dev_err(&pdev->dev, "ACP de-init failed\n");
686         else
687                 dev_info(&pdev->dev, "ACP de-initialized\n");
688
689         pm_runtime_disable(&pdev->dev);
690         return 0;
691 }
692
693 static int acp3x_resume(struct device *dev)
694 {
695         int status;
696         u32 val;
697         struct i2s_dev_data *adata = dev_get_drvdata(dev);
698
699         status = acp3x_init(adata->acp3x_base);
700         if (status)
701                 return -ENODEV;
702
703         if (adata->play_stream && adata->play_stream->runtime) {
704                 struct i2s_stream_instance *rtd =
705                         adata->play_stream->runtime->private_data;
706                 config_acp3x_dma(rtd, SNDRV_PCM_STREAM_PLAYBACK);
707                 rv_writel((rtd->xfer_resolution  << 3),
708                           rtd->acp3x_base + mmACP_BTTDM_ITER);
709                 if (adata->tdm_mode == true) {
710                         rv_writel(adata->tdm_fmt, adata->acp3x_base +
711                                   mmACP_BTTDM_TXFRMT);
712                         val = rv_readl(adata->acp3x_base + mmACP_BTTDM_ITER);
713                         rv_writel((val | 0x2), adata->acp3x_base +
714                                   mmACP_BTTDM_ITER);
715                 }
716         }
717
718         if (adata->capture_stream && adata->capture_stream->runtime) {
719                 struct i2s_stream_instance *rtd =
720                         adata->capture_stream->runtime->private_data;
721                 config_acp3x_dma(rtd, SNDRV_PCM_STREAM_CAPTURE);
722                 rv_writel((rtd->xfer_resolution  << 3),
723                           rtd->acp3x_base + mmACP_BTTDM_IRER);
724                 if (adata->tdm_mode == true) {
725                         rv_writel(adata->tdm_fmt, adata->acp3x_base +
726                                   mmACP_BTTDM_RXFRMT);
727                         val = rv_readl(adata->acp3x_base + mmACP_BTTDM_IRER);
728                         rv_writel((val | 0x2), adata->acp3x_base +
729                                   mmACP_BTTDM_IRER);
730                 }
731         }
732
733         rv_writel(1, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
734         return 0;
735 }
736
737
738 static int acp3x_pcm_runtime_suspend(struct device *dev)
739 {
740         int status;
741         struct i2s_dev_data *adata = dev_get_drvdata(dev);
742
743         status = acp3x_deinit(adata->acp3x_base);
744         if (status)
745                 dev_err(dev, "ACP de-init failed\n");
746         else
747                 dev_info(dev, "ACP de-initialized\n");
748
749         rv_writel(0, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
750
751         return 0;
752 }
753
754 static int acp3x_pcm_runtime_resume(struct device *dev)
755 {
756         int status;
757         struct i2s_dev_data *adata = dev_get_drvdata(dev);
758
759         status = acp3x_init(adata->acp3x_base);
760         if (status)
761                 return -ENODEV;
762         rv_writel(1, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
763         return 0;
764 }
765
766 static const struct dev_pm_ops acp3x_pm_ops = {
767         .runtime_suspend = acp3x_pcm_runtime_suspend,
768         .runtime_resume = acp3x_pcm_runtime_resume,
769         .resume = acp3x_resume,
770 };
771
772 static struct platform_driver acp3x_dma_driver = {
773         .probe = acp3x_audio_probe,
774         .remove = acp3x_audio_remove,
775         .driver = {
776                 .name = "acp3x_rv_i2s",
777                 .pm = &acp3x_pm_ops,
778         },
779 };
780
781 module_platform_driver(acp3x_dma_driver);
782
783 MODULE_AUTHOR("Maruthi.Bayyavarapu@amd.com");
784 MODULE_AUTHOR("Vijendar.Mukunda@amd.com");
785 MODULE_DESCRIPTION("AMD ACP 3.x PCM Driver");
786 MODULE_LICENSE("GPL v2");
787 MODULE_ALIAS("platform:" DRV_NAME);