3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9 * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
12 * Wu Fengguang <wfg@linux.intel.com>
15 * Wu Fengguang <wfg@linux.intel.com>
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the Free
19 * Software Foundation; either version 2 of the License, or (at your option)
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
24 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software Foundation,
29 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/slab.h>
35 #include <linux/module.h>
36 #include <sound/core.h>
37 #include <sound/jack.h>
38 #include <sound/asoundef.h>
39 #include <sound/tlv.h>
40 #include "hda_codec.h"
41 #include "hda_local.h"
44 static bool static_hdmi_pcm;
45 module_param(static_hdmi_pcm, bool, 0644);
46 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
48 #define is_haswell(codec) ((codec)->vendor_id == 0x80862807)
49 #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
51 struct hdmi_spec_per_cvt {
54 unsigned int channels_min;
55 unsigned int channels_max;
61 /* max. connections to a widget */
62 #define HDA_MAX_CONNECTIONS 32
64 struct hdmi_spec_per_pin {
67 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
70 struct hda_codec *codec;
71 struct hdmi_eld sink_eld;
73 struct delayed_work work;
74 struct snd_kcontrol *eld_ctl;
76 bool setup; /* the stream has been set up by prepare callback */
77 int channels; /* current number of channels */
79 bool chmap_set; /* channel-map override by ALSA API? */
80 unsigned char chmap[8]; /* ALSA API channel-map */
81 char pcm_name[8]; /* filled in build_pcm callbacks */
83 struct snd_info_entry *proc_entry;
87 struct cea_channel_speaker_allocation;
89 /* operations used by generic code that can be overridden by patches */
91 int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
92 unsigned char *buf, int *eld_size);
94 /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
95 int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
97 int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
98 int asp_slot, int channel);
100 void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
101 int ca, int active_channels, int conn_type);
103 /* enable/disable HBR (HD passthrough) */
104 int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
106 int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
107 hda_nid_t pin_nid, u32 stream_tag, int format);
109 /* Helpers for producing the channel map TLVs. These can be overridden
110 * for devices that have non-standard mapping requirements. */
111 int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
113 void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
114 unsigned int *chmap, int channels);
116 /* check that the user-given chmap is supported */
117 int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
122 struct snd_array cvts; /* struct hdmi_spec_per_cvt */
123 hda_nid_t cvt_nids[4]; /* only for haswell fix */
126 struct snd_array pins; /* struct hdmi_spec_per_pin */
127 struct snd_array pcm_rec; /* struct hda_pcm */
128 unsigned int channels_max; /* max over all cvts */
130 struct hdmi_eld temp_eld;
133 * Non-generic VIA/NVIDIA specific
135 struct hda_multi_out multiout;
136 struct hda_pcm_stream pcm_playback;
140 struct hdmi_audio_infoframe {
147 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
151 u8 LFEPBL01_LSV36_DM_INH7;
154 struct dp_audio_infoframe {
157 u8 ver; /* 0x11 << 2 */
159 u8 CC02_CT47; /* match with HDMI infoframe from this on */
163 u8 LFEPBL01_LSV36_DM_INH7;
166 union audio_infoframe {
167 struct hdmi_audio_infoframe hdmi;
168 struct dp_audio_infoframe dp;
173 * CEA speaker placement:
176 * FLW FL FLC FC FRC FR FRW
183 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
184 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
186 enum cea_speaker_placement {
187 FL = (1 << 0), /* Front Left */
188 FC = (1 << 1), /* Front Center */
189 FR = (1 << 2), /* Front Right */
190 FLC = (1 << 3), /* Front Left Center */
191 FRC = (1 << 4), /* Front Right Center */
192 RL = (1 << 5), /* Rear Left */
193 RC = (1 << 6), /* Rear Center */
194 RR = (1 << 7), /* Rear Right */
195 RLC = (1 << 8), /* Rear Left Center */
196 RRC = (1 << 9), /* Rear Right Center */
197 LFE = (1 << 10), /* Low Frequency Effect */
198 FLW = (1 << 11), /* Front Left Wide */
199 FRW = (1 << 12), /* Front Right Wide */
200 FLH = (1 << 13), /* Front Left High */
201 FCH = (1 << 14), /* Front Center High */
202 FRH = (1 << 15), /* Front Right High */
203 TC = (1 << 16), /* Top Center */
207 * ELD SA bits in the CEA Speaker Allocation data block
209 static int eld_speaker_allocation_bits[] = {
217 /* the following are not defined in ELD yet */
224 struct cea_channel_speaker_allocation {
228 /* derived values, just for convenience */
236 * surround40 surround41 surround50 surround51 surround71
237 * ch0 front left = = = =
238 * ch1 front right = = = =
239 * ch2 rear left = = = =
240 * ch3 rear right = = = =
241 * ch4 LFE center center center
246 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
248 static int hdmi_channel_mapping[0x32][8] = {
250 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
252 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
254 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
256 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
258 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
260 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
262 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
264 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
266 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
270 * This is an ordered list!
272 * The preceding ones have better chances to be selected by
273 * hdmi_channel_allocation().
275 static struct cea_channel_speaker_allocation channel_allocations[] = {
276 /* channel: 7 6 5 4 3 2 1 0 */
277 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
279 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
281 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
283 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
285 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
287 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
289 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
291 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
293 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
295 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
296 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
297 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
298 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
299 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
300 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
301 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
302 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
303 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
304 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
305 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
306 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
307 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
308 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
309 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
310 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
311 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
312 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
313 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
314 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
315 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
316 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
317 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
318 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
319 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
320 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
321 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
322 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
323 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
324 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
325 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
326 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
327 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
328 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
329 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
330 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
331 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
332 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
333 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
334 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
335 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
343 #define get_pin(spec, idx) \
344 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
345 #define get_cvt(spec, idx) \
346 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
347 #define get_pcm_rec(spec, idx) \
348 ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
350 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
354 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
355 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
358 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
362 static int hinfo_to_pin_index(struct hdmi_spec *spec,
363 struct hda_pcm_stream *hinfo)
367 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
368 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
371 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
375 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
379 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
380 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
383 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
387 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
388 struct snd_ctl_elem_info *uinfo)
390 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
391 struct hdmi_spec *spec = codec->spec;
392 struct hdmi_spec_per_pin *per_pin;
393 struct hdmi_eld *eld;
396 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
398 pin_idx = kcontrol->private_value;
399 per_pin = get_pin(spec, pin_idx);
400 eld = &per_pin->sink_eld;
402 mutex_lock(&per_pin->lock);
403 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
404 mutex_unlock(&per_pin->lock);
409 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
410 struct snd_ctl_elem_value *ucontrol)
412 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
413 struct hdmi_spec *spec = codec->spec;
414 struct hdmi_spec_per_pin *per_pin;
415 struct hdmi_eld *eld;
418 pin_idx = kcontrol->private_value;
419 per_pin = get_pin(spec, pin_idx);
420 eld = &per_pin->sink_eld;
422 mutex_lock(&per_pin->lock);
423 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
424 mutex_unlock(&per_pin->lock);
429 memset(ucontrol->value.bytes.data, 0,
430 ARRAY_SIZE(ucontrol->value.bytes.data));
432 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
434 mutex_unlock(&per_pin->lock);
439 static struct snd_kcontrol_new eld_bytes_ctl = {
440 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
441 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
443 .info = hdmi_eld_ctl_info,
444 .get = hdmi_eld_ctl_get,
447 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
450 struct snd_kcontrol *kctl;
451 struct hdmi_spec *spec = codec->spec;
454 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
457 kctl->private_value = pin_idx;
458 kctl->id.device = device;
460 err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
464 get_pin(spec, pin_idx)->eld_ctl = kctl;
469 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
470 int *packet_index, int *byte_index)
474 val = snd_hda_codec_read(codec, pin_nid, 0,
475 AC_VERB_GET_HDMI_DIP_INDEX, 0);
477 *packet_index = val >> 5;
478 *byte_index = val & 0x1f;
482 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
483 int packet_index, int byte_index)
487 val = (packet_index << 5) | (byte_index & 0x1f);
489 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
492 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
495 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
498 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
501 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
502 snd_hda_codec_write(codec, pin_nid, 0,
503 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
504 /* Enable pin out: some machines with GM965 gets broken output when
505 * the pin is disabled or changed while using with HDMI
507 snd_hda_codec_write(codec, pin_nid, 0,
508 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
511 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
513 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
514 AC_VERB_GET_CVT_CHAN_COUNT, 0);
517 static void hdmi_set_channel_count(struct hda_codec *codec,
518 hda_nid_t cvt_nid, int chs)
520 if (chs != hdmi_get_channel_count(codec, cvt_nid))
521 snd_hda_codec_write(codec, cvt_nid, 0,
522 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
529 #ifdef CONFIG_PROC_FS
530 static void print_eld_info(struct snd_info_entry *entry,
531 struct snd_info_buffer *buffer)
533 struct hdmi_spec_per_pin *per_pin = entry->private_data;
535 mutex_lock(&per_pin->lock);
536 snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
537 mutex_unlock(&per_pin->lock);
540 static void write_eld_info(struct snd_info_entry *entry,
541 struct snd_info_buffer *buffer)
543 struct hdmi_spec_per_pin *per_pin = entry->private_data;
545 mutex_lock(&per_pin->lock);
546 snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
547 mutex_unlock(&per_pin->lock);
550 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
553 struct hda_codec *codec = per_pin->codec;
554 struct snd_info_entry *entry;
557 snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
558 err = snd_card_proc_new(codec->bus->card, name, &entry);
562 snd_info_set_text_ops(entry, per_pin, print_eld_info);
563 entry->c.text.write = write_eld_info;
564 entry->mode |= S_IWUSR;
565 per_pin->proc_entry = entry;
570 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
572 if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
573 snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
574 per_pin->proc_entry = NULL;
578 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
583 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
589 * Channel mapping routines
593 * Compute derived values in channel_allocations[].
595 static void init_channel_allocations(void)
598 struct cea_channel_speaker_allocation *p;
600 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
601 p = channel_allocations + i;
604 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
605 if (p->speakers[j]) {
607 p->spk_mask |= p->speakers[j];
612 static int get_channel_allocation_order(int ca)
616 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
617 if (channel_allocations[i].ca_index == ca)
624 * The transformation takes two steps:
626 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
627 * spk_mask => (channel_allocations[]) => ai->CA
629 * TODO: it could select the wrong CA from multiple candidates.
631 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
636 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
639 * CA defaults to 0 for basic stereo audio
645 * expand ELD's speaker allocation mask
647 * ELD tells the speaker mask in a compact(paired) form,
648 * expand ELD's notions to match the ones used by Audio InfoFrame.
650 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
651 if (eld->info.spk_alloc & (1 << i))
652 spk_mask |= eld_speaker_allocation_bits[i];
655 /* search for the first working match in the CA table */
656 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
657 if (channels == channel_allocations[i].channels &&
658 (spk_mask & channel_allocations[i].spk_mask) ==
659 channel_allocations[i].spk_mask) {
660 ca = channel_allocations[i].ca_index;
666 /* if there was no match, select the regular ALSA channel
667 * allocation with the matching number of channels */
668 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
669 if (channels == channel_allocations[i].channels) {
670 ca = channel_allocations[i].ca_index;
676 snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
677 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
683 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
686 #ifdef CONFIG_SND_DEBUG_VERBOSE
687 struct hdmi_spec *spec = codec->spec;
691 for (i = 0; i < 8; i++) {
692 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
693 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
699 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
704 struct hdmi_spec *spec = codec->spec;
705 struct cea_channel_speaker_allocation *ch_alloc;
709 int non_pcm_mapping[8];
711 order = get_channel_allocation_order(ca);
712 ch_alloc = &channel_allocations[order];
714 if (hdmi_channel_mapping[ca][1] == 0) {
716 /* fill actual channel mappings in ALSA channel (i) order */
717 for (i = 0; i < ch_alloc->channels; i++) {
718 while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
719 hdmi_slot++; /* skip zero slots */
721 hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
723 /* fill the rest of the slots with ALSA channel 0xf */
724 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
725 if (!ch_alloc->speakers[7 - hdmi_slot])
726 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
730 for (i = 0; i < ch_alloc->channels; i++)
731 non_pcm_mapping[i] = (i << 4) | i;
733 non_pcm_mapping[i] = (0xf << 4) | i;
736 for (i = 0; i < 8; i++) {
737 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
738 int hdmi_slot = slotsetup & 0x0f;
739 int channel = (slotsetup & 0xf0) >> 4;
740 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
742 snd_printdd(KERN_NOTICE
743 "HDMI: channel mapping failed\n");
749 struct channel_map_table {
750 unsigned char map; /* ALSA API channel map position */
751 int spk_mask; /* speaker position bit mask */
754 static struct channel_map_table map_tables[] = {
755 { SNDRV_CHMAP_FL, FL },
756 { SNDRV_CHMAP_FR, FR },
757 { SNDRV_CHMAP_RL, RL },
758 { SNDRV_CHMAP_RR, RR },
759 { SNDRV_CHMAP_LFE, LFE },
760 { SNDRV_CHMAP_FC, FC },
761 { SNDRV_CHMAP_RLC, RLC },
762 { SNDRV_CHMAP_RRC, RRC },
763 { SNDRV_CHMAP_RC, RC },
764 { SNDRV_CHMAP_FLC, FLC },
765 { SNDRV_CHMAP_FRC, FRC },
766 { SNDRV_CHMAP_FLH, FLH },
767 { SNDRV_CHMAP_FRH, FRH },
768 { SNDRV_CHMAP_FLW, FLW },
769 { SNDRV_CHMAP_FRW, FRW },
770 { SNDRV_CHMAP_TC, TC },
771 { SNDRV_CHMAP_FCH, FCH },
775 /* from ALSA API channel position to speaker bit mask */
776 static int to_spk_mask(unsigned char c)
778 struct channel_map_table *t = map_tables;
779 for (; t->map; t++) {
786 /* from ALSA API channel position to CEA slot */
787 static int to_cea_slot(int ordered_ca, unsigned char pos)
789 int mask = to_spk_mask(pos);
793 for (i = 0; i < 8; i++) {
794 if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
802 /* from speaker bit mask to ALSA API channel position */
803 static int spk_to_chmap(int spk)
805 struct channel_map_table *t = map_tables;
806 for (; t->map; t++) {
807 if (t->spk_mask == spk)
813 /* from CEA slot to ALSA API channel position */
814 static int from_cea_slot(int ordered_ca, unsigned char slot)
816 int mask = channel_allocations[ordered_ca].speakers[7 - slot];
818 return spk_to_chmap(mask);
821 /* get the CA index corresponding to the given ALSA API channel map */
822 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
824 int i, spks = 0, spk_mask = 0;
826 for (i = 0; i < chs; i++) {
827 int mask = to_spk_mask(map[i]);
834 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
835 if ((chs == channel_allocations[i].channels ||
836 spks == channel_allocations[i].channels) &&
837 (spk_mask & channel_allocations[i].spk_mask) ==
838 channel_allocations[i].spk_mask)
839 return channel_allocations[i].ca_index;
844 /* set up the channel slots for the given ALSA API channel map */
845 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
847 int chs, unsigned char *map,
850 struct hdmi_spec *spec = codec->spec;
851 int ordered_ca = get_channel_allocation_order(ca);
852 int alsa_pos, hdmi_slot;
853 int assignments[8] = {[0 ... 7] = 0xf};
855 for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
857 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
860 continue; /* unassigned channel */
862 assignments[hdmi_slot] = alsa_pos;
865 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
868 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
869 assignments[hdmi_slot]);
876 /* store ALSA API channel map from the current default map */
877 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
880 int ordered_ca = get_channel_allocation_order(ca);
881 for (i = 0; i < 8; i++) {
882 if (i < channel_allocations[ordered_ca].channels)
883 map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
889 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
890 hda_nid_t pin_nid, bool non_pcm, int ca,
891 int channels, unsigned char *map,
894 if (!non_pcm && chmap_set) {
895 hdmi_manual_setup_channel_mapping(codec, pin_nid,
898 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
899 hdmi_setup_fake_chmap(map, ca);
902 hdmi_debug_channel_mapping(codec, pin_nid);
905 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
906 int asp_slot, int channel)
908 return snd_hda_codec_write(codec, pin_nid, 0,
909 AC_VERB_SET_HDMI_CHAN_SLOT,
910 (channel << 4) | asp_slot);
913 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
916 return (snd_hda_codec_read(codec, pin_nid, 0,
917 AC_VERB_GET_HDMI_CHAN_SLOT,
918 asp_slot) & 0xf0) >> 4;
922 * Audio InfoFrame routines
926 * Enable Audio InfoFrame Transmission
928 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
931 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
932 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
937 * Disable Audio InfoFrame Transmission
939 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
942 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
943 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
947 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
949 #ifdef CONFIG_SND_DEBUG_VERBOSE
953 size = snd_hdmi_get_eld_size(codec, pin_nid);
954 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
956 for (i = 0; i < 8; i++) {
957 size = snd_hda_codec_read(codec, pin_nid, 0,
958 AC_VERB_GET_HDMI_DIP_SIZE, i);
959 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
964 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
970 for (i = 0; i < 8; i++) {
971 size = snd_hda_codec_read(codec, pin_nid, 0,
972 AC_VERB_GET_HDMI_DIP_SIZE, i);
976 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
977 for (j = 1; j < 1000; j++) {
978 hdmi_write_dip_byte(codec, pin_nid, 0x0);
979 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
981 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
983 if (bi == 0) /* byte index wrapped around */
987 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
993 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
995 u8 *bytes = (u8 *)hdmi_ai;
999 hdmi_ai->checksum = 0;
1001 for (i = 0; i < sizeof(*hdmi_ai); i++)
1004 hdmi_ai->checksum = -sum;
1007 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1013 hdmi_debug_dip_size(codec, pin_nid);
1014 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1016 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1017 for (i = 0; i < size; i++)
1018 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1021 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1027 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1031 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1032 for (i = 0; i < size; i++) {
1033 val = snd_hda_codec_read(codec, pin_nid, 0,
1034 AC_VERB_GET_HDMI_DIP_DATA, 0);
1042 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1044 int ca, int active_channels,
1047 union audio_infoframe ai;
1049 if (conn_type == 0) { /* HDMI */
1050 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1052 hdmi_ai->type = 0x84;
1053 hdmi_ai->ver = 0x01;
1054 hdmi_ai->len = 0x0a;
1055 hdmi_ai->CC02_CT47 = active_channels - 1;
1057 hdmi_checksum_audio_infoframe(hdmi_ai);
1058 } else if (conn_type == 1) { /* DisplayPort */
1059 struct dp_audio_infoframe *dp_ai = &ai.dp;
1063 dp_ai->ver = 0x11 << 2;
1064 dp_ai->CC02_CT47 = active_channels - 1;
1067 snd_printd("HDMI: unknown connection type at pin %d\n",
1073 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1074 * sizeof(*dp_ai) to avoid partial match/update problems when
1075 * the user switches between HDMI/DP monitors.
1077 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1079 snd_printdd("hdmi_pin_setup_infoframe: "
1080 "pin=%d channels=%d ca=0x%02x\n",
1082 active_channels, ca);
1083 hdmi_stop_infoframe_trans(codec, pin_nid);
1084 hdmi_fill_audio_infoframe(codec, pin_nid,
1085 ai.bytes, sizeof(ai));
1086 hdmi_start_infoframe_trans(codec, pin_nid);
1090 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1091 struct hdmi_spec_per_pin *per_pin,
1094 struct hdmi_spec *spec = codec->spec;
1095 hda_nid_t pin_nid = per_pin->pin_nid;
1096 int channels = per_pin->channels;
1097 int active_channels;
1098 struct hdmi_eld *eld;
1104 if (is_haswell(codec))
1105 snd_hda_codec_write(codec, pin_nid, 0,
1106 AC_VERB_SET_AMP_GAIN_MUTE,
1109 eld = &per_pin->sink_eld;
1110 if (!eld->monitor_present)
1113 if (!non_pcm && per_pin->chmap_set)
1114 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1116 ca = hdmi_channel_allocation(eld, channels);
1120 ordered_ca = get_channel_allocation_order(ca);
1121 active_channels = channel_allocations[ordered_ca].channels;
1123 hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1126 * always configure channel mapping, it may have been changed by the
1127 * user in the meantime
1129 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1130 channels, per_pin->chmap,
1131 per_pin->chmap_set);
1133 spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1134 eld->info.conn_type);
1136 per_pin->non_pcm = non_pcm;
1140 * Unsolicited events
1143 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1145 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1147 struct hdmi_spec *spec = codec->spec;
1148 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1151 struct hda_jack_tbl *jack;
1152 int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1154 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1157 pin_nid = jack->nid;
1158 jack->jack_dirty = 1;
1160 _snd_printd(SND_PR_VERBOSE,
1161 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1162 codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1163 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1165 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
1169 hdmi_present_sense(get_pin(spec, pin_idx), 1);
1170 snd_hda_jack_report_sync(codec);
1173 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1175 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1176 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1177 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1178 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1181 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1196 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1198 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1199 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1201 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1202 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1207 hdmi_intrinsic_event(codec, res);
1209 hdmi_non_intrinsic_event(codec, res);
1212 static void haswell_verify_D0(struct hda_codec *codec,
1213 hda_nid_t cvt_nid, hda_nid_t nid)
1217 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1218 * thus pins could only choose converter 0 for use. Make sure the
1219 * converters are in correct power state */
1220 if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1221 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1223 if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1224 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1227 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1228 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1229 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1237 /* HBR should be Non-PCM, 8 channels */
1238 #define is_hbr_format(format) \
1239 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1241 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1244 int pinctl, new_pinctl;
1246 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1247 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1248 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1250 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1252 new_pinctl |= AC_PINCTL_EPT_HBR;
1254 new_pinctl |= AC_PINCTL_EPT_NATIVE;
1256 snd_printdd("hdmi_pin_hbr_setup: "
1257 "NID=0x%x, %spinctl=0x%x\n",
1259 pinctl == new_pinctl ? "" : "new-",
1262 if (pinctl != new_pinctl)
1263 snd_hda_codec_write(codec, pin_nid, 0,
1264 AC_VERB_SET_PIN_WIDGET_CONTROL,
1272 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1273 hda_nid_t pin_nid, u32 stream_tag, int format)
1275 struct hdmi_spec *spec = codec->spec;
1278 if (is_haswell(codec))
1279 haswell_verify_D0(codec, cvt_nid, pin_nid);
1281 err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1284 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1288 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1292 static int hdmi_choose_cvt(struct hda_codec *codec,
1293 int pin_idx, int *cvt_id, int *mux_id)
1295 struct hdmi_spec *spec = codec->spec;
1296 struct hdmi_spec_per_pin *per_pin;
1297 struct hdmi_spec_per_cvt *per_cvt = NULL;
1298 int cvt_idx, mux_idx = 0;
1300 per_pin = get_pin(spec, pin_idx);
1302 /* Dynamically assign converter to stream */
1303 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1304 per_cvt = get_cvt(spec, cvt_idx);
1306 /* Must not already be assigned */
1307 if (per_cvt->assigned)
1309 /* Must be in pin's mux's list of converters */
1310 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1311 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1313 /* Not in mux list */
1314 if (mux_idx == per_pin->num_mux_nids)
1319 /* No free converters */
1320 if (cvt_idx == spec->num_cvts)
1331 static void not_share_unassigned_cvt(struct hda_codec *codec,
1332 hda_nid_t pin_nid, int mux_idx)
1334 struct hdmi_spec *spec = codec->spec;
1335 hda_nid_t nid, end_nid;
1337 struct hdmi_spec_per_cvt *per_cvt;
1339 /* configure all pins, including "no physical connection" ones */
1340 end_nid = codec->start_nid + codec->num_nodes;
1341 for (nid = codec->start_nid; nid < end_nid; nid++) {
1342 unsigned int wid_caps = get_wcaps(codec, nid);
1343 unsigned int wid_type = get_wcaps_type(wid_caps);
1345 if (wid_type != AC_WID_PIN)
1351 curr = snd_hda_codec_read(codec, nid, 0,
1352 AC_VERB_GET_CONNECT_SEL, 0);
1353 if (curr != mux_idx)
1356 /* choose an unassigned converter. The conveters in the
1357 * connection list are in the same order as in the codec.
1359 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1360 per_cvt = get_cvt(spec, cvt_idx);
1361 if (!per_cvt->assigned) {
1362 snd_printdd("choose cvt %d for pin nid %d\n",
1364 snd_hda_codec_write_cache(codec, nid, 0,
1365 AC_VERB_SET_CONNECT_SEL,
1376 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1377 struct hda_codec *codec,
1378 struct snd_pcm_substream *substream)
1380 struct hdmi_spec *spec = codec->spec;
1381 struct snd_pcm_runtime *runtime = substream->runtime;
1382 int pin_idx, cvt_idx, mux_idx = 0;
1383 struct hdmi_spec_per_pin *per_pin;
1384 struct hdmi_eld *eld;
1385 struct hdmi_spec_per_cvt *per_cvt = NULL;
1388 /* Validate hinfo */
1389 pin_idx = hinfo_to_pin_index(spec, hinfo);
1390 if (snd_BUG_ON(pin_idx < 0))
1392 per_pin = get_pin(spec, pin_idx);
1393 eld = &per_pin->sink_eld;
1395 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1399 per_cvt = get_cvt(spec, cvt_idx);
1400 /* Claim converter */
1401 per_cvt->assigned = 1;
1402 per_pin->cvt_nid = per_cvt->cvt_nid;
1403 hinfo->nid = per_cvt->cvt_nid;
1405 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1406 AC_VERB_SET_CONNECT_SEL,
1409 /* configure unused pins to choose other converters */
1410 if (is_haswell(codec) || is_valleyview(codec))
1411 not_share_unassigned_cvt(codec, per_pin->pin_nid, mux_idx);
1413 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1415 /* Initially set the converter's capabilities */
1416 hinfo->channels_min = per_cvt->channels_min;
1417 hinfo->channels_max = per_cvt->channels_max;
1418 hinfo->rates = per_cvt->rates;
1419 hinfo->formats = per_cvt->formats;
1420 hinfo->maxbps = per_cvt->maxbps;
1422 /* Restrict capabilities by ELD if this isn't disabled */
1423 if (!static_hdmi_pcm && eld->eld_valid) {
1424 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1425 if (hinfo->channels_min > hinfo->channels_max ||
1426 !hinfo->rates || !hinfo->formats) {
1427 per_cvt->assigned = 0;
1429 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1434 /* Store the updated parameters */
1435 runtime->hw.channels_min = hinfo->channels_min;
1436 runtime->hw.channels_max = hinfo->channels_max;
1437 runtime->hw.formats = hinfo->formats;
1438 runtime->hw.rates = hinfo->rates;
1440 snd_pcm_hw_constraint_step(substream->runtime, 0,
1441 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1446 * HDA/HDMI auto parsing
1448 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1450 struct hdmi_spec *spec = codec->spec;
1451 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1452 hda_nid_t pin_nid = per_pin->pin_nid;
1454 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1455 snd_printk(KERN_WARNING
1456 "HDMI: pin %d wcaps %#x "
1457 "does not support connection list\n",
1458 pin_nid, get_wcaps(codec, pin_nid));
1462 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1464 HDA_MAX_CONNECTIONS);
1469 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1471 struct hda_codec *codec = per_pin->codec;
1472 struct hdmi_spec *spec = codec->spec;
1473 struct hdmi_eld *eld = &spec->temp_eld;
1474 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1475 hda_nid_t pin_nid = per_pin->pin_nid;
1477 * Always execute a GetPinSense verb here, even when called from
1478 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1479 * response's PD bit is not the real PD value, but indicates that
1480 * the real PD value changed. An older version of the HD-audio
1481 * specification worked this way. Hence, we just ignore the data in
1482 * the unsolicited response to avoid custom WARs.
1484 int present = snd_hda_pin_sense(codec, pin_nid);
1485 bool update_eld = false;
1486 bool eld_changed = false;
1488 mutex_lock(&per_pin->lock);
1489 pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1490 if (pin_eld->monitor_present)
1491 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1493 eld->eld_valid = false;
1495 _snd_printd(SND_PR_VERBOSE,
1496 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1497 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1499 if (eld->eld_valid) {
1500 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1501 &eld->eld_size) < 0)
1502 eld->eld_valid = false;
1504 memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1505 if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1507 eld->eld_valid = false;
1510 if (eld->eld_valid) {
1511 snd_hdmi_show_eld(&eld->info);
1515 queue_delayed_work(codec->bus->workq,
1517 msecs_to_jiffies(300));
1522 if (pin_eld->eld_valid && !eld->eld_valid) {
1527 bool old_eld_valid = pin_eld->eld_valid;
1528 pin_eld->eld_valid = eld->eld_valid;
1529 eld_changed = pin_eld->eld_size != eld->eld_size ||
1530 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1531 eld->eld_size) != 0;
1533 memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1535 pin_eld->eld_size = eld->eld_size;
1536 pin_eld->info = eld->info;
1539 * Re-setup pin and infoframe. This is needed e.g. when
1540 * - sink is first plugged-in (infoframe is not set up if !monitor_present)
1541 * - transcoder can change during stream playback on Haswell
1543 if (eld->eld_valid && !old_eld_valid && per_pin->setup)
1544 hdmi_setup_audio_infoframe(codec, per_pin,
1549 snd_ctl_notify(codec->bus->card,
1550 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1551 &per_pin->eld_ctl->id);
1553 mutex_unlock(&per_pin->lock);
1556 static void hdmi_repoll_eld(struct work_struct *work)
1558 struct hdmi_spec_per_pin *per_pin =
1559 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1561 if (per_pin->repoll_count++ > 6)
1562 per_pin->repoll_count = 0;
1564 hdmi_present_sense(per_pin, per_pin->repoll_count);
1567 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1570 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1572 struct hdmi_spec *spec = codec->spec;
1573 unsigned int caps, config;
1575 struct hdmi_spec_per_pin *per_pin;
1578 caps = snd_hda_query_pin_caps(codec, pin_nid);
1579 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1582 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1583 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1586 if (is_haswell(codec))
1587 intel_haswell_fixup_connect_list(codec, pin_nid);
1589 pin_idx = spec->num_pins;
1590 per_pin = snd_array_new(&spec->pins);
1594 per_pin->pin_nid = pin_nid;
1595 per_pin->non_pcm = false;
1597 err = hdmi_read_pin_conn(codec, pin_idx);
1606 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1608 struct hdmi_spec *spec = codec->spec;
1609 struct hdmi_spec_per_cvt *per_cvt;
1613 chans = get_wcaps(codec, cvt_nid);
1614 chans = get_wcaps_channels(chans);
1616 per_cvt = snd_array_new(&spec->cvts);
1620 per_cvt->cvt_nid = cvt_nid;
1621 per_cvt->channels_min = 2;
1623 per_cvt->channels_max = chans;
1624 if (chans > spec->channels_max)
1625 spec->channels_max = chans;
1628 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1635 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1636 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1642 static int hdmi_parse_codec(struct hda_codec *codec)
1647 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1648 if (!nid || nodes < 0) {
1649 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1653 for (i = 0; i < nodes; i++, nid++) {
1657 caps = get_wcaps(codec, nid);
1658 type = get_wcaps_type(caps);
1660 if (!(caps & AC_WCAP_DIGITAL))
1664 case AC_WID_AUD_OUT:
1665 hdmi_add_cvt(codec, nid);
1668 hdmi_add_pin(codec, nid);
1674 /* We're seeing some problems with unsolicited hot plug events on
1675 * PantherPoint after S3, if this is not enabled */
1676 if (codec->vendor_id == 0x80862806)
1677 codec->bus->power_keep_link_on = 1;
1679 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1680 * can be lost and presence sense verb will become inaccurate if the
1681 * HDA link is powered off at hot plug or hw initialization time.
1683 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1685 codec->bus->power_keep_link_on = 1;
1693 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1695 struct hda_spdif_out *spdif;
1698 mutex_lock(&codec->spdif_mutex);
1699 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1700 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1701 mutex_unlock(&codec->spdif_mutex);
1710 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1711 struct hda_codec *codec,
1712 unsigned int stream_tag,
1713 unsigned int format,
1714 struct snd_pcm_substream *substream)
1716 hda_nid_t cvt_nid = hinfo->nid;
1717 struct hdmi_spec *spec = codec->spec;
1718 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1719 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1720 hda_nid_t pin_nid = per_pin->pin_nid;
1723 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1724 mutex_lock(&per_pin->lock);
1725 per_pin->channels = substream->runtime->channels;
1726 per_pin->setup = true;
1728 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1729 mutex_unlock(&per_pin->lock);
1731 return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1734 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1735 struct hda_codec *codec,
1736 struct snd_pcm_substream *substream)
1738 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1742 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1743 struct hda_codec *codec,
1744 struct snd_pcm_substream *substream)
1746 struct hdmi_spec *spec = codec->spec;
1747 int cvt_idx, pin_idx;
1748 struct hdmi_spec_per_cvt *per_cvt;
1749 struct hdmi_spec_per_pin *per_pin;
1752 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1753 if (snd_BUG_ON(cvt_idx < 0))
1755 per_cvt = get_cvt(spec, cvt_idx);
1757 snd_BUG_ON(!per_cvt->assigned);
1758 per_cvt->assigned = 0;
1761 pin_idx = hinfo_to_pin_index(spec, hinfo);
1762 if (snd_BUG_ON(pin_idx < 0))
1764 per_pin = get_pin(spec, pin_idx);
1766 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1768 mutex_lock(&per_pin->lock);
1769 per_pin->chmap_set = false;
1770 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1772 per_pin->setup = false;
1773 per_pin->channels = 0;
1774 mutex_unlock(&per_pin->lock);
1780 static const struct hda_pcm_ops generic_ops = {
1781 .open = hdmi_pcm_open,
1782 .close = hdmi_pcm_close,
1783 .prepare = generic_hdmi_playback_pcm_prepare,
1784 .cleanup = generic_hdmi_playback_pcm_cleanup,
1788 * ALSA API channel-map control callbacks
1790 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1791 struct snd_ctl_elem_info *uinfo)
1793 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1794 struct hda_codec *codec = info->private_data;
1795 struct hdmi_spec *spec = codec->spec;
1796 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1797 uinfo->count = spec->channels_max;
1798 uinfo->value.integer.min = 0;
1799 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1803 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
1806 /* If the speaker allocation matches the channel count, it is OK.*/
1807 if (cap->channels != channels)
1810 /* all channels are remappable freely */
1811 return SNDRV_CTL_TLVT_CHMAP_VAR;
1814 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
1815 unsigned int *chmap, int channels)
1820 for (c = 7; c >= 0; c--) {
1821 int spk = cap->speakers[c];
1825 chmap[count++] = spk_to_chmap(spk);
1828 WARN_ON(count != channels);
1831 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1832 unsigned int size, unsigned int __user *tlv)
1834 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1835 struct hda_codec *codec = info->private_data;
1836 struct hdmi_spec *spec = codec->spec;
1837 unsigned int __user *dst;
1842 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1846 for (chs = 2; chs <= spec->channels_max; chs++) {
1848 struct cea_channel_speaker_allocation *cap;
1849 cap = channel_allocations;
1850 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1851 int chs_bytes = chs * 4;
1852 int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
1853 unsigned int tlv_chmap[8];
1859 if (put_user(type, dst) ||
1860 put_user(chs_bytes, dst + 1))
1865 if (size < chs_bytes)
1869 spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
1870 if (copy_to_user(dst, tlv_chmap, chs_bytes))
1875 if (put_user(count, tlv + 1))
1880 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1881 struct snd_ctl_elem_value *ucontrol)
1883 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1884 struct hda_codec *codec = info->private_data;
1885 struct hdmi_spec *spec = codec->spec;
1886 int pin_idx = kcontrol->private_value;
1887 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1890 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1891 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1895 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1896 struct snd_ctl_elem_value *ucontrol)
1898 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1899 struct hda_codec *codec = info->private_data;
1900 struct hdmi_spec *spec = codec->spec;
1901 int pin_idx = kcontrol->private_value;
1902 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1903 unsigned int ctl_idx;
1904 struct snd_pcm_substream *substream;
1905 unsigned char chmap[8];
1906 int i, err, ca, prepared = 0;
1908 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1909 substream = snd_pcm_chmap_substream(info, ctl_idx);
1910 if (!substream || !substream->runtime)
1911 return 0; /* just for avoiding error from alsactl restore */
1912 switch (substream->runtime->status->state) {
1913 case SNDRV_PCM_STATE_OPEN:
1914 case SNDRV_PCM_STATE_SETUP:
1916 case SNDRV_PCM_STATE_PREPARED:
1922 memset(chmap, 0, sizeof(chmap));
1923 for (i = 0; i < ARRAY_SIZE(chmap); i++)
1924 chmap[i] = ucontrol->value.integer.value[i];
1925 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1927 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1930 if (spec->ops.chmap_validate) {
1931 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
1935 mutex_lock(&per_pin->lock);
1936 per_pin->chmap_set = true;
1937 memcpy(per_pin->chmap, chmap, sizeof(chmap));
1939 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1940 mutex_unlock(&per_pin->lock);
1945 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1947 struct hdmi_spec *spec = codec->spec;
1950 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1951 struct hda_pcm *info;
1952 struct hda_pcm_stream *pstr;
1953 struct hdmi_spec_per_pin *per_pin;
1955 per_pin = get_pin(spec, pin_idx);
1956 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1957 info = snd_array_new(&spec->pcm_rec);
1960 info->name = per_pin->pcm_name;
1961 info->pcm_type = HDA_PCM_TYPE_HDMI;
1962 info->own_chmap = true;
1964 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1965 pstr->substreams = 1;
1966 pstr->ops = generic_ops;
1967 /* other pstr fields are set in open */
1970 codec->num_pcms = spec->num_pins;
1971 codec->pcm_info = spec->pcm_rec.list;
1976 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1978 char hdmi_str[32] = "HDMI/DP";
1979 struct hdmi_spec *spec = codec->spec;
1980 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1981 int pcmdev = get_pcm_rec(spec, pin_idx)->device;
1984 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1985 if (!is_jack_detectable(codec, per_pin->pin_nid))
1986 strncat(hdmi_str, " Phantom",
1987 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1989 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1992 static int generic_hdmi_build_controls(struct hda_codec *codec)
1994 struct hdmi_spec *spec = codec->spec;
1998 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1999 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2001 err = generic_hdmi_build_jack(codec, pin_idx);
2005 err = snd_hda_create_dig_out_ctls(codec,
2007 per_pin->mux_nids[0],
2011 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2013 /* add control for ELD Bytes */
2014 err = hdmi_create_eld_ctl(codec, pin_idx,
2015 get_pcm_rec(spec, pin_idx)->device);
2020 hdmi_present_sense(per_pin, 0);
2023 /* add channel maps */
2024 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2025 struct snd_pcm_chmap *chmap;
2026 struct snd_kcontrol *kctl;
2029 if (!codec->pcm_info[pin_idx].pcm)
2031 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
2032 SNDRV_PCM_STREAM_PLAYBACK,
2033 NULL, 0, pin_idx, &chmap);
2036 /* override handlers */
2037 chmap->private_data = codec;
2039 for (i = 0; i < kctl->count; i++)
2040 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2041 kctl->info = hdmi_chmap_ctl_info;
2042 kctl->get = hdmi_chmap_ctl_get;
2043 kctl->put = hdmi_chmap_ctl_put;
2044 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2050 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2052 struct hdmi_spec *spec = codec->spec;
2055 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2056 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2058 per_pin->codec = codec;
2059 mutex_init(&per_pin->lock);
2060 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2061 eld_proc_new(per_pin, pin_idx);
2066 static int generic_hdmi_init(struct hda_codec *codec)
2068 struct hdmi_spec *spec = codec->spec;
2071 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2072 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2073 hda_nid_t pin_nid = per_pin->pin_nid;
2075 hdmi_init_pin(codec, pin_nid);
2076 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
2081 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2083 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2084 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2085 snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
2088 static void hdmi_array_free(struct hdmi_spec *spec)
2090 snd_array_free(&spec->pins);
2091 snd_array_free(&spec->cvts);
2092 snd_array_free(&spec->pcm_rec);
2095 static void generic_hdmi_free(struct hda_codec *codec)
2097 struct hdmi_spec *spec = codec->spec;
2100 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2101 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2103 cancel_delayed_work(&per_pin->work);
2104 eld_proc_free(per_pin);
2107 flush_workqueue(codec->bus->workq);
2108 hdmi_array_free(spec);
2113 static int generic_hdmi_resume(struct hda_codec *codec)
2115 struct hdmi_spec *spec = codec->spec;
2118 generic_hdmi_init(codec);
2119 snd_hda_codec_resume_amp(codec);
2120 snd_hda_codec_resume_cache(codec);
2122 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2123 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2124 hdmi_present_sense(per_pin, 1);
2130 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2131 .init = generic_hdmi_init,
2132 .free = generic_hdmi_free,
2133 .build_pcms = generic_hdmi_build_pcms,
2134 .build_controls = generic_hdmi_build_controls,
2135 .unsol_event = hdmi_unsol_event,
2137 .resume = generic_hdmi_resume,
2141 static const struct hdmi_ops generic_standard_hdmi_ops = {
2142 .pin_get_eld = snd_hdmi_get_eld,
2143 .pin_get_slot_channel = hdmi_pin_get_slot_channel,
2144 .pin_set_slot_channel = hdmi_pin_set_slot_channel,
2145 .pin_setup_infoframe = hdmi_pin_setup_infoframe,
2146 .pin_hbr_setup = hdmi_pin_hbr_setup,
2147 .setup_stream = hdmi_setup_stream,
2148 .chmap_cea_alloc_validate_get_type = hdmi_chmap_cea_alloc_validate_get_type,
2149 .cea_alloc_to_tlv_chmap = hdmi_cea_alloc_to_tlv_chmap,
2153 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2156 struct hdmi_spec *spec = codec->spec;
2160 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2161 if (nconns == spec->num_cvts &&
2162 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2165 /* override pins connection list */
2166 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
2167 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2170 #define INTEL_VENDOR_NID 0x08
2171 #define INTEL_GET_VENDOR_VERB 0xf81
2172 #define INTEL_SET_VENDOR_VERB 0x781
2173 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
2174 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2176 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2179 unsigned int vendor_param;
2181 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2182 INTEL_GET_VENDOR_VERB, 0);
2183 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2186 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2187 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2188 INTEL_SET_VENDOR_VERB, vendor_param);
2189 if (vendor_param == -1)
2193 snd_hda_codec_update_widgets(codec);
2196 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2198 unsigned int vendor_param;
2200 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2201 INTEL_GET_VENDOR_VERB, 0);
2202 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2205 /* enable DP1.2 mode */
2206 vendor_param |= INTEL_EN_DP12;
2207 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2208 INTEL_SET_VENDOR_VERB, vendor_param);
2211 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2212 * Otherwise you may get severe h/w communication errors.
2214 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2215 unsigned int power_state)
2217 if (power_state == AC_PWRST_D0) {
2218 intel_haswell_enable_all_pins(codec, false);
2219 intel_haswell_fixup_enable_dp12(codec);
2222 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2223 snd_hda_codec_set_power_to_all(codec, fg, power_state);
2226 static int patch_generic_hdmi(struct hda_codec *codec)
2228 struct hdmi_spec *spec;
2230 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2234 spec->ops = generic_standard_hdmi_ops;
2236 hdmi_array_init(spec, 4);
2238 if (is_haswell(codec)) {
2239 intel_haswell_enable_all_pins(codec, true);
2240 intel_haswell_fixup_enable_dp12(codec);
2243 if (hdmi_parse_codec(codec) < 0) {
2248 codec->patch_ops = generic_hdmi_patch_ops;
2249 if (is_haswell(codec)) {
2250 codec->patch_ops.set_power_state = haswell_set_power_state;
2251 codec->dp_mst = true;
2254 generic_hdmi_init_per_pins(codec);
2256 init_channel_allocations();
2262 * Shared non-generic implementations
2265 static int simple_playback_build_pcms(struct hda_codec *codec)
2267 struct hdmi_spec *spec = codec->spec;
2268 struct hda_pcm *info;
2270 struct hda_pcm_stream *pstr;
2271 struct hdmi_spec_per_cvt *per_cvt;
2273 per_cvt = get_cvt(spec, 0);
2274 chans = get_wcaps(codec, per_cvt->cvt_nid);
2275 chans = get_wcaps_channels(chans);
2277 info = snd_array_new(&spec->pcm_rec);
2280 info->name = get_pin(spec, 0)->pcm_name;
2281 sprintf(info->name, "HDMI 0");
2282 info->pcm_type = HDA_PCM_TYPE_HDMI;
2283 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2284 *pstr = spec->pcm_playback;
2285 pstr->nid = per_cvt->cvt_nid;
2286 if (pstr->channels_max <= 2 && chans && chans <= 16)
2287 pstr->channels_max = chans;
2289 codec->num_pcms = 1;
2290 codec->pcm_info = info;
2295 /* unsolicited event for jack sensing */
2296 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2299 snd_hda_jack_set_dirty_all(codec);
2300 snd_hda_jack_report_sync(codec);
2303 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2304 * as long as spec->pins[] is set correctly
2306 #define simple_hdmi_build_jack generic_hdmi_build_jack
2308 static int simple_playback_build_controls(struct hda_codec *codec)
2310 struct hdmi_spec *spec = codec->spec;
2311 struct hdmi_spec_per_cvt *per_cvt;
2314 per_cvt = get_cvt(spec, 0);
2315 err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
2319 return simple_hdmi_build_jack(codec, 0);
2322 static int simple_playback_init(struct hda_codec *codec)
2324 struct hdmi_spec *spec = codec->spec;
2325 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2326 hda_nid_t pin = per_pin->pin_nid;
2328 snd_hda_codec_write(codec, pin, 0,
2329 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2330 /* some codecs require to unmute the pin */
2331 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2332 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2334 snd_hda_jack_detect_enable(codec, pin, pin);
2338 static void simple_playback_free(struct hda_codec *codec)
2340 struct hdmi_spec *spec = codec->spec;
2342 hdmi_array_free(spec);
2347 * Nvidia specific implementations
2350 #define Nv_VERB_SET_Channel_Allocation 0xF79
2351 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2352 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2353 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2355 #define nvhdmi_master_con_nid_7x 0x04
2356 #define nvhdmi_master_pin_nid_7x 0x05
2358 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2359 /*front, rear, clfe, rear_surr */
2363 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2364 /* set audio protect on */
2365 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2366 /* enable digital output on pin widget */
2367 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2371 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2372 /* set audio protect on */
2373 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2374 /* enable digital output on pin widget */
2375 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2376 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2377 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2378 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2379 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2383 #ifdef LIMITED_RATE_FMT_SUPPORT
2384 /* support only the safe format and rate */
2385 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2386 #define SUPPORTED_MAXBPS 16
2387 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2389 /* support all rates and formats */
2390 #define SUPPORTED_RATES \
2391 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2392 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2393 SNDRV_PCM_RATE_192000)
2394 #define SUPPORTED_MAXBPS 24
2395 #define SUPPORTED_FORMATS \
2396 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2399 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2401 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2405 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2407 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2411 static unsigned int channels_2_6_8[] = {
2415 static unsigned int channels_2_8[] = {
2419 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2420 .count = ARRAY_SIZE(channels_2_6_8),
2421 .list = channels_2_6_8,
2425 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2426 .count = ARRAY_SIZE(channels_2_8),
2427 .list = channels_2_8,
2431 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2432 struct hda_codec *codec,
2433 struct snd_pcm_substream *substream)
2435 struct hdmi_spec *spec = codec->spec;
2436 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2438 switch (codec->preset->id) {
2443 hw_constraints_channels = &hw_constraints_2_8_channels;
2446 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2452 if (hw_constraints_channels != NULL) {
2453 snd_pcm_hw_constraint_list(substream->runtime, 0,
2454 SNDRV_PCM_HW_PARAM_CHANNELS,
2455 hw_constraints_channels);
2457 snd_pcm_hw_constraint_step(substream->runtime, 0,
2458 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2461 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2464 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2465 struct hda_codec *codec,
2466 struct snd_pcm_substream *substream)
2468 struct hdmi_spec *spec = codec->spec;
2469 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2472 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2473 struct hda_codec *codec,
2474 unsigned int stream_tag,
2475 unsigned int format,
2476 struct snd_pcm_substream *substream)
2478 struct hdmi_spec *spec = codec->spec;
2479 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2480 stream_tag, format, substream);
2483 static const struct hda_pcm_stream simple_pcm_playback = {
2488 .open = simple_playback_pcm_open,
2489 .close = simple_playback_pcm_close,
2490 .prepare = simple_playback_pcm_prepare
2494 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2495 .build_controls = simple_playback_build_controls,
2496 .build_pcms = simple_playback_build_pcms,
2497 .init = simple_playback_init,
2498 .free = simple_playback_free,
2499 .unsol_event = simple_hdmi_unsol_event,
2502 static int patch_simple_hdmi(struct hda_codec *codec,
2503 hda_nid_t cvt_nid, hda_nid_t pin_nid)
2505 struct hdmi_spec *spec;
2506 struct hdmi_spec_per_cvt *per_cvt;
2507 struct hdmi_spec_per_pin *per_pin;
2509 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2514 hdmi_array_init(spec, 1);
2516 spec->multiout.num_dacs = 0; /* no analog */
2517 spec->multiout.max_channels = 2;
2518 spec->multiout.dig_out_nid = cvt_nid;
2521 per_pin = snd_array_new(&spec->pins);
2522 per_cvt = snd_array_new(&spec->cvts);
2523 if (!per_pin || !per_cvt) {
2524 simple_playback_free(codec);
2527 per_cvt->cvt_nid = cvt_nid;
2528 per_pin->pin_nid = pin_nid;
2529 spec->pcm_playback = simple_pcm_playback;
2531 codec->patch_ops = simple_hdmi_patch_ops;
2536 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2539 unsigned int chanmask;
2540 int chan = channels ? (channels - 1) : 1;
2559 /* Set the audio infoframe channel allocation and checksum fields. The
2560 * channel count is computed implicitly by the hardware. */
2561 snd_hda_codec_write(codec, 0x1, 0,
2562 Nv_VERB_SET_Channel_Allocation, chanmask);
2564 snd_hda_codec_write(codec, 0x1, 0,
2565 Nv_VERB_SET_Info_Frame_Checksum,
2566 (0x71 - chan - chanmask));
2569 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2570 struct hda_codec *codec,
2571 struct snd_pcm_substream *substream)
2573 struct hdmi_spec *spec = codec->spec;
2576 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2577 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2578 for (i = 0; i < 4; i++) {
2579 /* set the stream id */
2580 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2581 AC_VERB_SET_CHANNEL_STREAMID, 0);
2582 /* set the stream format */
2583 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2584 AC_VERB_SET_STREAM_FORMAT, 0);
2587 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2588 * streams are disabled. */
2589 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2591 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2594 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2595 struct hda_codec *codec,
2596 unsigned int stream_tag,
2597 unsigned int format,
2598 struct snd_pcm_substream *substream)
2601 unsigned int dataDCC2, channel_id;
2603 struct hdmi_spec *spec = codec->spec;
2604 struct hda_spdif_out *spdif;
2605 struct hdmi_spec_per_cvt *per_cvt;
2607 mutex_lock(&codec->spdif_mutex);
2608 per_cvt = get_cvt(spec, 0);
2609 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2611 chs = substream->runtime->channels;
2615 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2616 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2617 snd_hda_codec_write(codec,
2618 nvhdmi_master_con_nid_7x,
2620 AC_VERB_SET_DIGI_CONVERT_1,
2621 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2623 /* set the stream id */
2624 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2625 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2627 /* set the stream format */
2628 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2629 AC_VERB_SET_STREAM_FORMAT, format);
2631 /* turn on again (if needed) */
2632 /* enable and set the channel status audio/data flag */
2633 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2634 snd_hda_codec_write(codec,
2635 nvhdmi_master_con_nid_7x,
2637 AC_VERB_SET_DIGI_CONVERT_1,
2638 spdif->ctls & 0xff);
2639 snd_hda_codec_write(codec,
2640 nvhdmi_master_con_nid_7x,
2642 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2645 for (i = 0; i < 4; i++) {
2651 /* turn off SPDIF once;
2652 *otherwise the IEC958 bits won't be updated
2654 if (codec->spdif_status_reset &&
2655 (spdif->ctls & AC_DIG1_ENABLE))
2656 snd_hda_codec_write(codec,
2657 nvhdmi_con_nids_7x[i],
2659 AC_VERB_SET_DIGI_CONVERT_1,
2660 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2661 /* set the stream id */
2662 snd_hda_codec_write(codec,
2663 nvhdmi_con_nids_7x[i],
2665 AC_VERB_SET_CHANNEL_STREAMID,
2666 (stream_tag << 4) | channel_id);
2667 /* set the stream format */
2668 snd_hda_codec_write(codec,
2669 nvhdmi_con_nids_7x[i],
2671 AC_VERB_SET_STREAM_FORMAT,
2673 /* turn on again (if needed) */
2674 /* enable and set the channel status audio/data flag */
2675 if (codec->spdif_status_reset &&
2676 (spdif->ctls & AC_DIG1_ENABLE)) {
2677 snd_hda_codec_write(codec,
2678 nvhdmi_con_nids_7x[i],
2680 AC_VERB_SET_DIGI_CONVERT_1,
2681 spdif->ctls & 0xff);
2682 snd_hda_codec_write(codec,
2683 nvhdmi_con_nids_7x[i],
2685 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2689 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2691 mutex_unlock(&codec->spdif_mutex);
2695 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2699 .nid = nvhdmi_master_con_nid_7x,
2700 .rates = SUPPORTED_RATES,
2701 .maxbps = SUPPORTED_MAXBPS,
2702 .formats = SUPPORTED_FORMATS,
2704 .open = simple_playback_pcm_open,
2705 .close = nvhdmi_8ch_7x_pcm_close,
2706 .prepare = nvhdmi_8ch_7x_pcm_prepare
2710 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2712 struct hdmi_spec *spec;
2713 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2714 nvhdmi_master_pin_nid_7x);
2718 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2719 /* override the PCM rates, etc, as the codec doesn't give full list */
2721 spec->pcm_playback.rates = SUPPORTED_RATES;
2722 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2723 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2727 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2729 struct hdmi_spec *spec = codec->spec;
2730 int err = simple_playback_build_pcms(codec);
2732 struct hda_pcm *info = get_pcm_rec(spec, 0);
2733 info->own_chmap = true;
2738 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2740 struct hdmi_spec *spec = codec->spec;
2741 struct hda_pcm *info;
2742 struct snd_pcm_chmap *chmap;
2745 err = simple_playback_build_controls(codec);
2749 /* add channel maps */
2750 info = get_pcm_rec(spec, 0);
2751 err = snd_pcm_add_chmap_ctls(info->pcm,
2752 SNDRV_PCM_STREAM_PLAYBACK,
2753 snd_pcm_alt_chmaps, 8, 0, &chmap);
2756 switch (codec->preset->id) {
2761 chmap->channel_mask = (1U << 2) | (1U << 8);
2764 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2769 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2771 struct hdmi_spec *spec;
2772 int err = patch_nvhdmi_2ch(codec);
2776 spec->multiout.max_channels = 8;
2777 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2778 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2779 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2780 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2782 /* Initialize the audio infoframe channel mask and checksum to something
2784 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2790 * ATI/AMD-specific implementations
2793 #define is_amdhdmi_rev3_or_later(codec) \
2794 ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
2795 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
2797 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
2798 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
2799 #define ATI_VERB_SET_DOWNMIX_INFO 0x772
2800 #define ATI_VERB_SET_MULTICHANNEL_01 0x777
2801 #define ATI_VERB_SET_MULTICHANNEL_23 0x778
2802 #define ATI_VERB_SET_MULTICHANNEL_45 0x779
2803 #define ATI_VERB_SET_MULTICHANNEL_67 0x77a
2804 #define ATI_VERB_SET_HBR_CONTROL 0x77c
2805 #define ATI_VERB_SET_MULTICHANNEL_1 0x785
2806 #define ATI_VERB_SET_MULTICHANNEL_3 0x786
2807 #define ATI_VERB_SET_MULTICHANNEL_5 0x787
2808 #define ATI_VERB_SET_MULTICHANNEL_7 0x788
2809 #define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
2810 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
2811 #define ATI_VERB_GET_DOWNMIX_INFO 0xf72
2812 #define ATI_VERB_GET_MULTICHANNEL_01 0xf77
2813 #define ATI_VERB_GET_MULTICHANNEL_23 0xf78
2814 #define ATI_VERB_GET_MULTICHANNEL_45 0xf79
2815 #define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
2816 #define ATI_VERB_GET_HBR_CONTROL 0xf7c
2817 #define ATI_VERB_GET_MULTICHANNEL_1 0xf85
2818 #define ATI_VERB_GET_MULTICHANNEL_3 0xf86
2819 #define ATI_VERB_GET_MULTICHANNEL_5 0xf87
2820 #define ATI_VERB_GET_MULTICHANNEL_7 0xf88
2821 #define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
2823 /* AMD specific HDA cvt verbs */
2824 #define ATI_VERB_SET_RAMP_RATE 0x770
2825 #define ATI_VERB_GET_RAMP_RATE 0xf70
2827 #define ATI_OUT_ENABLE 0x1
2829 #define ATI_MULTICHANNEL_MODE_PAIRED 0
2830 #define ATI_MULTICHANNEL_MODE_SINGLE 1
2832 #define ATI_HBR_CAPABLE 0x01
2833 #define ATI_HBR_ENABLE 0x10
2835 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
2836 unsigned char *buf, int *eld_size)
2838 /* call hda_eld.c ATI/AMD-specific function */
2839 return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
2840 is_amdhdmi_rev3_or_later(codec));
2843 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
2844 int active_channels, int conn_type)
2846 snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
2849 static int atihdmi_paired_swap_fc_lfe(int pos)
2852 * ATI/AMD have automatic FC/LFE swap built-in
2853 * when in pairwise mapping mode.
2857 /* see channel_allocations[].speakers[] */
2866 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
2868 struct cea_channel_speaker_allocation *cap;
2871 /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
2873 cap = &channel_allocations[get_channel_allocation_order(ca)];
2874 for (i = 0; i < chs; ++i) {
2875 int mask = to_spk_mask(map[i]);
2877 bool companion_ok = false;
2882 for (j = 0 + i % 2; j < 8; j += 2) {
2883 int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
2884 if (cap->speakers[chan_idx] == mask) {
2885 /* channel is in a supported position */
2888 if (i % 2 == 0 && i + 1 < chs) {
2889 /* even channel, check the odd companion */
2890 int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
2891 int comp_mask_req = to_spk_mask(map[i+1]);
2892 int comp_mask_act = cap->speakers[comp_chan_idx];
2894 if (comp_mask_req == comp_mask_act)
2895 companion_ok = true;
2907 i++; /* companion channel already checked */
2913 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
2914 int hdmi_slot, int stream_channel)
2917 int ati_channel_setup = 0;
2922 if (!has_amd_full_remap_support(codec)) {
2923 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
2925 /* In case this is an odd slot but without stream channel, do not
2926 * disable the slot since the corresponding even slot could have a
2927 * channel. In case neither have a channel, the slot pair will be
2928 * disabled when this function is called for the even slot. */
2929 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
2932 hdmi_slot -= hdmi_slot % 2;
2934 if (stream_channel != 0xf)
2935 stream_channel -= stream_channel % 2;
2938 verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
2940 /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
2942 if (stream_channel != 0xf)
2943 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
2945 return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
2948 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
2951 bool was_odd = false;
2952 int ati_asp_slot = asp_slot;
2954 int ati_channel_setup;
2959 if (!has_amd_full_remap_support(codec)) {
2960 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
2961 if (ati_asp_slot % 2 != 0) {
2967 verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
2969 ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
2971 if (!(ati_channel_setup & ATI_OUT_ENABLE))
2974 return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
2977 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2983 * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
2984 * we need to take that into account (a single channel may take 2
2985 * channel slots if we need to carry a silent channel next to it).
2986 * On Rev3+ AMD codecs this function is not used.
2990 /* We only produce even-numbered channel count TLVs */
2991 if ((channels % 2) != 0)
2994 for (c = 0; c < 7; c += 2) {
2995 if (cap->speakers[c] || cap->speakers[c+1])
2999 if (chanpairs * 2 != channels)
3002 return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3005 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3006 unsigned int *chmap, int channels)
3008 /* produce paired maps for pre-rev3 ATI/AMD codecs */
3012 for (c = 7; c >= 0; c--) {
3013 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3014 int spk = cap->speakers[chan];
3016 /* add N/A channel if the companion channel is occupied */
3017 if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3018 chmap[count++] = SNDRV_CHMAP_NA;
3023 chmap[count++] = spk_to_chmap(spk);
3026 WARN_ON(count != channels);
3029 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3032 int hbr_ctl, hbr_ctl_new;
3034 hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3035 if (hbr_ctl & ATI_HBR_CAPABLE) {
3037 hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3039 hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3041 snd_printdd("atihdmi_pin_hbr_setup: "
3042 "NID=0x%x, %shbr-ctl=0x%x\n",
3044 hbr_ctl == hbr_ctl_new ? "" : "new-",
3047 if (hbr_ctl != hbr_ctl_new)
3048 snd_hda_codec_write(codec, pin_nid, 0,
3049 ATI_VERB_SET_HBR_CONTROL,
3058 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3059 hda_nid_t pin_nid, u32 stream_tag, int format)
3062 if (is_amdhdmi_rev3_or_later(codec)) {
3063 int ramp_rate = 180; /* default as per AMD spec */
3064 /* disable ramp-up/down for non-pcm as per AMD spec */
3065 if (format & AC_FMT_TYPE_NON_PCM)
3068 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3071 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3075 static int atihdmi_init(struct hda_codec *codec)
3077 struct hdmi_spec *spec = codec->spec;
3080 err = generic_hdmi_init(codec);
3085 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3086 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3088 /* make sure downmix information in infoframe is zero */
3089 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3091 /* enable channel-wise remap mode if supported */
3092 if (has_amd_full_remap_support(codec))
3093 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3094 ATI_VERB_SET_MULTICHANNEL_MODE,
3095 ATI_MULTICHANNEL_MODE_SINGLE);
3101 static int patch_atihdmi(struct hda_codec *codec)
3103 struct hdmi_spec *spec;
3104 struct hdmi_spec_per_cvt *per_cvt;
3107 err = patch_generic_hdmi(codec);
3112 codec->patch_ops.init = atihdmi_init;
3116 spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3117 spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3118 spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3119 spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3120 spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3121 spec->ops.setup_stream = atihdmi_setup_stream;
3123 if (!has_amd_full_remap_support(codec)) {
3124 /* override to ATI/AMD-specific versions with pairwise mapping */
3125 spec->ops.chmap_cea_alloc_validate_get_type =
3126 atihdmi_paired_chmap_cea_alloc_validate_get_type;
3127 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3128 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3131 /* ATI/AMD converters do not advertise all of their capabilities */
3132 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3133 per_cvt = get_cvt(spec, cvt_idx);
3134 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3135 per_cvt->rates |= SUPPORTED_RATES;
3136 per_cvt->formats |= SUPPORTED_FORMATS;
3137 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3140 spec->channels_max = max(spec->channels_max, 8u);
3145 /* VIA HDMI Implementation */
3146 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
3147 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
3149 static int patch_via_hdmi(struct hda_codec *codec)
3151 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3157 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
3158 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
3159 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
3160 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
3161 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_atihdmi },
3162 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
3163 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
3164 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
3165 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
3166 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
3167 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
3168 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
3169 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
3170 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
3171 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
3172 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
3173 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
3174 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
3175 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
3176 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
3177 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
3178 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
3179 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
3180 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
3181 /* 17 is known to be absent */
3182 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
3183 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
3184 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
3185 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
3186 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
3187 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
3188 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
3189 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
3190 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
3191 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
3192 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
3193 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi },
3194 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
3195 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
3196 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
3197 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
3198 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
3199 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
3200 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
3201 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
3202 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
3203 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
3204 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
3205 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
3206 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
3207 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
3208 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
3209 { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
3210 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
3214 MODULE_ALIAS("snd-hda-codec-id:1002793c");
3215 MODULE_ALIAS("snd-hda-codec-id:10027919");
3216 MODULE_ALIAS("snd-hda-codec-id:1002791a");
3217 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
3218 MODULE_ALIAS("snd-hda-codec-id:10951390");
3219 MODULE_ALIAS("snd-hda-codec-id:10951392");
3220 MODULE_ALIAS("snd-hda-codec-id:10de0002");
3221 MODULE_ALIAS("snd-hda-codec-id:10de0003");
3222 MODULE_ALIAS("snd-hda-codec-id:10de0005");
3223 MODULE_ALIAS("snd-hda-codec-id:10de0006");
3224 MODULE_ALIAS("snd-hda-codec-id:10de0007");
3225 MODULE_ALIAS("snd-hda-codec-id:10de000a");
3226 MODULE_ALIAS("snd-hda-codec-id:10de000b");
3227 MODULE_ALIAS("snd-hda-codec-id:10de000c");
3228 MODULE_ALIAS("snd-hda-codec-id:10de000d");
3229 MODULE_ALIAS("snd-hda-codec-id:10de0010");
3230 MODULE_ALIAS("snd-hda-codec-id:10de0011");
3231 MODULE_ALIAS("snd-hda-codec-id:10de0012");
3232 MODULE_ALIAS("snd-hda-codec-id:10de0013");
3233 MODULE_ALIAS("snd-hda-codec-id:10de0014");
3234 MODULE_ALIAS("snd-hda-codec-id:10de0015");
3235 MODULE_ALIAS("snd-hda-codec-id:10de0016");
3236 MODULE_ALIAS("snd-hda-codec-id:10de0018");
3237 MODULE_ALIAS("snd-hda-codec-id:10de0019");
3238 MODULE_ALIAS("snd-hda-codec-id:10de001a");
3239 MODULE_ALIAS("snd-hda-codec-id:10de001b");
3240 MODULE_ALIAS("snd-hda-codec-id:10de001c");
3241 MODULE_ALIAS("snd-hda-codec-id:10de0040");
3242 MODULE_ALIAS("snd-hda-codec-id:10de0041");
3243 MODULE_ALIAS("snd-hda-codec-id:10de0042");
3244 MODULE_ALIAS("snd-hda-codec-id:10de0043");
3245 MODULE_ALIAS("snd-hda-codec-id:10de0044");
3246 MODULE_ALIAS("snd-hda-codec-id:10de0051");
3247 MODULE_ALIAS("snd-hda-codec-id:10de0060");
3248 MODULE_ALIAS("snd-hda-codec-id:10de0067");
3249 MODULE_ALIAS("snd-hda-codec-id:10de8001");
3250 MODULE_ALIAS("snd-hda-codec-id:11069f80");
3251 MODULE_ALIAS("snd-hda-codec-id:11069f81");
3252 MODULE_ALIAS("snd-hda-codec-id:11069f84");
3253 MODULE_ALIAS("snd-hda-codec-id:11069f85");
3254 MODULE_ALIAS("snd-hda-codec-id:17e80047");
3255 MODULE_ALIAS("snd-hda-codec-id:80860054");
3256 MODULE_ALIAS("snd-hda-codec-id:80862801");
3257 MODULE_ALIAS("snd-hda-codec-id:80862802");
3258 MODULE_ALIAS("snd-hda-codec-id:80862803");
3259 MODULE_ALIAS("snd-hda-codec-id:80862804");
3260 MODULE_ALIAS("snd-hda-codec-id:80862805");
3261 MODULE_ALIAS("snd-hda-codec-id:80862806");
3262 MODULE_ALIAS("snd-hda-codec-id:80862807");
3263 MODULE_ALIAS("snd-hda-codec-id:80862880");
3264 MODULE_ALIAS("snd-hda-codec-id:80862882");
3265 MODULE_ALIAS("snd-hda-codec-id:808629fb");
3267 MODULE_LICENSE("GPL");
3268 MODULE_DESCRIPTION("HDMI HD-audio codec");
3269 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3270 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3271 MODULE_ALIAS("snd-hda-codec-atihdmi");
3273 static struct hda_codec_preset_list intel_list = {
3274 .preset = snd_hda_preset_hdmi,
3275 .owner = THIS_MODULE,
3278 static int __init patch_hdmi_init(void)
3280 return snd_hda_add_codec_preset(&intel_list);
3283 static void __exit patch_hdmi_exit(void)
3285 snd_hda_delete_codec_preset(&intel_list);
3288 module_init(patch_hdmi_init)
3289 module_exit(patch_hdmi_exit)