3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9 * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
12 * Wu Fengguang <wfg@linux.intel.com>
15 * Wu Fengguang <wfg@linux.intel.com>
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the Free
19 * Software Foundation; either version 2 of the License, or (at your option)
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
24 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software Foundation,
29 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/slab.h>
35 #include <linux/module.h>
36 #include <sound/core.h>
37 #include <sound/jack.h>
38 #include <sound/asoundef.h>
39 #include <sound/tlv.h>
40 #include "hda_codec.h"
41 #include "hda_local.h"
44 static bool static_hdmi_pcm;
45 module_param(static_hdmi_pcm, bool, 0644);
46 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
48 #define is_haswell(codec) ((codec)->vendor_id == 0x80862807)
49 #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
51 struct hdmi_spec_per_cvt {
54 unsigned int channels_min;
55 unsigned int channels_max;
61 /* max. connections to a widget */
62 #define HDA_MAX_CONNECTIONS 32
64 struct hdmi_spec_per_pin {
67 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
70 struct hda_codec *codec;
71 struct hdmi_eld sink_eld;
73 struct delayed_work work;
74 struct snd_kcontrol *eld_ctl;
76 bool setup; /* the stream has been set up by prepare callback */
77 int channels; /* current number of channels */
79 bool chmap_set; /* channel-map override by ALSA API? */
80 unsigned char chmap[8]; /* ALSA API channel-map */
81 char pcm_name[8]; /* filled in build_pcm callbacks */
83 struct snd_info_entry *proc_entry;
87 struct cea_channel_speaker_allocation;
89 /* operations used by generic code that can be overridden by patches */
91 int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
92 unsigned char *buf, int *eld_size);
94 /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
95 int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
97 int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
98 int asp_slot, int channel);
100 void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
101 int ca, int active_channels, int conn_type);
103 /* enable/disable HBR (HD passthrough) */
104 int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
106 int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
107 hda_nid_t pin_nid, u32 stream_tag, int format);
109 /* Helpers for producing the channel map TLVs. These can be overridden
110 * for devices that have non-standard mapping requirements. */
111 int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
113 void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
114 unsigned int *chmap, int channels);
116 /* check that the user-given chmap is supported */
117 int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
122 struct snd_array cvts; /* struct hdmi_spec_per_cvt */
123 hda_nid_t cvt_nids[4]; /* only for haswell fix */
126 struct snd_array pins; /* struct hdmi_spec_per_pin */
127 struct snd_array pcm_rec; /* struct hda_pcm */
128 unsigned int channels_max; /* max over all cvts */
130 struct hdmi_eld temp_eld;
133 * Non-generic VIA/NVIDIA specific
135 struct hda_multi_out multiout;
136 struct hda_pcm_stream pcm_playback;
140 struct hdmi_audio_infoframe {
147 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
151 u8 LFEPBL01_LSV36_DM_INH7;
154 struct dp_audio_infoframe {
157 u8 ver; /* 0x11 << 2 */
159 u8 CC02_CT47; /* match with HDMI infoframe from this on */
163 u8 LFEPBL01_LSV36_DM_INH7;
166 union audio_infoframe {
167 struct hdmi_audio_infoframe hdmi;
168 struct dp_audio_infoframe dp;
173 * CEA speaker placement:
176 * FLW FL FLC FC FRC FR FRW
183 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
184 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
186 enum cea_speaker_placement {
187 FL = (1 << 0), /* Front Left */
188 FC = (1 << 1), /* Front Center */
189 FR = (1 << 2), /* Front Right */
190 FLC = (1 << 3), /* Front Left Center */
191 FRC = (1 << 4), /* Front Right Center */
192 RL = (1 << 5), /* Rear Left */
193 RC = (1 << 6), /* Rear Center */
194 RR = (1 << 7), /* Rear Right */
195 RLC = (1 << 8), /* Rear Left Center */
196 RRC = (1 << 9), /* Rear Right Center */
197 LFE = (1 << 10), /* Low Frequency Effect */
198 FLW = (1 << 11), /* Front Left Wide */
199 FRW = (1 << 12), /* Front Right Wide */
200 FLH = (1 << 13), /* Front Left High */
201 FCH = (1 << 14), /* Front Center High */
202 FRH = (1 << 15), /* Front Right High */
203 TC = (1 << 16), /* Top Center */
207 * ELD SA bits in the CEA Speaker Allocation data block
209 static int eld_speaker_allocation_bits[] = {
217 /* the following are not defined in ELD yet */
224 struct cea_channel_speaker_allocation {
228 /* derived values, just for convenience */
236 * surround40 surround41 surround50 surround51 surround71
237 * ch0 front left = = = =
238 * ch1 front right = = = =
239 * ch2 rear left = = = =
240 * ch3 rear right = = = =
241 * ch4 LFE center center center
246 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
248 static int hdmi_channel_mapping[0x32][8] = {
250 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
252 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
254 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
256 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
258 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
260 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
262 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
264 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
266 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
270 * This is an ordered list!
272 * The preceding ones have better chances to be selected by
273 * hdmi_channel_allocation().
275 static struct cea_channel_speaker_allocation channel_allocations[] = {
276 /* channel: 7 6 5 4 3 2 1 0 */
277 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
279 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
281 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
283 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
285 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
287 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
289 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
291 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
293 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
295 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
296 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
297 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
298 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
299 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
300 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
301 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
302 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
303 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
304 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
305 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
306 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
307 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
308 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
309 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
310 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
311 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
312 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
313 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
314 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
315 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
316 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
317 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
318 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
319 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
320 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
321 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
322 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
323 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
324 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
325 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
326 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
327 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
328 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
329 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
330 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
331 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
332 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
333 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
334 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
335 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
343 #define get_pin(spec, idx) \
344 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
345 #define get_cvt(spec, idx) \
346 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
347 #define get_pcm_rec(spec, idx) \
348 ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
350 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
354 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
355 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
358 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
362 static int hinfo_to_pin_index(struct hdmi_spec *spec,
363 struct hda_pcm_stream *hinfo)
367 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
368 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
371 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
375 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
379 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
380 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
383 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
387 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
388 struct snd_ctl_elem_info *uinfo)
390 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
391 struct hdmi_spec *spec = codec->spec;
392 struct hdmi_spec_per_pin *per_pin;
393 struct hdmi_eld *eld;
396 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
398 pin_idx = kcontrol->private_value;
399 per_pin = get_pin(spec, pin_idx);
400 eld = &per_pin->sink_eld;
402 mutex_lock(&per_pin->lock);
403 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
404 mutex_unlock(&per_pin->lock);
409 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
410 struct snd_ctl_elem_value *ucontrol)
412 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
413 struct hdmi_spec *spec = codec->spec;
414 struct hdmi_spec_per_pin *per_pin;
415 struct hdmi_eld *eld;
418 pin_idx = kcontrol->private_value;
419 per_pin = get_pin(spec, pin_idx);
420 eld = &per_pin->sink_eld;
422 mutex_lock(&per_pin->lock);
423 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
424 mutex_unlock(&per_pin->lock);
429 memset(ucontrol->value.bytes.data, 0,
430 ARRAY_SIZE(ucontrol->value.bytes.data));
432 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
434 mutex_unlock(&per_pin->lock);
439 static struct snd_kcontrol_new eld_bytes_ctl = {
440 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
441 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
443 .info = hdmi_eld_ctl_info,
444 .get = hdmi_eld_ctl_get,
447 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
450 struct snd_kcontrol *kctl;
451 struct hdmi_spec *spec = codec->spec;
454 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
457 kctl->private_value = pin_idx;
458 kctl->id.device = device;
460 err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
464 get_pin(spec, pin_idx)->eld_ctl = kctl;
469 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
470 int *packet_index, int *byte_index)
474 val = snd_hda_codec_read(codec, pin_nid, 0,
475 AC_VERB_GET_HDMI_DIP_INDEX, 0);
477 *packet_index = val >> 5;
478 *byte_index = val & 0x1f;
482 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
483 int packet_index, int byte_index)
487 val = (packet_index << 5) | (byte_index & 0x1f);
489 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
492 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
495 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
498 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
501 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
502 snd_hda_codec_write(codec, pin_nid, 0,
503 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
504 /* Enable pin out: some machines with GM965 gets broken output when
505 * the pin is disabled or changed while using with HDMI
507 snd_hda_codec_write(codec, pin_nid, 0,
508 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
511 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
513 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
514 AC_VERB_GET_CVT_CHAN_COUNT, 0);
517 static void hdmi_set_channel_count(struct hda_codec *codec,
518 hda_nid_t cvt_nid, int chs)
520 if (chs != hdmi_get_channel_count(codec, cvt_nid))
521 snd_hda_codec_write(codec, cvt_nid, 0,
522 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
529 #ifdef CONFIG_PROC_FS
530 static void print_eld_info(struct snd_info_entry *entry,
531 struct snd_info_buffer *buffer)
533 struct hdmi_spec_per_pin *per_pin = entry->private_data;
535 mutex_lock(&per_pin->lock);
536 snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
537 mutex_unlock(&per_pin->lock);
540 static void write_eld_info(struct snd_info_entry *entry,
541 struct snd_info_buffer *buffer)
543 struct hdmi_spec_per_pin *per_pin = entry->private_data;
545 mutex_lock(&per_pin->lock);
546 snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
547 mutex_unlock(&per_pin->lock);
550 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
553 struct hda_codec *codec = per_pin->codec;
554 struct snd_info_entry *entry;
557 snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
558 err = snd_card_proc_new(codec->bus->card, name, &entry);
562 snd_info_set_text_ops(entry, per_pin, print_eld_info);
563 entry->c.text.write = write_eld_info;
564 entry->mode |= S_IWUSR;
565 per_pin->proc_entry = entry;
570 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
572 if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
573 snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
574 per_pin->proc_entry = NULL;
578 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
583 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
589 * Channel mapping routines
593 * Compute derived values in channel_allocations[].
595 static void init_channel_allocations(void)
598 struct cea_channel_speaker_allocation *p;
600 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
601 p = channel_allocations + i;
604 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
605 if (p->speakers[j]) {
607 p->spk_mask |= p->speakers[j];
612 static int get_channel_allocation_order(int ca)
616 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
617 if (channel_allocations[i].ca_index == ca)
624 * The transformation takes two steps:
626 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
627 * spk_mask => (channel_allocations[]) => ai->CA
629 * TODO: it could select the wrong CA from multiple candidates.
631 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
636 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
639 * CA defaults to 0 for basic stereo audio
645 * expand ELD's speaker allocation mask
647 * ELD tells the speaker mask in a compact(paired) form,
648 * expand ELD's notions to match the ones used by Audio InfoFrame.
650 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
651 if (eld->info.spk_alloc & (1 << i))
652 spk_mask |= eld_speaker_allocation_bits[i];
655 /* search for the first working match in the CA table */
656 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
657 if (channels == channel_allocations[i].channels &&
658 (spk_mask & channel_allocations[i].spk_mask) ==
659 channel_allocations[i].spk_mask) {
660 ca = channel_allocations[i].ca_index;
666 /* if there was no match, select the regular ALSA channel
667 * allocation with the matching number of channels */
668 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
669 if (channels == channel_allocations[i].channels) {
670 ca = channel_allocations[i].ca_index;
676 snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
677 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
683 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
686 #ifdef CONFIG_SND_DEBUG_VERBOSE
687 struct hdmi_spec *spec = codec->spec;
691 for (i = 0; i < 8; i++) {
692 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
693 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
699 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
704 struct hdmi_spec *spec = codec->spec;
705 struct cea_channel_speaker_allocation *ch_alloc;
709 int non_pcm_mapping[8];
711 order = get_channel_allocation_order(ca);
712 ch_alloc = &channel_allocations[order];
714 if (hdmi_channel_mapping[ca][1] == 0) {
716 /* fill actual channel mappings in ALSA channel (i) order */
717 for (i = 0; i < ch_alloc->channels; i++) {
718 while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
719 hdmi_slot++; /* skip zero slots */
721 hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
723 /* fill the rest of the slots with ALSA channel 0xf */
724 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
725 if (!ch_alloc->speakers[7 - hdmi_slot])
726 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
730 for (i = 0; i < ch_alloc->channels; i++)
731 non_pcm_mapping[i] = (i << 4) | i;
733 non_pcm_mapping[i] = (0xf << 4) | i;
736 for (i = 0; i < 8; i++) {
737 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
738 int hdmi_slot = slotsetup & 0x0f;
739 int channel = (slotsetup & 0xf0) >> 4;
740 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
742 snd_printdd(KERN_NOTICE
743 "HDMI: channel mapping failed\n");
749 struct channel_map_table {
750 unsigned char map; /* ALSA API channel map position */
751 int spk_mask; /* speaker position bit mask */
754 static struct channel_map_table map_tables[] = {
755 { SNDRV_CHMAP_FL, FL },
756 { SNDRV_CHMAP_FR, FR },
757 { SNDRV_CHMAP_RL, RL },
758 { SNDRV_CHMAP_RR, RR },
759 { SNDRV_CHMAP_LFE, LFE },
760 { SNDRV_CHMAP_FC, FC },
761 { SNDRV_CHMAP_RLC, RLC },
762 { SNDRV_CHMAP_RRC, RRC },
763 { SNDRV_CHMAP_RC, RC },
764 { SNDRV_CHMAP_FLC, FLC },
765 { SNDRV_CHMAP_FRC, FRC },
766 { SNDRV_CHMAP_FLH, FLH },
767 { SNDRV_CHMAP_FRH, FRH },
768 { SNDRV_CHMAP_FLW, FLW },
769 { SNDRV_CHMAP_FRW, FRW },
770 { SNDRV_CHMAP_TC, TC },
771 { SNDRV_CHMAP_FCH, FCH },
775 /* from ALSA API channel position to speaker bit mask */
776 static int to_spk_mask(unsigned char c)
778 struct channel_map_table *t = map_tables;
779 for (; t->map; t++) {
786 /* from ALSA API channel position to CEA slot */
787 static int to_cea_slot(int ordered_ca, unsigned char pos)
789 int mask = to_spk_mask(pos);
793 for (i = 0; i < 8; i++) {
794 if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
802 /* from speaker bit mask to ALSA API channel position */
803 static int spk_to_chmap(int spk)
805 struct channel_map_table *t = map_tables;
806 for (; t->map; t++) {
807 if (t->spk_mask == spk)
813 /* from CEA slot to ALSA API channel position */
814 static int from_cea_slot(int ordered_ca, unsigned char slot)
816 int mask = channel_allocations[ordered_ca].speakers[7 - slot];
818 return spk_to_chmap(mask);
821 /* get the CA index corresponding to the given ALSA API channel map */
822 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
824 int i, spks = 0, spk_mask = 0;
826 for (i = 0; i < chs; i++) {
827 int mask = to_spk_mask(map[i]);
834 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
835 if ((chs == channel_allocations[i].channels ||
836 spks == channel_allocations[i].channels) &&
837 (spk_mask & channel_allocations[i].spk_mask) ==
838 channel_allocations[i].spk_mask)
839 return channel_allocations[i].ca_index;
844 /* set up the channel slots for the given ALSA API channel map */
845 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
847 int chs, unsigned char *map,
850 struct hdmi_spec *spec = codec->spec;
851 int ordered_ca = get_channel_allocation_order(ca);
852 int alsa_pos, hdmi_slot;
853 int assignments[8] = {[0 ... 7] = 0xf};
855 for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
857 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
860 continue; /* unassigned channel */
862 assignments[hdmi_slot] = alsa_pos;
865 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
868 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
869 assignments[hdmi_slot]);
876 /* store ALSA API channel map from the current default map */
877 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
880 int ordered_ca = get_channel_allocation_order(ca);
881 for (i = 0; i < 8; i++) {
882 if (i < channel_allocations[ordered_ca].channels)
883 map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
889 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
890 hda_nid_t pin_nid, bool non_pcm, int ca,
891 int channels, unsigned char *map,
894 if (!non_pcm && chmap_set) {
895 hdmi_manual_setup_channel_mapping(codec, pin_nid,
898 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
899 hdmi_setup_fake_chmap(map, ca);
902 hdmi_debug_channel_mapping(codec, pin_nid);
905 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
906 int asp_slot, int channel)
908 return snd_hda_codec_write(codec, pin_nid, 0,
909 AC_VERB_SET_HDMI_CHAN_SLOT,
910 (channel << 4) | asp_slot);
913 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
916 return (snd_hda_codec_read(codec, pin_nid, 0,
917 AC_VERB_GET_HDMI_CHAN_SLOT,
918 asp_slot) & 0xf0) >> 4;
922 * Audio InfoFrame routines
926 * Enable Audio InfoFrame Transmission
928 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
931 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
932 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
937 * Disable Audio InfoFrame Transmission
939 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
942 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
943 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
947 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
949 #ifdef CONFIG_SND_DEBUG_VERBOSE
953 size = snd_hdmi_get_eld_size(codec, pin_nid);
954 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
956 for (i = 0; i < 8; i++) {
957 size = snd_hda_codec_read(codec, pin_nid, 0,
958 AC_VERB_GET_HDMI_DIP_SIZE, i);
959 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
964 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
970 for (i = 0; i < 8; i++) {
971 size = snd_hda_codec_read(codec, pin_nid, 0,
972 AC_VERB_GET_HDMI_DIP_SIZE, i);
976 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
977 for (j = 1; j < 1000; j++) {
978 hdmi_write_dip_byte(codec, pin_nid, 0x0);
979 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
981 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
983 if (bi == 0) /* byte index wrapped around */
987 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
993 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
995 u8 *bytes = (u8 *)hdmi_ai;
999 hdmi_ai->checksum = 0;
1001 for (i = 0; i < sizeof(*hdmi_ai); i++)
1004 hdmi_ai->checksum = -sum;
1007 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1013 hdmi_debug_dip_size(codec, pin_nid);
1014 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1016 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1017 for (i = 0; i < size; i++)
1018 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1021 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1027 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1031 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1032 for (i = 0; i < size; i++) {
1033 val = snd_hda_codec_read(codec, pin_nid, 0,
1034 AC_VERB_GET_HDMI_DIP_DATA, 0);
1042 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1044 int ca, int active_channels,
1047 union audio_infoframe ai;
1049 if (conn_type == 0) { /* HDMI */
1050 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1052 hdmi_ai->type = 0x84;
1053 hdmi_ai->ver = 0x01;
1054 hdmi_ai->len = 0x0a;
1055 hdmi_ai->CC02_CT47 = active_channels - 1;
1057 hdmi_checksum_audio_infoframe(hdmi_ai);
1058 } else if (conn_type == 1) { /* DisplayPort */
1059 struct dp_audio_infoframe *dp_ai = &ai.dp;
1063 dp_ai->ver = 0x11 << 2;
1064 dp_ai->CC02_CT47 = active_channels - 1;
1067 snd_printd("HDMI: unknown connection type at pin %d\n",
1073 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1074 * sizeof(*dp_ai) to avoid partial match/update problems when
1075 * the user switches between HDMI/DP monitors.
1077 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1079 snd_printdd("hdmi_pin_setup_infoframe: "
1080 "pin=%d channels=%d ca=0x%02x\n",
1082 active_channels, ca);
1083 hdmi_stop_infoframe_trans(codec, pin_nid);
1084 hdmi_fill_audio_infoframe(codec, pin_nid,
1085 ai.bytes, sizeof(ai));
1086 hdmi_start_infoframe_trans(codec, pin_nid);
1090 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1091 struct hdmi_spec_per_pin *per_pin,
1094 struct hdmi_spec *spec = codec->spec;
1095 hda_nid_t pin_nid = per_pin->pin_nid;
1096 int channels = per_pin->channels;
1097 int active_channels;
1098 struct hdmi_eld *eld;
1104 if (is_haswell(codec))
1105 snd_hda_codec_write(codec, pin_nid, 0,
1106 AC_VERB_SET_AMP_GAIN_MUTE,
1109 eld = &per_pin->sink_eld;
1110 if (!eld->monitor_present)
1113 if (!non_pcm && per_pin->chmap_set)
1114 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1116 ca = hdmi_channel_allocation(eld, channels);
1120 ordered_ca = get_channel_allocation_order(ca);
1121 active_channels = channel_allocations[ordered_ca].channels;
1123 hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1126 * always configure channel mapping, it may have been changed by the
1127 * user in the meantime
1129 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1130 channels, per_pin->chmap,
1131 per_pin->chmap_set);
1133 spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1134 eld->info.conn_type);
1136 per_pin->non_pcm = non_pcm;
1140 * Unsolicited events
1143 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1145 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1147 struct hdmi_spec *spec = codec->spec;
1148 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1151 struct hda_jack_tbl *jack;
1152 int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1154 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1157 pin_nid = jack->nid;
1158 jack->jack_dirty = 1;
1160 _snd_printd(SND_PR_VERBOSE,
1161 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1162 codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1163 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1165 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
1169 if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1170 snd_hda_jack_report_sync(codec);
1173 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1175 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1176 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1177 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1178 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1181 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1196 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1198 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1199 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1201 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1202 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1207 hdmi_intrinsic_event(codec, res);
1209 hdmi_non_intrinsic_event(codec, res);
1212 static void haswell_verify_D0(struct hda_codec *codec,
1213 hda_nid_t cvt_nid, hda_nid_t nid)
1217 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1218 * thus pins could only choose converter 0 for use. Make sure the
1219 * converters are in correct power state */
1220 if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1221 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1223 if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1224 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1227 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1228 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1229 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1237 /* HBR should be Non-PCM, 8 channels */
1238 #define is_hbr_format(format) \
1239 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1241 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1244 int pinctl, new_pinctl;
1246 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1247 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1248 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1250 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1252 new_pinctl |= AC_PINCTL_EPT_HBR;
1254 new_pinctl |= AC_PINCTL_EPT_NATIVE;
1256 snd_printdd("hdmi_pin_hbr_setup: "
1257 "NID=0x%x, %spinctl=0x%x\n",
1259 pinctl == new_pinctl ? "" : "new-",
1262 if (pinctl != new_pinctl)
1263 snd_hda_codec_write(codec, pin_nid, 0,
1264 AC_VERB_SET_PIN_WIDGET_CONTROL,
1272 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1273 hda_nid_t pin_nid, u32 stream_tag, int format)
1275 struct hdmi_spec *spec = codec->spec;
1278 if (is_haswell(codec))
1279 haswell_verify_D0(codec, cvt_nid, pin_nid);
1281 err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1284 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1288 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1292 static int hdmi_choose_cvt(struct hda_codec *codec,
1293 int pin_idx, int *cvt_id, int *mux_id)
1295 struct hdmi_spec *spec = codec->spec;
1296 struct hdmi_spec_per_pin *per_pin;
1297 struct hdmi_spec_per_cvt *per_cvt = NULL;
1298 int cvt_idx, mux_idx = 0;
1300 per_pin = get_pin(spec, pin_idx);
1302 /* Dynamically assign converter to stream */
1303 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1304 per_cvt = get_cvt(spec, cvt_idx);
1306 /* Must not already be assigned */
1307 if (per_cvt->assigned)
1309 /* Must be in pin's mux's list of converters */
1310 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1311 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1313 /* Not in mux list */
1314 if (mux_idx == per_pin->num_mux_nids)
1319 /* No free converters */
1320 if (cvt_idx == spec->num_cvts)
1331 /* Intel HDMI workaround to fix audio routing issue:
1332 * For some Intel display codecs, pins share the same connection list.
1333 * So a conveter can be selected by multiple pins and playback on any of these
1334 * pins will generate sound on the external display, because audio flows from
1335 * the same converter to the display pipeline. Also muting one pin may make
1336 * other pins have no sound output.
1337 * So this function assures that an assigned converter for a pin is not selected
1338 * by any other pins.
1340 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1341 hda_nid_t pin_nid, int mux_idx)
1343 struct hdmi_spec *spec = codec->spec;
1344 hda_nid_t nid, end_nid;
1346 struct hdmi_spec_per_cvt *per_cvt;
1348 /* configure all pins, including "no physical connection" ones */
1349 end_nid = codec->start_nid + codec->num_nodes;
1350 for (nid = codec->start_nid; nid < end_nid; nid++) {
1351 unsigned int wid_caps = get_wcaps(codec, nid);
1352 unsigned int wid_type = get_wcaps_type(wid_caps);
1354 if (wid_type != AC_WID_PIN)
1360 curr = snd_hda_codec_read(codec, nid, 0,
1361 AC_VERB_GET_CONNECT_SEL, 0);
1362 if (curr != mux_idx)
1365 /* choose an unassigned converter. The conveters in the
1366 * connection list are in the same order as in the codec.
1368 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1369 per_cvt = get_cvt(spec, cvt_idx);
1370 if (!per_cvt->assigned) {
1371 snd_printdd("choose cvt %d for pin nid %d\n",
1373 snd_hda_codec_write_cache(codec, nid, 0,
1374 AC_VERB_SET_CONNECT_SEL,
1385 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1386 struct hda_codec *codec,
1387 struct snd_pcm_substream *substream)
1389 struct hdmi_spec *spec = codec->spec;
1390 struct snd_pcm_runtime *runtime = substream->runtime;
1391 int pin_idx, cvt_idx, mux_idx = 0;
1392 struct hdmi_spec_per_pin *per_pin;
1393 struct hdmi_eld *eld;
1394 struct hdmi_spec_per_cvt *per_cvt = NULL;
1397 /* Validate hinfo */
1398 pin_idx = hinfo_to_pin_index(spec, hinfo);
1399 if (snd_BUG_ON(pin_idx < 0))
1401 per_pin = get_pin(spec, pin_idx);
1402 eld = &per_pin->sink_eld;
1404 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1408 per_cvt = get_cvt(spec, cvt_idx);
1409 /* Claim converter */
1410 per_cvt->assigned = 1;
1411 per_pin->cvt_nid = per_cvt->cvt_nid;
1412 hinfo->nid = per_cvt->cvt_nid;
1414 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1415 AC_VERB_SET_CONNECT_SEL,
1418 /* configure unused pins to choose other converters */
1419 if (is_haswell(codec) || is_valleyview(codec))
1420 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1422 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1424 /* Initially set the converter's capabilities */
1425 hinfo->channels_min = per_cvt->channels_min;
1426 hinfo->channels_max = per_cvt->channels_max;
1427 hinfo->rates = per_cvt->rates;
1428 hinfo->formats = per_cvt->formats;
1429 hinfo->maxbps = per_cvt->maxbps;
1431 /* Restrict capabilities by ELD if this isn't disabled */
1432 if (!static_hdmi_pcm && eld->eld_valid) {
1433 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1434 if (hinfo->channels_min > hinfo->channels_max ||
1435 !hinfo->rates || !hinfo->formats) {
1436 per_cvt->assigned = 0;
1438 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1443 /* Store the updated parameters */
1444 runtime->hw.channels_min = hinfo->channels_min;
1445 runtime->hw.channels_max = hinfo->channels_max;
1446 runtime->hw.formats = hinfo->formats;
1447 runtime->hw.rates = hinfo->rates;
1449 snd_pcm_hw_constraint_step(substream->runtime, 0,
1450 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1455 * HDA/HDMI auto parsing
1457 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1459 struct hdmi_spec *spec = codec->spec;
1460 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1461 hda_nid_t pin_nid = per_pin->pin_nid;
1463 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1464 snd_printk(KERN_WARNING
1465 "HDMI: pin %d wcaps %#x "
1466 "does not support connection list\n",
1467 pin_nid, get_wcaps(codec, pin_nid));
1471 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1473 HDA_MAX_CONNECTIONS);
1478 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1480 struct hda_codec *codec = per_pin->codec;
1481 struct hdmi_spec *spec = codec->spec;
1482 struct hdmi_eld *eld = &spec->temp_eld;
1483 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1484 hda_nid_t pin_nid = per_pin->pin_nid;
1486 * Always execute a GetPinSense verb here, even when called from
1487 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1488 * response's PD bit is not the real PD value, but indicates that
1489 * the real PD value changed. An older version of the HD-audio
1490 * specification worked this way. Hence, we just ignore the data in
1491 * the unsolicited response to avoid custom WARs.
1493 int present = snd_hda_pin_sense(codec, pin_nid);
1494 bool update_eld = false;
1495 bool eld_changed = false;
1498 mutex_lock(&per_pin->lock);
1499 pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1500 if (pin_eld->monitor_present)
1501 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1503 eld->eld_valid = false;
1505 _snd_printd(SND_PR_VERBOSE,
1506 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1507 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1509 if (eld->eld_valid) {
1510 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1511 &eld->eld_size) < 0)
1512 eld->eld_valid = false;
1514 memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1515 if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1517 eld->eld_valid = false;
1520 if (eld->eld_valid) {
1521 snd_hdmi_show_eld(&eld->info);
1525 queue_delayed_work(codec->bus->workq,
1527 msecs_to_jiffies(300));
1532 if (pin_eld->eld_valid && !eld->eld_valid) {
1537 bool old_eld_valid = pin_eld->eld_valid;
1538 pin_eld->eld_valid = eld->eld_valid;
1539 eld_changed = pin_eld->eld_size != eld->eld_size ||
1540 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1541 eld->eld_size) != 0;
1543 memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1545 pin_eld->eld_size = eld->eld_size;
1546 pin_eld->info = eld->info;
1549 * Re-setup pin and infoframe. This is needed e.g. when
1550 * - sink is first plugged-in (infoframe is not set up if !monitor_present)
1551 * - transcoder can change during stream playback on Haswell
1553 if (eld->eld_valid && !old_eld_valid && per_pin->setup)
1554 hdmi_setup_audio_infoframe(codec, per_pin,
1559 snd_ctl_notify(codec->bus->card,
1560 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1561 &per_pin->eld_ctl->id);
1563 if ((codec->vendor_id & 0xffff0000) == 0x10020000)
1564 ret = true; /* AMD codecs create ELD by itself */
1566 ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1567 mutex_unlock(&per_pin->lock);
1571 static void hdmi_repoll_eld(struct work_struct *work)
1573 struct hdmi_spec_per_pin *per_pin =
1574 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1576 if (per_pin->repoll_count++ > 6)
1577 per_pin->repoll_count = 0;
1579 if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1580 snd_hda_jack_report_sync(per_pin->codec);
1583 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1586 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1588 struct hdmi_spec *spec = codec->spec;
1589 unsigned int caps, config;
1591 struct hdmi_spec_per_pin *per_pin;
1594 caps = snd_hda_query_pin_caps(codec, pin_nid);
1595 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1598 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1599 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1602 if (is_haswell(codec))
1603 intel_haswell_fixup_connect_list(codec, pin_nid);
1605 pin_idx = spec->num_pins;
1606 per_pin = snd_array_new(&spec->pins);
1610 per_pin->pin_nid = pin_nid;
1611 per_pin->non_pcm = false;
1613 err = hdmi_read_pin_conn(codec, pin_idx);
1622 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1624 struct hdmi_spec *spec = codec->spec;
1625 struct hdmi_spec_per_cvt *per_cvt;
1629 chans = get_wcaps(codec, cvt_nid);
1630 chans = get_wcaps_channels(chans);
1632 per_cvt = snd_array_new(&spec->cvts);
1636 per_cvt->cvt_nid = cvt_nid;
1637 per_cvt->channels_min = 2;
1639 per_cvt->channels_max = chans;
1640 if (chans > spec->channels_max)
1641 spec->channels_max = chans;
1644 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1651 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1652 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1658 static int hdmi_parse_codec(struct hda_codec *codec)
1663 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1664 if (!nid || nodes < 0) {
1665 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1669 for (i = 0; i < nodes; i++, nid++) {
1673 caps = get_wcaps(codec, nid);
1674 type = get_wcaps_type(caps);
1676 if (!(caps & AC_WCAP_DIGITAL))
1680 case AC_WID_AUD_OUT:
1681 hdmi_add_cvt(codec, nid);
1684 hdmi_add_pin(codec, nid);
1690 /* We're seeing some problems with unsolicited hot plug events on
1691 * PantherPoint after S3, if this is not enabled */
1692 if (codec->vendor_id == 0x80862806)
1693 codec->bus->power_keep_link_on = 1;
1695 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1696 * can be lost and presence sense verb will become inaccurate if the
1697 * HDA link is powered off at hot plug or hw initialization time.
1699 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1701 codec->bus->power_keep_link_on = 1;
1709 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1711 struct hda_spdif_out *spdif;
1714 mutex_lock(&codec->spdif_mutex);
1715 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1716 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1717 mutex_unlock(&codec->spdif_mutex);
1726 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1727 struct hda_codec *codec,
1728 unsigned int stream_tag,
1729 unsigned int format,
1730 struct snd_pcm_substream *substream)
1732 hda_nid_t cvt_nid = hinfo->nid;
1733 struct hdmi_spec *spec = codec->spec;
1734 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1735 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1736 hda_nid_t pin_nid = per_pin->pin_nid;
1739 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1740 mutex_lock(&per_pin->lock);
1741 per_pin->channels = substream->runtime->channels;
1742 per_pin->setup = true;
1744 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1745 mutex_unlock(&per_pin->lock);
1747 return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1750 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1751 struct hda_codec *codec,
1752 struct snd_pcm_substream *substream)
1754 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1758 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1759 struct hda_codec *codec,
1760 struct snd_pcm_substream *substream)
1762 struct hdmi_spec *spec = codec->spec;
1763 int cvt_idx, pin_idx;
1764 struct hdmi_spec_per_cvt *per_cvt;
1765 struct hdmi_spec_per_pin *per_pin;
1768 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1769 if (snd_BUG_ON(cvt_idx < 0))
1771 per_cvt = get_cvt(spec, cvt_idx);
1773 snd_BUG_ON(!per_cvt->assigned);
1774 per_cvt->assigned = 0;
1777 pin_idx = hinfo_to_pin_index(spec, hinfo);
1778 if (snd_BUG_ON(pin_idx < 0))
1780 per_pin = get_pin(spec, pin_idx);
1782 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1784 mutex_lock(&per_pin->lock);
1785 per_pin->chmap_set = false;
1786 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1788 per_pin->setup = false;
1789 per_pin->channels = 0;
1790 mutex_unlock(&per_pin->lock);
1796 static const struct hda_pcm_ops generic_ops = {
1797 .open = hdmi_pcm_open,
1798 .close = hdmi_pcm_close,
1799 .prepare = generic_hdmi_playback_pcm_prepare,
1800 .cleanup = generic_hdmi_playback_pcm_cleanup,
1804 * ALSA API channel-map control callbacks
1806 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1807 struct snd_ctl_elem_info *uinfo)
1809 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1810 struct hda_codec *codec = info->private_data;
1811 struct hdmi_spec *spec = codec->spec;
1812 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1813 uinfo->count = spec->channels_max;
1814 uinfo->value.integer.min = 0;
1815 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1819 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
1822 /* If the speaker allocation matches the channel count, it is OK.*/
1823 if (cap->channels != channels)
1826 /* all channels are remappable freely */
1827 return SNDRV_CTL_TLVT_CHMAP_VAR;
1830 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
1831 unsigned int *chmap, int channels)
1836 for (c = 7; c >= 0; c--) {
1837 int spk = cap->speakers[c];
1841 chmap[count++] = spk_to_chmap(spk);
1844 WARN_ON(count != channels);
1847 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1848 unsigned int size, unsigned int __user *tlv)
1850 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1851 struct hda_codec *codec = info->private_data;
1852 struct hdmi_spec *spec = codec->spec;
1853 unsigned int __user *dst;
1858 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1862 for (chs = 2; chs <= spec->channels_max; chs++) {
1864 struct cea_channel_speaker_allocation *cap;
1865 cap = channel_allocations;
1866 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1867 int chs_bytes = chs * 4;
1868 int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
1869 unsigned int tlv_chmap[8];
1875 if (put_user(type, dst) ||
1876 put_user(chs_bytes, dst + 1))
1881 if (size < chs_bytes)
1885 spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
1886 if (copy_to_user(dst, tlv_chmap, chs_bytes))
1891 if (put_user(count, tlv + 1))
1896 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1897 struct snd_ctl_elem_value *ucontrol)
1899 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1900 struct hda_codec *codec = info->private_data;
1901 struct hdmi_spec *spec = codec->spec;
1902 int pin_idx = kcontrol->private_value;
1903 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1906 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1907 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1911 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1912 struct snd_ctl_elem_value *ucontrol)
1914 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1915 struct hda_codec *codec = info->private_data;
1916 struct hdmi_spec *spec = codec->spec;
1917 int pin_idx = kcontrol->private_value;
1918 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1919 unsigned int ctl_idx;
1920 struct snd_pcm_substream *substream;
1921 unsigned char chmap[8];
1922 int i, err, ca, prepared = 0;
1924 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1925 substream = snd_pcm_chmap_substream(info, ctl_idx);
1926 if (!substream || !substream->runtime)
1927 return 0; /* just for avoiding error from alsactl restore */
1928 switch (substream->runtime->status->state) {
1929 case SNDRV_PCM_STATE_OPEN:
1930 case SNDRV_PCM_STATE_SETUP:
1932 case SNDRV_PCM_STATE_PREPARED:
1938 memset(chmap, 0, sizeof(chmap));
1939 for (i = 0; i < ARRAY_SIZE(chmap); i++)
1940 chmap[i] = ucontrol->value.integer.value[i];
1941 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1943 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1946 if (spec->ops.chmap_validate) {
1947 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
1951 mutex_lock(&per_pin->lock);
1952 per_pin->chmap_set = true;
1953 memcpy(per_pin->chmap, chmap, sizeof(chmap));
1955 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1956 mutex_unlock(&per_pin->lock);
1961 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1963 struct hdmi_spec *spec = codec->spec;
1966 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1967 struct hda_pcm *info;
1968 struct hda_pcm_stream *pstr;
1969 struct hdmi_spec_per_pin *per_pin;
1971 per_pin = get_pin(spec, pin_idx);
1972 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1973 info = snd_array_new(&spec->pcm_rec);
1976 info->name = per_pin->pcm_name;
1977 info->pcm_type = HDA_PCM_TYPE_HDMI;
1978 info->own_chmap = true;
1980 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1981 pstr->substreams = 1;
1982 pstr->ops = generic_ops;
1983 /* other pstr fields are set in open */
1986 codec->num_pcms = spec->num_pins;
1987 codec->pcm_info = spec->pcm_rec.list;
1992 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1994 char hdmi_str[32] = "HDMI/DP";
1995 struct hdmi_spec *spec = codec->spec;
1996 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1997 int pcmdev = get_pcm_rec(spec, pin_idx)->device;
2000 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2001 if (!is_jack_detectable(codec, per_pin->pin_nid))
2002 strncat(hdmi_str, " Phantom",
2003 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2005 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
2008 static int generic_hdmi_build_controls(struct hda_codec *codec)
2010 struct hdmi_spec *spec = codec->spec;
2014 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2015 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2017 err = generic_hdmi_build_jack(codec, pin_idx);
2021 err = snd_hda_create_dig_out_ctls(codec,
2023 per_pin->mux_nids[0],
2027 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2029 /* add control for ELD Bytes */
2030 err = hdmi_create_eld_ctl(codec, pin_idx,
2031 get_pcm_rec(spec, pin_idx)->device);
2036 hdmi_present_sense(per_pin, 0);
2039 /* add channel maps */
2040 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2041 struct snd_pcm_chmap *chmap;
2042 struct snd_kcontrol *kctl;
2045 if (!codec->pcm_info[pin_idx].pcm)
2047 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
2048 SNDRV_PCM_STREAM_PLAYBACK,
2049 NULL, 0, pin_idx, &chmap);
2052 /* override handlers */
2053 chmap->private_data = codec;
2055 for (i = 0; i < kctl->count; i++)
2056 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2057 kctl->info = hdmi_chmap_ctl_info;
2058 kctl->get = hdmi_chmap_ctl_get;
2059 kctl->put = hdmi_chmap_ctl_put;
2060 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2066 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2068 struct hdmi_spec *spec = codec->spec;
2071 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2072 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2074 per_pin->codec = codec;
2075 mutex_init(&per_pin->lock);
2076 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2077 eld_proc_new(per_pin, pin_idx);
2082 static int generic_hdmi_init(struct hda_codec *codec)
2084 struct hdmi_spec *spec = codec->spec;
2087 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2088 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2089 hda_nid_t pin_nid = per_pin->pin_nid;
2091 hdmi_init_pin(codec, pin_nid);
2092 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
2097 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2099 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2100 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2101 snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
2104 static void hdmi_array_free(struct hdmi_spec *spec)
2106 snd_array_free(&spec->pins);
2107 snd_array_free(&spec->cvts);
2108 snd_array_free(&spec->pcm_rec);
2111 static void generic_hdmi_free(struct hda_codec *codec)
2113 struct hdmi_spec *spec = codec->spec;
2116 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2117 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2119 cancel_delayed_work(&per_pin->work);
2120 eld_proc_free(per_pin);
2123 flush_workqueue(codec->bus->workq);
2124 hdmi_array_free(spec);
2129 static int generic_hdmi_resume(struct hda_codec *codec)
2131 struct hdmi_spec *spec = codec->spec;
2134 generic_hdmi_init(codec);
2135 snd_hda_codec_resume_amp(codec);
2136 snd_hda_codec_resume_cache(codec);
2138 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2139 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2140 hdmi_present_sense(per_pin, 1);
2146 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2147 .init = generic_hdmi_init,
2148 .free = generic_hdmi_free,
2149 .build_pcms = generic_hdmi_build_pcms,
2150 .build_controls = generic_hdmi_build_controls,
2151 .unsol_event = hdmi_unsol_event,
2153 .resume = generic_hdmi_resume,
2157 static const struct hdmi_ops generic_standard_hdmi_ops = {
2158 .pin_get_eld = snd_hdmi_get_eld,
2159 .pin_get_slot_channel = hdmi_pin_get_slot_channel,
2160 .pin_set_slot_channel = hdmi_pin_set_slot_channel,
2161 .pin_setup_infoframe = hdmi_pin_setup_infoframe,
2162 .pin_hbr_setup = hdmi_pin_hbr_setup,
2163 .setup_stream = hdmi_setup_stream,
2164 .chmap_cea_alloc_validate_get_type = hdmi_chmap_cea_alloc_validate_get_type,
2165 .cea_alloc_to_tlv_chmap = hdmi_cea_alloc_to_tlv_chmap,
2169 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2172 struct hdmi_spec *spec = codec->spec;
2176 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2177 if (nconns == spec->num_cvts &&
2178 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2181 /* override pins connection list */
2182 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
2183 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2186 #define INTEL_VENDOR_NID 0x08
2187 #define INTEL_GET_VENDOR_VERB 0xf81
2188 #define INTEL_SET_VENDOR_VERB 0x781
2189 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
2190 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2192 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2195 unsigned int vendor_param;
2197 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2198 INTEL_GET_VENDOR_VERB, 0);
2199 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2202 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2203 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2204 INTEL_SET_VENDOR_VERB, vendor_param);
2205 if (vendor_param == -1)
2209 snd_hda_codec_update_widgets(codec);
2212 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2214 unsigned int vendor_param;
2216 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2217 INTEL_GET_VENDOR_VERB, 0);
2218 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2221 /* enable DP1.2 mode */
2222 vendor_param |= INTEL_EN_DP12;
2223 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2224 INTEL_SET_VENDOR_VERB, vendor_param);
2227 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2228 * Otherwise you may get severe h/w communication errors.
2230 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2231 unsigned int power_state)
2233 if (power_state == AC_PWRST_D0) {
2234 intel_haswell_enable_all_pins(codec, false);
2235 intel_haswell_fixup_enable_dp12(codec);
2238 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2239 snd_hda_codec_set_power_to_all(codec, fg, power_state);
2242 static int patch_generic_hdmi(struct hda_codec *codec)
2244 struct hdmi_spec *spec;
2246 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2250 spec->ops = generic_standard_hdmi_ops;
2252 hdmi_array_init(spec, 4);
2254 if (is_haswell(codec)) {
2255 intel_haswell_enable_all_pins(codec, true);
2256 intel_haswell_fixup_enable_dp12(codec);
2259 if (hdmi_parse_codec(codec) < 0) {
2264 codec->patch_ops = generic_hdmi_patch_ops;
2265 if (is_haswell(codec)) {
2266 codec->patch_ops.set_power_state = haswell_set_power_state;
2267 codec->dp_mst = true;
2270 generic_hdmi_init_per_pins(codec);
2272 init_channel_allocations();
2278 * Shared non-generic implementations
2281 static int simple_playback_build_pcms(struct hda_codec *codec)
2283 struct hdmi_spec *spec = codec->spec;
2284 struct hda_pcm *info;
2286 struct hda_pcm_stream *pstr;
2287 struct hdmi_spec_per_cvt *per_cvt;
2289 per_cvt = get_cvt(spec, 0);
2290 chans = get_wcaps(codec, per_cvt->cvt_nid);
2291 chans = get_wcaps_channels(chans);
2293 info = snd_array_new(&spec->pcm_rec);
2296 info->name = get_pin(spec, 0)->pcm_name;
2297 sprintf(info->name, "HDMI 0");
2298 info->pcm_type = HDA_PCM_TYPE_HDMI;
2299 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2300 *pstr = spec->pcm_playback;
2301 pstr->nid = per_cvt->cvt_nid;
2302 if (pstr->channels_max <= 2 && chans && chans <= 16)
2303 pstr->channels_max = chans;
2305 codec->num_pcms = 1;
2306 codec->pcm_info = info;
2311 /* unsolicited event for jack sensing */
2312 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2315 snd_hda_jack_set_dirty_all(codec);
2316 snd_hda_jack_report_sync(codec);
2319 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2320 * as long as spec->pins[] is set correctly
2322 #define simple_hdmi_build_jack generic_hdmi_build_jack
2324 static int simple_playback_build_controls(struct hda_codec *codec)
2326 struct hdmi_spec *spec = codec->spec;
2327 struct hdmi_spec_per_cvt *per_cvt;
2330 per_cvt = get_cvt(spec, 0);
2331 err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
2335 return simple_hdmi_build_jack(codec, 0);
2338 static int simple_playback_init(struct hda_codec *codec)
2340 struct hdmi_spec *spec = codec->spec;
2341 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2342 hda_nid_t pin = per_pin->pin_nid;
2344 snd_hda_codec_write(codec, pin, 0,
2345 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2346 /* some codecs require to unmute the pin */
2347 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2348 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2350 snd_hda_jack_detect_enable(codec, pin, pin);
2354 static void simple_playback_free(struct hda_codec *codec)
2356 struct hdmi_spec *spec = codec->spec;
2358 hdmi_array_free(spec);
2363 * Nvidia specific implementations
2366 #define Nv_VERB_SET_Channel_Allocation 0xF79
2367 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2368 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2369 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2371 #define nvhdmi_master_con_nid_7x 0x04
2372 #define nvhdmi_master_pin_nid_7x 0x05
2374 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2375 /*front, rear, clfe, rear_surr */
2379 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2380 /* set audio protect on */
2381 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2382 /* enable digital output on pin widget */
2383 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2387 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2388 /* set audio protect on */
2389 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2390 /* enable digital output on pin widget */
2391 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2392 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2393 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2394 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2395 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2399 #ifdef LIMITED_RATE_FMT_SUPPORT
2400 /* support only the safe format and rate */
2401 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2402 #define SUPPORTED_MAXBPS 16
2403 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2405 /* support all rates and formats */
2406 #define SUPPORTED_RATES \
2407 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2408 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2409 SNDRV_PCM_RATE_192000)
2410 #define SUPPORTED_MAXBPS 24
2411 #define SUPPORTED_FORMATS \
2412 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2415 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2417 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2421 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2423 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2427 static unsigned int channels_2_6_8[] = {
2431 static unsigned int channels_2_8[] = {
2435 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2436 .count = ARRAY_SIZE(channels_2_6_8),
2437 .list = channels_2_6_8,
2441 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2442 .count = ARRAY_SIZE(channels_2_8),
2443 .list = channels_2_8,
2447 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2448 struct hda_codec *codec,
2449 struct snd_pcm_substream *substream)
2451 struct hdmi_spec *spec = codec->spec;
2452 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2454 switch (codec->preset->id) {
2459 hw_constraints_channels = &hw_constraints_2_8_channels;
2462 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2468 if (hw_constraints_channels != NULL) {
2469 snd_pcm_hw_constraint_list(substream->runtime, 0,
2470 SNDRV_PCM_HW_PARAM_CHANNELS,
2471 hw_constraints_channels);
2473 snd_pcm_hw_constraint_step(substream->runtime, 0,
2474 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2477 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2480 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2481 struct hda_codec *codec,
2482 struct snd_pcm_substream *substream)
2484 struct hdmi_spec *spec = codec->spec;
2485 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2488 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2489 struct hda_codec *codec,
2490 unsigned int stream_tag,
2491 unsigned int format,
2492 struct snd_pcm_substream *substream)
2494 struct hdmi_spec *spec = codec->spec;
2495 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2496 stream_tag, format, substream);
2499 static const struct hda_pcm_stream simple_pcm_playback = {
2504 .open = simple_playback_pcm_open,
2505 .close = simple_playback_pcm_close,
2506 .prepare = simple_playback_pcm_prepare
2510 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2511 .build_controls = simple_playback_build_controls,
2512 .build_pcms = simple_playback_build_pcms,
2513 .init = simple_playback_init,
2514 .free = simple_playback_free,
2515 .unsol_event = simple_hdmi_unsol_event,
2518 static int patch_simple_hdmi(struct hda_codec *codec,
2519 hda_nid_t cvt_nid, hda_nid_t pin_nid)
2521 struct hdmi_spec *spec;
2522 struct hdmi_spec_per_cvt *per_cvt;
2523 struct hdmi_spec_per_pin *per_pin;
2525 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2530 hdmi_array_init(spec, 1);
2532 spec->multiout.num_dacs = 0; /* no analog */
2533 spec->multiout.max_channels = 2;
2534 spec->multiout.dig_out_nid = cvt_nid;
2537 per_pin = snd_array_new(&spec->pins);
2538 per_cvt = snd_array_new(&spec->cvts);
2539 if (!per_pin || !per_cvt) {
2540 simple_playback_free(codec);
2543 per_cvt->cvt_nid = cvt_nid;
2544 per_pin->pin_nid = pin_nid;
2545 spec->pcm_playback = simple_pcm_playback;
2547 codec->patch_ops = simple_hdmi_patch_ops;
2552 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2555 unsigned int chanmask;
2556 int chan = channels ? (channels - 1) : 1;
2575 /* Set the audio infoframe channel allocation and checksum fields. The
2576 * channel count is computed implicitly by the hardware. */
2577 snd_hda_codec_write(codec, 0x1, 0,
2578 Nv_VERB_SET_Channel_Allocation, chanmask);
2580 snd_hda_codec_write(codec, 0x1, 0,
2581 Nv_VERB_SET_Info_Frame_Checksum,
2582 (0x71 - chan - chanmask));
2585 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2586 struct hda_codec *codec,
2587 struct snd_pcm_substream *substream)
2589 struct hdmi_spec *spec = codec->spec;
2592 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2593 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2594 for (i = 0; i < 4; i++) {
2595 /* set the stream id */
2596 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2597 AC_VERB_SET_CHANNEL_STREAMID, 0);
2598 /* set the stream format */
2599 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2600 AC_VERB_SET_STREAM_FORMAT, 0);
2603 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2604 * streams are disabled. */
2605 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2607 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2610 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2611 struct hda_codec *codec,
2612 unsigned int stream_tag,
2613 unsigned int format,
2614 struct snd_pcm_substream *substream)
2617 unsigned int dataDCC2, channel_id;
2619 struct hdmi_spec *spec = codec->spec;
2620 struct hda_spdif_out *spdif;
2621 struct hdmi_spec_per_cvt *per_cvt;
2623 mutex_lock(&codec->spdif_mutex);
2624 per_cvt = get_cvt(spec, 0);
2625 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2627 chs = substream->runtime->channels;
2631 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2632 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2633 snd_hda_codec_write(codec,
2634 nvhdmi_master_con_nid_7x,
2636 AC_VERB_SET_DIGI_CONVERT_1,
2637 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2639 /* set the stream id */
2640 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2641 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2643 /* set the stream format */
2644 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2645 AC_VERB_SET_STREAM_FORMAT, format);
2647 /* turn on again (if needed) */
2648 /* enable and set the channel status audio/data flag */
2649 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2650 snd_hda_codec_write(codec,
2651 nvhdmi_master_con_nid_7x,
2653 AC_VERB_SET_DIGI_CONVERT_1,
2654 spdif->ctls & 0xff);
2655 snd_hda_codec_write(codec,
2656 nvhdmi_master_con_nid_7x,
2658 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2661 for (i = 0; i < 4; i++) {
2667 /* turn off SPDIF once;
2668 *otherwise the IEC958 bits won't be updated
2670 if (codec->spdif_status_reset &&
2671 (spdif->ctls & AC_DIG1_ENABLE))
2672 snd_hda_codec_write(codec,
2673 nvhdmi_con_nids_7x[i],
2675 AC_VERB_SET_DIGI_CONVERT_1,
2676 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2677 /* set the stream id */
2678 snd_hda_codec_write(codec,
2679 nvhdmi_con_nids_7x[i],
2681 AC_VERB_SET_CHANNEL_STREAMID,
2682 (stream_tag << 4) | channel_id);
2683 /* set the stream format */
2684 snd_hda_codec_write(codec,
2685 nvhdmi_con_nids_7x[i],
2687 AC_VERB_SET_STREAM_FORMAT,
2689 /* turn on again (if needed) */
2690 /* enable and set the channel status audio/data flag */
2691 if (codec->spdif_status_reset &&
2692 (spdif->ctls & AC_DIG1_ENABLE)) {
2693 snd_hda_codec_write(codec,
2694 nvhdmi_con_nids_7x[i],
2696 AC_VERB_SET_DIGI_CONVERT_1,
2697 spdif->ctls & 0xff);
2698 snd_hda_codec_write(codec,
2699 nvhdmi_con_nids_7x[i],
2701 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2705 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2707 mutex_unlock(&codec->spdif_mutex);
2711 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2715 .nid = nvhdmi_master_con_nid_7x,
2716 .rates = SUPPORTED_RATES,
2717 .maxbps = SUPPORTED_MAXBPS,
2718 .formats = SUPPORTED_FORMATS,
2720 .open = simple_playback_pcm_open,
2721 .close = nvhdmi_8ch_7x_pcm_close,
2722 .prepare = nvhdmi_8ch_7x_pcm_prepare
2726 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2728 struct hdmi_spec *spec;
2729 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2730 nvhdmi_master_pin_nid_7x);
2734 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2735 /* override the PCM rates, etc, as the codec doesn't give full list */
2737 spec->pcm_playback.rates = SUPPORTED_RATES;
2738 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2739 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2743 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2745 struct hdmi_spec *spec = codec->spec;
2746 int err = simple_playback_build_pcms(codec);
2748 struct hda_pcm *info = get_pcm_rec(spec, 0);
2749 info->own_chmap = true;
2754 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2756 struct hdmi_spec *spec = codec->spec;
2757 struct hda_pcm *info;
2758 struct snd_pcm_chmap *chmap;
2761 err = simple_playback_build_controls(codec);
2765 /* add channel maps */
2766 info = get_pcm_rec(spec, 0);
2767 err = snd_pcm_add_chmap_ctls(info->pcm,
2768 SNDRV_PCM_STREAM_PLAYBACK,
2769 snd_pcm_alt_chmaps, 8, 0, &chmap);
2772 switch (codec->preset->id) {
2777 chmap->channel_mask = (1U << 2) | (1U << 8);
2780 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2785 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2787 struct hdmi_spec *spec;
2788 int err = patch_nvhdmi_2ch(codec);
2792 spec->multiout.max_channels = 8;
2793 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2794 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2795 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2796 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2798 /* Initialize the audio infoframe channel mask and checksum to something
2800 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2806 * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2810 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2813 if (cap->ca_index == 0x00 && channels == 2)
2814 return SNDRV_CTL_TLVT_CHMAP_FIXED;
2816 return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
2819 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
2821 if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2827 static int patch_nvhdmi(struct hda_codec *codec)
2829 struct hdmi_spec *spec;
2832 err = patch_generic_hdmi(codec);
2838 spec->ops.chmap_cea_alloc_validate_get_type =
2839 nvhdmi_chmap_cea_alloc_validate_get_type;
2840 spec->ops.chmap_validate = nvhdmi_chmap_validate;
2846 * ATI/AMD-specific implementations
2849 #define is_amdhdmi_rev3_or_later(codec) \
2850 ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
2851 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
2853 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
2854 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
2855 #define ATI_VERB_SET_DOWNMIX_INFO 0x772
2856 #define ATI_VERB_SET_MULTICHANNEL_01 0x777
2857 #define ATI_VERB_SET_MULTICHANNEL_23 0x778
2858 #define ATI_VERB_SET_MULTICHANNEL_45 0x779
2859 #define ATI_VERB_SET_MULTICHANNEL_67 0x77a
2860 #define ATI_VERB_SET_HBR_CONTROL 0x77c
2861 #define ATI_VERB_SET_MULTICHANNEL_1 0x785
2862 #define ATI_VERB_SET_MULTICHANNEL_3 0x786
2863 #define ATI_VERB_SET_MULTICHANNEL_5 0x787
2864 #define ATI_VERB_SET_MULTICHANNEL_7 0x788
2865 #define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
2866 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
2867 #define ATI_VERB_GET_DOWNMIX_INFO 0xf72
2868 #define ATI_VERB_GET_MULTICHANNEL_01 0xf77
2869 #define ATI_VERB_GET_MULTICHANNEL_23 0xf78
2870 #define ATI_VERB_GET_MULTICHANNEL_45 0xf79
2871 #define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
2872 #define ATI_VERB_GET_HBR_CONTROL 0xf7c
2873 #define ATI_VERB_GET_MULTICHANNEL_1 0xf85
2874 #define ATI_VERB_GET_MULTICHANNEL_3 0xf86
2875 #define ATI_VERB_GET_MULTICHANNEL_5 0xf87
2876 #define ATI_VERB_GET_MULTICHANNEL_7 0xf88
2877 #define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
2879 /* AMD specific HDA cvt verbs */
2880 #define ATI_VERB_SET_RAMP_RATE 0x770
2881 #define ATI_VERB_GET_RAMP_RATE 0xf70
2883 #define ATI_OUT_ENABLE 0x1
2885 #define ATI_MULTICHANNEL_MODE_PAIRED 0
2886 #define ATI_MULTICHANNEL_MODE_SINGLE 1
2888 #define ATI_HBR_CAPABLE 0x01
2889 #define ATI_HBR_ENABLE 0x10
2891 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
2892 unsigned char *buf, int *eld_size)
2894 /* call hda_eld.c ATI/AMD-specific function */
2895 return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
2896 is_amdhdmi_rev3_or_later(codec));
2899 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
2900 int active_channels, int conn_type)
2902 snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
2905 static int atihdmi_paired_swap_fc_lfe(int pos)
2908 * ATI/AMD have automatic FC/LFE swap built-in
2909 * when in pairwise mapping mode.
2913 /* see channel_allocations[].speakers[] */
2922 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
2924 struct cea_channel_speaker_allocation *cap;
2927 /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
2929 cap = &channel_allocations[get_channel_allocation_order(ca)];
2930 for (i = 0; i < chs; ++i) {
2931 int mask = to_spk_mask(map[i]);
2933 bool companion_ok = false;
2938 for (j = 0 + i % 2; j < 8; j += 2) {
2939 int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
2940 if (cap->speakers[chan_idx] == mask) {
2941 /* channel is in a supported position */
2944 if (i % 2 == 0 && i + 1 < chs) {
2945 /* even channel, check the odd companion */
2946 int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
2947 int comp_mask_req = to_spk_mask(map[i+1]);
2948 int comp_mask_act = cap->speakers[comp_chan_idx];
2950 if (comp_mask_req == comp_mask_act)
2951 companion_ok = true;
2963 i++; /* companion channel already checked */
2969 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
2970 int hdmi_slot, int stream_channel)
2973 int ati_channel_setup = 0;
2978 if (!has_amd_full_remap_support(codec)) {
2979 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
2981 /* In case this is an odd slot but without stream channel, do not
2982 * disable the slot since the corresponding even slot could have a
2983 * channel. In case neither have a channel, the slot pair will be
2984 * disabled when this function is called for the even slot. */
2985 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
2988 hdmi_slot -= hdmi_slot % 2;
2990 if (stream_channel != 0xf)
2991 stream_channel -= stream_channel % 2;
2994 verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
2996 /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
2998 if (stream_channel != 0xf)
2999 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3001 return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3004 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3007 bool was_odd = false;
3008 int ati_asp_slot = asp_slot;
3010 int ati_channel_setup;
3015 if (!has_amd_full_remap_support(codec)) {
3016 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3017 if (ati_asp_slot % 2 != 0) {
3023 verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3025 ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3027 if (!(ati_channel_setup & ATI_OUT_ENABLE))
3030 return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3033 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3039 * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3040 * we need to take that into account (a single channel may take 2
3041 * channel slots if we need to carry a silent channel next to it).
3042 * On Rev3+ AMD codecs this function is not used.
3046 /* We only produce even-numbered channel count TLVs */
3047 if ((channels % 2) != 0)
3050 for (c = 0; c < 7; c += 2) {
3051 if (cap->speakers[c] || cap->speakers[c+1])
3055 if (chanpairs * 2 != channels)
3058 return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3061 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3062 unsigned int *chmap, int channels)
3064 /* produce paired maps for pre-rev3 ATI/AMD codecs */
3068 for (c = 7; c >= 0; c--) {
3069 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3070 int spk = cap->speakers[chan];
3072 /* add N/A channel if the companion channel is occupied */
3073 if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3074 chmap[count++] = SNDRV_CHMAP_NA;
3079 chmap[count++] = spk_to_chmap(spk);
3082 WARN_ON(count != channels);
3085 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3088 int hbr_ctl, hbr_ctl_new;
3090 hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3091 if (hbr_ctl & ATI_HBR_CAPABLE) {
3093 hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3095 hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3097 snd_printdd("atihdmi_pin_hbr_setup: "
3098 "NID=0x%x, %shbr-ctl=0x%x\n",
3100 hbr_ctl == hbr_ctl_new ? "" : "new-",
3103 if (hbr_ctl != hbr_ctl_new)
3104 snd_hda_codec_write(codec, pin_nid, 0,
3105 ATI_VERB_SET_HBR_CONTROL,
3114 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3115 hda_nid_t pin_nid, u32 stream_tag, int format)
3118 if (is_amdhdmi_rev3_or_later(codec)) {
3119 int ramp_rate = 180; /* default as per AMD spec */
3120 /* disable ramp-up/down for non-pcm as per AMD spec */
3121 if (format & AC_FMT_TYPE_NON_PCM)
3124 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3127 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3131 static int atihdmi_init(struct hda_codec *codec)
3133 struct hdmi_spec *spec = codec->spec;
3136 err = generic_hdmi_init(codec);
3141 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3142 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3144 /* make sure downmix information in infoframe is zero */
3145 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3147 /* enable channel-wise remap mode if supported */
3148 if (has_amd_full_remap_support(codec))
3149 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3150 ATI_VERB_SET_MULTICHANNEL_MODE,
3151 ATI_MULTICHANNEL_MODE_SINGLE);
3157 static int patch_atihdmi(struct hda_codec *codec)
3159 struct hdmi_spec *spec;
3160 struct hdmi_spec_per_cvt *per_cvt;
3163 err = patch_generic_hdmi(codec);
3168 codec->patch_ops.init = atihdmi_init;
3172 spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3173 spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3174 spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3175 spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3176 spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3177 spec->ops.setup_stream = atihdmi_setup_stream;
3179 if (!has_amd_full_remap_support(codec)) {
3180 /* override to ATI/AMD-specific versions with pairwise mapping */
3181 spec->ops.chmap_cea_alloc_validate_get_type =
3182 atihdmi_paired_chmap_cea_alloc_validate_get_type;
3183 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3184 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3187 /* ATI/AMD converters do not advertise all of their capabilities */
3188 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3189 per_cvt = get_cvt(spec, cvt_idx);
3190 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3191 per_cvt->rates |= SUPPORTED_RATES;
3192 per_cvt->formats |= SUPPORTED_FORMATS;
3193 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3196 spec->channels_max = max(spec->channels_max, 8u);
3201 /* VIA HDMI Implementation */
3202 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
3203 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
3205 static int patch_via_hdmi(struct hda_codec *codec)
3207 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3213 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
3214 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
3215 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
3216 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
3217 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_atihdmi },
3218 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
3219 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
3220 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
3221 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
3222 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
3223 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
3224 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
3225 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
3226 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_nvhdmi },
3227 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_nvhdmi },
3228 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_nvhdmi },
3229 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_nvhdmi },
3230 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_nvhdmi },
3231 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_nvhdmi },
3232 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_nvhdmi },
3233 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_nvhdmi },
3234 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_nvhdmi },
3235 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_nvhdmi },
3236 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_nvhdmi },
3237 /* 17 is known to be absent */
3238 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_nvhdmi },
3239 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_nvhdmi },
3240 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_nvhdmi },
3241 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_nvhdmi },
3242 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_nvhdmi },
3243 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_nvhdmi },
3244 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_nvhdmi },
3245 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_nvhdmi },
3246 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_nvhdmi },
3247 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_nvhdmi },
3248 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_nvhdmi },
3249 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_nvhdmi },
3250 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
3251 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
3252 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
3253 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
3254 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
3255 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
3256 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
3257 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
3258 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
3259 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
3260 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
3261 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
3262 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
3263 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
3264 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
3265 { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
3266 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
3270 MODULE_ALIAS("snd-hda-codec-id:1002793c");
3271 MODULE_ALIAS("snd-hda-codec-id:10027919");
3272 MODULE_ALIAS("snd-hda-codec-id:1002791a");
3273 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
3274 MODULE_ALIAS("snd-hda-codec-id:10951390");
3275 MODULE_ALIAS("snd-hda-codec-id:10951392");
3276 MODULE_ALIAS("snd-hda-codec-id:10de0002");
3277 MODULE_ALIAS("snd-hda-codec-id:10de0003");
3278 MODULE_ALIAS("snd-hda-codec-id:10de0005");
3279 MODULE_ALIAS("snd-hda-codec-id:10de0006");
3280 MODULE_ALIAS("snd-hda-codec-id:10de0007");
3281 MODULE_ALIAS("snd-hda-codec-id:10de000a");
3282 MODULE_ALIAS("snd-hda-codec-id:10de000b");
3283 MODULE_ALIAS("snd-hda-codec-id:10de000c");
3284 MODULE_ALIAS("snd-hda-codec-id:10de000d");
3285 MODULE_ALIAS("snd-hda-codec-id:10de0010");
3286 MODULE_ALIAS("snd-hda-codec-id:10de0011");
3287 MODULE_ALIAS("snd-hda-codec-id:10de0012");
3288 MODULE_ALIAS("snd-hda-codec-id:10de0013");
3289 MODULE_ALIAS("snd-hda-codec-id:10de0014");
3290 MODULE_ALIAS("snd-hda-codec-id:10de0015");
3291 MODULE_ALIAS("snd-hda-codec-id:10de0016");
3292 MODULE_ALIAS("snd-hda-codec-id:10de0018");
3293 MODULE_ALIAS("snd-hda-codec-id:10de0019");
3294 MODULE_ALIAS("snd-hda-codec-id:10de001a");
3295 MODULE_ALIAS("snd-hda-codec-id:10de001b");
3296 MODULE_ALIAS("snd-hda-codec-id:10de001c");
3297 MODULE_ALIAS("snd-hda-codec-id:10de0040");
3298 MODULE_ALIAS("snd-hda-codec-id:10de0041");
3299 MODULE_ALIAS("snd-hda-codec-id:10de0042");
3300 MODULE_ALIAS("snd-hda-codec-id:10de0043");
3301 MODULE_ALIAS("snd-hda-codec-id:10de0044");
3302 MODULE_ALIAS("snd-hda-codec-id:10de0051");
3303 MODULE_ALIAS("snd-hda-codec-id:10de0060");
3304 MODULE_ALIAS("snd-hda-codec-id:10de0067");
3305 MODULE_ALIAS("snd-hda-codec-id:10de8001");
3306 MODULE_ALIAS("snd-hda-codec-id:11069f80");
3307 MODULE_ALIAS("snd-hda-codec-id:11069f81");
3308 MODULE_ALIAS("snd-hda-codec-id:11069f84");
3309 MODULE_ALIAS("snd-hda-codec-id:11069f85");
3310 MODULE_ALIAS("snd-hda-codec-id:17e80047");
3311 MODULE_ALIAS("snd-hda-codec-id:80860054");
3312 MODULE_ALIAS("snd-hda-codec-id:80862801");
3313 MODULE_ALIAS("snd-hda-codec-id:80862802");
3314 MODULE_ALIAS("snd-hda-codec-id:80862803");
3315 MODULE_ALIAS("snd-hda-codec-id:80862804");
3316 MODULE_ALIAS("snd-hda-codec-id:80862805");
3317 MODULE_ALIAS("snd-hda-codec-id:80862806");
3318 MODULE_ALIAS("snd-hda-codec-id:80862807");
3319 MODULE_ALIAS("snd-hda-codec-id:80862880");
3320 MODULE_ALIAS("snd-hda-codec-id:80862882");
3321 MODULE_ALIAS("snd-hda-codec-id:808629fb");
3323 MODULE_LICENSE("GPL");
3324 MODULE_DESCRIPTION("HDMI HD-audio codec");
3325 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3326 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3327 MODULE_ALIAS("snd-hda-codec-atihdmi");
3329 static struct hda_codec_preset_list intel_list = {
3330 .preset = snd_hda_preset_hdmi,
3331 .owner = THIS_MODULE,
3334 static int __init patch_hdmi_init(void)
3336 return snd_hda_add_codec_preset(&intel_list);
3339 static void __exit patch_hdmi_exit(void)
3341 snd_hda_delete_codec_preset(&intel_list);
3344 module_init(patch_hdmi_init)
3345 module_exit(patch_hdmi_exit)