a96403a828af4907228d8e776a50407e40986581
[sfrench/cifs-2.6.git] / sound / pci / hda / patch_hdmi.c
1 /*
2  *
3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
4  *
5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6  *  Copyright (c) 2006 ATI Technologies Inc.
7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
10  *
11  *  Authors:
12  *                      Wu Fengguang <wfg@linux.intel.com>
13  *
14  *  Maintained by:
15  *                      Wu Fengguang <wfg@linux.intel.com>
16  *
17  *  This program is free software; you can redistribute it and/or modify it
18  *  under the terms of the GNU General Public License as published by the Free
19  *  Software Foundation; either version 2 of the License, or (at your option)
20  *  any later version.
21  *
22  *  This program is distributed in the hope that it will be useful, but
23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
25  *  for more details.
26  *
27  *  You should have received a copy of the GNU General Public License
28  *  along with this program; if not, write to the Free Software Foundation,
29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
30  */
31
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/slab.h>
35 #include <linux/module.h>
36 #include <sound/core.h>
37 #include <sound/jack.h>
38 #include <sound/asoundef.h>
39 #include <sound/tlv.h>
40 #include "hda_codec.h"
41 #include "hda_local.h"
42 #include "hda_jack.h"
43
44 static bool static_hdmi_pcm;
45 module_param(static_hdmi_pcm, bool, 0644);
46 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
47
48 #define is_haswell(codec)  ((codec)->vendor_id == 0x80862807)
49 #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
50
51 struct hdmi_spec_per_cvt {
52         hda_nid_t cvt_nid;
53         int assigned;
54         unsigned int channels_min;
55         unsigned int channels_max;
56         u32 rates;
57         u64 formats;
58         unsigned int maxbps;
59 };
60
61 /* max. connections to a widget */
62 #define HDA_MAX_CONNECTIONS     32
63
64 struct hdmi_spec_per_pin {
65         hda_nid_t pin_nid;
66         int num_mux_nids;
67         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
68         hda_nid_t cvt_nid;
69
70         struct hda_codec *codec;
71         struct hdmi_eld sink_eld;
72         struct mutex lock;
73         struct delayed_work work;
74         struct snd_kcontrol *eld_ctl;
75         int repoll_count;
76         bool setup; /* the stream has been set up by prepare callback */
77         int channels; /* current number of channels */
78         bool non_pcm;
79         bool chmap_set;         /* channel-map override by ALSA API? */
80         unsigned char chmap[8]; /* ALSA API channel-map */
81         char pcm_name[8];       /* filled in build_pcm callbacks */
82 #ifdef CONFIG_PROC_FS
83         struct snd_info_entry *proc_entry;
84 #endif
85 };
86
87 struct cea_channel_speaker_allocation;
88
89 /* operations used by generic code that can be overridden by patches */
90 struct hdmi_ops {
91         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
92                            unsigned char *buf, int *eld_size);
93
94         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
95         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
96                                     int asp_slot);
97         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
98                                     int asp_slot, int channel);
99
100         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
101                                     int ca, int active_channels, int conn_type);
102
103         /* enable/disable HBR (HD passthrough) */
104         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
105
106         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
107                             hda_nid_t pin_nid, u32 stream_tag, int format);
108
109         /* Helpers for producing the channel map TLVs. These can be overridden
110          * for devices that have non-standard mapping requirements. */
111         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
112                                                  int channels);
113         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
114                                        unsigned int *chmap, int channels);
115
116         /* check that the user-given chmap is supported */
117         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
118 };
119
120 struct hdmi_spec {
121         int num_cvts;
122         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
123         hda_nid_t cvt_nids[4]; /* only for haswell fix */
124
125         int num_pins;
126         struct snd_array pins; /* struct hdmi_spec_per_pin */
127         struct snd_array pcm_rec; /* struct hda_pcm */
128         unsigned int channels_max; /* max over all cvts */
129
130         struct hdmi_eld temp_eld;
131         struct hdmi_ops ops;
132         /*
133          * Non-generic VIA/NVIDIA specific
134          */
135         struct hda_multi_out multiout;
136         struct hda_pcm_stream pcm_playback;
137 };
138
139
140 struct hdmi_audio_infoframe {
141         u8 type; /* 0x84 */
142         u8 ver;  /* 0x01 */
143         u8 len;  /* 0x0a */
144
145         u8 checksum;
146
147         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
148         u8 SS01_SF24;
149         u8 CXT04;
150         u8 CA;
151         u8 LFEPBL01_LSV36_DM_INH7;
152 };
153
154 struct dp_audio_infoframe {
155         u8 type; /* 0x84 */
156         u8 len;  /* 0x1b */
157         u8 ver;  /* 0x11 << 2 */
158
159         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
160         u8 SS01_SF24;
161         u8 CXT04;
162         u8 CA;
163         u8 LFEPBL01_LSV36_DM_INH7;
164 };
165
166 union audio_infoframe {
167         struct hdmi_audio_infoframe hdmi;
168         struct dp_audio_infoframe dp;
169         u8 bytes[0];
170 };
171
172 /*
173  * CEA speaker placement:
174  *
175  *        FLH       FCH        FRH
176  *  FLW    FL  FLC   FC   FRC   FR   FRW
177  *
178  *                                  LFE
179  *                     TC
180  *
181  *          RL  RLC   RC   RRC   RR
182  *
183  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
184  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
185  */
186 enum cea_speaker_placement {
187         FL  = (1 <<  0),        /* Front Left           */
188         FC  = (1 <<  1),        /* Front Center         */
189         FR  = (1 <<  2),        /* Front Right          */
190         FLC = (1 <<  3),        /* Front Left Center    */
191         FRC = (1 <<  4),        /* Front Right Center   */
192         RL  = (1 <<  5),        /* Rear Left            */
193         RC  = (1 <<  6),        /* Rear Center          */
194         RR  = (1 <<  7),        /* Rear Right           */
195         RLC = (1 <<  8),        /* Rear Left Center     */
196         RRC = (1 <<  9),        /* Rear Right Center    */
197         LFE = (1 << 10),        /* Low Frequency Effect */
198         FLW = (1 << 11),        /* Front Left Wide      */
199         FRW = (1 << 12),        /* Front Right Wide     */
200         FLH = (1 << 13),        /* Front Left High      */
201         FCH = (1 << 14),        /* Front Center High    */
202         FRH = (1 << 15),        /* Front Right High     */
203         TC  = (1 << 16),        /* Top Center           */
204 };
205
206 /*
207  * ELD SA bits in the CEA Speaker Allocation data block
208  */
209 static int eld_speaker_allocation_bits[] = {
210         [0] = FL | FR,
211         [1] = LFE,
212         [2] = FC,
213         [3] = RL | RR,
214         [4] = RC,
215         [5] = FLC | FRC,
216         [6] = RLC | RRC,
217         /* the following are not defined in ELD yet */
218         [7] = FLW | FRW,
219         [8] = FLH | FRH,
220         [9] = TC,
221         [10] = FCH,
222 };
223
224 struct cea_channel_speaker_allocation {
225         int ca_index;
226         int speakers[8];
227
228         /* derived values, just for convenience */
229         int channels;
230         int spk_mask;
231 };
232
233 /*
234  * ALSA sequence is:
235  *
236  *       surround40   surround41   surround50   surround51   surround71
237  * ch0   front left   =            =            =            =
238  * ch1   front right  =            =            =            =
239  * ch2   rear left    =            =            =            =
240  * ch3   rear right   =            =            =            =
241  * ch4                LFE          center       center       center
242  * ch5                                          LFE          LFE
243  * ch6                                                       side left
244  * ch7                                                       side right
245  *
246  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
247  */
248 static int hdmi_channel_mapping[0x32][8] = {
249         /* stereo */
250         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
251         /* 2.1 */
252         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
253         /* Dolby Surround */
254         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
255         /* surround40 */
256         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
257         /* 4ch */
258         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
259         /* surround41 */
260         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
261         /* surround50 */
262         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
263         /* surround51 */
264         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
265         /* 7.1 */
266         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
267 };
268
269 /*
270  * This is an ordered list!
271  *
272  * The preceding ones have better chances to be selected by
273  * hdmi_channel_allocation().
274  */
275 static struct cea_channel_speaker_allocation channel_allocations[] = {
276 /*                        channel:   7     6    5    4    3     2    1    0  */
277 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
278                                  /* 2.1 */
279 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
280                                  /* Dolby Surround */
281 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
282                                  /* surround40 */
283 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
284                                  /* surround41 */
285 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
286                                  /* surround50 */
287 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
288                                  /* surround51 */
289 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
290                                  /* 6.1 */
291 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
292                                  /* surround71 */
293 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
294
295 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
296 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
297 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
298 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
299 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
300 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
301 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
302 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
303 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
304 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
305 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
306 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
307 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
308 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
309 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
310 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
311 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
312 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
313 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
314 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
315 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
316 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
317 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
318 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
319 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
320 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
321 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
322 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
323 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
324 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
325 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
326 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
327 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
328 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
329 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
330 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
331 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
332 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
333 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
334 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
335 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
336 };
337
338
339 /*
340  * HDMI routines
341  */
342
343 #define get_pin(spec, idx) \
344         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
345 #define get_cvt(spec, idx) \
346         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
347 #define get_pcm_rec(spec, idx) \
348         ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
349
350 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
351 {
352         int pin_idx;
353
354         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
355                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
356                         return pin_idx;
357
358         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
359         return -EINVAL;
360 }
361
362 static int hinfo_to_pin_index(struct hdmi_spec *spec,
363                               struct hda_pcm_stream *hinfo)
364 {
365         int pin_idx;
366
367         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
368                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
369                         return pin_idx;
370
371         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
372         return -EINVAL;
373 }
374
375 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
376 {
377         int cvt_idx;
378
379         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
380                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
381                         return cvt_idx;
382
383         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
384         return -EINVAL;
385 }
386
387 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
388                         struct snd_ctl_elem_info *uinfo)
389 {
390         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
391         struct hdmi_spec *spec = codec->spec;
392         struct hdmi_spec_per_pin *per_pin;
393         struct hdmi_eld *eld;
394         int pin_idx;
395
396         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
397
398         pin_idx = kcontrol->private_value;
399         per_pin = get_pin(spec, pin_idx);
400         eld = &per_pin->sink_eld;
401
402         mutex_lock(&per_pin->lock);
403         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
404         mutex_unlock(&per_pin->lock);
405
406         return 0;
407 }
408
409 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
410                         struct snd_ctl_elem_value *ucontrol)
411 {
412         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
413         struct hdmi_spec *spec = codec->spec;
414         struct hdmi_spec_per_pin *per_pin;
415         struct hdmi_eld *eld;
416         int pin_idx;
417
418         pin_idx = kcontrol->private_value;
419         per_pin = get_pin(spec, pin_idx);
420         eld = &per_pin->sink_eld;
421
422         mutex_lock(&per_pin->lock);
423         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
424                 mutex_unlock(&per_pin->lock);
425                 snd_BUG();
426                 return -EINVAL;
427         }
428
429         memset(ucontrol->value.bytes.data, 0,
430                ARRAY_SIZE(ucontrol->value.bytes.data));
431         if (eld->eld_valid)
432                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
433                        eld->eld_size);
434         mutex_unlock(&per_pin->lock);
435
436         return 0;
437 }
438
439 static struct snd_kcontrol_new eld_bytes_ctl = {
440         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
441         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
442         .name = "ELD",
443         .info = hdmi_eld_ctl_info,
444         .get = hdmi_eld_ctl_get,
445 };
446
447 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
448                         int device)
449 {
450         struct snd_kcontrol *kctl;
451         struct hdmi_spec *spec = codec->spec;
452         int err;
453
454         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
455         if (!kctl)
456                 return -ENOMEM;
457         kctl->private_value = pin_idx;
458         kctl->id.device = device;
459
460         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
461         if (err < 0)
462                 return err;
463
464         get_pin(spec, pin_idx)->eld_ctl = kctl;
465         return 0;
466 }
467
468 #ifdef BE_PARANOID
469 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
470                                 int *packet_index, int *byte_index)
471 {
472         int val;
473
474         val = snd_hda_codec_read(codec, pin_nid, 0,
475                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
476
477         *packet_index = val >> 5;
478         *byte_index = val & 0x1f;
479 }
480 #endif
481
482 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
483                                 int packet_index, int byte_index)
484 {
485         int val;
486
487         val = (packet_index << 5) | (byte_index & 0x1f);
488
489         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
490 }
491
492 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
493                                 unsigned char val)
494 {
495         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
496 }
497
498 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
499 {
500         /* Unmute */
501         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
502                 snd_hda_codec_write(codec, pin_nid, 0,
503                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
504         /* Enable pin out: some machines with GM965 gets broken output when
505          * the pin is disabled or changed while using with HDMI
506          */
507         snd_hda_codec_write(codec, pin_nid, 0,
508                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
509 }
510
511 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
512 {
513         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
514                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
515 }
516
517 static void hdmi_set_channel_count(struct hda_codec *codec,
518                                    hda_nid_t cvt_nid, int chs)
519 {
520         if (chs != hdmi_get_channel_count(codec, cvt_nid))
521                 snd_hda_codec_write(codec, cvt_nid, 0,
522                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
523 }
524
525 /*
526  * ELD proc files
527  */
528
529 #ifdef CONFIG_PROC_FS
530 static void print_eld_info(struct snd_info_entry *entry,
531                            struct snd_info_buffer *buffer)
532 {
533         struct hdmi_spec_per_pin *per_pin = entry->private_data;
534
535         mutex_lock(&per_pin->lock);
536         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
537         mutex_unlock(&per_pin->lock);
538 }
539
540 static void write_eld_info(struct snd_info_entry *entry,
541                            struct snd_info_buffer *buffer)
542 {
543         struct hdmi_spec_per_pin *per_pin = entry->private_data;
544
545         mutex_lock(&per_pin->lock);
546         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
547         mutex_unlock(&per_pin->lock);
548 }
549
550 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
551 {
552         char name[32];
553         struct hda_codec *codec = per_pin->codec;
554         struct snd_info_entry *entry;
555         int err;
556
557         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
558         err = snd_card_proc_new(codec->bus->card, name, &entry);
559         if (err < 0)
560                 return err;
561
562         snd_info_set_text_ops(entry, per_pin, print_eld_info);
563         entry->c.text.write = write_eld_info;
564         entry->mode |= S_IWUSR;
565         per_pin->proc_entry = entry;
566
567         return 0;
568 }
569
570 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
571 {
572         if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
573                 snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
574                 per_pin->proc_entry = NULL;
575         }
576 }
577 #else
578 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
579                                int index)
580 {
581         return 0;
582 }
583 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
584 {
585 }
586 #endif
587
588 /*
589  * Channel mapping routines
590  */
591
592 /*
593  * Compute derived values in channel_allocations[].
594  */
595 static void init_channel_allocations(void)
596 {
597         int i, j;
598         struct cea_channel_speaker_allocation *p;
599
600         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
601                 p = channel_allocations + i;
602                 p->channels = 0;
603                 p->spk_mask = 0;
604                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
605                         if (p->speakers[j]) {
606                                 p->channels++;
607                                 p->spk_mask |= p->speakers[j];
608                         }
609         }
610 }
611
612 static int get_channel_allocation_order(int ca)
613 {
614         int i;
615
616         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
617                 if (channel_allocations[i].ca_index == ca)
618                         break;
619         }
620         return i;
621 }
622
623 /*
624  * The transformation takes two steps:
625  *
626  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
627  *            spk_mask => (channel_allocations[])         => ai->CA
628  *
629  * TODO: it could select the wrong CA from multiple candidates.
630 */
631 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
632 {
633         int i;
634         int ca = 0;
635         int spk_mask = 0;
636         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
637
638         /*
639          * CA defaults to 0 for basic stereo audio
640          */
641         if (channels <= 2)
642                 return 0;
643
644         /*
645          * expand ELD's speaker allocation mask
646          *
647          * ELD tells the speaker mask in a compact(paired) form,
648          * expand ELD's notions to match the ones used by Audio InfoFrame.
649          */
650         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
651                 if (eld->info.spk_alloc & (1 << i))
652                         spk_mask |= eld_speaker_allocation_bits[i];
653         }
654
655         /* search for the first working match in the CA table */
656         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
657                 if (channels == channel_allocations[i].channels &&
658                     (spk_mask & channel_allocations[i].spk_mask) ==
659                                 channel_allocations[i].spk_mask) {
660                         ca = channel_allocations[i].ca_index;
661                         break;
662                 }
663         }
664
665         if (!ca) {
666                 /* if there was no match, select the regular ALSA channel
667                  * allocation with the matching number of channels */
668                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
669                         if (channels == channel_allocations[i].channels) {
670                                 ca = channel_allocations[i].ca_index;
671                                 break;
672                         }
673                 }
674         }
675
676         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
677         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
678                     ca, channels, buf);
679
680         return ca;
681 }
682
683 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
684                                        hda_nid_t pin_nid)
685 {
686 #ifdef CONFIG_SND_DEBUG_VERBOSE
687         struct hdmi_spec *spec = codec->spec;
688         int i;
689         int channel;
690
691         for (i = 0; i < 8; i++) {
692                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
693                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
694                                                 channel, i);
695         }
696 #endif
697 }
698
699 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
700                                        hda_nid_t pin_nid,
701                                        bool non_pcm,
702                                        int ca)
703 {
704         struct hdmi_spec *spec = codec->spec;
705         struct cea_channel_speaker_allocation *ch_alloc;
706         int i;
707         int err;
708         int order;
709         int non_pcm_mapping[8];
710
711         order = get_channel_allocation_order(ca);
712         ch_alloc = &channel_allocations[order];
713
714         if (hdmi_channel_mapping[ca][1] == 0) {
715                 int hdmi_slot = 0;
716                 /* fill actual channel mappings in ALSA channel (i) order */
717                 for (i = 0; i < ch_alloc->channels; i++) {
718                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
719                                 hdmi_slot++; /* skip zero slots */
720
721                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
722                 }
723                 /* fill the rest of the slots with ALSA channel 0xf */
724                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
725                         if (!ch_alloc->speakers[7 - hdmi_slot])
726                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
727         }
728
729         if (non_pcm) {
730                 for (i = 0; i < ch_alloc->channels; i++)
731                         non_pcm_mapping[i] = (i << 4) | i;
732                 for (; i < 8; i++)
733                         non_pcm_mapping[i] = (0xf << 4) | i;
734         }
735
736         for (i = 0; i < 8; i++) {
737                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
738                 int hdmi_slot = slotsetup & 0x0f;
739                 int channel = (slotsetup & 0xf0) >> 4;
740                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
741                 if (err) {
742                         snd_printdd(KERN_NOTICE
743                                     "HDMI: channel mapping failed\n");
744                         break;
745                 }
746         }
747 }
748
749 struct channel_map_table {
750         unsigned char map;              /* ALSA API channel map position */
751         int spk_mask;                   /* speaker position bit mask */
752 };
753
754 static struct channel_map_table map_tables[] = {
755         { SNDRV_CHMAP_FL,       FL },
756         { SNDRV_CHMAP_FR,       FR },
757         { SNDRV_CHMAP_RL,       RL },
758         { SNDRV_CHMAP_RR,       RR },
759         { SNDRV_CHMAP_LFE,      LFE },
760         { SNDRV_CHMAP_FC,       FC },
761         { SNDRV_CHMAP_RLC,      RLC },
762         { SNDRV_CHMAP_RRC,      RRC },
763         { SNDRV_CHMAP_RC,       RC },
764         { SNDRV_CHMAP_FLC,      FLC },
765         { SNDRV_CHMAP_FRC,      FRC },
766         { SNDRV_CHMAP_FLH,      FLH },
767         { SNDRV_CHMAP_FRH,      FRH },
768         { SNDRV_CHMAP_FLW,      FLW },
769         { SNDRV_CHMAP_FRW,      FRW },
770         { SNDRV_CHMAP_TC,       TC },
771         { SNDRV_CHMAP_FCH,      FCH },
772         {} /* terminator */
773 };
774
775 /* from ALSA API channel position to speaker bit mask */
776 static int to_spk_mask(unsigned char c)
777 {
778         struct channel_map_table *t = map_tables;
779         for (; t->map; t++) {
780                 if (t->map == c)
781                         return t->spk_mask;
782         }
783         return 0;
784 }
785
786 /* from ALSA API channel position to CEA slot */
787 static int to_cea_slot(int ordered_ca, unsigned char pos)
788 {
789         int mask = to_spk_mask(pos);
790         int i;
791
792         if (mask) {
793                 for (i = 0; i < 8; i++) {
794                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
795                                 return i;
796                 }
797         }
798
799         return -1;
800 }
801
802 /* from speaker bit mask to ALSA API channel position */
803 static int spk_to_chmap(int spk)
804 {
805         struct channel_map_table *t = map_tables;
806         for (; t->map; t++) {
807                 if (t->spk_mask == spk)
808                         return t->map;
809         }
810         return 0;
811 }
812
813 /* from CEA slot to ALSA API channel position */
814 static int from_cea_slot(int ordered_ca, unsigned char slot)
815 {
816         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
817
818         return spk_to_chmap(mask);
819 }
820
821 /* get the CA index corresponding to the given ALSA API channel map */
822 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
823 {
824         int i, spks = 0, spk_mask = 0;
825
826         for (i = 0; i < chs; i++) {
827                 int mask = to_spk_mask(map[i]);
828                 if (mask) {
829                         spk_mask |= mask;
830                         spks++;
831                 }
832         }
833
834         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
835                 if ((chs == channel_allocations[i].channels ||
836                      spks == channel_allocations[i].channels) &&
837                     (spk_mask & channel_allocations[i].spk_mask) ==
838                                 channel_allocations[i].spk_mask)
839                         return channel_allocations[i].ca_index;
840         }
841         return -1;
842 }
843
844 /* set up the channel slots for the given ALSA API channel map */
845 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
846                                              hda_nid_t pin_nid,
847                                              int chs, unsigned char *map,
848                                              int ca)
849 {
850         struct hdmi_spec *spec = codec->spec;
851         int ordered_ca = get_channel_allocation_order(ca);
852         int alsa_pos, hdmi_slot;
853         int assignments[8] = {[0 ... 7] = 0xf};
854
855         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
856
857                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
858
859                 if (hdmi_slot < 0)
860                         continue; /* unassigned channel */
861
862                 assignments[hdmi_slot] = alsa_pos;
863         }
864
865         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
866                 int err;
867
868                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
869                                                      assignments[hdmi_slot]);
870                 if (err)
871                         return -EINVAL;
872         }
873         return 0;
874 }
875
876 /* store ALSA API channel map from the current default map */
877 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
878 {
879         int i;
880         int ordered_ca = get_channel_allocation_order(ca);
881         for (i = 0; i < 8; i++) {
882                 if (i < channel_allocations[ordered_ca].channels)
883                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
884                 else
885                         map[i] = 0;
886         }
887 }
888
889 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
890                                        hda_nid_t pin_nid, bool non_pcm, int ca,
891                                        int channels, unsigned char *map,
892                                        bool chmap_set)
893 {
894         if (!non_pcm && chmap_set) {
895                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
896                                                   channels, map, ca);
897         } else {
898                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
899                 hdmi_setup_fake_chmap(map, ca);
900         }
901
902         hdmi_debug_channel_mapping(codec, pin_nid);
903 }
904
905 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
906                                      int asp_slot, int channel)
907 {
908         return snd_hda_codec_write(codec, pin_nid, 0,
909                                    AC_VERB_SET_HDMI_CHAN_SLOT,
910                                    (channel << 4) | asp_slot);
911 }
912
913 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
914                                      int asp_slot)
915 {
916         return (snd_hda_codec_read(codec, pin_nid, 0,
917                                    AC_VERB_GET_HDMI_CHAN_SLOT,
918                                    asp_slot) & 0xf0) >> 4;
919 }
920
921 /*
922  * Audio InfoFrame routines
923  */
924
925 /*
926  * Enable Audio InfoFrame Transmission
927  */
928 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
929                                        hda_nid_t pin_nid)
930 {
931         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
932         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
933                                                 AC_DIPXMIT_BEST);
934 }
935
936 /*
937  * Disable Audio InfoFrame Transmission
938  */
939 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
940                                       hda_nid_t pin_nid)
941 {
942         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
943         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
944                                                 AC_DIPXMIT_DISABLE);
945 }
946
947 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
948 {
949 #ifdef CONFIG_SND_DEBUG_VERBOSE
950         int i;
951         int size;
952
953         size = snd_hdmi_get_eld_size(codec, pin_nid);
954         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
955
956         for (i = 0; i < 8; i++) {
957                 size = snd_hda_codec_read(codec, pin_nid, 0,
958                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
959                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
960         }
961 #endif
962 }
963
964 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
965 {
966 #ifdef BE_PARANOID
967         int i, j;
968         int size;
969         int pi, bi;
970         for (i = 0; i < 8; i++) {
971                 size = snd_hda_codec_read(codec, pin_nid, 0,
972                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
973                 if (size == 0)
974                         continue;
975
976                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
977                 for (j = 1; j < 1000; j++) {
978                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
979                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
980                         if (pi != i)
981                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
982                                                 bi, pi, i);
983                         if (bi == 0) /* byte index wrapped around */
984                                 break;
985                 }
986                 snd_printd(KERN_INFO
987                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
988                         i, size, j);
989         }
990 #endif
991 }
992
993 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
994 {
995         u8 *bytes = (u8 *)hdmi_ai;
996         u8 sum = 0;
997         int i;
998
999         hdmi_ai->checksum = 0;
1000
1001         for (i = 0; i < sizeof(*hdmi_ai); i++)
1002                 sum += bytes[i];
1003
1004         hdmi_ai->checksum = -sum;
1005 }
1006
1007 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1008                                       hda_nid_t pin_nid,
1009                                       u8 *dip, int size)
1010 {
1011         int i;
1012
1013         hdmi_debug_dip_size(codec, pin_nid);
1014         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1015
1016         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1017         for (i = 0; i < size; i++)
1018                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1019 }
1020
1021 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1022                                     u8 *dip, int size)
1023 {
1024         u8 val;
1025         int i;
1026
1027         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1028                                                             != AC_DIPXMIT_BEST)
1029                 return false;
1030
1031         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1032         for (i = 0; i < size; i++) {
1033                 val = snd_hda_codec_read(codec, pin_nid, 0,
1034                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1035                 if (val != dip[i])
1036                         return false;
1037         }
1038
1039         return true;
1040 }
1041
1042 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1043                                      hda_nid_t pin_nid,
1044                                      int ca, int active_channels,
1045                                      int conn_type)
1046 {
1047         union audio_infoframe ai;
1048
1049         if (conn_type == 0) { /* HDMI */
1050                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1051
1052                 hdmi_ai->type           = 0x84;
1053                 hdmi_ai->ver            = 0x01;
1054                 hdmi_ai->len            = 0x0a;
1055                 hdmi_ai->CC02_CT47      = active_channels - 1;
1056                 hdmi_ai->CA             = ca;
1057                 hdmi_checksum_audio_infoframe(hdmi_ai);
1058         } else if (conn_type == 1) { /* DisplayPort */
1059                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1060
1061                 dp_ai->type             = 0x84;
1062                 dp_ai->len              = 0x1b;
1063                 dp_ai->ver              = 0x11 << 2;
1064                 dp_ai->CC02_CT47        = active_channels - 1;
1065                 dp_ai->CA               = ca;
1066         } else {
1067                 snd_printd("HDMI: unknown connection type at pin %d\n",
1068                             pin_nid);
1069                 return;
1070         }
1071
1072         /*
1073          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1074          * sizeof(*dp_ai) to avoid partial match/update problems when
1075          * the user switches between HDMI/DP monitors.
1076          */
1077         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1078                                         sizeof(ai))) {
1079                 snd_printdd("hdmi_pin_setup_infoframe: "
1080                             "pin=%d channels=%d ca=0x%02x\n",
1081                             pin_nid,
1082                             active_channels, ca);
1083                 hdmi_stop_infoframe_trans(codec, pin_nid);
1084                 hdmi_fill_audio_infoframe(codec, pin_nid,
1085                                             ai.bytes, sizeof(ai));
1086                 hdmi_start_infoframe_trans(codec, pin_nid);
1087         }
1088 }
1089
1090 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1091                                        struct hdmi_spec_per_pin *per_pin,
1092                                        bool non_pcm)
1093 {
1094         struct hdmi_spec *spec = codec->spec;
1095         hda_nid_t pin_nid = per_pin->pin_nid;
1096         int channels = per_pin->channels;
1097         int active_channels;
1098         struct hdmi_eld *eld;
1099         int ca, ordered_ca;
1100
1101         if (!channels)
1102                 return;
1103
1104         if (is_haswell(codec))
1105                 snd_hda_codec_write(codec, pin_nid, 0,
1106                                             AC_VERB_SET_AMP_GAIN_MUTE,
1107                                             AMP_OUT_UNMUTE);
1108
1109         eld = &per_pin->sink_eld;
1110         if (!eld->monitor_present)
1111                 return;
1112
1113         if (!non_pcm && per_pin->chmap_set)
1114                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1115         else
1116                 ca = hdmi_channel_allocation(eld, channels);
1117         if (ca < 0)
1118                 ca = 0;
1119
1120         ordered_ca = get_channel_allocation_order(ca);
1121         active_channels = channel_allocations[ordered_ca].channels;
1122
1123         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1124
1125         /*
1126          * always configure channel mapping, it may have been changed by the
1127          * user in the meantime
1128          */
1129         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1130                                    channels, per_pin->chmap,
1131                                    per_pin->chmap_set);
1132
1133         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1134                                       eld->info.conn_type);
1135
1136         per_pin->non_pcm = non_pcm;
1137 }
1138
1139 /*
1140  * Unsolicited events
1141  */
1142
1143 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1144
1145 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1146 {
1147         struct hdmi_spec *spec = codec->spec;
1148         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1149         int pin_nid;
1150         int pin_idx;
1151         struct hda_jack_tbl *jack;
1152         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1153
1154         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1155         if (!jack)
1156                 return;
1157         pin_nid = jack->nid;
1158         jack->jack_dirty = 1;
1159
1160         _snd_printd(SND_PR_VERBOSE,
1161                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1162                 codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1163                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1164
1165         pin_idx = pin_nid_to_pin_index(spec, pin_nid);
1166         if (pin_idx < 0)
1167                 return;
1168
1169         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1170                 snd_hda_jack_report_sync(codec);
1171 }
1172
1173 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1174 {
1175         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1176         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1177         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1178         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1179
1180         printk(KERN_INFO
1181                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1182                 codec->addr,
1183                 tag,
1184                 subtag,
1185                 cp_state,
1186                 cp_ready);
1187
1188         /* TODO */
1189         if (cp_state)
1190                 ;
1191         if (cp_ready)
1192                 ;
1193 }
1194
1195
1196 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1197 {
1198         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1199         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1200
1201         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1202                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1203                 return;
1204         }
1205
1206         if (subtag == 0)
1207                 hdmi_intrinsic_event(codec, res);
1208         else
1209                 hdmi_non_intrinsic_event(codec, res);
1210 }
1211
1212 static void haswell_verify_D0(struct hda_codec *codec,
1213                 hda_nid_t cvt_nid, hda_nid_t nid)
1214 {
1215         int pwr;
1216
1217         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1218          * thus pins could only choose converter 0 for use. Make sure the
1219          * converters are in correct power state */
1220         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1221                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1222
1223         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1224                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1225                                     AC_PWRST_D0);
1226                 msleep(40);
1227                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1228                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1229                 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1230         }
1231 }
1232
1233 /*
1234  * Callbacks
1235  */
1236
1237 /* HBR should be Non-PCM, 8 channels */
1238 #define is_hbr_format(format) \
1239         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1240
1241 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1242                               bool hbr)
1243 {
1244         int pinctl, new_pinctl;
1245
1246         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1247                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1248                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1249
1250                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1251                 if (hbr)
1252                         new_pinctl |= AC_PINCTL_EPT_HBR;
1253                 else
1254                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1255
1256                 snd_printdd("hdmi_pin_hbr_setup: "
1257                             "NID=0x%x, %spinctl=0x%x\n",
1258                             pin_nid,
1259                             pinctl == new_pinctl ? "" : "new-",
1260                             new_pinctl);
1261
1262                 if (pinctl != new_pinctl)
1263                         snd_hda_codec_write(codec, pin_nid, 0,
1264                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1265                                             new_pinctl);
1266         } else if (hbr)
1267                 return -EINVAL;
1268
1269         return 0;
1270 }
1271
1272 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1273                               hda_nid_t pin_nid, u32 stream_tag, int format)
1274 {
1275         struct hdmi_spec *spec = codec->spec;
1276         int err;
1277
1278         if (is_haswell(codec))
1279                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1280
1281         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1282
1283         if (err) {
1284                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1285                 return err;
1286         }
1287
1288         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1289         return 0;
1290 }
1291
1292 static int hdmi_choose_cvt(struct hda_codec *codec,
1293                         int pin_idx, int *cvt_id, int *mux_id)
1294 {
1295         struct hdmi_spec *spec = codec->spec;
1296         struct hdmi_spec_per_pin *per_pin;
1297         struct hdmi_spec_per_cvt *per_cvt = NULL;
1298         int cvt_idx, mux_idx = 0;
1299
1300         per_pin = get_pin(spec, pin_idx);
1301
1302         /* Dynamically assign converter to stream */
1303         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1304                 per_cvt = get_cvt(spec, cvt_idx);
1305
1306                 /* Must not already be assigned */
1307                 if (per_cvt->assigned)
1308                         continue;
1309                 /* Must be in pin's mux's list of converters */
1310                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1311                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1312                                 break;
1313                 /* Not in mux list */
1314                 if (mux_idx == per_pin->num_mux_nids)
1315                         continue;
1316                 break;
1317         }
1318
1319         /* No free converters */
1320         if (cvt_idx == spec->num_cvts)
1321                 return -ENODEV;
1322
1323         if (cvt_id)
1324                 *cvt_id = cvt_idx;
1325         if (mux_id)
1326                 *mux_id = mux_idx;
1327
1328         return 0;
1329 }
1330
1331 /* Intel HDMI workaround to fix audio routing issue:
1332  * For some Intel display codecs, pins share the same connection list.
1333  * So a conveter can be selected by multiple pins and playback on any of these
1334  * pins will generate sound on the external display, because audio flows from
1335  * the same converter to the display pipeline. Also muting one pin may make
1336  * other pins have no sound output.
1337  * So this function assures that an assigned converter for a pin is not selected
1338  * by any other pins.
1339  */
1340 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1341                         hda_nid_t pin_nid, int mux_idx)
1342 {
1343         struct hdmi_spec *spec = codec->spec;
1344         hda_nid_t nid, end_nid;
1345         int cvt_idx, curr;
1346         struct hdmi_spec_per_cvt *per_cvt;
1347
1348         /* configure all pins, including "no physical connection" ones */
1349         end_nid = codec->start_nid + codec->num_nodes;
1350         for (nid = codec->start_nid; nid < end_nid; nid++) {
1351                 unsigned int wid_caps = get_wcaps(codec, nid);
1352                 unsigned int wid_type = get_wcaps_type(wid_caps);
1353
1354                 if (wid_type != AC_WID_PIN)
1355                         continue;
1356
1357                 if (nid == pin_nid)
1358                         continue;
1359
1360                 curr = snd_hda_codec_read(codec, nid, 0,
1361                                           AC_VERB_GET_CONNECT_SEL, 0);
1362                 if (curr != mux_idx)
1363                         continue;
1364
1365                 /* choose an unassigned converter. The conveters in the
1366                  * connection list are in the same order as in the codec.
1367                  */
1368                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1369                         per_cvt = get_cvt(spec, cvt_idx);
1370                         if (!per_cvt->assigned) {
1371                                 snd_printdd("choose cvt %d for pin nid %d\n",
1372                                         cvt_idx, nid);
1373                                 snd_hda_codec_write_cache(codec, nid, 0,
1374                                             AC_VERB_SET_CONNECT_SEL,
1375                                             cvt_idx);
1376                                 break;
1377                         }
1378                 }
1379         }
1380 }
1381
1382 /*
1383  * HDA PCM callbacks
1384  */
1385 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1386                          struct hda_codec *codec,
1387                          struct snd_pcm_substream *substream)
1388 {
1389         struct hdmi_spec *spec = codec->spec;
1390         struct snd_pcm_runtime *runtime = substream->runtime;
1391         int pin_idx, cvt_idx, mux_idx = 0;
1392         struct hdmi_spec_per_pin *per_pin;
1393         struct hdmi_eld *eld;
1394         struct hdmi_spec_per_cvt *per_cvt = NULL;
1395         int err;
1396
1397         /* Validate hinfo */
1398         pin_idx = hinfo_to_pin_index(spec, hinfo);
1399         if (snd_BUG_ON(pin_idx < 0))
1400                 return -EINVAL;
1401         per_pin = get_pin(spec, pin_idx);
1402         eld = &per_pin->sink_eld;
1403
1404         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1405         if (err < 0)
1406                 return err;
1407
1408         per_cvt = get_cvt(spec, cvt_idx);
1409         /* Claim converter */
1410         per_cvt->assigned = 1;
1411         per_pin->cvt_nid = per_cvt->cvt_nid;
1412         hinfo->nid = per_cvt->cvt_nid;
1413
1414         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1415                             AC_VERB_SET_CONNECT_SEL,
1416                             mux_idx);
1417
1418         /* configure unused pins to choose other converters */
1419         if (is_haswell(codec) || is_valleyview(codec))
1420                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1421
1422         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1423
1424         /* Initially set the converter's capabilities */
1425         hinfo->channels_min = per_cvt->channels_min;
1426         hinfo->channels_max = per_cvt->channels_max;
1427         hinfo->rates = per_cvt->rates;
1428         hinfo->formats = per_cvt->formats;
1429         hinfo->maxbps = per_cvt->maxbps;
1430
1431         /* Restrict capabilities by ELD if this isn't disabled */
1432         if (!static_hdmi_pcm && eld->eld_valid) {
1433                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1434                 if (hinfo->channels_min > hinfo->channels_max ||
1435                     !hinfo->rates || !hinfo->formats) {
1436                         per_cvt->assigned = 0;
1437                         hinfo->nid = 0;
1438                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1439                         return -ENODEV;
1440                 }
1441         }
1442
1443         /* Store the updated parameters */
1444         runtime->hw.channels_min = hinfo->channels_min;
1445         runtime->hw.channels_max = hinfo->channels_max;
1446         runtime->hw.formats = hinfo->formats;
1447         runtime->hw.rates = hinfo->rates;
1448
1449         snd_pcm_hw_constraint_step(substream->runtime, 0,
1450                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1451         return 0;
1452 }
1453
1454 /*
1455  * HDA/HDMI auto parsing
1456  */
1457 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1458 {
1459         struct hdmi_spec *spec = codec->spec;
1460         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1461         hda_nid_t pin_nid = per_pin->pin_nid;
1462
1463         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1464                 snd_printk(KERN_WARNING
1465                            "HDMI: pin %d wcaps %#x "
1466                            "does not support connection list\n",
1467                            pin_nid, get_wcaps(codec, pin_nid));
1468                 return -EINVAL;
1469         }
1470
1471         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1472                                                         per_pin->mux_nids,
1473                                                         HDA_MAX_CONNECTIONS);
1474
1475         return 0;
1476 }
1477
1478 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1479 {
1480         struct hda_jack_tbl *jack;
1481         struct hda_codec *codec = per_pin->codec;
1482         struct hdmi_spec *spec = codec->spec;
1483         struct hdmi_eld *eld = &spec->temp_eld;
1484         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1485         hda_nid_t pin_nid = per_pin->pin_nid;
1486         /*
1487          * Always execute a GetPinSense verb here, even when called from
1488          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1489          * response's PD bit is not the real PD value, but indicates that
1490          * the real PD value changed. An older version of the HD-audio
1491          * specification worked this way. Hence, we just ignore the data in
1492          * the unsolicited response to avoid custom WARs.
1493          */
1494         int present = snd_hda_pin_sense(codec, pin_nid);
1495         bool update_eld = false;
1496         bool eld_changed = false;
1497         bool ret;
1498
1499         mutex_lock(&per_pin->lock);
1500         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1501         if (pin_eld->monitor_present)
1502                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1503         else
1504                 eld->eld_valid = false;
1505
1506         _snd_printd(SND_PR_VERBOSE,
1507                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1508                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1509
1510         if (eld->eld_valid) {
1511                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1512                                                      &eld->eld_size) < 0)
1513                         eld->eld_valid = false;
1514                 else {
1515                         memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1516                         if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1517                                                     eld->eld_size) < 0)
1518                                 eld->eld_valid = false;
1519                 }
1520
1521                 if (eld->eld_valid) {
1522                         snd_hdmi_show_eld(&eld->info);
1523                         update_eld = true;
1524                 }
1525                 else if (repoll) {
1526                         queue_delayed_work(codec->bus->workq,
1527                                            &per_pin->work,
1528                                            msecs_to_jiffies(300));
1529                         goto unlock;
1530                 }
1531         }
1532
1533         if (pin_eld->eld_valid && !eld->eld_valid) {
1534                 update_eld = true;
1535                 eld_changed = true;
1536         }
1537         if (update_eld) {
1538                 bool old_eld_valid = pin_eld->eld_valid;
1539                 pin_eld->eld_valid = eld->eld_valid;
1540                 eld_changed = pin_eld->eld_size != eld->eld_size ||
1541                               memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1542                                      eld->eld_size) != 0;
1543                 if (eld_changed)
1544                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1545                                eld->eld_size);
1546                 pin_eld->eld_size = eld->eld_size;
1547                 pin_eld->info = eld->info;
1548
1549                 /*
1550                  * Re-setup pin and infoframe. This is needed e.g. when
1551                  * - sink is first plugged-in (infoframe is not set up if !monitor_present)
1552                  * - transcoder can change during stream playback on Haswell
1553                  */
1554                 if (eld->eld_valid && !old_eld_valid && per_pin->setup)
1555                         hdmi_setup_audio_infoframe(codec, per_pin,
1556                                                    per_pin->non_pcm);
1557         }
1558
1559         if (eld_changed)
1560                 snd_ctl_notify(codec->bus->card,
1561                                SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1562                                &per_pin->eld_ctl->id);
1563  unlock:
1564         if ((codec->vendor_id & 0xffff0000) == 0x10020000)
1565                 ret = true; /* AMD codecs create ELD by itself */
1566         else
1567                 ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1568
1569         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1570         if (jack)
1571                 jack->block_report = !ret;
1572
1573         mutex_unlock(&per_pin->lock);
1574         return ret;
1575 }
1576
1577 static void hdmi_repoll_eld(struct work_struct *work)
1578 {
1579         struct hdmi_spec_per_pin *per_pin =
1580         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1581
1582         if (per_pin->repoll_count++ > 6)
1583                 per_pin->repoll_count = 0;
1584
1585         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1586                 snd_hda_jack_report_sync(per_pin->codec);
1587 }
1588
1589 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1590                                              hda_nid_t nid);
1591
1592 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1593 {
1594         struct hdmi_spec *spec = codec->spec;
1595         unsigned int caps, config;
1596         int pin_idx;
1597         struct hdmi_spec_per_pin *per_pin;
1598         int err;
1599
1600         caps = snd_hda_query_pin_caps(codec, pin_nid);
1601         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1602                 return 0;
1603
1604         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1605         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1606                 return 0;
1607
1608         if (is_haswell(codec))
1609                 intel_haswell_fixup_connect_list(codec, pin_nid);
1610
1611         pin_idx = spec->num_pins;
1612         per_pin = snd_array_new(&spec->pins);
1613         if (!per_pin)
1614                 return -ENOMEM;
1615
1616         per_pin->pin_nid = pin_nid;
1617         per_pin->non_pcm = false;
1618
1619         err = hdmi_read_pin_conn(codec, pin_idx);
1620         if (err < 0)
1621                 return err;
1622
1623         spec->num_pins++;
1624
1625         return 0;
1626 }
1627
1628 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1629 {
1630         struct hdmi_spec *spec = codec->spec;
1631         struct hdmi_spec_per_cvt *per_cvt;
1632         unsigned int chans;
1633         int err;
1634
1635         chans = get_wcaps(codec, cvt_nid);
1636         chans = get_wcaps_channels(chans);
1637
1638         per_cvt = snd_array_new(&spec->cvts);
1639         if (!per_cvt)
1640                 return -ENOMEM;
1641
1642         per_cvt->cvt_nid = cvt_nid;
1643         per_cvt->channels_min = 2;
1644         if (chans <= 16) {
1645                 per_cvt->channels_max = chans;
1646                 if (chans > spec->channels_max)
1647                         spec->channels_max = chans;
1648         }
1649
1650         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1651                                           &per_cvt->rates,
1652                                           &per_cvt->formats,
1653                                           &per_cvt->maxbps);
1654         if (err < 0)
1655                 return err;
1656
1657         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1658                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1659         spec->num_cvts++;
1660
1661         return 0;
1662 }
1663
1664 static int hdmi_parse_codec(struct hda_codec *codec)
1665 {
1666         hda_nid_t nid;
1667         int i, nodes;
1668
1669         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1670         if (!nid || nodes < 0) {
1671                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1672                 return -EINVAL;
1673         }
1674
1675         for (i = 0; i < nodes; i++, nid++) {
1676                 unsigned int caps;
1677                 unsigned int type;
1678
1679                 caps = get_wcaps(codec, nid);
1680                 type = get_wcaps_type(caps);
1681
1682                 if (!(caps & AC_WCAP_DIGITAL))
1683                         continue;
1684
1685                 switch (type) {
1686                 case AC_WID_AUD_OUT:
1687                         hdmi_add_cvt(codec, nid);
1688                         break;
1689                 case AC_WID_PIN:
1690                         hdmi_add_pin(codec, nid);
1691                         break;
1692                 }
1693         }
1694
1695 #ifdef CONFIG_PM
1696         /* We're seeing some problems with unsolicited hot plug events on
1697          * PantherPoint after S3, if this is not enabled */
1698         if (codec->vendor_id == 0x80862806)
1699                 codec->bus->power_keep_link_on = 1;
1700         /*
1701          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1702          * can be lost and presence sense verb will become inaccurate if the
1703          * HDA link is powered off at hot plug or hw initialization time.
1704          */
1705         else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1706               AC_PWRST_EPSS))
1707                 codec->bus->power_keep_link_on = 1;
1708 #endif
1709
1710         return 0;
1711 }
1712
1713 /*
1714  */
1715 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1716 {
1717         struct hda_spdif_out *spdif;
1718         bool non_pcm;
1719
1720         mutex_lock(&codec->spdif_mutex);
1721         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1722         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1723         mutex_unlock(&codec->spdif_mutex);
1724         return non_pcm;
1725 }
1726
1727
1728 /*
1729  * HDMI callbacks
1730  */
1731
1732 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1733                                            struct hda_codec *codec,
1734                                            unsigned int stream_tag,
1735                                            unsigned int format,
1736                                            struct snd_pcm_substream *substream)
1737 {
1738         hda_nid_t cvt_nid = hinfo->nid;
1739         struct hdmi_spec *spec = codec->spec;
1740         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1741         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1742         hda_nid_t pin_nid = per_pin->pin_nid;
1743         bool non_pcm;
1744
1745         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1746         mutex_lock(&per_pin->lock);
1747         per_pin->channels = substream->runtime->channels;
1748         per_pin->setup = true;
1749
1750         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1751         mutex_unlock(&per_pin->lock);
1752
1753         return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1754 }
1755
1756 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1757                                              struct hda_codec *codec,
1758                                              struct snd_pcm_substream *substream)
1759 {
1760         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1761         return 0;
1762 }
1763
1764 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1765                           struct hda_codec *codec,
1766                           struct snd_pcm_substream *substream)
1767 {
1768         struct hdmi_spec *spec = codec->spec;
1769         int cvt_idx, pin_idx;
1770         struct hdmi_spec_per_cvt *per_cvt;
1771         struct hdmi_spec_per_pin *per_pin;
1772
1773         if (hinfo->nid) {
1774                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1775                 if (snd_BUG_ON(cvt_idx < 0))
1776                         return -EINVAL;
1777                 per_cvt = get_cvt(spec, cvt_idx);
1778
1779                 snd_BUG_ON(!per_cvt->assigned);
1780                 per_cvt->assigned = 0;
1781                 hinfo->nid = 0;
1782
1783                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1784                 if (snd_BUG_ON(pin_idx < 0))
1785                         return -EINVAL;
1786                 per_pin = get_pin(spec, pin_idx);
1787
1788                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1789
1790                 mutex_lock(&per_pin->lock);
1791                 per_pin->chmap_set = false;
1792                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1793
1794                 per_pin->setup = false;
1795                 per_pin->channels = 0;
1796                 mutex_unlock(&per_pin->lock);
1797         }
1798
1799         return 0;
1800 }
1801
1802 static const struct hda_pcm_ops generic_ops = {
1803         .open = hdmi_pcm_open,
1804         .close = hdmi_pcm_close,
1805         .prepare = generic_hdmi_playback_pcm_prepare,
1806         .cleanup = generic_hdmi_playback_pcm_cleanup,
1807 };
1808
1809 /*
1810  * ALSA API channel-map control callbacks
1811  */
1812 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1813                                struct snd_ctl_elem_info *uinfo)
1814 {
1815         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1816         struct hda_codec *codec = info->private_data;
1817         struct hdmi_spec *spec = codec->spec;
1818         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1819         uinfo->count = spec->channels_max;
1820         uinfo->value.integer.min = 0;
1821         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1822         return 0;
1823 }
1824
1825 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
1826                                                   int channels)
1827 {
1828         /* If the speaker allocation matches the channel count, it is OK.*/
1829         if (cap->channels != channels)
1830                 return -1;
1831
1832         /* all channels are remappable freely */
1833         return SNDRV_CTL_TLVT_CHMAP_VAR;
1834 }
1835
1836 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
1837                                         unsigned int *chmap, int channels)
1838 {
1839         int count = 0;
1840         int c;
1841
1842         for (c = 7; c >= 0; c--) {
1843                 int spk = cap->speakers[c];
1844                 if (!spk)
1845                         continue;
1846
1847                 chmap[count++] = spk_to_chmap(spk);
1848         }
1849
1850         WARN_ON(count != channels);
1851 }
1852
1853 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1854                               unsigned int size, unsigned int __user *tlv)
1855 {
1856         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1857         struct hda_codec *codec = info->private_data;
1858         struct hdmi_spec *spec = codec->spec;
1859         unsigned int __user *dst;
1860         int chs, count = 0;
1861
1862         if (size < 8)
1863                 return -ENOMEM;
1864         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1865                 return -EFAULT;
1866         size -= 8;
1867         dst = tlv + 2;
1868         for (chs = 2; chs <= spec->channels_max; chs++) {
1869                 int i;
1870                 struct cea_channel_speaker_allocation *cap;
1871                 cap = channel_allocations;
1872                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1873                         int chs_bytes = chs * 4;
1874                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
1875                         unsigned int tlv_chmap[8];
1876
1877                         if (type < 0)
1878                                 continue;
1879                         if (size < 8)
1880                                 return -ENOMEM;
1881                         if (put_user(type, dst) ||
1882                             put_user(chs_bytes, dst + 1))
1883                                 return -EFAULT;
1884                         dst += 2;
1885                         size -= 8;
1886                         count += 8;
1887                         if (size < chs_bytes)
1888                                 return -ENOMEM;
1889                         size -= chs_bytes;
1890                         count += chs_bytes;
1891                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
1892                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
1893                                 return -EFAULT;
1894                         dst += chs;
1895                 }
1896         }
1897         if (put_user(count, tlv + 1))
1898                 return -EFAULT;
1899         return 0;
1900 }
1901
1902 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1903                               struct snd_ctl_elem_value *ucontrol)
1904 {
1905         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1906         struct hda_codec *codec = info->private_data;
1907         struct hdmi_spec *spec = codec->spec;
1908         int pin_idx = kcontrol->private_value;
1909         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1910         int i;
1911
1912         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1913                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1914         return 0;
1915 }
1916
1917 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1918                               struct snd_ctl_elem_value *ucontrol)
1919 {
1920         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1921         struct hda_codec *codec = info->private_data;
1922         struct hdmi_spec *spec = codec->spec;
1923         int pin_idx = kcontrol->private_value;
1924         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1925         unsigned int ctl_idx;
1926         struct snd_pcm_substream *substream;
1927         unsigned char chmap[8];
1928         int i, err, ca, prepared = 0;
1929
1930         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1931         substream = snd_pcm_chmap_substream(info, ctl_idx);
1932         if (!substream || !substream->runtime)
1933                 return 0; /* just for avoiding error from alsactl restore */
1934         switch (substream->runtime->status->state) {
1935         case SNDRV_PCM_STATE_OPEN:
1936         case SNDRV_PCM_STATE_SETUP:
1937                 break;
1938         case SNDRV_PCM_STATE_PREPARED:
1939                 prepared = 1;
1940                 break;
1941         default:
1942                 return -EBUSY;
1943         }
1944         memset(chmap, 0, sizeof(chmap));
1945         for (i = 0; i < ARRAY_SIZE(chmap); i++)
1946                 chmap[i] = ucontrol->value.integer.value[i];
1947         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1948                 return 0;
1949         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1950         if (ca < 0)
1951                 return -EINVAL;
1952         if (spec->ops.chmap_validate) {
1953                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
1954                 if (err)
1955                         return err;
1956         }
1957         mutex_lock(&per_pin->lock);
1958         per_pin->chmap_set = true;
1959         memcpy(per_pin->chmap, chmap, sizeof(chmap));
1960         if (prepared)
1961                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1962         mutex_unlock(&per_pin->lock);
1963
1964         return 0;
1965 }
1966
1967 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1968 {
1969         struct hdmi_spec *spec = codec->spec;
1970         int pin_idx;
1971
1972         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1973                 struct hda_pcm *info;
1974                 struct hda_pcm_stream *pstr;
1975                 struct hdmi_spec_per_pin *per_pin;
1976
1977                 per_pin = get_pin(spec, pin_idx);
1978                 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1979                 info = snd_array_new(&spec->pcm_rec);
1980                 if (!info)
1981                         return -ENOMEM;
1982                 info->name = per_pin->pcm_name;
1983                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1984                 info->own_chmap = true;
1985
1986                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1987                 pstr->substreams = 1;
1988                 pstr->ops = generic_ops;
1989                 /* other pstr fields are set in open */
1990         }
1991
1992         codec->num_pcms = spec->num_pins;
1993         codec->pcm_info = spec->pcm_rec.list;
1994
1995         return 0;
1996 }
1997
1998 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1999 {
2000         char hdmi_str[32] = "HDMI/DP";
2001         struct hdmi_spec *spec = codec->spec;
2002         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2003         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
2004
2005         if (pcmdev > 0)
2006                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2007         if (!is_jack_detectable(codec, per_pin->pin_nid))
2008                 strncat(hdmi_str, " Phantom",
2009                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2010
2011         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
2012 }
2013
2014 static int generic_hdmi_build_controls(struct hda_codec *codec)
2015 {
2016         struct hdmi_spec *spec = codec->spec;
2017         int err;
2018         int pin_idx;
2019
2020         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2021                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2022
2023                 err = generic_hdmi_build_jack(codec, pin_idx);
2024                 if (err < 0)
2025                         return err;
2026
2027                 err = snd_hda_create_dig_out_ctls(codec,
2028                                                   per_pin->pin_nid,
2029                                                   per_pin->mux_nids[0],
2030                                                   HDA_PCM_TYPE_HDMI);
2031                 if (err < 0)
2032                         return err;
2033                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2034
2035                 /* add control for ELD Bytes */
2036                 err = hdmi_create_eld_ctl(codec, pin_idx,
2037                                           get_pcm_rec(spec, pin_idx)->device);
2038
2039                 if (err < 0)
2040                         return err;
2041
2042                 hdmi_present_sense(per_pin, 0);
2043         }
2044
2045         /* add channel maps */
2046         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2047                 struct snd_pcm_chmap *chmap;
2048                 struct snd_kcontrol *kctl;
2049                 int i;
2050
2051                 if (!codec->pcm_info[pin_idx].pcm)
2052                         break;
2053                 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
2054                                              SNDRV_PCM_STREAM_PLAYBACK,
2055                                              NULL, 0, pin_idx, &chmap);
2056                 if (err < 0)
2057                         return err;
2058                 /* override handlers */
2059                 chmap->private_data = codec;
2060                 kctl = chmap->kctl;
2061                 for (i = 0; i < kctl->count; i++)
2062                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2063                 kctl->info = hdmi_chmap_ctl_info;
2064                 kctl->get = hdmi_chmap_ctl_get;
2065                 kctl->put = hdmi_chmap_ctl_put;
2066                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2067         }
2068
2069         return 0;
2070 }
2071
2072 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2073 {
2074         struct hdmi_spec *spec = codec->spec;
2075         int pin_idx;
2076
2077         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2078                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2079
2080                 per_pin->codec = codec;
2081                 mutex_init(&per_pin->lock);
2082                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2083                 eld_proc_new(per_pin, pin_idx);
2084         }
2085         return 0;
2086 }
2087
2088 static int generic_hdmi_init(struct hda_codec *codec)
2089 {
2090         struct hdmi_spec *spec = codec->spec;
2091         int pin_idx;
2092
2093         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2094                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2095                 hda_nid_t pin_nid = per_pin->pin_nid;
2096
2097                 hdmi_init_pin(codec, pin_nid);
2098                 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
2099         }
2100         return 0;
2101 }
2102
2103 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2104 {
2105         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2106         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2107         snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
2108 }
2109
2110 static void hdmi_array_free(struct hdmi_spec *spec)
2111 {
2112         snd_array_free(&spec->pins);
2113         snd_array_free(&spec->cvts);
2114         snd_array_free(&spec->pcm_rec);
2115 }
2116
2117 static void generic_hdmi_free(struct hda_codec *codec)
2118 {
2119         struct hdmi_spec *spec = codec->spec;
2120         int pin_idx;
2121
2122         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2123                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2124
2125                 cancel_delayed_work(&per_pin->work);
2126                 eld_proc_free(per_pin);
2127         }
2128
2129         flush_workqueue(codec->bus->workq);
2130         hdmi_array_free(spec);
2131         kfree(spec);
2132 }
2133
2134 #ifdef CONFIG_PM
2135 static int generic_hdmi_resume(struct hda_codec *codec)
2136 {
2137         struct hdmi_spec *spec = codec->spec;
2138         int pin_idx;
2139
2140         generic_hdmi_init(codec);
2141         snd_hda_codec_resume_amp(codec);
2142         snd_hda_codec_resume_cache(codec);
2143
2144         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2145                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2146                 hdmi_present_sense(per_pin, 1);
2147         }
2148         return 0;
2149 }
2150 #endif
2151
2152 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2153         .init                   = generic_hdmi_init,
2154         .free                   = generic_hdmi_free,
2155         .build_pcms             = generic_hdmi_build_pcms,
2156         .build_controls         = generic_hdmi_build_controls,
2157         .unsol_event            = hdmi_unsol_event,
2158 #ifdef CONFIG_PM
2159         .resume                 = generic_hdmi_resume,
2160 #endif
2161 };
2162
2163 static const struct hdmi_ops generic_standard_hdmi_ops = {
2164         .pin_get_eld                            = snd_hdmi_get_eld,
2165         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2166         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2167         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2168         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2169         .setup_stream                           = hdmi_setup_stream,
2170         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2171         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2172 };
2173
2174
2175 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2176                                              hda_nid_t nid)
2177 {
2178         struct hdmi_spec *spec = codec->spec;
2179         hda_nid_t conns[4];
2180         int nconns;
2181
2182         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2183         if (nconns == spec->num_cvts &&
2184             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2185                 return;
2186
2187         /* override pins connection list */
2188         snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
2189         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2190 }
2191
2192 #define INTEL_VENDOR_NID 0x08
2193 #define INTEL_GET_VENDOR_VERB 0xf81
2194 #define INTEL_SET_VENDOR_VERB 0x781
2195 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2196 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2197
2198 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2199                                           bool update_tree)
2200 {
2201         unsigned int vendor_param;
2202
2203         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2204                                 INTEL_GET_VENDOR_VERB, 0);
2205         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2206                 return;
2207
2208         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2209         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2210                                 INTEL_SET_VENDOR_VERB, vendor_param);
2211         if (vendor_param == -1)
2212                 return;
2213
2214         if (update_tree)
2215                 snd_hda_codec_update_widgets(codec);
2216 }
2217
2218 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2219 {
2220         unsigned int vendor_param;
2221
2222         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2223                                 INTEL_GET_VENDOR_VERB, 0);
2224         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2225                 return;
2226
2227         /* enable DP1.2 mode */
2228         vendor_param |= INTEL_EN_DP12;
2229         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2230                                 INTEL_SET_VENDOR_VERB, vendor_param);
2231 }
2232
2233 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2234  * Otherwise you may get severe h/w communication errors.
2235  */
2236 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2237                                 unsigned int power_state)
2238 {
2239         if (power_state == AC_PWRST_D0) {
2240                 intel_haswell_enable_all_pins(codec, false);
2241                 intel_haswell_fixup_enable_dp12(codec);
2242         }
2243
2244         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2245         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2246 }
2247
2248 static int patch_generic_hdmi(struct hda_codec *codec)
2249 {
2250         struct hdmi_spec *spec;
2251
2252         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2253         if (spec == NULL)
2254                 return -ENOMEM;
2255
2256         spec->ops = generic_standard_hdmi_ops;
2257         codec->spec = spec;
2258         hdmi_array_init(spec, 4);
2259
2260         if (is_haswell(codec)) {
2261                 intel_haswell_enable_all_pins(codec, true);
2262                 intel_haswell_fixup_enable_dp12(codec);
2263         }
2264
2265         if (hdmi_parse_codec(codec) < 0) {
2266                 codec->spec = NULL;
2267                 kfree(spec);
2268                 return -EINVAL;
2269         }
2270         codec->patch_ops = generic_hdmi_patch_ops;
2271         if (is_haswell(codec)) {
2272                 codec->patch_ops.set_power_state = haswell_set_power_state;
2273                 codec->dp_mst = true;
2274         }
2275
2276         generic_hdmi_init_per_pins(codec);
2277
2278         init_channel_allocations();
2279
2280         return 0;
2281 }
2282
2283 /*
2284  * Shared non-generic implementations
2285  */
2286
2287 static int simple_playback_build_pcms(struct hda_codec *codec)
2288 {
2289         struct hdmi_spec *spec = codec->spec;
2290         struct hda_pcm *info;
2291         unsigned int chans;
2292         struct hda_pcm_stream *pstr;
2293         struct hdmi_spec_per_cvt *per_cvt;
2294
2295         per_cvt = get_cvt(spec, 0);
2296         chans = get_wcaps(codec, per_cvt->cvt_nid);
2297         chans = get_wcaps_channels(chans);
2298
2299         info = snd_array_new(&spec->pcm_rec);
2300         if (!info)
2301                 return -ENOMEM;
2302         info->name = get_pin(spec, 0)->pcm_name;
2303         sprintf(info->name, "HDMI 0");
2304         info->pcm_type = HDA_PCM_TYPE_HDMI;
2305         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2306         *pstr = spec->pcm_playback;
2307         pstr->nid = per_cvt->cvt_nid;
2308         if (pstr->channels_max <= 2 && chans && chans <= 16)
2309                 pstr->channels_max = chans;
2310
2311         codec->num_pcms = 1;
2312         codec->pcm_info = info;
2313
2314         return 0;
2315 }
2316
2317 /* unsolicited event for jack sensing */
2318 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2319                                     unsigned int res)
2320 {
2321         snd_hda_jack_set_dirty_all(codec);
2322         snd_hda_jack_report_sync(codec);
2323 }
2324
2325 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2326  * as long as spec->pins[] is set correctly
2327  */
2328 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2329
2330 static int simple_playback_build_controls(struct hda_codec *codec)
2331 {
2332         struct hdmi_spec *spec = codec->spec;
2333         struct hdmi_spec_per_cvt *per_cvt;
2334         int err;
2335
2336         per_cvt = get_cvt(spec, 0);
2337         err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
2338                                             per_cvt->cvt_nid);
2339         if (err < 0)
2340                 return err;
2341         return simple_hdmi_build_jack(codec, 0);
2342 }
2343
2344 static int simple_playback_init(struct hda_codec *codec)
2345 {
2346         struct hdmi_spec *spec = codec->spec;
2347         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2348         hda_nid_t pin = per_pin->pin_nid;
2349
2350         snd_hda_codec_write(codec, pin, 0,
2351                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2352         /* some codecs require to unmute the pin */
2353         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2354                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2355                                     AMP_OUT_UNMUTE);
2356         snd_hda_jack_detect_enable(codec, pin, pin);
2357         return 0;
2358 }
2359
2360 static void simple_playback_free(struct hda_codec *codec)
2361 {
2362         struct hdmi_spec *spec = codec->spec;
2363
2364         hdmi_array_free(spec);
2365         kfree(spec);
2366 }
2367
2368 /*
2369  * Nvidia specific implementations
2370  */
2371
2372 #define Nv_VERB_SET_Channel_Allocation          0xF79
2373 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2374 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2375 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2376
2377 #define nvhdmi_master_con_nid_7x        0x04
2378 #define nvhdmi_master_pin_nid_7x        0x05
2379
2380 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2381         /*front, rear, clfe, rear_surr */
2382         0x6, 0x8, 0xa, 0xc,
2383 };
2384
2385 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2386         /* set audio protect on */
2387         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2388         /* enable digital output on pin widget */
2389         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2390         {} /* terminator */
2391 };
2392
2393 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2394         /* set audio protect on */
2395         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2396         /* enable digital output on pin widget */
2397         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2398         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2399         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2400         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2401         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2402         {} /* terminator */
2403 };
2404
2405 #ifdef LIMITED_RATE_FMT_SUPPORT
2406 /* support only the safe format and rate */
2407 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2408 #define SUPPORTED_MAXBPS        16
2409 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2410 #else
2411 /* support all rates and formats */
2412 #define SUPPORTED_RATES \
2413         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2414         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2415          SNDRV_PCM_RATE_192000)
2416 #define SUPPORTED_MAXBPS        24
2417 #define SUPPORTED_FORMATS \
2418         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2419 #endif
2420
2421 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2422 {
2423         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2424         return 0;
2425 }
2426
2427 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2428 {
2429         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2430         return 0;
2431 }
2432
2433 static unsigned int channels_2_6_8[] = {
2434         2, 6, 8
2435 };
2436
2437 static unsigned int channels_2_8[] = {
2438         2, 8
2439 };
2440
2441 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2442         .count = ARRAY_SIZE(channels_2_6_8),
2443         .list = channels_2_6_8,
2444         .mask = 0,
2445 };
2446
2447 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2448         .count = ARRAY_SIZE(channels_2_8),
2449         .list = channels_2_8,
2450         .mask = 0,
2451 };
2452
2453 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2454                                     struct hda_codec *codec,
2455                                     struct snd_pcm_substream *substream)
2456 {
2457         struct hdmi_spec *spec = codec->spec;
2458         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2459
2460         switch (codec->preset->id) {
2461         case 0x10de0002:
2462         case 0x10de0003:
2463         case 0x10de0005:
2464         case 0x10de0006:
2465                 hw_constraints_channels = &hw_constraints_2_8_channels;
2466                 break;
2467         case 0x10de0007:
2468                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2469                 break;
2470         default:
2471                 break;
2472         }
2473
2474         if (hw_constraints_channels != NULL) {
2475                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2476                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2477                                 hw_constraints_channels);
2478         } else {
2479                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2480                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2481         }
2482
2483         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2484 }
2485
2486 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2487                                      struct hda_codec *codec,
2488                                      struct snd_pcm_substream *substream)
2489 {
2490         struct hdmi_spec *spec = codec->spec;
2491         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2492 }
2493
2494 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2495                                        struct hda_codec *codec,
2496                                        unsigned int stream_tag,
2497                                        unsigned int format,
2498                                        struct snd_pcm_substream *substream)
2499 {
2500         struct hdmi_spec *spec = codec->spec;
2501         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2502                                              stream_tag, format, substream);
2503 }
2504
2505 static const struct hda_pcm_stream simple_pcm_playback = {
2506         .substreams = 1,
2507         .channels_min = 2,
2508         .channels_max = 2,
2509         .ops = {
2510                 .open = simple_playback_pcm_open,
2511                 .close = simple_playback_pcm_close,
2512                 .prepare = simple_playback_pcm_prepare
2513         },
2514 };
2515
2516 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2517         .build_controls = simple_playback_build_controls,
2518         .build_pcms = simple_playback_build_pcms,
2519         .init = simple_playback_init,
2520         .free = simple_playback_free,
2521         .unsol_event = simple_hdmi_unsol_event,
2522 };
2523
2524 static int patch_simple_hdmi(struct hda_codec *codec,
2525                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2526 {
2527         struct hdmi_spec *spec;
2528         struct hdmi_spec_per_cvt *per_cvt;
2529         struct hdmi_spec_per_pin *per_pin;
2530
2531         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2532         if (!spec)
2533                 return -ENOMEM;
2534
2535         codec->spec = spec;
2536         hdmi_array_init(spec, 1);
2537
2538         spec->multiout.num_dacs = 0;  /* no analog */
2539         spec->multiout.max_channels = 2;
2540         spec->multiout.dig_out_nid = cvt_nid;
2541         spec->num_cvts = 1;
2542         spec->num_pins = 1;
2543         per_pin = snd_array_new(&spec->pins);
2544         per_cvt = snd_array_new(&spec->cvts);
2545         if (!per_pin || !per_cvt) {
2546                 simple_playback_free(codec);
2547                 return -ENOMEM;
2548         }
2549         per_cvt->cvt_nid = cvt_nid;
2550         per_pin->pin_nid = pin_nid;
2551         spec->pcm_playback = simple_pcm_playback;
2552
2553         codec->patch_ops = simple_hdmi_patch_ops;
2554
2555         return 0;
2556 }
2557
2558 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2559                                                     int channels)
2560 {
2561         unsigned int chanmask;
2562         int chan = channels ? (channels - 1) : 1;
2563
2564         switch (channels) {
2565         default:
2566         case 0:
2567         case 2:
2568                 chanmask = 0x00;
2569                 break;
2570         case 4:
2571                 chanmask = 0x08;
2572                 break;
2573         case 6:
2574                 chanmask = 0x0b;
2575                 break;
2576         case 8:
2577                 chanmask = 0x13;
2578                 break;
2579         }
2580
2581         /* Set the audio infoframe channel allocation and checksum fields.  The
2582          * channel count is computed implicitly by the hardware. */
2583         snd_hda_codec_write(codec, 0x1, 0,
2584                         Nv_VERB_SET_Channel_Allocation, chanmask);
2585
2586         snd_hda_codec_write(codec, 0x1, 0,
2587                         Nv_VERB_SET_Info_Frame_Checksum,
2588                         (0x71 - chan - chanmask));
2589 }
2590
2591 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2592                                    struct hda_codec *codec,
2593                                    struct snd_pcm_substream *substream)
2594 {
2595         struct hdmi_spec *spec = codec->spec;
2596         int i;
2597
2598         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2599                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2600         for (i = 0; i < 4; i++) {
2601                 /* set the stream id */
2602                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2603                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2604                 /* set the stream format */
2605                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2606                                 AC_VERB_SET_STREAM_FORMAT, 0);
2607         }
2608
2609         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2610          * streams are disabled. */
2611         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2612
2613         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2614 }
2615
2616 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2617                                      struct hda_codec *codec,
2618                                      unsigned int stream_tag,
2619                                      unsigned int format,
2620                                      struct snd_pcm_substream *substream)
2621 {
2622         int chs;
2623         unsigned int dataDCC2, channel_id;
2624         int i;
2625         struct hdmi_spec *spec = codec->spec;
2626         struct hda_spdif_out *spdif;
2627         struct hdmi_spec_per_cvt *per_cvt;
2628
2629         mutex_lock(&codec->spdif_mutex);
2630         per_cvt = get_cvt(spec, 0);
2631         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2632
2633         chs = substream->runtime->channels;
2634
2635         dataDCC2 = 0x2;
2636
2637         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2638         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2639                 snd_hda_codec_write(codec,
2640                                 nvhdmi_master_con_nid_7x,
2641                                 0,
2642                                 AC_VERB_SET_DIGI_CONVERT_1,
2643                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2644
2645         /* set the stream id */
2646         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2647                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2648
2649         /* set the stream format */
2650         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2651                         AC_VERB_SET_STREAM_FORMAT, format);
2652
2653         /* turn on again (if needed) */
2654         /* enable and set the channel status audio/data flag */
2655         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2656                 snd_hda_codec_write(codec,
2657                                 nvhdmi_master_con_nid_7x,
2658                                 0,
2659                                 AC_VERB_SET_DIGI_CONVERT_1,
2660                                 spdif->ctls & 0xff);
2661                 snd_hda_codec_write(codec,
2662                                 nvhdmi_master_con_nid_7x,
2663                                 0,
2664                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2665         }
2666
2667         for (i = 0; i < 4; i++) {
2668                 if (chs == 2)
2669                         channel_id = 0;
2670                 else
2671                         channel_id = i * 2;
2672
2673                 /* turn off SPDIF once;
2674                  *otherwise the IEC958 bits won't be updated
2675                  */
2676                 if (codec->spdif_status_reset &&
2677                 (spdif->ctls & AC_DIG1_ENABLE))
2678                         snd_hda_codec_write(codec,
2679                                 nvhdmi_con_nids_7x[i],
2680                                 0,
2681                                 AC_VERB_SET_DIGI_CONVERT_1,
2682                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2683                 /* set the stream id */
2684                 snd_hda_codec_write(codec,
2685                                 nvhdmi_con_nids_7x[i],
2686                                 0,
2687                                 AC_VERB_SET_CHANNEL_STREAMID,
2688                                 (stream_tag << 4) | channel_id);
2689                 /* set the stream format */
2690                 snd_hda_codec_write(codec,
2691                                 nvhdmi_con_nids_7x[i],
2692                                 0,
2693                                 AC_VERB_SET_STREAM_FORMAT,
2694                                 format);
2695                 /* turn on again (if needed) */
2696                 /* enable and set the channel status audio/data flag */
2697                 if (codec->spdif_status_reset &&
2698                 (spdif->ctls & AC_DIG1_ENABLE)) {
2699                         snd_hda_codec_write(codec,
2700                                         nvhdmi_con_nids_7x[i],
2701                                         0,
2702                                         AC_VERB_SET_DIGI_CONVERT_1,
2703                                         spdif->ctls & 0xff);
2704                         snd_hda_codec_write(codec,
2705                                         nvhdmi_con_nids_7x[i],
2706                                         0,
2707                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2708                 }
2709         }
2710
2711         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2712
2713         mutex_unlock(&codec->spdif_mutex);
2714         return 0;
2715 }
2716
2717 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2718         .substreams = 1,
2719         .channels_min = 2,
2720         .channels_max = 8,
2721         .nid = nvhdmi_master_con_nid_7x,
2722         .rates = SUPPORTED_RATES,
2723         .maxbps = SUPPORTED_MAXBPS,
2724         .formats = SUPPORTED_FORMATS,
2725         .ops = {
2726                 .open = simple_playback_pcm_open,
2727                 .close = nvhdmi_8ch_7x_pcm_close,
2728                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2729         },
2730 };
2731
2732 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2733 {
2734         struct hdmi_spec *spec;
2735         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2736                                     nvhdmi_master_pin_nid_7x);
2737         if (err < 0)
2738                 return err;
2739
2740         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2741         /* override the PCM rates, etc, as the codec doesn't give full list */
2742         spec = codec->spec;
2743         spec->pcm_playback.rates = SUPPORTED_RATES;
2744         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2745         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2746         return 0;
2747 }
2748
2749 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2750 {
2751         struct hdmi_spec *spec = codec->spec;
2752         int err = simple_playback_build_pcms(codec);
2753         if (!err) {
2754                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2755                 info->own_chmap = true;
2756         }
2757         return err;
2758 }
2759
2760 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2761 {
2762         struct hdmi_spec *spec = codec->spec;
2763         struct hda_pcm *info;
2764         struct snd_pcm_chmap *chmap;
2765         int err;
2766
2767         err = simple_playback_build_controls(codec);
2768         if (err < 0)
2769                 return err;
2770
2771         /* add channel maps */
2772         info = get_pcm_rec(spec, 0);
2773         err = snd_pcm_add_chmap_ctls(info->pcm,
2774                                      SNDRV_PCM_STREAM_PLAYBACK,
2775                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2776         if (err < 0)
2777                 return err;
2778         switch (codec->preset->id) {
2779         case 0x10de0002:
2780         case 0x10de0003:
2781         case 0x10de0005:
2782         case 0x10de0006:
2783                 chmap->channel_mask = (1U << 2) | (1U << 8);
2784                 break;
2785         case 0x10de0007:
2786                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2787         }
2788         return 0;
2789 }
2790
2791 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2792 {
2793         struct hdmi_spec *spec;
2794         int err = patch_nvhdmi_2ch(codec);
2795         if (err < 0)
2796                 return err;
2797         spec = codec->spec;
2798         spec->multiout.max_channels = 8;
2799         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2800         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2801         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2802         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2803
2804         /* Initialize the audio infoframe channel mask and checksum to something
2805          * valid */
2806         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2807
2808         return 0;
2809 }
2810
2811 /*
2812  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2813  * - 0x10de0015
2814  * - 0x10de0040
2815  */
2816 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2817                                                     int channels)
2818 {
2819         if (cap->ca_index == 0x00 && channels == 2)
2820                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
2821
2822         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
2823 }
2824
2825 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
2826 {
2827         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2828                 return -EINVAL;
2829
2830         return 0;
2831 }
2832
2833 static int patch_nvhdmi(struct hda_codec *codec)
2834 {
2835         struct hdmi_spec *spec;
2836         int err;
2837
2838         err = patch_generic_hdmi(codec);
2839         if (err)
2840                 return err;
2841
2842         spec = codec->spec;
2843
2844         spec->ops.chmap_cea_alloc_validate_get_type =
2845                 nvhdmi_chmap_cea_alloc_validate_get_type;
2846         spec->ops.chmap_validate = nvhdmi_chmap_validate;
2847
2848         return 0;
2849 }
2850
2851 /*
2852  * ATI/AMD-specific implementations
2853  */
2854
2855 #define is_amdhdmi_rev3_or_later(codec) \
2856         ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
2857 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
2858
2859 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
2860 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
2861 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
2862 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
2863 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
2864 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
2865 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
2866 #define ATI_VERB_SET_HBR_CONTROL        0x77c
2867 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
2868 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
2869 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
2870 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
2871 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
2872 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
2873 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
2874 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
2875 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
2876 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
2877 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
2878 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
2879 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
2880 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
2881 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
2882 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
2883 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
2884
2885 /* AMD specific HDA cvt verbs */
2886 #define ATI_VERB_SET_RAMP_RATE          0x770
2887 #define ATI_VERB_GET_RAMP_RATE          0xf70
2888
2889 #define ATI_OUT_ENABLE 0x1
2890
2891 #define ATI_MULTICHANNEL_MODE_PAIRED    0
2892 #define ATI_MULTICHANNEL_MODE_SINGLE    1
2893
2894 #define ATI_HBR_CAPABLE 0x01
2895 #define ATI_HBR_ENABLE 0x10
2896
2897 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
2898                            unsigned char *buf, int *eld_size)
2899 {
2900         /* call hda_eld.c ATI/AMD-specific function */
2901         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
2902                                     is_amdhdmi_rev3_or_later(codec));
2903 }
2904
2905 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
2906                                         int active_channels, int conn_type)
2907 {
2908         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
2909 }
2910
2911 static int atihdmi_paired_swap_fc_lfe(int pos)
2912 {
2913         /*
2914          * ATI/AMD have automatic FC/LFE swap built-in
2915          * when in pairwise mapping mode.
2916          */
2917
2918         switch (pos) {
2919                 /* see channel_allocations[].speakers[] */
2920                 case 2: return 3;
2921                 case 3: return 2;
2922                 default: break;
2923         }
2924
2925         return pos;
2926 }
2927
2928 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
2929 {
2930         struct cea_channel_speaker_allocation *cap;
2931         int i, j;
2932
2933         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
2934
2935         cap = &channel_allocations[get_channel_allocation_order(ca)];
2936         for (i = 0; i < chs; ++i) {
2937                 int mask = to_spk_mask(map[i]);
2938                 bool ok = false;
2939                 bool companion_ok = false;
2940
2941                 if (!mask)
2942                         continue;
2943
2944                 for (j = 0 + i % 2; j < 8; j += 2) {
2945                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
2946                         if (cap->speakers[chan_idx] == mask) {
2947                                 /* channel is in a supported position */
2948                                 ok = true;
2949
2950                                 if (i % 2 == 0 && i + 1 < chs) {
2951                                         /* even channel, check the odd companion */
2952                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
2953                                         int comp_mask_req = to_spk_mask(map[i+1]);
2954                                         int comp_mask_act = cap->speakers[comp_chan_idx];
2955
2956                                         if (comp_mask_req == comp_mask_act)
2957                                                 companion_ok = true;
2958                                         else
2959                                                 return -EINVAL;
2960                                 }
2961                                 break;
2962                         }
2963                 }
2964
2965                 if (!ok)
2966                         return -EINVAL;
2967
2968                 if (companion_ok)
2969                         i++; /* companion channel already checked */
2970         }
2971
2972         return 0;
2973 }
2974
2975 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
2976                                         int hdmi_slot, int stream_channel)
2977 {
2978         int verb;
2979         int ati_channel_setup = 0;
2980
2981         if (hdmi_slot > 7)
2982                 return -EINVAL;
2983
2984         if (!has_amd_full_remap_support(codec)) {
2985                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
2986
2987                 /* In case this is an odd slot but without stream channel, do not
2988                  * disable the slot since the corresponding even slot could have a
2989                  * channel. In case neither have a channel, the slot pair will be
2990                  * disabled when this function is called for the even slot. */
2991                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
2992                         return 0;
2993
2994                 hdmi_slot -= hdmi_slot % 2;
2995
2996                 if (stream_channel != 0xf)
2997                         stream_channel -= stream_channel % 2;
2998         }
2999
3000         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3001
3002         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3003
3004         if (stream_channel != 0xf)
3005                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3006
3007         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3008 }
3009
3010 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3011                                         int asp_slot)
3012 {
3013         bool was_odd = false;
3014         int ati_asp_slot = asp_slot;
3015         int verb;
3016         int ati_channel_setup;
3017
3018         if (asp_slot > 7)
3019                 return -EINVAL;
3020
3021         if (!has_amd_full_remap_support(codec)) {
3022                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3023                 if (ati_asp_slot % 2 != 0) {
3024                         ati_asp_slot -= 1;
3025                         was_odd = true;
3026                 }
3027         }
3028
3029         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3030
3031         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3032
3033         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3034                 return 0xf;
3035
3036         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3037 }
3038
3039 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3040                                                             int channels)
3041 {
3042         int c;
3043
3044         /*
3045          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3046          * we need to take that into account (a single channel may take 2
3047          * channel slots if we need to carry a silent channel next to it).
3048          * On Rev3+ AMD codecs this function is not used.
3049          */
3050         int chanpairs = 0;
3051
3052         /* We only produce even-numbered channel count TLVs */
3053         if ((channels % 2) != 0)
3054                 return -1;
3055
3056         for (c = 0; c < 7; c += 2) {
3057                 if (cap->speakers[c] || cap->speakers[c+1])
3058                         chanpairs++;
3059         }
3060
3061         if (chanpairs * 2 != channels)
3062                 return -1;
3063
3064         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3065 }
3066
3067 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3068                                                   unsigned int *chmap, int channels)
3069 {
3070         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3071         int count = 0;
3072         int c;
3073
3074         for (c = 7; c >= 0; c--) {
3075                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3076                 int spk = cap->speakers[chan];
3077                 if (!spk) {
3078                         /* add N/A channel if the companion channel is occupied */
3079                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3080                                 chmap[count++] = SNDRV_CHMAP_NA;
3081
3082                         continue;
3083                 }
3084
3085                 chmap[count++] = spk_to_chmap(spk);
3086         }
3087
3088         WARN_ON(count != channels);
3089 }
3090
3091 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3092                                  bool hbr)
3093 {
3094         int hbr_ctl, hbr_ctl_new;
3095
3096         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3097         if (hbr_ctl & ATI_HBR_CAPABLE) {
3098                 if (hbr)
3099                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3100                 else
3101                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3102
3103                 snd_printdd("atihdmi_pin_hbr_setup: "
3104                                 "NID=0x%x, %shbr-ctl=0x%x\n",
3105                                 pin_nid,
3106                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3107                                 hbr_ctl_new);
3108
3109                 if (hbr_ctl != hbr_ctl_new)
3110                         snd_hda_codec_write(codec, pin_nid, 0,
3111                                                 ATI_VERB_SET_HBR_CONTROL,
3112                                                 hbr_ctl_new);
3113
3114         } else if (hbr)
3115                 return -EINVAL;
3116
3117         return 0;
3118 }
3119
3120 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3121                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3122 {
3123
3124         if (is_amdhdmi_rev3_or_later(codec)) {
3125                 int ramp_rate = 180; /* default as per AMD spec */
3126                 /* disable ramp-up/down for non-pcm as per AMD spec */
3127                 if (format & AC_FMT_TYPE_NON_PCM)
3128                         ramp_rate = 0;
3129
3130                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3131         }
3132
3133         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3134 }
3135
3136
3137 static int atihdmi_init(struct hda_codec *codec)
3138 {
3139         struct hdmi_spec *spec = codec->spec;
3140         int pin_idx, err;
3141
3142         err = generic_hdmi_init(codec);
3143
3144         if (err)
3145                 return err;
3146
3147         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3148                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3149
3150                 /* make sure downmix information in infoframe is zero */
3151                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3152
3153                 /* enable channel-wise remap mode if supported */
3154                 if (has_amd_full_remap_support(codec))
3155                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3156                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3157                                             ATI_MULTICHANNEL_MODE_SINGLE);
3158         }
3159
3160         return 0;
3161 }
3162
3163 static int patch_atihdmi(struct hda_codec *codec)
3164 {
3165         struct hdmi_spec *spec;
3166         struct hdmi_spec_per_cvt *per_cvt;
3167         int err, cvt_idx;
3168
3169         err = patch_generic_hdmi(codec);
3170
3171         if (err)
3172                 return err;
3173
3174         codec->patch_ops.init = atihdmi_init;
3175
3176         spec = codec->spec;
3177
3178         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3179         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3180         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3181         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3182         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3183         spec->ops.setup_stream = atihdmi_setup_stream;
3184
3185         if (!has_amd_full_remap_support(codec)) {
3186                 /* override to ATI/AMD-specific versions with pairwise mapping */
3187                 spec->ops.chmap_cea_alloc_validate_get_type =
3188                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3189                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3190                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3191         }
3192
3193         /* ATI/AMD converters do not advertise all of their capabilities */
3194         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3195                 per_cvt = get_cvt(spec, cvt_idx);
3196                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3197                 per_cvt->rates |= SUPPORTED_RATES;
3198                 per_cvt->formats |= SUPPORTED_FORMATS;
3199                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3200         }
3201
3202         spec->channels_max = max(spec->channels_max, 8u);
3203
3204         return 0;
3205 }
3206
3207 /* VIA HDMI Implementation */
3208 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3209 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3210
3211 static int patch_via_hdmi(struct hda_codec *codec)
3212 {
3213         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3214 }
3215
3216 /*
3217  * patch entries
3218  */
3219 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
3220 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3221 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3222 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
3223 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_atihdmi },
3224 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
3225 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
3226 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
3227 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3228 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3229 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3230 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3231 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
3232 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_nvhdmi },
3233 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_nvhdmi },
3234 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_nvhdmi },
3235 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_nvhdmi },
3236 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_nvhdmi },
3237 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_nvhdmi },
3238 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_nvhdmi },
3239 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_nvhdmi },
3240 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_nvhdmi },
3241 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_nvhdmi },
3242 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_nvhdmi },
3243 /* 17 is known to be absent */
3244 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_nvhdmi },
3245 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_nvhdmi },
3246 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_nvhdmi },
3247 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_nvhdmi },
3248 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_nvhdmi },
3249 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_nvhdmi },
3250 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_nvhdmi },
3251 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_nvhdmi },
3252 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_nvhdmi },
3253 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_nvhdmi },
3254 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_nvhdmi },
3255 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_nvhdmi },
3256 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
3257 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
3258 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3259 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3260 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3261 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3262 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3263 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
3264 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
3265 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
3266 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3267 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
3268 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
3269 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
3270 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
3271 { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
3272 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
3273 {} /* terminator */
3274 };
3275
3276 MODULE_ALIAS("snd-hda-codec-id:1002793c");
3277 MODULE_ALIAS("snd-hda-codec-id:10027919");
3278 MODULE_ALIAS("snd-hda-codec-id:1002791a");
3279 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
3280 MODULE_ALIAS("snd-hda-codec-id:10951390");
3281 MODULE_ALIAS("snd-hda-codec-id:10951392");
3282 MODULE_ALIAS("snd-hda-codec-id:10de0002");
3283 MODULE_ALIAS("snd-hda-codec-id:10de0003");
3284 MODULE_ALIAS("snd-hda-codec-id:10de0005");
3285 MODULE_ALIAS("snd-hda-codec-id:10de0006");
3286 MODULE_ALIAS("snd-hda-codec-id:10de0007");
3287 MODULE_ALIAS("snd-hda-codec-id:10de000a");
3288 MODULE_ALIAS("snd-hda-codec-id:10de000b");
3289 MODULE_ALIAS("snd-hda-codec-id:10de000c");
3290 MODULE_ALIAS("snd-hda-codec-id:10de000d");
3291 MODULE_ALIAS("snd-hda-codec-id:10de0010");
3292 MODULE_ALIAS("snd-hda-codec-id:10de0011");
3293 MODULE_ALIAS("snd-hda-codec-id:10de0012");
3294 MODULE_ALIAS("snd-hda-codec-id:10de0013");
3295 MODULE_ALIAS("snd-hda-codec-id:10de0014");
3296 MODULE_ALIAS("snd-hda-codec-id:10de0015");
3297 MODULE_ALIAS("snd-hda-codec-id:10de0016");
3298 MODULE_ALIAS("snd-hda-codec-id:10de0018");
3299 MODULE_ALIAS("snd-hda-codec-id:10de0019");
3300 MODULE_ALIAS("snd-hda-codec-id:10de001a");
3301 MODULE_ALIAS("snd-hda-codec-id:10de001b");
3302 MODULE_ALIAS("snd-hda-codec-id:10de001c");
3303 MODULE_ALIAS("snd-hda-codec-id:10de0040");
3304 MODULE_ALIAS("snd-hda-codec-id:10de0041");
3305 MODULE_ALIAS("snd-hda-codec-id:10de0042");
3306 MODULE_ALIAS("snd-hda-codec-id:10de0043");
3307 MODULE_ALIAS("snd-hda-codec-id:10de0044");
3308 MODULE_ALIAS("snd-hda-codec-id:10de0051");
3309 MODULE_ALIAS("snd-hda-codec-id:10de0060");
3310 MODULE_ALIAS("snd-hda-codec-id:10de0067");
3311 MODULE_ALIAS("snd-hda-codec-id:10de8001");
3312 MODULE_ALIAS("snd-hda-codec-id:11069f80");
3313 MODULE_ALIAS("snd-hda-codec-id:11069f81");
3314 MODULE_ALIAS("snd-hda-codec-id:11069f84");
3315 MODULE_ALIAS("snd-hda-codec-id:11069f85");
3316 MODULE_ALIAS("snd-hda-codec-id:17e80047");
3317 MODULE_ALIAS("snd-hda-codec-id:80860054");
3318 MODULE_ALIAS("snd-hda-codec-id:80862801");
3319 MODULE_ALIAS("snd-hda-codec-id:80862802");
3320 MODULE_ALIAS("snd-hda-codec-id:80862803");
3321 MODULE_ALIAS("snd-hda-codec-id:80862804");
3322 MODULE_ALIAS("snd-hda-codec-id:80862805");
3323 MODULE_ALIAS("snd-hda-codec-id:80862806");
3324 MODULE_ALIAS("snd-hda-codec-id:80862807");
3325 MODULE_ALIAS("snd-hda-codec-id:80862880");
3326 MODULE_ALIAS("snd-hda-codec-id:80862882");
3327 MODULE_ALIAS("snd-hda-codec-id:808629fb");
3328
3329 MODULE_LICENSE("GPL");
3330 MODULE_DESCRIPTION("HDMI HD-audio codec");
3331 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3332 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3333 MODULE_ALIAS("snd-hda-codec-atihdmi");
3334
3335 static struct hda_codec_preset_list intel_list = {
3336         .preset = snd_hda_preset_hdmi,
3337         .owner = THIS_MODULE,
3338 };
3339
3340 static int __init patch_hdmi_init(void)
3341 {
3342         return snd_hda_add_codec_preset(&intel_list);
3343 }
3344
3345 static void __exit patch_hdmi_exit(void)
3346 {
3347         snd_hda_delete_codec_preset(&intel_list);
3348 }
3349
3350 module_init(patch_hdmi_init)
3351 module_exit(patch_hdmi_exit)