sound/pci/hda/hda_intel.c

   1 /*
   2  *
   3  *  hda_intel.c - Implementation of primary alsa driver code base
   4  *                for Intel HD Audio.
   5  *
   6  *  Copyright(c) 2004 Intel Corporation. All rights reserved.
   7  *
   8  *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
   9  *                     PeiSen Hou <pshou@realtek.com.tw>
  10  *
  11  *  This program is free software; you can redistribute it and/or modify it
  12  *  under the terms of the GNU General Public License as published by the Free
  13  *  Software Foundation; either version 2 of the License, or (at your option)
  14  *  any later version.
  15  *
  16  *  This program is distributed in the hope that it will be useful, but WITHOUT
  17  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  *  more details.
  20  *
  21  *  You should have received a copy of the GNU General Public License along with
  22  *  this program; if not, write to the Free Software Foundation, Inc., 59
  23  *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  24  *
  25  *  CONTACTS:
  26  *
  27  *  Matt Jared          matt.jared@intel.com
  28  *  Andy Kopp           andy.kopp@intel.com
  29  *  Dan Kogan           dan.d.kogan@intel.com
  30  *
  31  *  CHANGES:
  32  *
  33  *  2004.12.01  Major rewrite by tiwai, merged the work of pshou
  34  *
  35  */
  36
  37 #include <linux/delay.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/kernel.h>
  40 #include <linux/module.h>
  41 #include <linux/dma-mapping.h>
  42 #include <linux/moduleparam.h>
  43 #include <linux/init.h>
  44 #include <linux/slab.h>
  45 #include <linux/pci.h>
  46 #include <linux/mutex.h>
  47 #include <linux/io.h>
  48 #include <linux/pm_runtime.h>
  49 #include <linux/clocksource.h>
  50 #include <linux/time.h>
  51 #include <linux/completion.h>
  52
  53 #ifdef CONFIG_X86
  54 /* for snoop control */
  55 #include <asm/pgtable.h>
  56 #include <asm/cacheflush.h>
  57 #endif
  58 #include <sound/core.h>
  59 #include <sound/initval.h>
  60 #include <linux/vgaarb.h>
  61 #include <linux/vga_switcheroo.h>
  62 #include <linux/firmware.h>
  63 #include "hda_codec.h"
  64 #include "hda_controller.h"
  65 #include "hda_priv.h"
  66 #include "hda_i915.h"
  67
  68 /* position fix mode */
  69 enum {
  70         POS_FIX_AUTO,
  71         POS_FIX_LPIB,
  72         POS_FIX_POSBUF,
  73         POS_FIX_VIACOMBO,
  74         POS_FIX_COMBO,
  75 };
  76
  77 /* Defines for ATI HD Audio support in SB450 south bridge */
  78 #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR   0x42
  79 #define ATI_SB450_HDAUDIO_ENABLE_SNOOP      0x02
  80
  81 /* Defines for Nvidia HDA support */
  82 #define NVIDIA_HDA_TRANSREG_ADDR      0x4e
  83 #define NVIDIA_HDA_ENABLE_COHBITS     0x0f
  84 #define NVIDIA_HDA_ISTRM_COH          0x4d
  85 #define NVIDIA_HDA_OSTRM_COH          0x4c
  86 #define NVIDIA_HDA_ENABLE_COHBIT      0x01
  87
  88 /* Defines for Intel SCH HDA snoop control */
  89 #define INTEL_SCH_HDA_DEVC      0x78
  90 #define INTEL_SCH_HDA_DEVC_NOSNOOP       (0x1<<11)
  91
  92 /* Define IN stream 0 FIFO size offset in VIA controller */
  93 #define VIA_IN_STREAM0_FIFO_SIZE_OFFSET 0x90
  94 /* Define VIA HD Audio Device ID*/
  95 #define VIA_HDAC_DEVICE_ID              0x3288
  96
  97 /* max number of SDs */
  98 /* ICH, ATI and VIA have 4 playback and 4 capture */
  99 #define ICH6_NUM_CAPTURE        4
 100 #define ICH6_NUM_PLAYBACK       4
 101
 102 /* ULI has 6 playback and 5 capture */
 103 #define ULI_NUM_CAPTURE         5
 104 #define ULI_NUM_PLAYBACK        6
 105
 106 /* ATI HDMI may have up to 8 playbacks and 0 capture */
 107 #define ATIHDMI_NUM_CAPTURE     0
 108 #define ATIHDMI_NUM_PLAYBACK    8
 109
 110 /* TERA has 4 playback and 3 capture */
 111 #define TERA_NUM_CAPTURE        3
 112 #define TERA_NUM_PLAYBACK       4
 113
 114
 115 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
 116 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
 117 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
 118 static char *model[SNDRV_CARDS];
 119 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 120 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 121 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 122 static int probe_only[SNDRV_CARDS];
 123 static int jackpoll_ms[SNDRV_CARDS];
 124 static bool single_cmd;
 125 static int enable_msi = -1;
 126 #ifdef CONFIG_SND_HDA_PATCH_LOADER
 127 static char *patch[SNDRV_CARDS];
 128 #endif
 129 #ifdef CONFIG_SND_HDA_INPUT_BEEP
 130 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
 131                                         CONFIG_SND_HDA_INPUT_BEEP_MODE};
 132 #endif
 133
 134 module_param_array(index, int, NULL, 0444);
 135 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
 136 module_param_array(id, charp, NULL, 0444);
 137 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
 138 module_param_array(enable, bool, NULL, 0444);
 139 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
 140 module_param_array(model, charp, NULL, 0444);
 141 MODULE_PARM_DESC(model, "Use the given board model.");
 142 module_param_array(position_fix, int, NULL, 0444);
 143 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
 144                  "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
 145 module_param_array(bdl_pos_adj, int, NULL, 0644);
 146 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
 147 module_param_array(probe_mask, int, NULL, 0444);
 148 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
 149 module_param_array(probe_only, int, NULL, 0444);
 150 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
 151 module_param_array(jackpoll_ms, int, NULL, 0444);
 152 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
 153 module_param(single_cmd, bool, 0444);
 154 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
 155                  "(for debugging only).");
 156 module_param(enable_msi, bint, 0444);
 157 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
 158 #ifdef CONFIG_SND_HDA_PATCH_LOADER
 159 module_param_array(patch, charp, NULL, 0444);
 160 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
 161 #endif
 162 #ifdef CONFIG_SND_HDA_INPUT_BEEP
 163 module_param_array(beep_mode, bool, NULL, 0444);
 164 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
 165                             "(0=off, 1=on) (default=1).");
 166 #endif
 167
 168 #ifdef CONFIG_PM
 169 static int param_set_xint(const char *val, const struct kernel_param *kp);
 170 static struct kernel_param_ops param_ops_xint = {
 171         .set = param_set_xint,
 172         .get = param_get_int,
 173 };
 174 #define param_check_xint param_check_int
 175
 176 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
 177 static int *power_save_addr = &power_save;
 178 module_param(power_save, xint, 0644);
 179 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
 180                  "(in second, 0 = disable).");
 181
 182 /* reset the HD-audio controller in power save mode.
 183  * this may give more power-saving, but will take longer time to
 184  * wake up.
 185  */
 186 static bool power_save_controller = 1;
 187 module_param(power_save_controller, bool, 0644);
 188 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
 189 #else
 190 static int *power_save_addr;
 191 #endif /* CONFIG_PM */
 192
 193 static int align_buffer_size = -1;
 194 module_param(align_buffer_size, bint, 0644);
 195 MODULE_PARM_DESC(align_buffer_size,
 196                 "Force buffer and period sizes to be multiple of 128 bytes.");
 197
 198 #ifdef CONFIG_X86
 199 static bool hda_snoop = true;
 200 module_param_named(snoop, hda_snoop, bool, 0444);
 201 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
 202 #else
 203 #define hda_snoop               true
 204 #endif
 205
 206
 207 MODULE_LICENSE("GPL");
 208 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
 209                          "{Intel, ICH6M},"
 210                          "{Intel, ICH7},"
 211                          "{Intel, ESB2},"
 212                          "{Intel, ICH8},"
 213                          "{Intel, ICH9},"
 214                          "{Intel, ICH10},"
 215                          "{Intel, PCH},"
 216                          "{Intel, CPT},"
 217                          "{Intel, PPT},"
 218                          "{Intel, LPT},"
 219                          "{Intel, LPT_LP},"
 220                          "{Intel, WPT_LP},"
 221                          "{Intel, SPT},"
 222                          "{Intel, HPT},"
 223                          "{Intel, PBG},"
 224                          "{Intel, SCH},"
 225                          "{ATI, SB450},"
 226                          "{ATI, SB600},"
 227                          "{ATI, RS600},"
 228                          "{ATI, RS690},"
 229                          "{ATI, RS780},"
 230                          "{ATI, R600},"
 231                          "{ATI, RV630},"
 232                          "{ATI, RV610},"
 233                          "{ATI, RV670},"
 234                          "{ATI, RV635},"
 235                          "{ATI, RV620},"
 236                          "{ATI, RV770},"
 237                          "{VIA, VT8251},"
 238                          "{VIA, VT8237A},"
 239                          "{SiS, SIS966},"
 240                          "{ULI, M5461}}");
 241 MODULE_DESCRIPTION("Intel HDA driver");
 242
 243 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
 244 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
 245 #define SUPPORT_VGA_SWITCHEROO
 246 #endif
 247 #endif
 248
 249
 250 /*
 251  */
 252
 253 /* driver types */
 254 enum {
 255         AZX_DRIVER_ICH,
 256         AZX_DRIVER_PCH,
 257         AZX_DRIVER_SCH,
 258         AZX_DRIVER_HDMI,
 259         AZX_DRIVER_ATI,
 260         AZX_DRIVER_ATIHDMI,
 261         AZX_DRIVER_ATIHDMI_NS,
 262         AZX_DRIVER_VIA,
 263         AZX_DRIVER_SIS,
 264         AZX_DRIVER_ULI,
 265         AZX_DRIVER_NVIDIA,
 266         AZX_DRIVER_TERA,
 267         AZX_DRIVER_CTX,
 268         AZX_DRIVER_CTHDA,
 269         AZX_DRIVER_CMEDIA,
 270         AZX_DRIVER_GENERIC,
 271         AZX_NUM_DRIVERS, /* keep this as last entry */
 272 };
 273
 274 /* quirks for Intel PCH */
 275 #define AZX_DCAPS_INTEL_PCH_NOPM \
 276         (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_BUFSIZE | \
 277          AZX_DCAPS_COUNT_LPIB_DELAY | AZX_DCAPS_REVERSE_ASSIGN)
 278
 279 #define AZX_DCAPS_INTEL_PCH \
 280         (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
 281
 282 #define AZX_DCAPS_INTEL_HASWELL \
 283         (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_ALIGN_BUFSIZE | \
 284          AZX_DCAPS_COUNT_LPIB_DELAY | AZX_DCAPS_PM_RUNTIME | \
 285          AZX_DCAPS_I915_POWERWELL)
 286
 287 /* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
 288 #define AZX_DCAPS_INTEL_BROADWELL \
 289         (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_ALIGN_BUFSIZE | \
 290          AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_PM_RUNTIME | \
 291          AZX_DCAPS_I915_POWERWELL)
 292
 293 /* quirks for ATI SB / AMD Hudson */
 294 #define AZX_DCAPS_PRESET_ATI_SB \
 295         (AZX_DCAPS_ATI_SNOOP | AZX_DCAPS_NO_TCSEL | \
 296          AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
 297
 298 /* quirks for ATI/AMD HDMI */
 299 #define AZX_DCAPS_PRESET_ATI_HDMI \
 300         (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
 301
 302 /* quirks for Nvidia */
 303 #define AZX_DCAPS_PRESET_NVIDIA \
 304         (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\
 305          AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT |\
 306          AZX_DCAPS_CORBRP_SELF_CLEAR)
 307
 308 #define AZX_DCAPS_PRESET_CTHDA \
 309         (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY)
 310
 311 /*
 312  * VGA-switcher support
 313  */
 314 #ifdef SUPPORT_VGA_SWITCHEROO
 315 #define use_vga_switcheroo(chip)        ((chip)->use_vga_switcheroo)
 316 #else
 317 #define use_vga_switcheroo(chip)        0
 318 #endif
 319
 320 static char *driver_short_names[] = {
 321         [AZX_DRIVER_ICH] = "HDA Intel",
 322         [AZX_DRIVER_PCH] = "HDA Intel PCH",
 323         [AZX_DRIVER_SCH] = "HDA Intel MID",
 324         [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
 325         [AZX_DRIVER_ATI] = "HDA ATI SB",
 326         [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
 327         [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
 328         [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
 329         [AZX_DRIVER_SIS] = "HDA SIS966",
 330         [AZX_DRIVER_ULI] = "HDA ULI M5461",
 331         [AZX_DRIVER_NVIDIA] = "HDA NVidia",
 332         [AZX_DRIVER_TERA] = "HDA Teradici",
 333         [AZX_DRIVER_CTX] = "HDA Creative",
 334         [AZX_DRIVER_CTHDA] = "HDA Creative",
 335         [AZX_DRIVER_CMEDIA] = "HDA C-Media",
 336         [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
 337 };
 338
 339 struct hda_intel {
 340         struct azx chip;
 341
 342         /* for pending irqs */
 343         struct work_struct irq_pending_work;
 344
 345         /* sync probing */
 346         struct completion probe_wait;
 347         struct work_struct probe_work;
 348
 349         /* card list (for power_save trigger) */
 350         struct list_head list;
 351
 352         /* extra flags */
 353         unsigned int irq_pending_warned:1;
 354
 355         /* VGA-switcheroo setup */
 356         unsigned int use_vga_switcheroo:1;
 357         unsigned int vga_switcheroo_registered:1;
 358         unsigned int init_failed:1; /* delayed init failed */
 359
 360         /* secondary power domain for hdmi audio under vga device */
 361         struct dev_pm_domain hdmi_pm_domain;
 362 };
 363
 364 #ifdef CONFIG_X86
 365 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
 366 {
 367         int pages;
 368
 369         if (azx_snoop(chip))
 370                 return;
 371         if (!dmab || !dmab->area || !dmab->bytes)
 372                 return;
 373
 374 #ifdef CONFIG_SND_DMA_SGBUF
 375         if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
 376                 struct snd_sg_buf *sgbuf = dmab->private_data;
 377                 if (chip->driver_type == AZX_DRIVER_CMEDIA)
 378                         return; /* deal with only CORB/RIRB buffers */
 379                 if (on)
 380                         set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
 381                 else
 382                         set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
 383                 return;
 384         }
 385 #endif
 386
 387         pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
 388         if (on)
 389                 set_memory_wc((unsigned long)dmab->area, pages);
 390         else
 391                 set_memory_wb((unsigned long)dmab->area, pages);
 392 }
 393
 394 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
 395                                  bool on)
 396 {
 397         __mark_pages_wc(chip, buf, on);
 398 }
 399 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
 400                                    struct snd_pcm_substream *substream, bool on)
 401 {
 402         if (azx_dev->wc_marked != on) {
 403                 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
 404                 azx_dev->wc_marked = on;
 405         }
 406 }
 407 #else
 408 /* NOP for other archs */
 409 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
 410                                  bool on)
 411 {
 412 }
 413 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
 414                                    struct snd_pcm_substream *substream, bool on)
 415 {
 416 }
 417 #endif
 418
 419 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
 420
 421 /*
 422  * initialize the PCI registers
 423  */
 424 /* update bits in a PCI register byte */
 425 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
 426                             unsigned char mask, unsigned char val)
 427 {
 428         unsigned char data;
 429
 430         pci_read_config_byte(pci, reg, &data);
 431         data &= ~mask;
 432         data |= (val & mask);
 433         pci_write_config_byte(pci, reg, data);
 434 }
 435
 436 static void azx_init_pci(struct azx *chip)
 437 {
 438         /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
 439          * TCSEL == Traffic Class Select Register, which sets PCI express QOS
 440          * Ensuring these bits are 0 clears playback static on some HD Audio
 441          * codecs.
 442          * The PCI register TCSEL is defined in the Intel manuals.
 443          */
 444         if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
 445                 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
 446                 update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0);
 447         }
 448
 449         /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
 450          * we need to enable snoop.
 451          */
 452         if (chip->driver_caps & AZX_DCAPS_ATI_SNOOP) {
 453                 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
 454                         azx_snoop(chip));
 455                 update_pci_byte(chip->pci,
 456                                 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
 457                                 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
 458         }
 459
 460         /* For NVIDIA HDA, enable snoop */
 461         if (chip->driver_caps & AZX_DCAPS_NVIDIA_SNOOP) {
 462                 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
 463                         azx_snoop(chip));
 464                 update_pci_byte(chip->pci,
 465                                 NVIDIA_HDA_TRANSREG_ADDR,
 466                                 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
 467                 update_pci_byte(chip->pci,
 468                                 NVIDIA_HDA_ISTRM_COH,
 469                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
 470                 update_pci_byte(chip->pci,
 471                                 NVIDIA_HDA_OSTRM_COH,
 472                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
 473         }
 474
 475         /* Enable SCH/PCH snoop if needed */
 476         if (chip->driver_caps & AZX_DCAPS_SCH_SNOOP) {
 477                 unsigned short snoop;
 478                 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
 479                 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
 480                     (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
 481                         snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
 482                         if (!azx_snoop(chip))
 483                                 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
 484                         pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
 485                         pci_read_config_word(chip->pci,
 486                                 INTEL_SCH_HDA_DEVC, &snoop);
 487                 }
 488                 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
 489                         (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
 490                         "Disabled" : "Enabled");
 491         }
 492 }
 493
 494 /* calculate runtime delay from LPIB */
 495 static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
 496                                    unsigned int pos)
 497 {
 498         struct snd_pcm_substream *substream = azx_dev->substream;
 499         int stream = substream->stream;
 500         unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev);
 501         int delay;
 502
 503         if (stream == SNDRV_PCM_STREAM_PLAYBACK)
 504                 delay = pos - lpib_pos;
 505         else
 506                 delay = lpib_pos - pos;
 507         if (delay < 0) {
 508                 if (delay >= azx_dev->delay_negative_threshold)
 509                         delay = 0;
 510                 else
 511                         delay += azx_dev->bufsize;
 512         }
 513
 514         if (delay >= azx_dev->period_bytes) {
 515                 dev_info(chip->card->dev,
 516                          "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
 517                          delay, azx_dev->period_bytes);
 518                 delay = 0;
 519                 chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
 520                 chip->get_delay[stream] = NULL;
 521         }
 522
 523         return bytes_to_frames(substream->runtime, delay);
 524 }
 525
 526 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
 527
 528 /* called from IRQ */
 529 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
 530 {
 531         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 532         int ok;
 533
 534         ok = azx_position_ok(chip, azx_dev);
 535         if (ok == 1) {
 536                 azx_dev->irq_pending = 0;
 537                 return ok;
 538         } else if (ok == 0 && chip->bus && chip->bus->workq) {
 539                 /* bogus IRQ, process it later */
 540                 azx_dev->irq_pending = 1;
 541                 queue_work(chip->bus->workq, &hda->irq_pending_work);
 542         }
 543         return 0;
 544 }
 545
 546 /*
 547  * Check whether the current DMA position is acceptable for updating
 548  * periods.  Returns non-zero if it's OK.
 549  *
 550  * Many HD-audio controllers appear pretty inaccurate about
 551  * the update-IRQ timing.  The IRQ is issued before actually the
 552  * data is processed.  So, we need to process it afterwords in a
 553  * workqueue.
 554  */
 555 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
 556 {
 557         struct snd_pcm_substream *substream = azx_dev->substream;
 558         int stream = substream->stream;
 559         u32 wallclk;
 560         unsigned int pos;
 561
 562         wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk;
 563         if (wallclk < (azx_dev->period_wallclk * 2) / 3)
 564                 return -1;      /* bogus (too early) interrupt */
 565
 566         if (chip->get_position[stream])
 567                 pos = chip->get_position[stream](chip, azx_dev);
 568         else { /* use the position buffer as default */
 569                 pos = azx_get_pos_posbuf(chip, azx_dev);
 570                 if (!pos || pos == (u32)-1) {
 571                         dev_info(chip->card->dev,
 572                                  "Invalid position buffer, using LPIB read method instead.\n");
 573                         chip->get_position[stream] = azx_get_pos_lpib;
 574                         pos = azx_get_pos_lpib(chip, azx_dev);
 575                         chip->get_delay[stream] = NULL;
 576                 } else {
 577                         chip->get_position[stream] = azx_get_pos_posbuf;
 578                         if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)
 579                                 chip->get_delay[stream] = azx_get_delay_from_lpib;
 580                 }
 581         }
 582
 583         if (pos >= azx_dev->bufsize)
 584                 pos = 0;
 585
 586         if (WARN_ONCE(!azx_dev->period_bytes,
 587                       "hda-intel: zero azx_dev->period_bytes"))
 588                 return -1; /* this shouldn't happen! */
 589         if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
 590             pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
 591                 /* NG - it's below the first next period boundary */
 592                 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
 593         azx_dev->start_wallclk += wallclk;
 594         return 1; /* OK, it's fine */
 595 }
 596
 597 /*
 598  * The work for pending PCM period updates.
 599  */
 600 static void azx_irq_pending_work(struct work_struct *work)
 601 {
 602         struct hda_intel *hda = container_of(work, struct hda_intel, irq_pending_work);
 603         struct azx *chip = &hda->chip;
 604         int i, pending, ok;
 605
 606         if (!hda->irq_pending_warned) {
 607                 dev_info(chip->card->dev,
 608                          "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
 609                          chip->card->number);
 610                 hda->irq_pending_warned = 1;
 611         }
 612
 613         for (;;) {
 614                 pending = 0;
 615                 spin_lock_irq(&chip->reg_lock);
 616                 for (i = 0; i < chip->num_streams; i++) {
 617                         struct azx_dev *azx_dev = &chip->azx_dev[i];
 618                         if (!azx_dev->irq_pending ||
 619                             !azx_dev->substream ||
 620                             !azx_dev->running)
 621                                 continue;
 622                         ok = azx_position_ok(chip, azx_dev);
 623                         if (ok > 0) {
 624                                 azx_dev->irq_pending = 0;
 625                                 spin_unlock(&chip->reg_lock);
 626                                 snd_pcm_period_elapsed(azx_dev->substream);
 627                                 spin_lock(&chip->reg_lock);
 628                         } else if (ok < 0) {
 629                                 pending = 0;    /* too early */
 630                         } else
 631                                 pending++;
 632                 }
 633                 spin_unlock_irq(&chip->reg_lock);
 634                 if (!pending)
 635                         return;
 636                 msleep(1);
 637         }
 638 }
 639
 640 /* clear irq_pending flags and assure no on-going workq */
 641 static void azx_clear_irq_pending(struct azx *chip)
 642 {
 643         int i;
 644
 645         spin_lock_irq(&chip->reg_lock);
 646         for (i = 0; i < chip->num_streams; i++)
 647                 chip->azx_dev[i].irq_pending = 0;
 648         spin_unlock_irq(&chip->reg_lock);
 649 }
 650
 651 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
 652 {
 653         if (request_irq(chip->pci->irq, azx_interrupt,
 654                         chip->msi ? 0 : IRQF_SHARED,
 655                         KBUILD_MODNAME, chip)) {
 656                 dev_err(chip->card->dev,
 657                         "unable to grab IRQ %d, disabling device\n",
 658                         chip->pci->irq);
 659                 if (do_disconnect)
 660                         snd_card_disconnect(chip->card);
 661                 return -1;
 662         }
 663         chip->irq = chip->pci->irq;
 664         pci_intx(chip->pci, !chip->msi);
 665         return 0;
 666 }
 667
 668 /* get the current DMA position with correction on VIA chips */
 669 static unsigned int azx_via_get_position(struct azx *chip,
 670                                          struct azx_dev *azx_dev)
 671 {
 672         unsigned int link_pos, mini_pos, bound_pos;
 673         unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
 674         unsigned int fifo_size;
 675
 676         link_pos = azx_sd_readl(chip, azx_dev, SD_LPIB);
 677         if (azx_dev->substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 678                 /* Playback, no problem using link position */
 679                 return link_pos;
 680         }
 681
 682         /* Capture */
 683         /* For new chipset,
 684          * use mod to get the DMA position just like old chipset
 685          */
 686         mod_dma_pos = le32_to_cpu(*azx_dev->posbuf);
 687         mod_dma_pos %= azx_dev->period_bytes;
 688
 689         /* azx_dev->fifo_size can't get FIFO size of in stream.
 690          * Get from base address + offset.
 691          */
 692         fifo_size = readw(chip->remap_addr + VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
 693
 694         if (azx_dev->insufficient) {
 695                 /* Link position never gather than FIFO size */
 696                 if (link_pos <= fifo_size)
 697                         return 0;
 698
 699                 azx_dev->insufficient = 0;
 700         }
 701
 702         if (link_pos <= fifo_size)
 703                 mini_pos = azx_dev->bufsize + link_pos - fifo_size;
 704         else
 705                 mini_pos = link_pos - fifo_size;
 706
 707         /* Find nearest previous boudary */
 708         mod_mini_pos = mini_pos % azx_dev->period_bytes;
 709         mod_link_pos = link_pos % azx_dev->period_bytes;
 710         if (mod_link_pos >= fifo_size)
 711                 bound_pos = link_pos - mod_link_pos;
 712         else if (mod_dma_pos >= mod_mini_pos)
 713                 bound_pos = mini_pos - mod_mini_pos;
 714         else {
 715                 bound_pos = mini_pos - mod_mini_pos + azx_dev->period_bytes;
 716                 if (bound_pos >= azx_dev->bufsize)
 717                         bound_pos = 0;
 718         }
 719
 720         /* Calculate real DMA position we want */
 721         return bound_pos + mod_dma_pos;
 722 }
 723
 724 #ifdef CONFIG_PM
 725 static DEFINE_MUTEX(card_list_lock);
 726 static LIST_HEAD(card_list);
 727
 728 static void azx_add_card_list(struct azx *chip)
 729 {
 730         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 731         mutex_lock(&card_list_lock);
 732         list_add(&hda->list, &card_list);
 733         mutex_unlock(&card_list_lock);
 734 }
 735
 736 static void azx_del_card_list(struct azx *chip)
 737 {
 738         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 739         mutex_lock(&card_list_lock);
 740         list_del_init(&hda->list);
 741         mutex_unlock(&card_list_lock);
 742 }
 743
 744 /* trigger power-save check at writing parameter */
 745 static int param_set_xint(const char *val, const struct kernel_param *kp)
 746 {
 747         struct hda_intel *hda;
 748         struct azx *chip;
 749         struct hda_codec *c;
 750         int prev = power_save;
 751         int ret = param_set_int(val, kp);
 752
 753         if (ret || prev == power_save)
 754                 return ret;
 755
 756         mutex_lock(&card_list_lock);
 757         list_for_each_entry(hda, &card_list, list) {
 758                 chip = &hda->chip;
 759                 if (!chip->bus || chip->disabled)
 760                         continue;
 761                 list_for_each_entry(c, &chip->bus->codec_list, list)
 762                         snd_hda_power_sync(c);
 763         }
 764         mutex_unlock(&card_list_lock);
 765         return 0;
 766 }
 767 #else
 768 #define azx_add_card_list(chip) /* NOP */
 769 #define azx_del_card_list(chip) /* NOP */
 770 #endif /* CONFIG_PM */
 771
 772 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
 773 /*
 774  * power management
 775  */
 776 static int azx_suspend(struct device *dev)
 777 {
 778         struct pci_dev *pci = to_pci_dev(dev);
 779         struct snd_card *card = dev_get_drvdata(dev);
 780         struct azx *chip;
 781         struct hda_intel *hda;
 782         struct azx_pcm *p;
 783
 784         if (!card)
 785                 return 0;
 786
 787         chip = card->private_data;
 788         hda = container_of(chip, struct hda_intel, chip);
 789         if (chip->disabled || hda->init_failed)
 790                 return 0;
 791
 792         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
 793         azx_clear_irq_pending(chip);
 794         list_for_each_entry(p, &chip->pcm_list, list)
 795                 snd_pcm_suspend_all(p->pcm);
 796         if (chip->initialized)
 797                 snd_hda_suspend(chip->bus);
 798         azx_stop_chip(chip);
 799         azx_enter_link_reset(chip);
 800         if (chip->irq >= 0) {
 801                 free_irq(chip->irq, chip);
 802                 chip->irq = -1;
 803         }
 804
 805         if (chip->msi)
 806                 pci_disable_msi(chip->pci);
 807         pci_disable_device(pci);
 808         pci_save_state(pci);
 809         pci_set_power_state(pci, PCI_D3hot);
 810         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 811                 hda_display_power(false);
 812         return 0;
 813 }
 814
 815 static int azx_resume(struct device *dev)
 816 {
 817         struct pci_dev *pci = to_pci_dev(dev);
 818         struct snd_card *card = dev_get_drvdata(dev);
 819         struct azx *chip;
 820         struct hda_intel *hda;
 821
 822         if (!card)
 823                 return 0;
 824
 825         chip = card->private_data;
 826         hda = container_of(chip, struct hda_intel, chip);
 827         if (chip->disabled || hda->init_failed)
 828                 return 0;
 829
 830         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
 831                 hda_display_power(true);
 832                 haswell_set_bclk(chip);
 833         }
 834         pci_set_power_state(pci, PCI_D0);
 835         pci_restore_state(pci);
 836         if (pci_enable_device(pci) < 0) {
 837                 dev_err(chip->card->dev,
 838                         "pci_enable_device failed, disabling device\n");
 839                 snd_card_disconnect(card);
 840                 return -EIO;
 841         }
 842         pci_set_master(pci);
 843         if (chip->msi)
 844                 if (pci_enable_msi(pci) < 0)
 845                         chip->msi = 0;
 846         if (azx_acquire_irq(chip, 1) < 0)
 847                 return -EIO;
 848         azx_init_pci(chip);
 849
 850         azx_init_chip(chip, true);
 851
 852         snd_hda_resume(chip->bus);
 853         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
 854         return 0;
 855 }
 856 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
 857
 858 #ifdef CONFIG_PM_RUNTIME
 859 static int azx_runtime_suspend(struct device *dev)
 860 {
 861         struct snd_card *card = dev_get_drvdata(dev);
 862         struct azx *chip;
 863         struct hda_intel *hda;
 864
 865         if (!card)
 866                 return 0;
 867
 868         chip = card->private_data;
 869         hda = container_of(chip, struct hda_intel, chip);
 870         if (chip->disabled || hda->init_failed)
 871                 return 0;
 872
 873         if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
 874                 return 0;
 875
 876         /* enable controller wake up event */
 877         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
 878                   STATESTS_INT_MASK);
 879
 880         azx_stop_chip(chip);
 881         azx_enter_link_reset(chip);
 882         azx_clear_irq_pending(chip);
 883         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 884                 hda_display_power(false);
 885
 886         return 0;
 887 }
 888
 889 static int azx_runtime_resume(struct device *dev)
 890 {
 891         struct snd_card *card = dev_get_drvdata(dev);
 892         struct azx *chip;
 893         struct hda_intel *hda;
 894         struct hda_bus *bus;
 895         struct hda_codec *codec;
 896         int status;
 897
 898         if (!card)
 899                 return 0;
 900
 901         chip = card->private_data;
 902         hda = container_of(chip, struct hda_intel, chip);
 903         if (chip->disabled || hda->init_failed)
 904                 return 0;
 905
 906         if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
 907                 return 0;
 908
 909         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
 910                 hda_display_power(true);
 911                 haswell_set_bclk(chip);
 912         }
 913
 914         /* Read STATESTS before controller reset */
 915         status = azx_readw(chip, STATESTS);
 916
 917         azx_init_pci(chip);
 918         azx_init_chip(chip, true);
 919
 920         bus = chip->bus;
 921         if (status && bus) {
 922                 list_for_each_entry(codec, &bus->codec_list, list)
 923                         if (status & (1 << codec->addr))
 924                                 queue_delayed_work(codec->bus->workq,
 925                                                    &codec->jackpoll_work, codec->jackpoll_interval);
 926         }
 927
 928         /* disable controller Wake Up event*/
 929         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
 930                         ~STATESTS_INT_MASK);
 931
 932         return 0;
 933 }
 934
 935 static int azx_runtime_idle(struct device *dev)
 936 {
 937         struct snd_card *card = dev_get_drvdata(dev);
 938         struct azx *chip;
 939         struct hda_intel *hda;
 940
 941         if (!card)
 942                 return 0;
 943
 944         chip = card->private_data;
 945         hda = container_of(chip, struct hda_intel, chip);
 946         if (chip->disabled || hda->init_failed)
 947                 return 0;
 948
 949         if (!power_save_controller ||
 950             !(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
 951                 return -EBUSY;
 952
 953         return 0;
 954 }
 955
 956 #endif /* CONFIG_PM_RUNTIME */
 957
 958 #ifdef CONFIG_PM
 959 static const struct dev_pm_ops azx_pm = {
 960         SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
 961         SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
 962 };
 963
 964 #define AZX_PM_OPS      &azx_pm
 965 #else
 966 #define AZX_PM_OPS      NULL
 967 #endif /* CONFIG_PM */
 968
 969
 970 static int azx_probe_continue(struct azx *chip);
 971
 972 #ifdef SUPPORT_VGA_SWITCHEROO
 973 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
 974
 975 static void azx_vs_set_state(struct pci_dev *pci,
 976                              enum vga_switcheroo_state state)
 977 {
 978         struct snd_card *card = pci_get_drvdata(pci);
 979         struct azx *chip = card->private_data;
 980         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 981         bool disabled;
 982
 983         wait_for_completion(&hda->probe_wait);
 984         if (hda->init_failed)
 985                 return;
 986
 987         disabled = (state == VGA_SWITCHEROO_OFF);
 988         if (chip->disabled == disabled)
 989                 return;
 990
 991         if (!chip->bus) {
 992                 chip->disabled = disabled;
 993                 if (!disabled) {
 994                         dev_info(chip->card->dev,
 995                                  "Start delayed initialization\n");
 996                         if (azx_probe_continue(chip) < 0) {
 997                                 dev_err(chip->card->dev, "initialization error\n");
 998                                 hda->init_failed = true;
 999                         }
1000                 }
1001         } else {
1002                 dev_info(chip->card->dev, "%s via VGA-switcheroo\n",
1003                          disabled ? "Disabling" : "Enabling");
1004                 if (disabled) {
1005                         pm_runtime_put_sync_suspend(card->dev);
1006                         azx_suspend(card->dev);
1007                         /* when we get suspended by vga switcheroo we end up in D3cold,
1008                          * however we have no ACPI handle, so pci/acpi can't put us there,
1009                          * put ourselves there */
1010                         pci->current_state = PCI_D3cold;
1011                         chip->disabled = true;
1012                         if (snd_hda_lock_devices(chip->bus))
1013                                 dev_warn(chip->card->dev,
1014                                          "Cannot lock devices!\n");
1015                 } else {
1016                         snd_hda_unlock_devices(chip->bus);
1017                         pm_runtime_get_noresume(card->dev);
1018                         chip->disabled = false;
1019                         azx_resume(card->dev);
1020                 }
1021         }
1022 }
1023
1024 static bool azx_vs_can_switch(struct pci_dev *pci)
1025 {
1026         struct snd_card *card = pci_get_drvdata(pci);
1027         struct azx *chip = card->private_data;
1028         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1029
1030         wait_for_completion(&hda->probe_wait);
1031         if (hda->init_failed)
1032                 return false;
1033         if (chip->disabled || !chip->bus)
1034                 return true;
1035         if (snd_hda_lock_devices(chip->bus))
1036                 return false;
1037         snd_hda_unlock_devices(chip->bus);
1038         return true;
1039 }
1040
1041 static void init_vga_switcheroo(struct azx *chip)
1042 {
1043         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1044         struct pci_dev *p = get_bound_vga(chip->pci);
1045         if (p) {
1046                 dev_info(chip->card->dev,
1047                          "Handle VGA-switcheroo audio client\n");
1048                 hda->use_vga_switcheroo = 1;
1049                 pci_dev_put(p);
1050         }
1051 }
1052
1053 static const struct vga_switcheroo_client_ops azx_vs_ops = {
1054         .set_gpu_state = azx_vs_set_state,
1055         .can_switch = azx_vs_can_switch,
1056 };
1057
1058 static int register_vga_switcheroo(struct azx *chip)
1059 {
1060         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1061         int err;
1062
1063         if (!hda->use_vga_switcheroo)
1064                 return 0;
1065         /* FIXME: currently only handling DIS controller
1066          * is there any machine with two switchable HDMI audio controllers?
1067          */
1068         err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
1069                                                     VGA_SWITCHEROO_DIS,
1070                                                     chip->bus != NULL);
1071         if (err < 0)
1072                 return err;
1073         hda->vga_switcheroo_registered = 1;
1074
1075         /* register as an optimus hdmi audio power domain */
1076         vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
1077                                                          &hda->hdmi_pm_domain);
1078         return 0;
1079 }
1080 #else
1081 #define init_vga_switcheroo(chip)               /* NOP */
1082 #define register_vga_switcheroo(chip)           0
1083 #define check_hdmi_disabled(pci)        false
1084 #endif /* SUPPORT_VGA_SWITCHER */
1085
1086 /*
1087  * destructor
1088  */
1089 static int azx_free(struct azx *chip)
1090 {
1091         struct pci_dev *pci = chip->pci;
1092         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1093         int i;
1094
1095         if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME)
1096                         && chip->running)
1097                 pm_runtime_get_noresume(&pci->dev);
1098
1099         azx_del_card_list(chip);
1100
1101         azx_notifier_unregister(chip);
1102
1103         hda->init_failed = 1; /* to be sure */
1104         complete_all(&hda->probe_wait);
1105
1106         if (use_vga_switcheroo(hda)) {
1107                 if (chip->disabled && chip->bus)
1108                         snd_hda_unlock_devices(chip->bus);
1109                 if (hda->vga_switcheroo_registered)
1110                         vga_switcheroo_unregister_client(chip->pci);
1111         }
1112
1113         if (chip->initialized) {
1114                 azx_clear_irq_pending(chip);
1115                 for (i = 0; i < chip->num_streams; i++)
1116                         azx_stream_stop(chip, &chip->azx_dev[i]);
1117                 azx_stop_chip(chip);
1118         }
1119
1120         if (chip->irq >= 0)
1121                 free_irq(chip->irq, (void*)chip);
1122         if (chip->msi)
1123                 pci_disable_msi(chip->pci);
1124         if (chip->remap_addr)
1125                 iounmap(chip->remap_addr);
1126
1127         azx_free_stream_pages(chip);
1128         if (chip->region_requested)
1129                 pci_release_regions(chip->pci);
1130         pci_disable_device(chip->pci);
1131         kfree(chip->azx_dev);
1132 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1133         if (chip->fw)
1134                 release_firmware(chip->fw);
1135 #endif
1136         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1137                 hda_display_power(false);
1138                 hda_i915_exit();
1139         }
1140         kfree(hda);
1141
1142         return 0;
1143 }
1144
1145 static int azx_dev_free(struct snd_device *device)
1146 {
1147         return azx_free(device->device_data);
1148 }
1149
1150 #ifdef SUPPORT_VGA_SWITCHEROO
1151 /*
1152  * Check of disabled HDMI controller by vga-switcheroo
1153  */
1154 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1155 {
1156         struct pci_dev *p;
1157
1158         /* check only discrete GPU */
1159         switch (pci->vendor) {
1160         case PCI_VENDOR_ID_ATI:
1161         case PCI_VENDOR_ID_AMD:
1162         case PCI_VENDOR_ID_NVIDIA:
1163                 if (pci->devfn == 1) {
1164                         p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
1165                                                         pci->bus->number, 0);
1166                         if (p) {
1167                                 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1168                                         return p;
1169                                 pci_dev_put(p);
1170                         }
1171                 }
1172                 break;
1173         }
1174         return NULL;
1175 }
1176
1177 static bool check_hdmi_disabled(struct pci_dev *pci)
1178 {
1179         bool vga_inactive = false;
1180         struct pci_dev *p = get_bound_vga(pci);
1181
1182         if (p) {
1183                 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1184                         vga_inactive = true;
1185                 pci_dev_put(p);
1186         }
1187         return vga_inactive;
1188 }
1189 #endif /* SUPPORT_VGA_SWITCHEROO */
1190
1191 /*
1192  * white/black-listing for position_fix
1193  */
1194 static struct snd_pci_quirk position_fix_list[] = {
1195         SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
1196         SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1197         SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
1198         SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1199         SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
1200         SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1201         SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1202         SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1203         SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1204         SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1205         SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1206         SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1207         SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1208         SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1209         {}
1210 };
1211
1212 static int check_position_fix(struct azx *chip, int fix)
1213 {
1214         const struct snd_pci_quirk *q;
1215
1216         switch (fix) {
1217         case POS_FIX_AUTO:
1218         case POS_FIX_LPIB:
1219         case POS_FIX_POSBUF:
1220         case POS_FIX_VIACOMBO:
1221         case POS_FIX_COMBO:
1222                 return fix;
1223         }
1224
1225         q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1226         if (q) {
1227                 dev_info(chip->card->dev,
1228                          "position_fix set to %d for device %04x:%04x\n",
1229                          q->value, q->subvendor, q->subdevice);
1230                 return q->value;
1231         }
1232
1233         /* Check VIA/ATI HD Audio Controller exist */
1234         if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1235                 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1236                 return POS_FIX_VIACOMBO;
1237         }
1238         if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1239                 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1240                 return POS_FIX_LPIB;
1241         }
1242         return POS_FIX_AUTO;
1243 }
1244
1245 static void assign_position_fix(struct azx *chip, int fix)
1246 {
1247         static azx_get_pos_callback_t callbacks[] = {
1248                 [POS_FIX_AUTO] = NULL,
1249                 [POS_FIX_LPIB] = azx_get_pos_lpib,
1250                 [POS_FIX_POSBUF] = azx_get_pos_posbuf,
1251                 [POS_FIX_VIACOMBO] = azx_via_get_position,
1252                 [POS_FIX_COMBO] = azx_get_pos_lpib,
1253         };
1254
1255         chip->get_position[0] = chip->get_position[1] = callbacks[fix];
1256
1257         /* combo mode uses LPIB only for playback */
1258         if (fix == POS_FIX_COMBO)
1259                 chip->get_position[1] = NULL;
1260
1261         if (fix == POS_FIX_POSBUF &&
1262             (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
1263                 chip->get_delay[0] = chip->get_delay[1] =
1264                         azx_get_delay_from_lpib;
1265         }
1266
1267 }
1268
1269 /*
1270  * black-lists for probe_mask
1271  */
1272 static struct snd_pci_quirk probe_mask_list[] = {
1273         /* Thinkpad often breaks the controller communication when accessing
1274          * to the non-working (or non-existing) modem codec slot.
1275          */
1276         SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1277         SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1278         SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1279         /* broken BIOS */
1280         SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1281         /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1282         SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1283         /* forced codec slots */
1284         SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1285         SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1286         /* WinFast VP200 H (Teradici) user reported broken communication */
1287         SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1288         {}
1289 };
1290
1291 #define AZX_FORCE_CODEC_MASK    0x100
1292
1293 static void check_probe_mask(struct azx *chip, int dev)
1294 {
1295         const struct snd_pci_quirk *q;
1296
1297         chip->codec_probe_mask = probe_mask[dev];
1298         if (chip->codec_probe_mask == -1) {
1299                 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1300                 if (q) {
1301                         dev_info(chip->card->dev,
1302                                  "probe_mask set to 0x%x for device %04x:%04x\n",
1303                                  q->value, q->subvendor, q->subdevice);
1304                         chip->codec_probe_mask = q->value;
1305                 }
1306         }
1307
1308         /* check forced option */
1309         if (chip->codec_probe_mask != -1 &&
1310             (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1311                 chip->codec_mask = chip->codec_probe_mask & 0xff;
1312                 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1313                          chip->codec_mask);
1314         }
1315 }
1316
1317 /*
1318  * white/black-list for enable_msi
1319  */
1320 static struct snd_pci_quirk msi_black_list[] = {
1321         SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1322         SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1323         SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1324         SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1325         SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1326         SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1327         SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1328         SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1329         SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1330         SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1331         {}
1332 };
1333
1334 static void check_msi(struct azx *chip)
1335 {
1336         const struct snd_pci_quirk *q;
1337
1338         if (enable_msi >= 0) {
1339                 chip->msi = !!enable_msi;
1340                 return;
1341         }
1342         chip->msi = 1;  /* enable MSI as default */
1343         q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1344         if (q) {
1345                 dev_info(chip->card->dev,
1346                          "msi for device %04x:%04x set to %d\n",
1347                          q->subvendor, q->subdevice, q->value);
1348                 chip->msi = q->value;
1349                 return;
1350         }
1351
1352         /* NVidia chipsets seem to cause troubles with MSI */
1353         if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1354                 dev_info(chip->card->dev, "Disabling MSI\n");
1355                 chip->msi = 0;
1356         }
1357 }
1358
1359 /* check the snoop mode availability */
1360 static void azx_check_snoop_available(struct azx *chip)
1361 {
1362         bool snoop = chip->snoop;
1363
1364         switch (chip->driver_type) {
1365         case AZX_DRIVER_VIA:
1366                 /* force to non-snoop mode for a new VIA controller
1367                  * when BIOS is set
1368                  */
1369                 if (snoop) {
1370                         u8 val;
1371                         pci_read_config_byte(chip->pci, 0x42, &val);
1372                         if (!(val & 0x80) && chip->pci->revision == 0x30)
1373                                 snoop = false;
1374                 }
1375                 break;
1376         case AZX_DRIVER_ATIHDMI_NS:
1377                 /* new ATI HDMI requires non-snoop */
1378                 snoop = false;
1379                 break;
1380         case AZX_DRIVER_CTHDA:
1381         case AZX_DRIVER_CMEDIA:
1382                 snoop = false;
1383                 break;
1384         }
1385
1386         if (snoop != chip->snoop) {
1387                 dev_info(chip->card->dev, "Force to %s mode\n",
1388                          snoop ? "snoop" : "non-snoop");
1389                 chip->snoop = snoop;
1390         }
1391 }
1392
1393 static void azx_probe_work(struct work_struct *work)
1394 {
1395         struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
1396         azx_probe_continue(&hda->chip);
1397 }
1398
1399 /*
1400  * constructor
1401  */
1402 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1403                       int dev, unsigned int driver_caps,
1404                       const struct hda_controller_ops *hda_ops,
1405                       struct azx **rchip)
1406 {
1407         static struct snd_device_ops ops = {
1408                 .dev_free = azx_dev_free,
1409         };
1410         struct hda_intel *hda;
1411         struct azx *chip;
1412         int err;
1413
1414         *rchip = NULL;
1415
1416         err = pci_enable_device(pci);
1417         if (err < 0)
1418                 return err;
1419
1420         hda = kzalloc(sizeof(*hda), GFP_KERNEL);
1421         if (!hda) {
1422                 dev_err(card->dev, "Cannot allocate hda\n");
1423                 pci_disable_device(pci);
1424                 return -ENOMEM;
1425         }
1426
1427         chip = &hda->chip;
1428         spin_lock_init(&chip->reg_lock);
1429         mutex_init(&chip->open_mutex);
1430         chip->card = card;
1431         chip->pci = pci;
1432         chip->ops = hda_ops;
1433         chip->irq = -1;
1434         chip->driver_caps = driver_caps;
1435         chip->driver_type = driver_caps & 0xff;
1436         check_msi(chip);
1437         chip->dev_index = dev;
1438         chip->jackpoll_ms = jackpoll_ms;
1439         INIT_LIST_HEAD(&chip->pcm_list);
1440         INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
1441         INIT_LIST_HEAD(&hda->list);
1442         init_vga_switcheroo(chip);
1443         init_completion(&hda->probe_wait);
1444
1445         assign_position_fix(chip, check_position_fix(chip, position_fix[dev]));
1446
1447         check_probe_mask(chip, dev);
1448
1449         chip->single_cmd = single_cmd;
1450         chip->snoop = hda_snoop;
1451         azx_check_snoop_available(chip);
1452
1453         if (bdl_pos_adj[dev] < 0) {
1454                 switch (chip->driver_type) {
1455                 case AZX_DRIVER_ICH:
1456                 case AZX_DRIVER_PCH:
1457                         bdl_pos_adj[dev] = 1;
1458                         break;
1459                 default:
1460                         bdl_pos_adj[dev] = 32;
1461                         break;
1462                 }
1463         }
1464         chip->bdl_pos_adj = bdl_pos_adj;
1465
1466         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1467         if (err < 0) {
1468                 dev_err(card->dev, "Error creating device [card]!\n");
1469                 azx_free(chip);
1470                 return err;
1471         }
1472
1473         /* continue probing in work context as may trigger request module */
1474         INIT_WORK(&hda->probe_work, azx_probe_work);
1475
1476         *rchip = chip;
1477
1478         return 0;
1479 }
1480
1481 static int azx_first_init(struct azx *chip)
1482 {
1483         int dev = chip->dev_index;
1484         struct pci_dev *pci = chip->pci;
1485         struct snd_card *card = chip->card;
1486         int err;
1487         unsigned short gcap;
1488
1489 #if BITS_PER_LONG != 64
1490         /* Fix up base address on ULI M5461 */
1491         if (chip->driver_type == AZX_DRIVER_ULI) {
1492                 u16 tmp3;
1493                 pci_read_config_word(pci, 0x40, &tmp3);
1494                 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1495                 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1496         }
1497 #endif
1498
1499         err = pci_request_regions(pci, "ICH HD audio");
1500         if (err < 0)
1501                 return err;
1502         chip->region_requested = 1;
1503
1504         chip->addr = pci_resource_start(pci, 0);
1505         chip->remap_addr = pci_ioremap_bar(pci, 0);
1506         if (chip->remap_addr == NULL) {
1507                 dev_err(card->dev, "ioremap error\n");
1508                 return -ENXIO;
1509         }
1510
1511         if (chip->msi)
1512                 if (pci_enable_msi(pci) < 0)
1513                         chip->msi = 0;
1514
1515         if (azx_acquire_irq(chip, 0) < 0)
1516                 return -EBUSY;
1517
1518         pci_set_master(pci);
1519         synchronize_irq(chip->irq);
1520
1521         gcap = azx_readw(chip, GCAP);
1522         dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1523
1524         /* disable SB600 64bit support for safety */
1525         if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1526                 struct pci_dev *p_smbus;
1527                 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1528                                          PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1529                                          NULL);
1530                 if (p_smbus) {
1531                         if (p_smbus->revision < 0x30)
1532                                 gcap &= ~AZX_GCAP_64OK;
1533                         pci_dev_put(p_smbus);
1534                 }
1535         }
1536
1537         /* disable 64bit DMA address on some devices */
1538         if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1539                 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1540                 gcap &= ~AZX_GCAP_64OK;
1541         }
1542
1543         /* disable buffer size rounding to 128-byte multiples if supported */
1544         if (align_buffer_size >= 0)
1545                 chip->align_buffer_size = !!align_buffer_size;
1546         else {
1547                 if (chip->driver_caps & AZX_DCAPS_BUFSIZE)
1548                         chip->align_buffer_size = 0;
1549                 else if (chip->driver_caps & AZX_DCAPS_ALIGN_BUFSIZE)
1550                         chip->align_buffer_size = 1;
1551                 else
1552                         chip->align_buffer_size = 1;
1553         }
1554
1555         /* allow 64bit DMA address if supported by H/W */
1556         if ((gcap & AZX_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))
1557                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64));
1558         else {
1559                 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
1560                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
1561         }
1562
1563         /* read number of streams from GCAP register instead of using
1564          * hardcoded value
1565          */
1566         chip->capture_streams = (gcap >> 8) & 0x0f;
1567         chip->playback_streams = (gcap >> 12) & 0x0f;
1568         if (!chip->playback_streams && !chip->capture_streams) {
1569                 /* gcap didn't give any info, switching to old method */
1570
1571                 switch (chip->driver_type) {
1572                 case AZX_DRIVER_ULI:
1573                         chip->playback_streams = ULI_NUM_PLAYBACK;
1574                         chip->capture_streams = ULI_NUM_CAPTURE;
1575                         break;
1576                 case AZX_DRIVER_ATIHDMI:
1577                 case AZX_DRIVER_ATIHDMI_NS:
1578                         chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1579                         chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1580                         break;
1581                 case AZX_DRIVER_GENERIC:
1582                 default:
1583                         chip->playback_streams = ICH6_NUM_PLAYBACK;
1584                         chip->capture_streams = ICH6_NUM_CAPTURE;
1585                         break;
1586                 }
1587         }
1588         chip->capture_index_offset = 0;
1589         chip->playback_index_offset = chip->capture_streams;
1590         chip->num_streams = chip->playback_streams + chip->capture_streams;
1591         chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
1592                                 GFP_KERNEL);
1593         if (!chip->azx_dev) {
1594                 dev_err(card->dev, "cannot malloc azx_dev\n");
1595                 return -ENOMEM;
1596         }
1597
1598         err = azx_alloc_stream_pages(chip);
1599         if (err < 0)
1600                 return err;
1601
1602         /* initialize streams */
1603         azx_init_stream(chip);
1604
1605         /* initialize chip */
1606         azx_init_pci(chip);
1607
1608         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1609                 haswell_set_bclk(chip);
1610
1611         azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1612
1613         /* codec detection */
1614         if (!chip->codec_mask) {
1615                 dev_err(card->dev, "no codecs found!\n");
1616                 return -ENODEV;
1617         }
1618
1619         strcpy(card->driver, "HDA-Intel");
1620         strlcpy(card->shortname, driver_short_names[chip->driver_type],
1621                 sizeof(card->shortname));
1622         snprintf(card->longname, sizeof(card->longname),
1623                  "%s at 0x%lx irq %i",
1624                  card->shortname, chip->addr, chip->irq);
1625
1626         return 0;
1627 }
1628
1629 static void power_down_all_codecs(struct azx *chip)
1630 {
1631 #ifdef CONFIG_PM
1632         /* The codecs were powered up in snd_hda_codec_new().
1633          * Now all initialization done, so turn them down if possible
1634          */
1635         struct hda_codec *codec;
1636         list_for_each_entry(codec, &chip->bus->codec_list, list) {
1637                 snd_hda_power_down(codec);
1638         }
1639 #endif
1640 }
1641
1642 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1643 /* callback from request_firmware_nowait() */
1644 static void azx_firmware_cb(const struct firmware *fw, void *context)
1645 {
1646         struct snd_card *card = context;
1647         struct azx *chip = card->private_data;
1648         struct pci_dev *pci = chip->pci;
1649
1650         if (!fw) {
1651                 dev_err(card->dev, "Cannot load firmware, aborting\n");
1652                 goto error;
1653         }
1654
1655         chip->fw = fw;
1656         if (!chip->disabled) {
1657                 /* continue probing */
1658                 if (azx_probe_continue(chip))
1659                         goto error;
1660         }
1661         return; /* OK */
1662
1663  error:
1664         snd_card_free(card);
1665         pci_set_drvdata(pci, NULL);
1666 }
1667 #endif
1668
1669 /*
1670  * HDA controller ops.
1671  */
1672
1673 /* PCI register access. */
1674 static void pci_azx_writel(u32 value, u32 __iomem *addr)
1675 {
1676         writel(value, addr);
1677 }
1678
1679 static u32 pci_azx_readl(u32 __iomem *addr)
1680 {
1681         return readl(addr);
1682 }
1683
1684 static void pci_azx_writew(u16 value, u16 __iomem *addr)
1685 {
1686         writew(value, addr);
1687 }
1688
1689 static u16 pci_azx_readw(u16 __iomem *addr)
1690 {
1691         return readw(addr);
1692 }
1693
1694 static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1695 {
1696         writeb(value, addr);
1697 }
1698
1699 static u8 pci_azx_readb(u8 __iomem *addr)
1700 {
1701         return readb(addr);
1702 }
1703
1704 static int disable_msi_reset_irq(struct azx *chip)
1705 {
1706         int err;
1707
1708         free_irq(chip->irq, chip);
1709         chip->irq = -1;
1710         pci_disable_msi(chip->pci);
1711         chip->msi = 0;
1712         err = azx_acquire_irq(chip, 1);
1713         if (err < 0)
1714                 return err;
1715
1716         return 0;
1717 }
1718
1719 /* DMA page allocation helpers.  */
1720 static int dma_alloc_pages(struct azx *chip,
1721                            int type,
1722                            size_t size,
1723                            struct snd_dma_buffer *buf)
1724 {
1725         int err;
1726
1727         err = snd_dma_alloc_pages(type,
1728                                   chip->card->dev,
1729                                   size, buf);
1730         if (err < 0)
1731                 return err;
1732         mark_pages_wc(chip, buf, true);
1733         return 0;
1734 }
1735
1736 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
1737 {
1738         mark_pages_wc(chip, buf, false);
1739         snd_dma_free_pages(buf);
1740 }
1741
1742 static int substream_alloc_pages(struct azx *chip,
1743                                  struct snd_pcm_substream *substream,
1744                                  size_t size)
1745 {
1746         struct azx_dev *azx_dev = get_azx_dev(substream);
1747         int ret;
1748
1749         mark_runtime_wc(chip, azx_dev, substream, false);
1750         azx_dev->bufsize = 0;
1751         azx_dev->period_bytes = 0;
1752         azx_dev->format_val = 0;
1753         ret = snd_pcm_lib_malloc_pages(substream, size);
1754         if (ret < 0)
1755                 return ret;
1756         mark_runtime_wc(chip, azx_dev, substream, true);
1757         return 0;
1758 }
1759
1760 static int substream_free_pages(struct azx *chip,
1761                                 struct snd_pcm_substream *substream)
1762 {
1763         struct azx_dev *azx_dev = get_azx_dev(substream);
1764         mark_runtime_wc(chip, azx_dev, substream, false);
1765         return snd_pcm_lib_free_pages(substream);
1766 }
1767
1768 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1769                              struct vm_area_struct *area)
1770 {
1771 #ifdef CONFIG_X86
1772         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1773         struct azx *chip = apcm->chip;
1774         if (!azx_snoop(chip) && chip->driver_type != AZX_DRIVER_CMEDIA)
1775                 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1776 #endif
1777 }
1778
1779 static const struct hda_controller_ops pci_hda_ops = {
1780         .reg_writel = pci_azx_writel,
1781         .reg_readl = pci_azx_readl,
1782         .reg_writew = pci_azx_writew,
1783         .reg_readw = pci_azx_readw,
1784         .reg_writeb = pci_azx_writeb,
1785         .reg_readb = pci_azx_readb,
1786         .disable_msi_reset_irq = disable_msi_reset_irq,
1787         .dma_alloc_pages = dma_alloc_pages,
1788         .dma_free_pages = dma_free_pages,
1789         .substream_alloc_pages = substream_alloc_pages,
1790         .substream_free_pages = substream_free_pages,
1791         .pcm_mmap_prepare = pcm_mmap_prepare,
1792         .position_check = azx_position_check,
1793 };
1794
1795 static int azx_probe(struct pci_dev *pci,
1796                      const struct pci_device_id *pci_id)
1797 {
1798         static int dev;
1799         struct snd_card *card;
1800         struct hda_intel *hda;
1801         struct azx *chip;
1802         bool schedule_probe;
1803         int err;
1804
1805         if (dev >= SNDRV_CARDS)
1806                 return -ENODEV;
1807         if (!enable[dev]) {
1808                 dev++;
1809                 return -ENOENT;
1810         }
1811
1812         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1813                            0, &card);
1814         if (err < 0) {
1815                 dev_err(&pci->dev, "Error creating card!\n");
1816                 return err;
1817         }
1818
1819         err = azx_create(card, pci, dev, pci_id->driver_data,
1820                          &pci_hda_ops, &chip);
1821         if (err < 0)
1822                 goto out_free;
1823         card->private_data = chip;
1824         hda = container_of(chip, struct hda_intel, chip);
1825
1826         pci_set_drvdata(pci, card);
1827
1828         err = register_vga_switcheroo(chip);
1829         if (err < 0) {
1830                 dev_err(card->dev, "Error registering VGA-switcheroo client\n");
1831                 goto out_free;
1832         }
1833
1834         if (check_hdmi_disabled(pci)) {
1835                 dev_info(card->dev, "VGA controller is disabled\n");
1836                 dev_info(card->dev, "Delaying initialization\n");
1837                 chip->disabled = true;
1838         }
1839
1840         schedule_probe = !chip->disabled;
1841
1842 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1843         if (patch[dev] && *patch[dev]) {
1844                 dev_info(card->dev, "Applying patch firmware '%s'\n",
1845                          patch[dev]);
1846                 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1847                                               &pci->dev, GFP_KERNEL, card,
1848                                               azx_firmware_cb);
1849                 if (err < 0)
1850                         goto out_free;
1851                 schedule_probe = false; /* continued in azx_firmware_cb() */
1852         }
1853 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1854
1855 #ifndef CONFIG_SND_HDA_I915
1856         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1857                 dev_err(card->dev, "Haswell must build in CONFIG_SND_HDA_I915\n");
1858 #endif
1859
1860         if (schedule_probe)
1861                 schedule_work(&hda->probe_work);
1862
1863         dev++;
1864         if (chip->disabled)
1865                 complete_all(&hda->probe_wait);
1866         return 0;
1867
1868 out_free:
1869         snd_card_free(card);
1870         return err;
1871 }
1872
1873 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1874 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1875         [AZX_DRIVER_NVIDIA] = 8,
1876         [AZX_DRIVER_TERA] = 1,
1877 };
1878
1879 static int azx_probe_continue(struct azx *chip)
1880 {
1881         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1882         struct pci_dev *pci = chip->pci;
1883         int dev = chip->dev_index;
1884         int err;
1885
1886         /* Request power well for Haswell HDA controller and codec */
1887         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1888 #ifdef CONFIG_SND_HDA_I915
1889                 err = hda_i915_init();
1890                 if (err < 0) {
1891                         dev_err(chip->card->dev,
1892                                 "Error request power-well from i915\n");
1893                         goto out_free;
1894                 }
1895                 err = hda_display_power(true);
1896                 if (err < 0) {
1897                         dev_err(chip->card->dev,
1898                                 "Cannot turn on display power on i915\n");
1899                         goto out_free;
1900                 }
1901 #endif
1902         }
1903
1904         err = azx_first_init(chip);
1905         if (err < 0)
1906                 goto out_free;
1907
1908 #ifdef CONFIG_SND_HDA_INPUT_BEEP
1909         chip->beep_mode = beep_mode[dev];
1910 #endif
1911
1912         /* create codec instances */
1913         err = azx_codec_create(chip, model[dev],
1914                                azx_max_codecs[chip->driver_type],
1915                                power_save_addr);
1916
1917         if (err < 0)
1918                 goto out_free;
1919 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1920         if (chip->fw) {
1921                 err = snd_hda_load_patch(chip->bus, chip->fw->size,
1922                                          chip->fw->data);
1923                 if (err < 0)
1924                         goto out_free;
1925 #ifndef CONFIG_PM
1926                 release_firmware(chip->fw); /* no longer needed */
1927                 chip->fw = NULL;
1928 #endif
1929         }
1930 #endif
1931         if ((probe_only[dev] & 1) == 0) {
1932                 err = azx_codec_configure(chip);
1933                 if (err < 0)
1934                         goto out_free;
1935         }
1936
1937         /* create PCM streams */
1938         err = snd_hda_build_pcms(chip->bus);
1939         if (err < 0)
1940                 goto out_free;
1941
1942         /* create mixer controls */
1943         err = azx_mixer_create(chip);
1944         if (err < 0)
1945                 goto out_free;
1946
1947         err = snd_card_register(chip->card);
1948         if (err < 0)
1949                 goto out_free;
1950
1951         chip->running = 1;
1952         power_down_all_codecs(chip);
1953         azx_notifier_register(chip);
1954         azx_add_card_list(chip);
1955         if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME) || hda->use_vga_switcheroo)
1956                 pm_runtime_put_noidle(&pci->dev);
1957
1958 out_free:
1959         if (err < 0)
1960                 hda->init_failed = 1;
1961         complete_all(&hda->probe_wait);
1962         return err;
1963 }
1964
1965 static void azx_remove(struct pci_dev *pci)
1966 {
1967         struct snd_card *card = pci_get_drvdata(pci);
1968
1969         if (card)
1970                 snd_card_free(card);
1971 }
1972
1973 /* PCI IDs */
1974 static const struct pci_device_id azx_ids[] = {
1975         /* CPT */
1976         { PCI_DEVICE(0x8086, 0x1c20),
1977           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1978         /* PBG */
1979         { PCI_DEVICE(0x8086, 0x1d20),
1980           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1981         /* Panther Point */
1982         { PCI_DEVICE(0x8086, 0x1e20),
1983           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1984         /* Lynx Point */
1985         { PCI_DEVICE(0x8086, 0x8c20),
1986           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1987         /* 9 Series */
1988         { PCI_DEVICE(0x8086, 0x8ca0),
1989           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1990         /* Wellsburg */
1991         { PCI_DEVICE(0x8086, 0x8d20),
1992           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1993         { PCI_DEVICE(0x8086, 0x8d21),
1994           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1995         /* Lynx Point-LP */
1996         { PCI_DEVICE(0x8086, 0x9c20),
1997           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1998         /* Lynx Point-LP */
1999         { PCI_DEVICE(0x8086, 0x9c21),
2000           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2001         /* Wildcat Point-LP */
2002         { PCI_DEVICE(0x8086, 0x9ca0),
2003           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2004         /* Sunrise Point */
2005         { PCI_DEVICE(0x8086, 0xa170),
2006           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2007         /* Haswell */
2008         { PCI_DEVICE(0x8086, 0x0a0c),
2009           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2010         { PCI_DEVICE(0x8086, 0x0c0c),
2011           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2012         { PCI_DEVICE(0x8086, 0x0d0c),
2013           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2014         /* Broadwell */
2015         { PCI_DEVICE(0x8086, 0x160c),
2016           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
2017         /* 5 Series/3400 */
2018         { PCI_DEVICE(0x8086, 0x3b56),
2019           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2020         /* Poulsbo */
2021         { PCI_DEVICE(0x8086, 0x811b),
2022           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2023         /* Oaktrail */
2024         { PCI_DEVICE(0x8086, 0x080a),
2025           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2026         /* BayTrail */
2027         { PCI_DEVICE(0x8086, 0x0f04),
2028           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2029         /* Braswell */
2030         { PCI_DEVICE(0x8086, 0x2284),
2031           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2032         /* ICH */
2033         { PCI_DEVICE(0x8086, 0x2668),
2034           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2035           AZX_DCAPS_BUFSIZE },  /* ICH6 */
2036         { PCI_DEVICE(0x8086, 0x27d8),
2037           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2038           AZX_DCAPS_BUFSIZE },  /* ICH7 */
2039         { PCI_DEVICE(0x8086, 0x269a),
2040           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2041           AZX_DCAPS_BUFSIZE },  /* ESB2 */
2042         { PCI_DEVICE(0x8086, 0x284b),
2043           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2044           AZX_DCAPS_BUFSIZE },  /* ICH8 */
2045         { PCI_DEVICE(0x8086, 0x293e),
2046           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2047           AZX_DCAPS_BUFSIZE },  /* ICH9 */
2048         { PCI_DEVICE(0x8086, 0x293f),
2049           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2050           AZX_DCAPS_BUFSIZE },  /* ICH9 */
2051         { PCI_DEVICE(0x8086, 0x3a3e),
2052           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2053           AZX_DCAPS_BUFSIZE },  /* ICH10 */
2054         { PCI_DEVICE(0x8086, 0x3a6e),
2055           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2056           AZX_DCAPS_BUFSIZE },  /* ICH10 */
2057         /* Generic Intel */
2058         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
2059           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2060           .class_mask = 0xffffff,
2061           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_BUFSIZE },
2062         /* ATI SB 450/600/700/800/900 */
2063         { PCI_DEVICE(0x1002, 0x437b),
2064           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2065         { PCI_DEVICE(0x1002, 0x4383),
2066           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2067         /* AMD Hudson */
2068         { PCI_DEVICE(0x1022, 0x780d),
2069           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
2070         /* ATI HDMI */
2071         { PCI_DEVICE(0x1002, 0x793b),
2072           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2073         { PCI_DEVICE(0x1002, 0x7919),
2074           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2075         { PCI_DEVICE(0x1002, 0x960f),
2076           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2077         { PCI_DEVICE(0x1002, 0x970f),
2078           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2079         { PCI_DEVICE(0x1002, 0xaa00),
2080           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2081         { PCI_DEVICE(0x1002, 0xaa08),
2082           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2083         { PCI_DEVICE(0x1002, 0xaa10),
2084           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2085         { PCI_DEVICE(0x1002, 0xaa18),
2086           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2087         { PCI_DEVICE(0x1002, 0xaa20),
2088           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2089         { PCI_DEVICE(0x1002, 0xaa28),
2090           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2091         { PCI_DEVICE(0x1002, 0xaa30),
2092           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2093         { PCI_DEVICE(0x1002, 0xaa38),
2094           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2095         { PCI_DEVICE(0x1002, 0xaa40),
2096           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2097         { PCI_DEVICE(0x1002, 0xaa48),
2098           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2099         { PCI_DEVICE(0x1002, 0xaa50),
2100           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2101         { PCI_DEVICE(0x1002, 0xaa58),
2102           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2103         { PCI_DEVICE(0x1002, 0xaa60),
2104           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2105         { PCI_DEVICE(0x1002, 0xaa68),
2106           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2107         { PCI_DEVICE(0x1002, 0xaa80),
2108           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2109         { PCI_DEVICE(0x1002, 0xaa88),
2110           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2111         { PCI_DEVICE(0x1002, 0xaa90),
2112           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2113         { PCI_DEVICE(0x1002, 0xaa98),
2114           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2115         { PCI_DEVICE(0x1002, 0x9902),
2116           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
2117         { PCI_DEVICE(0x1002, 0xaaa0),
2118           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
2119         { PCI_DEVICE(0x1002, 0xaaa8),
2120           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
2121         { PCI_DEVICE(0x1002, 0xaab0),
2122           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
2123         /* VIA VT8251/VT8237A */
2124         { PCI_DEVICE(0x1106, 0x3288),
2125           .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
2126         /* VIA GFX VT7122/VX900 */
2127         { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
2128         /* VIA GFX VT6122/VX11 */
2129         { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2130         /* SIS966 */
2131         { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
2132         /* ULI M5461 */
2133         { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
2134         /* NVIDIA MCP */
2135         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
2136           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2137           .class_mask = 0xffffff,
2138           .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2139         /* Teradici */
2140         { PCI_DEVICE(0x6549, 0x1200),
2141           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2142         { PCI_DEVICE(0x6549, 0x2200),
2143           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2144         /* Creative X-Fi (CA0110-IBG) */
2145         /* CTHDA chips */
2146         { PCI_DEVICE(0x1102, 0x0010),
2147           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2148         { PCI_DEVICE(0x1102, 0x0012),
2149           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2150 #if !IS_ENABLED(CONFIG_SND_CTXFI)
2151         /* the following entry conflicts with snd-ctxfi driver,
2152          * as ctxfi driver mutates from HD-audio to native mode with
2153          * a special command sequence.
2154          */
2155         { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
2156           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2157           .class_mask = 0xffffff,
2158           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2159           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2160 #else
2161         /* this entry seems still valid -- i.e. without emu20kx chip */
2162         { PCI_DEVICE(0x1102, 0x0009),
2163           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2164           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2165 #endif
2166         /* CM8888 */
2167         { PCI_DEVICE(0x13f6, 0x5011),
2168           .driver_data = AZX_DRIVER_CMEDIA |
2169           AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB },
2170         /* Vortex86MX */
2171         { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2172         /* VMware HDAudio */
2173         { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2174         /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2175         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
2176           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2177           .class_mask = 0xffffff,
2178           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2179         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
2180           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2181           .class_mask = 0xffffff,
2182           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2183         { 0, }
2184 };
2185 MODULE_DEVICE_TABLE(pci, azx_ids);
2186
2187 /* pci_driver definition */
2188 static struct pci_driver azx_driver = {
2189         .name = KBUILD_MODNAME,
2190         .id_table = azx_ids,
2191         .probe = azx_probe,
2192         .remove = azx_remove,
2193         .driver = {
2194                 .pm = AZX_PM_OPS,
2195         },
2196 };
2197
2198 module_pci_driver(azx_driver);