sound/pci/cs46xx/dsp_spos.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  15  *
  16  */
  17
  18 /*
  19  * 2002-07 Benny Sjostrand benny@hostmobility.com
  20  */
  21
  22
  23 #include <linux/io.h>
  24 #include <linux/delay.h>
  25 #include <linux/pm.h>
  26 #include <linux/init.h>
  27 #include <linux/slab.h>
  28 #include <linux/vmalloc.h>
  29 #include <linux/mutex.h>
  30
  31 #include <sound/core.h>
  32 #include <sound/control.h>
  33 #include <sound/info.h>
  34 #include <sound/asoundef.h>
  35 #include "cs46xx.h"
  36
  37 #include "cs46xx_lib.h"
  38 #include "dsp_spos.h"
  39
  40 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
  41                                   struct dsp_scb_descriptor * fg_entry);
  42
  43 static enum wide_opcode wide_opcodes[] = {
  44         WIDE_FOR_BEGIN_LOOP,
  45         WIDE_FOR_BEGIN_LOOP2,
  46         WIDE_COND_GOTO_ADDR,
  47         WIDE_COND_GOTO_CALL,
  48         WIDE_TBEQ_COND_GOTO_ADDR,
  49         WIDE_TBEQ_COND_CALL_ADDR,
  50         WIDE_TBEQ_NCOND_GOTO_ADDR,
  51         WIDE_TBEQ_NCOND_CALL_ADDR,
  52         WIDE_TBEQ_COND_GOTO1_ADDR,
  53         WIDE_TBEQ_COND_CALL1_ADDR,
  54         WIDE_TBEQ_NCOND_GOTOI_ADDR,
  55         WIDE_TBEQ_NCOND_CALL1_ADDR
  56 };
  57
  58 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
  59                                        u32 overlay_begin_address)
  60 {
  61         unsigned int i = 0, j, nreallocated = 0;
  62         u32 hival,loval,address;
  63         u32 mop_operands,mop_type,wide_op;
  64         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
  65
  66         if (snd_BUG_ON(size %2))
  67                 return -EINVAL;
  68
  69         while (i < size) {
  70                 loval = data[i++];
  71                 hival = data[i++];
  72
  73                 if (ins->code.offset > 0) {
  74                         mop_operands = (hival >> 6) & 0x03fff;
  75                         mop_type = mop_operands >> 10;
  76
  77                         /* check for wide type instruction */
  78                         if (mop_type == 0 &&
  79                             (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
  80                             (mop_operands & WIDE_INSTR_MASK) != 0) {
  81                                 wide_op = loval & 0x7f;
  82                                 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
  83                                         if (wide_opcodes[j] == wide_op) {
  84                                                 /* need to reallocate instruction */
  85                                                 address  = (hival & 0x00FFF) << 5;
  86                                                 address |=  loval >> 15;
  87
  88                                                 dev_dbg(chip->card->dev,
  89                                                         "handle_wideop[1]: %05x:%05x addr %04x\n",
  90                                                         hival, loval, address);
  91
  92                                                 if ( !(address & 0x8000) ) {
  93                                                         address += (ins->code.offset / 2) - overlay_begin_address;
  94                                                 } else {
  95                                                         dev_dbg(chip->card->dev,
  96                                                                 "handle_wideop[1]: ROM symbol not reallocated\n");
  97                                                 }
  98
  99                                                 hival &= 0xFF000;
 100                                                 loval &= 0x07FFF;
 101
 102                                                 hival |= ( (address >> 5)  & 0x00FFF);
 103                                                 loval |= ( (address << 15) & 0xF8000);
 104
 105                                                 address  = (hival & 0x00FFF) << 5;
 106                                                 address |=  loval >> 15;
 107
 108                                                 dev_dbg(chip->card->dev,
 109                                                         "handle_wideop:[2] %05x:%05x addr %04x\n",
 110                                                         hival, loval, address);
 111                                                 nreallocated++;
 112                                         } /* wide_opcodes[j] == wide_op */
 113                                 } /* for */
 114                         } /* mod_type == 0 ... */
 115                 } /* ins->code.offset > 0 */
 116
 117                 ins->code.data[ins->code.size++] = loval;
 118                 ins->code.data[ins->code.size++] = hival;
 119         }
 120
 121         dev_dbg(chip->card->dev,
 122                 "dsp_spos: %d instructions reallocated\n", nreallocated);
 123         return nreallocated;
 124 }
 125
 126 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
 127 {
 128         int i;
 129         for (i = 0;i < module->nsegments; ++i) {
 130                 if (module->segments[i].segment_type == seg_type) {
 131                         return (module->segments + i);
 132                 }
 133         }
 134
 135         return NULL;
 136 };
 137
 138 static int find_free_symbol_index (struct dsp_spos_instance * ins)
 139 {
 140         int index = ins->symbol_table.nsymbols,i;
 141
 142         for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
 143                 if (ins->symbol_table.symbols[i].deleted) {
 144                         index = i;
 145                         break;
 146                 }
 147         }
 148
 149         return index;
 150 }
 151
 152 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 153 {
 154         int i;
 155         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 156
 157         if (module->symbol_table.nsymbols > 0) {
 158                 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
 159                     module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
 160                         module->overlay_begin_address = module->symbol_table.symbols[0].address;
 161                 }
 162         }
 163
 164         for (i = 0;i < module->symbol_table.nsymbols; ++i) {
 165                 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 166                         dev_err(chip->card->dev,
 167                                 "dsp_spos: symbol table is full\n");
 168                         return -ENOMEM;
 169                 }
 170
 171
 172                 if (cs46xx_dsp_lookup_symbol(chip,
 173                                              module->symbol_table.symbols[i].symbol_name,
 174                                              module->symbol_table.symbols[i].symbol_type) == NULL) {
 175
 176                         ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
 177                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
 178                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
 179                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
 180
 181                         if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
 182                                 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
 183
 184                         ins->symbol_table.nsymbols++;
 185                 } else {
 186 #if 0
 187                         dev_dbg(chip->card->dev,
 188                                 "dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
 189                                 module->symbol_table.symbols[i].symbol_name); */
 190 #endif
 191                 }
 192         }
 193
 194         return 0;
 195 }
 196
 197 static struct dsp_symbol_entry *
 198 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
 199 {
 200         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 201         struct dsp_symbol_entry * symbol = NULL;
 202         int index;
 203
 204         if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 205                 dev_err(chip->card->dev, "dsp_spos: symbol table is full\n");
 206                 return NULL;
 207         }
 208
 209         if (cs46xx_dsp_lookup_symbol(chip,
 210                                      symbol_name,
 211                                      type) != NULL) {
 212                 dev_err(chip->card->dev,
 213                         "dsp_spos: symbol <%s> duplicated\n", symbol_name);
 214                 return NULL;
 215         }
 216
 217         index = find_free_symbol_index (ins);
 218
 219         strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
 220         ins->symbol_table.symbols[index].address = address;
 221         ins->symbol_table.symbols[index].symbol_type = type;
 222         ins->symbol_table.symbols[index].module = NULL;
 223         ins->symbol_table.symbols[index].deleted = 0;
 224         symbol = (ins->symbol_table.symbols + index);
 225
 226         if (index > ins->symbol_table.highest_frag_index)
 227                 ins->symbol_table.highest_frag_index = index;
 228
 229         if (index == ins->symbol_table.nsymbols)
 230                 ins->symbol_table.nsymbols++; /* no frag. in list */
 231
 232         return symbol;
 233 }
 234
 235 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
 236 {
 237         struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
 238
 239         if (ins == NULL)
 240                 return NULL;
 241
 242         /* better to use vmalloc for this big table */
 243         ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) *
 244                                             DSP_MAX_SYMBOLS);
 245         ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
 246         ins->modules = kmalloc_array(DSP_MAX_MODULES,
 247                                      sizeof(struct dsp_module_desc),
 248                                      GFP_KERNEL);
 249         if (!ins->symbol_table.symbols || !ins->code.data || !ins->modules) {
 250                 cs46xx_dsp_spos_destroy(chip);
 251                 goto error;
 252         }
 253         ins->symbol_table.nsymbols = 0;
 254         ins->symbol_table.highest_frag_index = 0;
 255         ins->code.offset = 0;
 256         ins->code.size = 0;
 257         ins->nscb = 0;
 258         ins->ntask = 0;
 259         ins->nmodules = 0;
 260
 261         /* default SPDIF input sample rate
 262            to 48000 khz */
 263         ins->spdif_in_sample_rate = 48000;
 264
 265         /* maximize volume */
 266         ins->dac_volume_right = 0x8000;
 267         ins->dac_volume_left = 0x8000;
 268         ins->spdif_input_volume_right = 0x8000;
 269         ins->spdif_input_volume_left = 0x8000;
 270
 271         /* set left and right validity bits and
 272            default channel status */
 273         ins->spdif_csuv_default =
 274                 ins->spdif_csuv_stream =
 275          /* byte 0 */  ((unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF        & 0xff)) << 24) |
 276          /* byte 1 */  ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
 277          /* byte 3 */   (unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
 278          /* left and right validity bits */ (1 << 13) | (1 << 12);
 279
 280         return ins;
 281
 282 error:
 283         kfree(ins->modules);
 284         kfree(ins->code.data);
 285         vfree(ins->symbol_table.symbols);
 286         kfree(ins);
 287         return NULL;
 288 }
 289
 290 void  cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
 291 {
 292         int i;
 293         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 294
 295         if (snd_BUG_ON(!ins))
 296                 return;
 297
 298         mutex_lock(&chip->spos_mutex);
 299         for (i = 0; i < ins->nscb; ++i) {
 300                 if (ins->scbs[i].deleted) continue;
 301
 302                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 303 #ifdef CONFIG_PM_SLEEP
 304                 kfree(ins->scbs[i].data);
 305 #endif
 306         }
 307
 308         kfree(ins->code.data);
 309         vfree(ins->symbol_table.symbols);
 310         kfree(ins->modules);
 311         kfree(ins);
 312         mutex_unlock(&chip->spos_mutex);
 313 }
 314
 315 static int dsp_load_parameter(struct snd_cs46xx *chip,
 316                               struct dsp_segment_desc *parameter)
 317 {
 318         u32 doffset, dsize;
 319
 320         if (!parameter) {
 321                 dev_dbg(chip->card->dev,
 322                         "dsp_spos: module got no parameter segment\n");
 323                 return 0;
 324         }
 325
 326         doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
 327         dsize   = parameter->size * 4;
 328
 329         dev_dbg(chip->card->dev,
 330                 "dsp_spos: downloading parameter data to chip (%08x-%08x)\n",
 331                     doffset,doffset + dsize);
 332         if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
 333                 dev_err(chip->card->dev,
 334                         "dsp_spos: failed to download parameter data to DSP\n");
 335                 return -EINVAL;
 336         }
 337         return 0;
 338 }
 339
 340 static int dsp_load_sample(struct snd_cs46xx *chip,
 341                            struct dsp_segment_desc *sample)
 342 {
 343         u32 doffset, dsize;
 344
 345         if (!sample) {
 346                 dev_dbg(chip->card->dev,
 347                         "dsp_spos: module got no sample segment\n");
 348                 return 0;
 349         }
 350
 351         doffset = (sample->offset * 4  + DSP_SAMPLE_BYTE_OFFSET);
 352         dsize   =  sample->size * 4;
 353
 354         dev_dbg(chip->card->dev,
 355                 "dsp_spos: downloading sample data to chip (%08x-%08x)\n",
 356                     doffset,doffset + dsize);
 357
 358         if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
 359                 dev_err(chip->card->dev,
 360                         "dsp_spos: failed to sample data to DSP\n");
 361                 return -EINVAL;
 362         }
 363         return 0;
 364 }
 365
 366 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 367 {
 368         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 369         struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
 370         u32 doffset, dsize;
 371         int err;
 372
 373         if (ins->nmodules == DSP_MAX_MODULES - 1) {
 374                 dev_err(chip->card->dev,
 375                         "dsp_spos: to many modules loaded into DSP\n");
 376                 return -ENOMEM;
 377         }
 378
 379         dev_dbg(chip->card->dev,
 380                 "dsp_spos: loading module %s into DSP\n", module->module_name);
 381
 382         if (ins->nmodules == 0) {
 383                 dev_dbg(chip->card->dev, "dsp_spos: clearing parameter area\n");
 384                 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
 385         }
 386
 387         err = dsp_load_parameter(chip, get_segment_desc(module,
 388                                                         SEGTYPE_SP_PARAMETER));
 389         if (err < 0)
 390                 return err;
 391
 392         if (ins->nmodules == 0) {
 393                 dev_dbg(chip->card->dev, "dsp_spos: clearing sample area\n");
 394                 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
 395         }
 396
 397         err = dsp_load_sample(chip, get_segment_desc(module,
 398                                                      SEGTYPE_SP_SAMPLE));
 399         if (err < 0)
 400                 return err;
 401
 402         if (ins->nmodules == 0) {
 403                 dev_dbg(chip->card->dev, "dsp_spos: clearing code area\n");
 404                 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
 405         }
 406
 407         if (code == NULL) {
 408                 dev_dbg(chip->card->dev,
 409                         "dsp_spos: module got no code segment\n");
 410         } else {
 411                 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
 412                         dev_err(chip->card->dev,
 413                                 "dsp_spos: no space available in DSP\n");
 414                         return -ENOMEM;
 415                 }
 416
 417                 module->load_address = ins->code.offset;
 418                 module->overlay_begin_address = 0x000;
 419
 420                 /* if module has a code segment it must have
 421                    symbol table */
 422                 if (snd_BUG_ON(!module->symbol_table.symbols))
 423                         return -ENOMEM;
 424                 if (add_symbols(chip,module)) {
 425                         dev_err(chip->card->dev,
 426                                 "dsp_spos: failed to load symbol table\n");
 427                         return -ENOMEM;
 428                 }
 429
 430                 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
 431                 dsize   = code->size * 4;
 432                 dev_dbg(chip->card->dev,
 433                         "dsp_spos: downloading code to chip (%08x-%08x)\n",
 434                             doffset,doffset + dsize);
 435
 436                 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
 437
 438                 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
 439                         dev_err(chip->card->dev,
 440                                 "dsp_spos: failed to download code to DSP\n");
 441                         return -EINVAL;
 442                 }
 443
 444                 ins->code.offset += code->size;
 445         }
 446
 447         /* NOTE: module segments and symbol table must be
 448            statically allocated. Case that module data is
 449            not generated by the ospparser */
 450         ins->modules[ins->nmodules] = *module;
 451         ins->nmodules++;
 452
 453         return 0;
 454 }
 455
 456 struct dsp_symbol_entry *
 457 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
 458 {
 459         int i;
 460         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 461
 462         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 463
 464                 if (ins->symbol_table.symbols[i].deleted)
 465                         continue;
 466
 467                 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
 468                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 469                         return (ins->symbol_table.symbols + i);
 470                 }
 471         }
 472
 473 #if 0
 474         dev_err(chip->card->dev, "dsp_spos: symbol <%s> type %02x not found\n",
 475                 symbol_name,symbol_type);
 476 #endif
 477
 478         return NULL;
 479 }
 480
 481
 482 #ifdef CONFIG_SND_PROC_FS
 483 static struct dsp_symbol_entry *
 484 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
 485 {
 486         int i;
 487         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 488
 489         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 490
 491                 if (ins->symbol_table.symbols[i].deleted)
 492                         continue;
 493
 494                 if (ins->symbol_table.symbols[i].address == address &&
 495                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 496                         return (ins->symbol_table.symbols + i);
 497                 }
 498         }
 499
 500
 501         return NULL;
 502 }
 503
 504
 505 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
 506                                                struct snd_info_buffer *buffer)
 507 {
 508         struct snd_cs46xx *chip = entry->private_data;
 509         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 510         int i;
 511
 512         snd_iprintf(buffer, "SYMBOLS:\n");
 513         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 514                 char *module_str = "system";
 515
 516                 if (ins->symbol_table.symbols[i].deleted)
 517                         continue;
 518
 519                 if (ins->symbol_table.symbols[i].module != NULL) {
 520                         module_str = ins->symbol_table.symbols[i].module->module_name;
 521                 }
 522
 523
 524                 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
 525                             ins->symbol_table.symbols[i].address,
 526                             ins->symbol_table.symbols[i].symbol_type,
 527                             ins->symbol_table.symbols[i].symbol_name,
 528                             module_str);
 529         }
 530 }
 531
 532
 533 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
 534                                           struct snd_info_buffer *buffer)
 535 {
 536         struct snd_cs46xx *chip = entry->private_data;
 537         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 538         int i,j;
 539
 540         mutex_lock(&chip->spos_mutex);
 541         snd_iprintf(buffer, "MODULES:\n");
 542         for ( i = 0; i < ins->nmodules; ++i ) {
 543                 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
 544                 snd_iprintf(buffer, "   %d symbols\n", ins->modules[i].symbol_table.nsymbols);
 545                 snd_iprintf(buffer, "   %d fixups\n", ins->modules[i].nfixups);
 546
 547                 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
 548                         struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
 549                         snd_iprintf(buffer, "   segment %02x offset %08x size %08x\n",
 550                                     desc->segment_type,desc->offset, desc->size);
 551                 }
 552         }
 553         mutex_unlock(&chip->spos_mutex);
 554 }
 555
 556 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
 557                                             struct snd_info_buffer *buffer)
 558 {
 559         struct snd_cs46xx *chip = entry->private_data;
 560         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 561         int i, j, col;
 562         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 563
 564         mutex_lock(&chip->spos_mutex);
 565         snd_iprintf(buffer, "TASK TREES:\n");
 566         for ( i = 0; i < ins->ntask; ++i) {
 567                 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
 568
 569                 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
 570                         u32 val;
 571                         if (col == 4) {
 572                                 snd_iprintf(buffer,"\n");
 573                                 col = 0;
 574                         }
 575                         val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
 576                         snd_iprintf(buffer,"%08x ",val);
 577                 }
 578         }
 579
 580         snd_iprintf(buffer,"\n");
 581         mutex_unlock(&chip->spos_mutex);
 582 }
 583
 584 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
 585                                       struct snd_info_buffer *buffer)
 586 {
 587         struct snd_cs46xx *chip = entry->private_data;
 588         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 589         int i;
 590
 591         mutex_lock(&chip->spos_mutex);
 592         snd_iprintf(buffer, "SCB's:\n");
 593         for ( i = 0; i < ins->nscb; ++i) {
 594                 if (ins->scbs[i].deleted)
 595                         continue;
 596                 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
 597
 598                 if (ins->scbs[i].parent_scb_ptr != NULL) {
 599                         snd_iprintf(buffer,"parent [%s:%04x] ",
 600                                     ins->scbs[i].parent_scb_ptr->scb_name,
 601                                     ins->scbs[i].parent_scb_ptr->address);
 602                 } else snd_iprintf(buffer,"parent [none] ");
 603
 604                 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x]  task_entry [%s:%04x]\n",
 605                             ins->scbs[i].sub_list_ptr->scb_name,
 606                             ins->scbs[i].sub_list_ptr->address,
 607                             ins->scbs[i].next_scb_ptr->scb_name,
 608                             ins->scbs[i].next_scb_ptr->address,
 609                             ins->scbs[i].task_entry->symbol_name,
 610                             ins->scbs[i].task_entry->address);
 611         }
 612
 613         snd_iprintf(buffer,"\n");
 614         mutex_unlock(&chip->spos_mutex);
 615 }
 616
 617 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
 618                                                  struct snd_info_buffer *buffer)
 619 {
 620         struct snd_cs46xx *chip = entry->private_data;
 621         /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
 622         unsigned int i, col = 0;
 623         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 624         struct dsp_symbol_entry * symbol;
 625
 626         for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
 627                 if (col == 4) {
 628                         snd_iprintf(buffer,"\n");
 629                         col = 0;
 630                 }
 631
 632                 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
 633                         col = 0;
 634                         snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
 635                 }
 636
 637                 if (col == 0) {
 638                         snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
 639                 }
 640
 641                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 642         }
 643 }
 644
 645 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
 646                                               struct snd_info_buffer *buffer)
 647 {
 648         struct snd_cs46xx *chip = entry->private_data;
 649         int i,col = 0;
 650         void __iomem *dst = chip->region.idx[2].remap_addr;
 651
 652         snd_iprintf(buffer,"PCMREADER:\n");
 653         for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
 654                 if (col == 4) {
 655                         snd_iprintf(buffer,"\n");
 656                         col = 0;
 657                 }
 658
 659                 if (col == 0) {
 660                         snd_iprintf(buffer, "%04X ",i);
 661                 }
 662
 663                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 664         }
 665
 666         snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
 667
 668         col = 0;
 669         for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
 670                 if (col == 4) {
 671                         snd_iprintf(buffer,"\n");
 672                         col = 0;
 673                 }
 674
 675                 if (col == 0) {
 676                         snd_iprintf(buffer, "%04X ",i);
 677                 }
 678
 679                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 680         }
 681
 682         snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
 683         col = 0;
 684         for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
 685                 if (col == 4) {
 686                         snd_iprintf(buffer,"\n");
 687                         col = 0;
 688                 }
 689
 690                 if (col == 0) {
 691                         snd_iprintf(buffer, "%04X ",i);
 692                 }
 693
 694                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 695         }
 696
 697
 698         snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
 699         col = 0;
 700         for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
 701                 if (col == 4) {
 702                         snd_iprintf(buffer,"\n");
 703                         col = 0;
 704                 }
 705
 706                 if (col == 0) {
 707                         snd_iprintf(buffer, "%04X ",i);
 708                 }
 709
 710                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 711         }
 712
 713         snd_iprintf(buffer,"\n...\n");
 714         col = 0;
 715
 716         for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
 717                 if (col == 4) {
 718                         snd_iprintf(buffer,"\n");
 719                         col = 0;
 720                 }
 721
 722                 if (col == 0) {
 723                         snd_iprintf(buffer, "%04X ",i);
 724                 }
 725
 726                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 727         }
 728
 729
 730         snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
 731         col = 0;
 732         for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
 733                 if (col == 4) {
 734                         snd_iprintf(buffer,"\n");
 735                         col = 0;
 736                 }
 737
 738                 if (col == 0) {
 739                         snd_iprintf(buffer, "%04X ",i);
 740                 }
 741
 742                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 743         }
 744
 745         snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
 746         col = 0;
 747         for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
 748                 if (col == 4) {
 749                         snd_iprintf(buffer,"\n");
 750                         col = 0;
 751                 }
 752
 753                 if (col == 0) {
 754                         snd_iprintf(buffer, "%04X ",i);
 755                 }
 756
 757                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 758         }
 759 #if 0
 760         snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
 761         col = 0;
 762         for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
 763                 if (col == 4) {
 764                         snd_iprintf(buffer,"\n");
 765                         col = 0;
 766                 }
 767
 768                 if (col == 0) {
 769                         snd_iprintf(buffer, "%04X ",i);
 770                 }
 771
 772                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 773         }
 774 #endif
 775
 776         snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
 777         col = 0;
 778         for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
 779                 if (col == 4) {
 780                         snd_iprintf(buffer,"\n");
 781                         col = 0;
 782                 }
 783
 784                 if (col == 0) {
 785                         snd_iprintf(buffer, "%04X ",i);
 786                 }
 787
 788                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 789         }
 790         snd_iprintf(buffer,"\n");
 791 }
 792
 793 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
 794 {
 795         struct snd_info_entry *entry;
 796         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 797         int i;
 798
 799         ins->snd_card = card;
 800
 801         if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
 802                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 803                 entry->mode = S_IFDIR | 0555;
 804
 805                 if (snd_info_register(entry) < 0) {
 806                         snd_info_free_entry(entry);
 807                         entry = NULL;
 808                 }
 809         }
 810
 811         ins->proc_dsp_dir = entry;
 812
 813         if (!ins->proc_dsp_dir)
 814                 return -ENOMEM;
 815
 816         if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
 817                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 818                 entry->private_data = chip;
 819                 entry->mode = S_IFREG | 0644;
 820                 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
 821                 if (snd_info_register(entry) < 0) {
 822                         snd_info_free_entry(entry);
 823                         entry = NULL;
 824                 }
 825         }
 826         ins->proc_sym_info_entry = entry;
 827
 828         if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
 829                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 830                 entry->private_data = chip;
 831                 entry->mode = S_IFREG | 0644;
 832                 entry->c.text.read = cs46xx_dsp_proc_modules_read;
 833                 if (snd_info_register(entry) < 0) {
 834                         snd_info_free_entry(entry);
 835                         entry = NULL;
 836                 }
 837         }
 838         ins->proc_modules_info_entry = entry;
 839
 840         if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
 841                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 842                 entry->private_data = chip;
 843                 entry->mode = S_IFREG | 0644;
 844                 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
 845                 if (snd_info_register(entry) < 0) {
 846                         snd_info_free_entry(entry);
 847                         entry = NULL;
 848                 }
 849         }
 850         ins->proc_parameter_dump_info_entry = entry;
 851
 852         if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
 853                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 854                 entry->private_data = chip;
 855                 entry->mode = S_IFREG | 0644;
 856                 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
 857                 if (snd_info_register(entry) < 0) {
 858                         snd_info_free_entry(entry);
 859                         entry = NULL;
 860                 }
 861         }
 862         ins->proc_sample_dump_info_entry = entry;
 863
 864         if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
 865                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 866                 entry->private_data = chip;
 867                 entry->mode = S_IFREG | 0644;
 868                 entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
 869                 if (snd_info_register(entry) < 0) {
 870                         snd_info_free_entry(entry);
 871                         entry = NULL;
 872                 }
 873         }
 874         ins->proc_task_info_entry = entry;
 875
 876         if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
 877                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 878                 entry->private_data = chip;
 879                 entry->mode = S_IFREG | 0644;
 880                 entry->c.text.read = cs46xx_dsp_proc_scb_read;
 881                 if (snd_info_register(entry) < 0) {
 882                         snd_info_free_entry(entry);
 883                         entry = NULL;
 884                 }
 885         }
 886         ins->proc_scb_info_entry = entry;
 887
 888         mutex_lock(&chip->spos_mutex);
 889         /* register/update SCB's entries on proc */
 890         for (i = 0; i < ins->nscb; ++i) {
 891                 if (ins->scbs[i].deleted) continue;
 892
 893                 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
 894         }
 895         mutex_unlock(&chip->spos_mutex);
 896
 897         return 0;
 898 }
 899
 900 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
 901 {
 902         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 903         int i;
 904
 905         snd_info_free_entry(ins->proc_sym_info_entry);
 906         ins->proc_sym_info_entry = NULL;
 907
 908         snd_info_free_entry(ins->proc_modules_info_entry);
 909         ins->proc_modules_info_entry = NULL;
 910
 911         snd_info_free_entry(ins->proc_parameter_dump_info_entry);
 912         ins->proc_parameter_dump_info_entry = NULL;
 913
 914         snd_info_free_entry(ins->proc_sample_dump_info_entry);
 915         ins->proc_sample_dump_info_entry = NULL;
 916
 917         snd_info_free_entry(ins->proc_scb_info_entry);
 918         ins->proc_scb_info_entry = NULL;
 919
 920         snd_info_free_entry(ins->proc_task_info_entry);
 921         ins->proc_task_info_entry = NULL;
 922
 923         mutex_lock(&chip->spos_mutex);
 924         for (i = 0; i < ins->nscb; ++i) {
 925                 if (ins->scbs[i].deleted) continue;
 926                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 927         }
 928         mutex_unlock(&chip->spos_mutex);
 929
 930         snd_info_free_entry(ins->proc_dsp_dir);
 931         ins->proc_dsp_dir = NULL;
 932
 933         return 0;
 934 }
 935 #endif /* CONFIG_SND_PROC_FS */
 936
 937 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
 938                                    u32  dest, int size)
 939 {
 940         void __iomem *spdst = chip->region.idx[1].remap_addr +
 941                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 942         int i;
 943
 944         for (i = 0; i < size; ++i) {
 945                 dev_dbg(chip->card->dev, "addr %p, val %08x\n",
 946                         spdst, task_data[i]);
 947                 writel(task_data[i],spdst);
 948                 spdst += sizeof(u32);
 949         }
 950 }
 951
 952 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
 953 {
 954         void __iomem *spdst = chip->region.idx[1].remap_addr +
 955                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 956         int i;
 957
 958         for (i = 0; i < 0x10; ++i) {
 959                 dev_dbg(chip->card->dev, "addr %p, val %08x\n",
 960                         spdst, scb_data[i]);
 961                 writel(scb_data[i],spdst);
 962                 spdst += sizeof(u32);
 963         }
 964 }
 965
 966 static int find_free_scb_index (struct dsp_spos_instance * ins)
 967 {
 968         int index = ins->nscb, i;
 969
 970         for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
 971                 if (ins->scbs[i].deleted) {
 972                         index = i;
 973                         break;
 974                 }
 975         }
 976
 977         return index;
 978 }
 979
 980 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
 981 {
 982         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 983         struct dsp_scb_descriptor * desc = NULL;
 984         int index;
 985
 986         if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
 987                 dev_err(chip->card->dev,
 988                         "dsp_spos: got no place for other SCB\n");
 989                 return NULL;
 990         }
 991
 992         index = find_free_scb_index (ins);
 993
 994         memset(&ins->scbs[index], 0, sizeof(ins->scbs[index]));
 995         strcpy(ins->scbs[index].scb_name, name);
 996         ins->scbs[index].address = dest;
 997         ins->scbs[index].index = index;
 998         ins->scbs[index].ref_count = 1;
 999
1000         desc = (ins->scbs + index);
1001         ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
1002
1003         if (index > ins->scb_highest_frag_index)
1004                 ins->scb_highest_frag_index = index;
1005
1006         if (index == ins->nscb)
1007                 ins->nscb++;
1008
1009         return desc;
1010 }
1011
1012 static struct dsp_task_descriptor *
1013 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
1014 {
1015         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1016         struct dsp_task_descriptor * desc = NULL;
1017
1018         if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
1019                 dev_err(chip->card->dev,
1020                         "dsp_spos: got no place for other TASK\n");
1021                 return NULL;
1022         }
1023
1024         if (name)
1025                 strcpy(ins->tasks[ins->ntask].task_name, name);
1026         else
1027                 strcpy(ins->tasks[ins->ntask].task_name, "(NULL)");
1028         ins->tasks[ins->ntask].address = dest;
1029         ins->tasks[ins->ntask].size = size;
1030
1031         /* quick find in list */
1032         ins->tasks[ins->ntask].index = ins->ntask;
1033         desc = (ins->tasks + ins->ntask);
1034         ins->ntask++;
1035
1036         if (name)
1037                 add_symbol (chip,name,dest,SYMBOL_PARAMETER);
1038         return desc;
1039 }
1040
1041 #define SCB_BYTES       (0x10 * 4)
1042
1043 struct dsp_scb_descriptor *
1044 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
1045 {
1046         struct dsp_scb_descriptor * desc;
1047
1048 #ifdef CONFIG_PM_SLEEP
1049         /* copy the data for resume */
1050         scb_data = kmemdup(scb_data, SCB_BYTES, GFP_KERNEL);
1051         if (!scb_data)
1052                 return NULL;
1053 #endif
1054
1055         desc = _map_scb (chip,name,dest);
1056         if (desc) {
1057                 desc->data = scb_data;
1058                 _dsp_create_scb(chip,scb_data,dest);
1059         } else {
1060                 dev_err(chip->card->dev, "dsp_spos: failed to map SCB\n");
1061 #ifdef CONFIG_PM_SLEEP
1062                 kfree(scb_data);
1063 #endif
1064         }
1065
1066         return desc;
1067 }
1068
1069
1070 static struct dsp_task_descriptor *
1071 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
1072                              u32 dest, int size)
1073 {
1074         struct dsp_task_descriptor * desc;
1075
1076         desc = _map_task_tree (chip,name,dest,size);
1077         if (desc) {
1078                 desc->data = task_data;
1079                 _dsp_create_task_tree(chip,task_data,dest,size);
1080         } else {
1081                 dev_err(chip->card->dev, "dsp_spos: failed to map TASK\n");
1082         }
1083
1084         return desc;
1085 }
1086
1087 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1088 {
1089         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1090         struct dsp_symbol_entry * fg_task_tree_header_code;
1091         struct dsp_symbol_entry * task_tree_header_code;
1092         struct dsp_symbol_entry * task_tree_thread;
1093         struct dsp_symbol_entry * null_algorithm;
1094         struct dsp_symbol_entry * magic_snoop_task;
1095
1096         struct dsp_scb_descriptor * timing_master_scb;
1097         struct dsp_scb_descriptor * codec_out_scb;
1098         struct dsp_scb_descriptor * codec_in_scb;
1099         struct dsp_scb_descriptor * src_task_scb;
1100         struct dsp_scb_descriptor * master_mix_scb;
1101         struct dsp_scb_descriptor * rear_mix_scb;
1102         struct dsp_scb_descriptor * record_mix_scb;
1103         struct dsp_scb_descriptor * write_back_scb;
1104         struct dsp_scb_descriptor * vari_decimate_scb;
1105         struct dsp_scb_descriptor * rear_codec_out_scb;
1106         struct dsp_scb_descriptor * clfe_codec_out_scb;
1107         struct dsp_scb_descriptor * magic_snoop_scb;
1108
1109         int fifo_addr, fifo_span, valid_slots;
1110
1111         static struct dsp_spos_control_block sposcb = {
1112                 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1113                 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1114                 /* 2 */ DSP_SPOS_DC,0,
1115                 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1116                 /* 4 */ 0,0,
1117                 /* 5 */ DSP_SPOS_UU,0,
1118                 /* 6 */ FG_TASK_HEADER_ADDR,0,
1119                 /* 7 */ 0,0,
1120                 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1121                 /* 9 */ 0,
1122                 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1123                 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1124                 /* C */ DSP_SPOS_DC_DC,
1125                 /* D */ DSP_SPOS_DC_DC,
1126                 /* E */ DSP_SPOS_DC_DC,
1127                 /* F */ DSP_SPOS_DC_DC
1128         };
1129
1130         cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1131
1132         null_algorithm  = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1133         if (null_algorithm == NULL) {
1134                 dev_err(chip->card->dev,
1135                         "dsp_spos: symbol NULLALGORITHM not found\n");
1136                 return -EIO;
1137         }
1138
1139         fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
1140         if (fg_task_tree_header_code == NULL) {
1141                 dev_err(chip->card->dev,
1142                         "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1143                 return -EIO;
1144         }
1145
1146         task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
1147         if (task_tree_header_code == NULL) {
1148                 dev_err(chip->card->dev,
1149                         "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1150                 return -EIO;
1151         }
1152
1153         task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1154         if (task_tree_thread == NULL) {
1155                 dev_err(chip->card->dev,
1156                         "dsp_spos: symbol TASKTREETHREAD not found\n");
1157                 return -EIO;
1158         }
1159
1160         magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1161         if (magic_snoop_task == NULL) {
1162                 dev_err(chip->card->dev,
1163                         "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1164                 return -EIO;
1165         }
1166
1167         {
1168                 /* create the null SCB */
1169                 static struct dsp_generic_scb null_scb = {
1170                         { 0, 0, 0, 0 },
1171                         { 0, 0, 0, 0, 0 },
1172                         NULL_SCB_ADDR, NULL_SCB_ADDR,
1173                         0, 0, 0, 0, 0,
1174                         {
1175                                 0,0,
1176                                 0,0,
1177                         }
1178                 };
1179
1180                 null_scb.entry_point = null_algorithm->address;
1181                 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1182                 ins->the_null_scb->task_entry = null_algorithm;
1183                 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1184                 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1185                 ins->the_null_scb->parent_scb_ptr = NULL;
1186                 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1187         }
1188
1189         {
1190                 /* setup foreground task tree */
1191                 static struct dsp_task_tree_control_block fg_task_tree_hdr =  {
1192                         { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1193                           DSP_SPOS_DC_DC,
1194                           DSP_SPOS_DC_DC,
1195                           0x0000,DSP_SPOS_DC,
1196                           DSP_SPOS_DC, DSP_SPOS_DC,
1197                           DSP_SPOS_DC_DC,
1198                           DSP_SPOS_DC_DC,
1199                           DSP_SPOS_DC_DC,
1200                           DSP_SPOS_DC,DSP_SPOS_DC },
1201
1202                         {
1203                                 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
1204                                 0,
1205                                 FG_TASK_HEADER_ADDR + TCBData,
1206                         },
1207
1208                         {
1209                                 4,0,
1210                                 1,0,
1211                                 2,SPOSCB_ADDR + HFGFlags,
1212                                 0,0,
1213                                 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1214                         },
1215
1216                         {
1217                                 DSP_SPOS_DC,0,
1218                                 DSP_SPOS_DC,DSP_SPOS_DC,
1219                                 DSP_SPOS_DC,DSP_SPOS_DC,
1220                                 DSP_SPOS_DC,DSP_SPOS_DC,
1221                                 DSP_SPOS_DC,DSP_SPOS_DC,
1222                                 DSP_SPOS_DCDC,
1223                                 DSP_SPOS_UU,1,
1224                                 DSP_SPOS_DCDC,
1225                                 DSP_SPOS_DCDC,
1226                                 DSP_SPOS_DCDC,
1227                                 DSP_SPOS_DCDC,
1228                                 DSP_SPOS_DCDC,
1229                                 DSP_SPOS_DCDC,
1230                                 DSP_SPOS_DCDC,
1231                                 DSP_SPOS_DCDC,
1232                                 DSP_SPOS_DCDC,
1233                                 DSP_SPOS_DCDC,
1234                                 DSP_SPOS_DCDC,
1235                                 DSP_SPOS_DCDC,
1236                                 DSP_SPOS_DCDC,
1237                                 DSP_SPOS_DCDC,
1238                                 DSP_SPOS_DCDC,
1239                                 DSP_SPOS_DCDC,
1240                                 DSP_SPOS_DCDC,
1241                                 DSP_SPOS_DCDC,
1242                                 DSP_SPOS_DCDC,
1243                                 DSP_SPOS_DCDC,
1244                                 DSP_SPOS_DCDC,
1245                                 DSP_SPOS_DCDC,
1246                                 DSP_SPOS_DCDC,
1247                                 DSP_SPOS_DCDC,
1248                                 DSP_SPOS_DCDC,
1249                                 DSP_SPOS_DCDC,
1250                                 DSP_SPOS_DCDC,
1251                                 DSP_SPOS_DCDC
1252                         },
1253                         {
1254                                 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1255                                 0,0
1256                         }
1257                 };
1258
1259                 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1260                 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1261                 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1262         }
1263
1264
1265         {
1266                 /* setup foreground task tree */
1267                 static struct dsp_task_tree_control_block bg_task_tree_hdr =  {
1268                         { DSP_SPOS_DC_DC,
1269                           DSP_SPOS_DC_DC,
1270                           DSP_SPOS_DC_DC,
1271                           DSP_SPOS_DC, DSP_SPOS_DC,
1272                           DSP_SPOS_DC, DSP_SPOS_DC,
1273                           DSP_SPOS_DC_DC,
1274                           DSP_SPOS_DC_DC,
1275                           DSP_SPOS_DC_DC,
1276                           DSP_SPOS_DC,DSP_SPOS_DC },
1277
1278                         {
1279                                 NULL_SCB_ADDR,NULL_SCB_ADDR,  /* Set up the background to do nothing */
1280                                 0,
1281                                 BG_TREE_SCB_ADDR + TCBData,
1282                         },
1283
1284                         {
1285                                 9999,0,
1286                                 0,1,
1287                                 0,SPOSCB_ADDR + HFGFlags,
1288                                 0,0,
1289                                 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1290                         },
1291
1292                         {
1293                                 DSP_SPOS_DC,0,
1294                                 DSP_SPOS_DC,DSP_SPOS_DC,
1295                                 DSP_SPOS_DC,DSP_SPOS_DC,
1296                                 DSP_SPOS_DC,DSP_SPOS_DC,
1297                                 DSP_SPOS_DC,DSP_SPOS_DC,
1298                                 DSP_SPOS_DCDC,
1299                                 DSP_SPOS_UU,1,
1300                                 DSP_SPOS_DCDC,
1301                                 DSP_SPOS_DCDC,
1302                                 DSP_SPOS_DCDC,
1303                                 DSP_SPOS_DCDC,
1304                                 DSP_SPOS_DCDC,
1305                                 DSP_SPOS_DCDC,
1306                                 DSP_SPOS_DCDC,
1307                                 DSP_SPOS_DCDC,
1308                                 DSP_SPOS_DCDC,
1309                                 DSP_SPOS_DCDC,
1310                                 DSP_SPOS_DCDC,
1311                                 DSP_SPOS_DCDC,
1312                                 DSP_SPOS_DCDC,
1313                                 DSP_SPOS_DCDC,
1314                                 DSP_SPOS_DCDC,
1315                                 DSP_SPOS_DCDC,
1316                                 DSP_SPOS_DCDC,
1317                                 DSP_SPOS_DCDC,
1318                                 DSP_SPOS_DCDC,
1319                                 DSP_SPOS_DCDC,
1320                                 DSP_SPOS_DCDC,
1321                                 DSP_SPOS_DCDC,
1322                                 DSP_SPOS_DCDC,
1323                                 DSP_SPOS_DCDC,
1324                                 DSP_SPOS_DCDC,
1325                                 DSP_SPOS_DCDC,
1326                                 DSP_SPOS_DCDC,
1327                                 DSP_SPOS_DCDC
1328                         },
1329                         {
1330                                 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1331                                 0,0
1332                         }
1333                 };
1334
1335                 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1336                 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1337                 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1338         }
1339
1340         /* create timing master SCB */
1341         timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1342
1343         /* create the CODEC output task */
1344         codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1345                                                         MASTERMIX_SCB_ADDR,
1346                                                         CODECOUT_SCB_ADDR,timing_master_scb,
1347                                                         SCB_ON_PARENT_SUBLIST_SCB);
1348
1349         if (!codec_out_scb) goto _fail_end;
1350         /* create the master mix SCB */
1351         master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1352                                                         MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1353                                                         codec_out_scb,
1354                                                         SCB_ON_PARENT_SUBLIST_SCB);
1355         ins->master_mix_scb = master_mix_scb;
1356
1357         if (!master_mix_scb) goto _fail_end;
1358
1359         /* create codec in */
1360         codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1361                                                       CODEC_INPUT_BUF1,
1362                                                       CODECIN_SCB_ADDR,codec_out_scb,
1363                                                       SCB_ON_PARENT_NEXT_SCB);
1364         if (!codec_in_scb) goto _fail_end;
1365         ins->codec_in_scb = codec_in_scb;
1366
1367         /* create write back scb */
1368         write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1369                                                               WRITE_BACK_BUF1,WRITE_BACK_SPB,
1370                                                               WRITEBACK_SCB_ADDR,
1371                                                               timing_master_scb,
1372                                                               SCB_ON_PARENT_NEXT_SCB);
1373         if (!write_back_scb) goto _fail_end;
1374
1375         {
1376                 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1377                         0x00020000,
1378                         0x0000ffff
1379                 };
1380
1381                 if (!cs46xx_dsp_create_task_tree(chip, NULL,
1382                                                  (u32 *)&mix2_ostream_spb,
1383                                                  WRITE_BACK_SPB, 2))
1384                         goto _fail_end;
1385         }
1386
1387         /* input sample converter */
1388         vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1389                                                                 VARI_DECIMATE_BUF0,
1390                                                                 VARI_DECIMATE_BUF1,
1391                                                                 VARIDECIMATE_SCB_ADDR,
1392                                                                 write_back_scb,
1393                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1394         if (!vari_decimate_scb) goto _fail_end;
1395
1396         /* create the record mixer SCB */
1397         record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1398                                                         MIX_SAMPLE_BUF2,
1399                                                         RECORD_MIXER_SCB_ADDR,
1400                                                         vari_decimate_scb,
1401                                                         SCB_ON_PARENT_SUBLIST_SCB);
1402         ins->record_mixer_scb = record_mix_scb;
1403
1404         if (!record_mix_scb) goto _fail_end;
1405
1406         valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1407
1408         if (snd_BUG_ON(chip->nr_ac97_codecs != 1 && chip->nr_ac97_codecs != 2))
1409                 goto _fail_end;
1410
1411         if (chip->nr_ac97_codecs == 1) {
1412                 /* output on slot 5 and 11
1413                    on primary CODEC */
1414                 fifo_addr = 0x20;
1415                 fifo_span = 0x60;
1416
1417                 /* enable slot 5 and 11 */
1418                 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1419         } else {
1420                 /* output on slot 7 and 8
1421                    on secondary CODEC */
1422                 fifo_addr = 0x40;
1423                 fifo_span = 0x10;
1424
1425                 /* enable slot 7 and 8 */
1426                 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1427         }
1428         /* create CODEC tasklet for rear speakers output*/
1429         rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1430                                                              REAR_MIXER_SCB_ADDR,
1431                                                              REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1432                                                              SCB_ON_PARENT_NEXT_SCB);
1433         if (!rear_codec_out_scb) goto _fail_end;
1434
1435
1436         /* create the rear PCM channel  mixer SCB */
1437         rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1438                                                       MIX_SAMPLE_BUF3,
1439                                                       REAR_MIXER_SCB_ADDR,
1440                                                       rear_codec_out_scb,
1441                                                       SCB_ON_PARENT_SUBLIST_SCB);
1442         ins->rear_mix_scb = rear_mix_scb;
1443         if (!rear_mix_scb) goto _fail_end;
1444
1445         if (chip->nr_ac97_codecs == 2) {
1446                 /* create CODEC tasklet for rear Center/LFE output
1447                    slot 6 and 9 on secondary CODEC */
1448                 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1449                                                                      CLFE_MIXER_SCB_ADDR,
1450                                                                      CLFE_CODEC_SCB_ADDR,
1451                                                                      rear_codec_out_scb,
1452                                                                      SCB_ON_PARENT_NEXT_SCB);
1453                 if (!clfe_codec_out_scb) goto _fail_end;
1454
1455
1456                 /* create the rear PCM channel  mixer SCB */
1457                 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1458                                                                          MIX_SAMPLE_BUF4,
1459                                                                          CLFE_MIXER_SCB_ADDR,
1460                                                                          clfe_codec_out_scb,
1461                                                                          SCB_ON_PARENT_SUBLIST_SCB);
1462                 if (!ins->center_lfe_mix_scb) goto _fail_end;
1463
1464                 /* enable slot 6 and 9 */
1465                 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1466         } else {
1467                 clfe_codec_out_scb = rear_codec_out_scb;
1468                 ins->center_lfe_mix_scb = rear_mix_scb;
1469         }
1470
1471         /* enable slots depending on CODEC configuration */
1472         snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1473
1474         /* the magic snooper */
1475         magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1476                                                              OUTPUT_SNOOP_BUFFER,
1477                                                              codec_out_scb,
1478                                                              clfe_codec_out_scb,
1479                                                              SCB_ON_PARENT_NEXT_SCB);
1480
1481
1482         if (!magic_snoop_scb) goto _fail_end;
1483         ins->ref_snoop_scb = magic_snoop_scb;
1484
1485         /* SP IO access */
1486         if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1487                                               magic_snoop_scb,
1488                                               SCB_ON_PARENT_NEXT_SCB))
1489                 goto _fail_end;
1490
1491         /* SPDIF input sampel rate converter */
1492         src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1493                                                       ins->spdif_in_sample_rate,
1494                                                       SRC_OUTPUT_BUF1,
1495                                                       SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1496                                                       master_mix_scb,
1497                                                       SCB_ON_PARENT_SUBLIST_SCB,1);
1498
1499         if (!src_task_scb) goto _fail_end;
1500         cs46xx_src_unlink(chip,src_task_scb);
1501
1502         /* NOTE: when we now how to detect the SPDIF input
1503            sample rate we will use this SRC to adjust it */
1504         ins->spdif_in_src = src_task_scb;
1505
1506         cs46xx_dsp_async_init(chip,timing_master_scb);
1507         return 0;
1508
1509  _fail_end:
1510         dev_err(chip->card->dev, "dsp_spos: failed to setup SCB's in DSP\n");
1511         return -EINVAL;
1512 }
1513
1514 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1515                                   struct dsp_scb_descriptor * fg_entry)
1516 {
1517         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1518         struct dsp_symbol_entry * s16_async_codec_input_task;
1519         struct dsp_symbol_entry * spdifo_task;
1520         struct dsp_symbol_entry * spdifi_task;
1521         struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1522
1523         s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1524         if (s16_async_codec_input_task == NULL) {
1525                 dev_err(chip->card->dev,
1526                         "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1527                 return -EIO;
1528         }
1529         spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1530         if (spdifo_task == NULL) {
1531                 dev_err(chip->card->dev,
1532                         "dsp_spos: symbol SPDIFOTASK not found\n");
1533                 return -EIO;
1534         }
1535
1536         spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1537         if (spdifi_task == NULL) {
1538                 dev_err(chip->card->dev,
1539                         "dsp_spos: symbol SPDIFITASK not found\n");
1540                 return -EIO;
1541         }
1542
1543         {
1544                 /* 0xBC0 */
1545                 struct dsp_spdifoscb spdifo_scb = {
1546                         /* 0 */ DSP_SPOS_UUUU,
1547                         {
1548                                 /* 1 */ 0xb0,
1549                                 /* 2 */ 0,
1550                                 /* 3 */ 0,
1551                                 /* 4 */ 0,
1552                         },
1553                         /* NOTE: the SPDIF output task read samples in mono
1554                            format, the AsynchFGTxSCB task writes to buffer
1555                            in stereo format
1556                         */
1557                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1558                         /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 )  |  0xFFFC,
1559                         /* 7 */ 0,0,
1560                         /* 8 */ 0,
1561                         /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
1562                         /* A */ spdifo_task->address,
1563                         SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1564                         {
1565                                 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1566                                 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1567                         },
1568                         /* D */ 0x804c,0,                                                         /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1569                         /* E */ 0x0108,0x0001,                                    /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1570                         /* F */ DSP_SPOS_UUUU                                     /* SPDIFOFree; */
1571                 };
1572
1573                 /* 0xBB0 */
1574                 struct dsp_spdifiscb spdifi_scb = {
1575                         /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1576                         /* 1 */ 0,
1577                         /* 2 */ 0,
1578                         /* 3 */ 1,4000,        /* SPDIFICountLimit SPDIFICount */
1579                         /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1580                         /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1581                         /* 6 */ DSP_SPOS_UUUU,  /* Free3 */
1582                         /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC,  /* Free2 BitCount*/
1583                         /* 8 */ DSP_SPOS_UUUU,  /* TempStatus */
1584                         /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1585                         /* A */ spdifi_task->address,
1586                         SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1587                         /* NOTE: The SPDIF input task write the sample in mono
1588                            format from the HW FIFO, the AsynchFGRxSCB task  reads
1589                            them in stereo
1590                         */
1591                         /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1592                         /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1593                         /* D */ 0x8048,0,
1594                         /* E */ 0x01f0,0x0001,
1595                         /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1596                 };
1597
1598                 /* 0xBA0 */
1599                 struct dsp_async_codec_input_scb async_codec_input_scb = {
1600                         /* 0 */ DSP_SPOS_UUUU,
1601                         /* 1 */ 0,
1602                         /* 2 */ 0,
1603                         /* 3 */ 1,4000,
1604                         /* 4 */ 0x0118,0x0001,
1605                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1606                         /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1607                         /* 7 */ DSP_SPOS_UU,0x3,
1608                         /* 8 */ DSP_SPOS_UUUU,
1609                         /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1610                         /* A */ s16_async_codec_input_task->address,
1611                         HFG_TREE_SCB + AsyncCIOFIFOPointer,
1612
1613                         /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1614                         /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10),  /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1615
1616 #ifdef UseASER1Input
1617                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1618                            Init. 0000:8042: for ASER1
1619                            0000:8044: for ASER2 */
1620                         /* D */ 0x8042,0,
1621
1622                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1623                            Init 1 stero:8050 ASER1
1624                            Init 0  mono:8070 ASER2
1625                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1626                         /* E */ 0x0100,0x0001,
1627
1628 #endif
1629
1630 #ifdef UseASER2Input
1631                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1632                            Init. 0000:8042: for ASER1
1633                            0000:8044: for ASER2 */
1634                         /* D */ 0x8044,0,
1635
1636                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1637                            Init 1 stero:8050 ASER1
1638                            Init 0  mono:8070 ASER2
1639                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1640                         /* E */ 0x0110,0x0001,
1641
1642 #endif
1643
1644                         /* short AsyncCIOutputBufModulo:AsyncCIFree;
1645                            AsyncCIOutputBufModulo: The modulo size for
1646                            the output buffer of this task */
1647                         /* F */ 0, /* DSP_SPOS_UUUU */
1648                 };
1649
1650                 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1651
1652                 if (snd_BUG_ON(!spdifo_scb_desc))
1653                         return -EIO;
1654                 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1655                 if (snd_BUG_ON(!spdifi_scb_desc))
1656                         return -EIO;
1657                 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1658                 if (snd_BUG_ON(!async_codec_scb_desc))
1659                         return -EIO;
1660
1661                 async_codec_scb_desc->parent_scb_ptr = NULL;
1662                 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1663                 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1664                 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1665
1666                 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1667                 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1668                 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1669                 spdifi_scb_desc->task_entry = spdifi_task;
1670
1671                 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1672                 spdifo_scb_desc->next_scb_ptr = fg_entry;
1673                 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1674                 spdifo_scb_desc->task_entry = spdifo_task;
1675
1676                 /* this one is faked, as the parnet of SPDIFO task
1677                    is the FG task tree */
1678                 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1679
1680                 /* for proc fs */
1681                 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1682                 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1683                 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1684
1685                 /* Async MASTER ENABLE, affects both SPDIF input and output */
1686                 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1687         }
1688
1689         return 0;
1690 }
1691
1692 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1693 {
1694         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1695
1696         /* set SPDIF output FIFO slot */
1697         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1698
1699         /* SPDIF output MASTER ENABLE */
1700         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1701
1702         /* right and left validate bit */
1703         /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1704         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1705
1706         /* clear fifo pointer */
1707         cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1708
1709         /* monitor state */
1710         ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1711 }
1712
1713 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1714 {
1715         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1716
1717         /* if hw-ctrl already enabled, turn off to reset logic ... */
1718         cs46xx_dsp_disable_spdif_hw (chip);
1719         udelay(50);
1720
1721         /* set SPDIF output FIFO slot */
1722         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1723
1724         /* SPDIF output MASTER ENABLE */
1725         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1726
1727         /* right and left validate bit */
1728         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1729
1730         /* monitor state */
1731         ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1732
1733         return 0;
1734 }
1735
1736 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1737 {
1738         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1739
1740         /* turn on amplifier */
1741         chip->active_ctrl(chip, 1);
1742         chip->amplifier_ctrl(chip, 1);
1743
1744         if (snd_BUG_ON(ins->asynch_rx_scb))
1745                 return -EINVAL;
1746         if (snd_BUG_ON(!ins->spdif_in_src))
1747                 return -EINVAL;
1748
1749         mutex_lock(&chip->spos_mutex);
1750
1751         if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1752                 /* time countdown enable */
1753                 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1754                 /* NOTE: 80000005 value is just magic. With all values
1755                    that I've tested this one seem to give the best result.
1756                    Got no explication why. (Benny) */
1757
1758                 /* SPDIF input MASTER ENABLE */
1759                 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1760
1761                 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1762         }
1763
1764         /* create and start the asynchronous receiver SCB */
1765         ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1766                                                                 ASYNCRX_SCB_ADDR,
1767                                                                 SPDIFI_SCB_INST,
1768                                                                 SPDIFI_IP_OUTPUT_BUFFER1,
1769                                                                 ins->spdif_in_src,
1770                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1771
1772         spin_lock_irq(&chip->reg_lock);
1773
1774         /* reset SPDIF input sample buffer pointer */
1775         /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1776           (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1777
1778         /* reset FIFO ptr */
1779         /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1780         cs46xx_src_link(chip,ins->spdif_in_src);
1781
1782         /* unmute SRC volume */
1783         cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1784
1785         spin_unlock_irq(&chip->reg_lock);
1786
1787         /* set SPDIF input sample rate and unmute
1788            NOTE: only 48khz support for SPDIF input this time */
1789         /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1790
1791         /* monitor state */
1792         ins->spdif_status_in = 1;
1793         mutex_unlock(&chip->spos_mutex);
1794
1795         return 0;
1796 }
1797
1798 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1799 {
1800         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1801
1802         if (snd_BUG_ON(!ins->asynch_rx_scb))
1803                 return -EINVAL;
1804         if (snd_BUG_ON(!ins->spdif_in_src))
1805                 return -EINVAL;
1806
1807         mutex_lock(&chip->spos_mutex);
1808
1809         /* Remove the asynchronous receiver SCB */
1810         cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
1811         ins->asynch_rx_scb = NULL;
1812
1813         cs46xx_src_unlink(chip,ins->spdif_in_src);
1814
1815         /* monitor state */
1816         ins->spdif_status_in = 0;
1817         mutex_unlock(&chip->spos_mutex);
1818
1819         /* restore amplifier */
1820         chip->active_ctrl(chip, -1);
1821         chip->amplifier_ctrl(chip, -1);
1822
1823         return 0;
1824 }
1825
1826 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1827 {
1828         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1829
1830         if (snd_BUG_ON(ins->pcm_input))
1831                 return -EINVAL;
1832         if (snd_BUG_ON(!ins->ref_snoop_scb))
1833                 return -EINVAL;
1834
1835         mutex_lock(&chip->spos_mutex);
1836         ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1837                                                   "PCMSerialInput_Wave");
1838         mutex_unlock(&chip->spos_mutex);
1839
1840         return 0;
1841 }
1842
1843 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1844 {
1845         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1846
1847         if (snd_BUG_ON(!ins->pcm_input))
1848                 return -EINVAL;
1849
1850         mutex_lock(&chip->spos_mutex);
1851         cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1852         ins->pcm_input = NULL;
1853         mutex_unlock(&chip->spos_mutex);
1854
1855         return 0;
1856 }
1857
1858 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1859 {
1860         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1861
1862         if (snd_BUG_ON(ins->adc_input))
1863                 return -EINVAL;
1864         if (snd_BUG_ON(!ins->codec_in_scb))
1865                 return -EINVAL;
1866
1867         mutex_lock(&chip->spos_mutex);
1868         ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1869                                                   "PCMSerialInput_ADC");
1870         mutex_unlock(&chip->spos_mutex);
1871
1872         return 0;
1873 }
1874
1875 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1876 {
1877         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1878
1879         if (snd_BUG_ON(!ins->adc_input))
1880                 return -EINVAL;
1881
1882         mutex_lock(&chip->spos_mutex);
1883         cs46xx_dsp_remove_scb (chip,ins->adc_input);
1884         ins->adc_input = NULL;
1885         mutex_unlock(&chip->spos_mutex);
1886
1887         return 0;
1888 }
1889
1890 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1891 {
1892         u32 temp;
1893         int  i;
1894
1895         /* santiy check the parameters.  (These numbers are not 100% correct.  They are
1896            a rough guess from looking at the controller spec.) */
1897         if (address < 0x8000 || address >= 0x9000)
1898                 return -EINVAL;
1899
1900         /* initialize the SP_IO_WRITE SCB with the data. */
1901         temp = ( address << 16 ) | ( address & 0x0000FFFF);   /* offset 0 <-- address2 : address1 */
1902
1903         snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR      << 2), temp);
1904         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1905         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1906
1907         /* Poke this location to tell the task to start */
1908         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1909
1910         /* Verify that the task ran */
1911         for (i=0; i<25; i++) {
1912                 udelay(125);
1913
1914                 temp =  snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1915                 if (temp == 0x00000000)
1916                         break;
1917         }
1918
1919         if (i == 25) {
1920                 dev_err(chip->card->dev,
1921                         "dsp_spos: SPIOWriteTask not responding\n");
1922                 return -EBUSY;
1923         }
1924
1925         return 0;
1926 }
1927
1928 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1929 {
1930         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1931         struct dsp_scb_descriptor * scb;
1932
1933         mutex_lock(&chip->spos_mutex);
1934
1935         /* main output */
1936         scb = ins->master_mix_scb->sub_list_ptr;
1937         while (scb != ins->the_null_scb) {
1938                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1939                 scb = scb->next_scb_ptr;
1940         }
1941
1942         /* rear output */
1943         scb = ins->rear_mix_scb->sub_list_ptr;
1944         while (scb != ins->the_null_scb) {
1945                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1946                 scb = scb->next_scb_ptr;
1947         }
1948
1949         ins->dac_volume_left = left;
1950         ins->dac_volume_right = right;
1951
1952         mutex_unlock(&chip->spos_mutex);
1953
1954         return 0;
1955 }
1956
1957 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1958 {
1959         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1960
1961         mutex_lock(&chip->spos_mutex);
1962
1963         if (ins->asynch_rx_scb != NULL)
1964                 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1965                                            left,right);
1966
1967         ins->spdif_input_volume_left = left;
1968         ins->spdif_input_volume_right = right;
1969
1970         mutex_unlock(&chip->spos_mutex);
1971
1972         return 0;
1973 }
1974
1975 #ifdef CONFIG_PM_SLEEP
1976 int cs46xx_dsp_resume(struct snd_cs46xx * chip)
1977 {
1978         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1979         int i, err;
1980
1981         /* clear parameter, sample and code areas */
1982         snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET,
1983                              DSP_PARAMETER_BYTE_SIZE);
1984         snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET,
1985                              DSP_SAMPLE_BYTE_SIZE);
1986         snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
1987
1988         for (i = 0; i < ins->nmodules; i++) {
1989                 struct dsp_module_desc *module = &ins->modules[i];
1990                 struct dsp_segment_desc *seg;
1991                 u32 doffset, dsize;
1992
1993                 seg = get_segment_desc(module, SEGTYPE_SP_PARAMETER);
1994                 err = dsp_load_parameter(chip, seg);
1995                 if (err < 0)
1996                         return err;
1997
1998                 seg = get_segment_desc(module, SEGTYPE_SP_SAMPLE);
1999                 err = dsp_load_sample(chip, seg);
2000                 if (err < 0)
2001                         return err;
2002
2003                 seg = get_segment_desc(module, SEGTYPE_SP_PROGRAM);
2004                 if (!seg)
2005                         continue;
2006
2007                 doffset = seg->offset * 4 + module->load_address * 4
2008                         + DSP_CODE_BYTE_OFFSET;
2009                 dsize   = seg->size * 4;
2010                 err = snd_cs46xx_download(chip,
2011                                           ins->code.data + module->load_address,
2012                                           doffset, dsize);
2013                 if (err < 0)
2014                         return err;
2015         }
2016
2017         for (i = 0; i < ins->ntask; i++) {
2018                 struct dsp_task_descriptor *t = &ins->tasks[i];
2019                 _dsp_create_task_tree(chip, t->data, t->address, t->size);
2020         }
2021
2022         for (i = 0; i < ins->nscb; i++) {
2023                 struct dsp_scb_descriptor *s = &ins->scbs[i];
2024                 if (s->deleted)
2025                         continue;
2026                 _dsp_create_scb(chip, s->data, s->address);
2027         }
2028         for (i = 0; i < ins->nscb; i++) {
2029                 struct dsp_scb_descriptor *s = &ins->scbs[i];
2030                 if (s->deleted)
2031                         continue;
2032                 if (s->updated)
2033                         cs46xx_dsp_spos_update_scb(chip, s);
2034                 if (s->volume_set)
2035                         cs46xx_dsp_scb_set_volume(chip, s,
2036                                                   s->volume[0], s->volume[1]);
2037         }
2038         if (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) {
2039                 cs46xx_dsp_enable_spdif_hw(chip);
2040                 snd_cs46xx_poke(chip, (ins->ref_snoop_scb->address + 2) << 2,
2041                                 (OUTPUT_SNOOP_BUFFER + 0x10) << 0x10);
2042                 if (ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN)
2043                         cs46xx_poke_via_dsp(chip, SP_SPDOUT_CSUV,
2044                                             ins->spdif_csuv_stream);
2045         }
2046         if (chip->dsp_spos_instance->spdif_status_in) {
2047                 cs46xx_poke_via_dsp(chip, SP_ASER_COUNTDOWN, 0x80000005);
2048                 cs46xx_poke_via_dsp(chip, SP_SPDIN_CONTROL, 0x800003ff);
2049         }
2050         return 0;
2051 }
2052 #endif