1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_DMA_MAPPING_H
3 #define _LINUX_DMA_MAPPING_H
5 #include <linux/sizes.h>
6 #include <linux/string.h>
7 #include <linux/device.h>
9 #include <linux/dma-debug.h>
10 #include <linux/dma-direction.h>
11 #include <linux/scatterlist.h>
12 #include <linux/bug.h>
13 #include <linux/mem_encrypt.h>
16 * List of possible attributes associated with a DMA mapping. The semantics
17 * of each attribute should be defined in Documentation/DMA-attributes.txt.
21 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping
22 * may be weakly ordered, that is that reads and writes may pass each other.
24 #define DMA_ATTR_WEAK_ORDERING (1UL << 1)
26 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be
27 * buffered to improve performance.
29 #define DMA_ATTR_WRITE_COMBINE (1UL << 2)
31 * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either
32 * consistent or non-consistent memory as it sees fit.
34 #define DMA_ATTR_NON_CONSISTENT (1UL << 3)
36 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel
37 * virtual mapping for the allocated buffer.
39 #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4)
41 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of
42 * the CPU cache for the given buffer assuming that it has been already
43 * transferred to 'device' domain.
45 #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5)
47 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer
50 #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6)
52 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
53 * that it's probably not worth the time to try to allocate memory to in a way
54 * that gives better TLB efficiency.
56 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7)
58 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress
59 * allocation failure reports (similarly to __GFP_NOWARN).
61 #define DMA_ATTR_NO_WARN (1UL << 8)
64 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully
65 * accessible at an elevated privilege level (and ideally inaccessible or
66 * at least read-only at lesser-privileged levels).
68 #define DMA_ATTR_PRIVILEGED (1UL << 9)
71 * A dma_addr_t can hold any valid DMA or bus address for the platform.
72 * It can be given to a device to use as a DMA source or target. A CPU cannot
73 * reference a dma_addr_t directly because there may be translation between
74 * its physical address space and the bus address space.
77 void* (*alloc)(struct device *dev, size_t size,
78 dma_addr_t *dma_handle, gfp_t gfp,
80 void (*free)(struct device *dev, size_t size,
81 void *vaddr, dma_addr_t dma_handle,
83 int (*mmap)(struct device *, struct vm_area_struct *,
84 void *, dma_addr_t, size_t,
87 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
88 dma_addr_t, size_t, unsigned long attrs);
90 dma_addr_t (*map_page)(struct device *dev, struct page *page,
91 unsigned long offset, size_t size,
92 enum dma_data_direction dir,
94 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
95 size_t size, enum dma_data_direction dir,
98 * map_sg returns 0 on error and a value > 0 on success.
99 * It should never return a value < 0.
101 int (*map_sg)(struct device *dev, struct scatterlist *sg,
102 int nents, enum dma_data_direction dir,
103 unsigned long attrs);
104 void (*unmap_sg)(struct device *dev,
105 struct scatterlist *sg, int nents,
106 enum dma_data_direction dir,
107 unsigned long attrs);
108 dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr,
109 size_t size, enum dma_data_direction dir,
110 unsigned long attrs);
111 void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle,
112 size_t size, enum dma_data_direction dir,
113 unsigned long attrs);
114 void (*sync_single_for_cpu)(struct device *dev,
115 dma_addr_t dma_handle, size_t size,
116 enum dma_data_direction dir);
117 void (*sync_single_for_device)(struct device *dev,
118 dma_addr_t dma_handle, size_t size,
119 enum dma_data_direction dir);
120 void (*sync_sg_for_cpu)(struct device *dev,
121 struct scatterlist *sg, int nents,
122 enum dma_data_direction dir);
123 void (*sync_sg_for_device)(struct device *dev,
124 struct scatterlist *sg, int nents,
125 enum dma_data_direction dir);
126 void (*cache_sync)(struct device *dev, void *vaddr, size_t size,
127 enum dma_data_direction direction);
128 int (*dma_supported)(struct device *dev, u64 mask);
129 u64 (*get_required_mask)(struct device *dev);
130 size_t (*max_mapping_size)(struct device *dev);
131 unsigned long (*get_merge_boundary)(struct device *dev);
134 #define DMA_MAPPING_ERROR (~(dma_addr_t)0)
136 extern const struct dma_map_ops dma_virt_ops;
137 extern const struct dma_map_ops dma_dummy_ops;
139 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
141 #define DMA_MASK_NONE 0x0ULL
143 static inline int valid_dma_direction(int dma_direction)
145 return ((dma_direction == DMA_BIDIRECTIONAL) ||
146 (dma_direction == DMA_TO_DEVICE) ||
147 (dma_direction == DMA_FROM_DEVICE));
150 #ifdef CONFIG_DMA_DECLARE_COHERENT
152 * These three functions are only for dma allocator.
153 * Don't use them in device drivers.
155 int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
156 dma_addr_t *dma_handle, void **ret);
157 int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
159 int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma,
160 void *cpu_addr, size_t size, int *ret);
162 void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle);
163 int dma_release_from_global_coherent(int order, void *vaddr);
164 int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr,
165 size_t size, int *ret);
168 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
169 #define dma_release_from_dev_coherent(dev, order, vaddr) (0)
170 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
172 static inline void *dma_alloc_from_global_coherent(ssize_t size,
173 dma_addr_t *dma_handle)
178 static inline int dma_release_from_global_coherent(int order, void *vaddr)
183 static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
184 void *cpu_addr, size_t size,
189 #endif /* CONFIG_DMA_DECLARE_COHERENT */
191 static inline bool dma_is_direct(const struct dma_map_ops *ops)
197 * All the dma_direct_* declarations are here just for the indirect call bypass,
198 * and must not be used directly drivers!
200 dma_addr_t dma_direct_map_page(struct device *dev, struct page *page,
201 unsigned long offset, size_t size, enum dma_data_direction dir,
202 unsigned long attrs);
203 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
204 enum dma_data_direction dir, unsigned long attrs);
205 dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr,
206 size_t size, enum dma_data_direction dir, unsigned long attrs);
208 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
209 defined(CONFIG_SWIOTLB)
210 void dma_direct_sync_single_for_device(struct device *dev,
211 dma_addr_t addr, size_t size, enum dma_data_direction dir);
212 void dma_direct_sync_sg_for_device(struct device *dev,
213 struct scatterlist *sgl, int nents, enum dma_data_direction dir);
215 static inline void dma_direct_sync_single_for_device(struct device *dev,
216 dma_addr_t addr, size_t size, enum dma_data_direction dir)
219 static inline void dma_direct_sync_sg_for_device(struct device *dev,
220 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
225 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
226 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
227 defined(CONFIG_SWIOTLB)
228 void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
229 size_t size, enum dma_data_direction dir, unsigned long attrs);
230 void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
231 int nents, enum dma_data_direction dir, unsigned long attrs);
232 void dma_direct_sync_single_for_cpu(struct device *dev,
233 dma_addr_t addr, size_t size, enum dma_data_direction dir);
234 void dma_direct_sync_sg_for_cpu(struct device *dev,
235 struct scatterlist *sgl, int nents, enum dma_data_direction dir);
237 static inline void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
238 size_t size, enum dma_data_direction dir, unsigned long attrs)
241 static inline void dma_direct_unmap_sg(struct device *dev,
242 struct scatterlist *sgl, int nents, enum dma_data_direction dir,
246 static inline void dma_direct_sync_single_for_cpu(struct device *dev,
247 dma_addr_t addr, size_t size, enum dma_data_direction dir)
250 static inline void dma_direct_sync_sg_for_cpu(struct device *dev,
251 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
256 size_t dma_direct_max_mapping_size(struct device *dev);
258 #ifdef CONFIG_HAS_DMA
259 #include <asm/dma-mapping.h>
261 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
265 return get_arch_dma_ops(dev->bus);
268 static inline void set_dma_ops(struct device *dev,
269 const struct dma_map_ops *dma_ops)
271 dev->dma_ops = dma_ops;
274 static inline dma_addr_t dma_map_page_attrs(struct device *dev,
275 struct page *page, size_t offset, size_t size,
276 enum dma_data_direction dir, unsigned long attrs)
278 const struct dma_map_ops *ops = get_dma_ops(dev);
281 BUG_ON(!valid_dma_direction(dir));
282 if (dma_is_direct(ops))
283 addr = dma_direct_map_page(dev, page, offset, size, dir, attrs);
285 addr = ops->map_page(dev, page, offset, size, dir, attrs);
286 debug_dma_map_page(dev, page, offset, size, dir, addr);
291 static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr,
292 size_t size, enum dma_data_direction dir, unsigned long attrs)
294 const struct dma_map_ops *ops = get_dma_ops(dev);
296 BUG_ON(!valid_dma_direction(dir));
297 if (dma_is_direct(ops))
298 dma_direct_unmap_page(dev, addr, size, dir, attrs);
299 else if (ops->unmap_page)
300 ops->unmap_page(dev, addr, size, dir, attrs);
301 debug_dma_unmap_page(dev, addr, size, dir);
305 * dma_maps_sg_attrs returns 0 on error and > 0 on success.
306 * It should never return a value < 0.
308 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
309 int nents, enum dma_data_direction dir,
312 const struct dma_map_ops *ops = get_dma_ops(dev);
315 BUG_ON(!valid_dma_direction(dir));
316 if (dma_is_direct(ops))
317 ents = dma_direct_map_sg(dev, sg, nents, dir, attrs);
319 ents = ops->map_sg(dev, sg, nents, dir, attrs);
321 debug_dma_map_sg(dev, sg, nents, ents, dir);
326 static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
327 int nents, enum dma_data_direction dir,
330 const struct dma_map_ops *ops = get_dma_ops(dev);
332 BUG_ON(!valid_dma_direction(dir));
333 debug_dma_unmap_sg(dev, sg, nents, dir);
334 if (dma_is_direct(ops))
335 dma_direct_unmap_sg(dev, sg, nents, dir, attrs);
336 else if (ops->unmap_sg)
337 ops->unmap_sg(dev, sg, nents, dir, attrs);
340 static inline dma_addr_t dma_map_resource(struct device *dev,
341 phys_addr_t phys_addr,
343 enum dma_data_direction dir,
346 const struct dma_map_ops *ops = get_dma_ops(dev);
347 dma_addr_t addr = DMA_MAPPING_ERROR;
349 BUG_ON(!valid_dma_direction(dir));
351 /* Don't allow RAM to be mapped */
352 if (WARN_ON_ONCE(pfn_valid(PHYS_PFN(phys_addr))))
353 return DMA_MAPPING_ERROR;
355 if (dma_is_direct(ops))
356 addr = dma_direct_map_resource(dev, phys_addr, size, dir, attrs);
357 else if (ops->map_resource)
358 addr = ops->map_resource(dev, phys_addr, size, dir, attrs);
360 debug_dma_map_resource(dev, phys_addr, size, dir, addr);
364 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
365 size_t size, enum dma_data_direction dir,
368 const struct dma_map_ops *ops = get_dma_ops(dev);
370 BUG_ON(!valid_dma_direction(dir));
371 if (!dma_is_direct(ops) && ops->unmap_resource)
372 ops->unmap_resource(dev, addr, size, dir, attrs);
373 debug_dma_unmap_resource(dev, addr, size, dir);
376 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
378 enum dma_data_direction dir)
380 const struct dma_map_ops *ops = get_dma_ops(dev);
382 BUG_ON(!valid_dma_direction(dir));
383 if (dma_is_direct(ops))
384 dma_direct_sync_single_for_cpu(dev, addr, size, dir);
385 else if (ops->sync_single_for_cpu)
386 ops->sync_single_for_cpu(dev, addr, size, dir);
387 debug_dma_sync_single_for_cpu(dev, addr, size, dir);
390 static inline void dma_sync_single_for_device(struct device *dev,
391 dma_addr_t addr, size_t size,
392 enum dma_data_direction dir)
394 const struct dma_map_ops *ops = get_dma_ops(dev);
396 BUG_ON(!valid_dma_direction(dir));
397 if (dma_is_direct(ops))
398 dma_direct_sync_single_for_device(dev, addr, size, dir);
399 else if (ops->sync_single_for_device)
400 ops->sync_single_for_device(dev, addr, size, dir);
401 debug_dma_sync_single_for_device(dev, addr, size, dir);
405 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
406 int nelems, enum dma_data_direction dir)
408 const struct dma_map_ops *ops = get_dma_ops(dev);
410 BUG_ON(!valid_dma_direction(dir));
411 if (dma_is_direct(ops))
412 dma_direct_sync_sg_for_cpu(dev, sg, nelems, dir);
413 else if (ops->sync_sg_for_cpu)
414 ops->sync_sg_for_cpu(dev, sg, nelems, dir);
415 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
419 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
420 int nelems, enum dma_data_direction dir)
422 const struct dma_map_ops *ops = get_dma_ops(dev);
424 BUG_ON(!valid_dma_direction(dir));
425 if (dma_is_direct(ops))
426 dma_direct_sync_sg_for_device(dev, sg, nelems, dir);
427 else if (ops->sync_sg_for_device)
428 ops->sync_sg_for_device(dev, sg, nelems, dir);
429 debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
433 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
435 debug_dma_mapping_error(dev, dma_addr);
437 if (dma_addr == DMA_MAPPING_ERROR)
442 void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
443 gfp_t flag, unsigned long attrs);
444 void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
445 dma_addr_t dma_handle, unsigned long attrs);
446 void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
447 gfp_t gfp, unsigned long attrs);
448 void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
449 dma_addr_t dma_handle);
450 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
451 enum dma_data_direction dir);
452 int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
453 void *cpu_addr, dma_addr_t dma_addr, size_t size,
454 unsigned long attrs);
455 int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
456 void *cpu_addr, dma_addr_t dma_addr, size_t size,
457 unsigned long attrs);
458 bool dma_can_mmap(struct device *dev);
459 int dma_supported(struct device *dev, u64 mask);
460 int dma_set_mask(struct device *dev, u64 mask);
461 int dma_set_coherent_mask(struct device *dev, u64 mask);
462 u64 dma_get_required_mask(struct device *dev);
463 size_t dma_max_mapping_size(struct device *dev);
464 unsigned long dma_get_merge_boundary(struct device *dev);
465 #else /* CONFIG_HAS_DMA */
466 static inline dma_addr_t dma_map_page_attrs(struct device *dev,
467 struct page *page, size_t offset, size_t size,
468 enum dma_data_direction dir, unsigned long attrs)
470 return DMA_MAPPING_ERROR;
472 static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr,
473 size_t size, enum dma_data_direction dir, unsigned long attrs)
476 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
477 int nents, enum dma_data_direction dir, unsigned long attrs)
481 static inline void dma_unmap_sg_attrs(struct device *dev,
482 struct scatterlist *sg, int nents, enum dma_data_direction dir,
486 static inline dma_addr_t dma_map_resource(struct device *dev,
487 phys_addr_t phys_addr, size_t size, enum dma_data_direction dir,
490 return DMA_MAPPING_ERROR;
492 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
493 size_t size, enum dma_data_direction dir, unsigned long attrs)
496 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
497 size_t size, enum dma_data_direction dir)
500 static inline void dma_sync_single_for_device(struct device *dev,
501 dma_addr_t addr, size_t size, enum dma_data_direction dir)
504 static inline void dma_sync_sg_for_cpu(struct device *dev,
505 struct scatterlist *sg, int nelems, enum dma_data_direction dir)
508 static inline void dma_sync_sg_for_device(struct device *dev,
509 struct scatterlist *sg, int nelems, enum dma_data_direction dir)
512 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
516 static inline void *dma_alloc_attrs(struct device *dev, size_t size,
517 dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs)
521 static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
522 dma_addr_t dma_handle, unsigned long attrs)
525 static inline void *dmam_alloc_attrs(struct device *dev, size_t size,
526 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
530 static inline void dmam_free_coherent(struct device *dev, size_t size,
531 void *vaddr, dma_addr_t dma_handle)
534 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
535 enum dma_data_direction dir)
538 static inline int dma_get_sgtable_attrs(struct device *dev,
539 struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr,
540 size_t size, unsigned long attrs)
544 static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
545 void *cpu_addr, dma_addr_t dma_addr, size_t size,
550 static inline bool dma_can_mmap(struct device *dev)
554 static inline int dma_supported(struct device *dev, u64 mask)
558 static inline int dma_set_mask(struct device *dev, u64 mask)
562 static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
566 static inline u64 dma_get_required_mask(struct device *dev)
570 static inline size_t dma_max_mapping_size(struct device *dev)
574 static inline unsigned long dma_get_merge_boundary(struct device *dev)
578 #endif /* CONFIG_HAS_DMA */
580 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
581 size_t size, enum dma_data_direction dir, unsigned long attrs)
583 debug_dma_map_single(dev, ptr, size);
584 return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr),
588 static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
589 size_t size, enum dma_data_direction dir, unsigned long attrs)
591 return dma_unmap_page_attrs(dev, addr, size, dir, attrs);
594 static inline void dma_sync_single_range_for_cpu(struct device *dev,
595 dma_addr_t addr, unsigned long offset, size_t size,
596 enum dma_data_direction dir)
598 return dma_sync_single_for_cpu(dev, addr + offset, size, dir);
601 static inline void dma_sync_single_range_for_device(struct device *dev,
602 dma_addr_t addr, unsigned long offset, size_t size,
603 enum dma_data_direction dir)
605 return dma_sync_single_for_device(dev, addr + offset, size, dir);
608 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0)
609 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0)
610 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0)
611 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0)
612 #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0)
613 #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0)
614 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0)
615 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0)
617 extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
618 void *cpu_addr, dma_addr_t dma_addr, size_t size,
619 unsigned long attrs);
621 struct page **dma_common_find_pages(void *cpu_addr);
622 void *dma_common_contiguous_remap(struct page *page, size_t size,
623 pgprot_t prot, const void *caller);
625 void *dma_common_pages_remap(struct page **pages, size_t size,
626 pgprot_t prot, const void *caller);
627 void dma_common_free_remap(void *cpu_addr, size_t size);
629 bool dma_in_atomic_pool(void *start, size_t size);
630 void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags);
631 bool dma_free_from_pool(void *start, size_t size);
634 dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, void *cpu_addr,
635 dma_addr_t dma_addr, size_t size, unsigned long attrs);
637 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
638 dma_addr_t *dma_handle, gfp_t gfp)
641 return dma_alloc_attrs(dev, size, dma_handle, gfp,
642 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
645 static inline void dma_free_coherent(struct device *dev, size_t size,
646 void *cpu_addr, dma_addr_t dma_handle)
648 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0);
652 static inline u64 dma_get_mask(struct device *dev)
654 if (dev->dma_mask && *dev->dma_mask)
655 return *dev->dma_mask;
656 return DMA_BIT_MASK(32);
660 * Set both the DMA mask and the coherent DMA mask to the same thing.
661 * Note that we don't check the return value from dma_set_coherent_mask()
662 * as the DMA API guarantees that the coherent DMA mask can be set to
663 * the same or smaller than the streaming DMA mask.
665 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
667 int rc = dma_set_mask(dev, mask);
669 dma_set_coherent_mask(dev, mask);
674 * Similar to the above, except it deals with the case where the device
675 * does not have dev->dma_mask appropriately setup.
677 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
679 dev->dma_mask = &dev->coherent_dma_mask;
680 return dma_set_mask_and_coherent(dev, mask);
684 * dma_addressing_limited - return if the device is addressing limited
685 * @dev: device to check
687 * Return %true if the devices DMA mask is too small to address all memory in
688 * the system, else %false. Lack of addressing bits is the prime reason for
689 * bounce buffering, but might not be the only one.
691 static inline bool dma_addressing_limited(struct device *dev)
693 return min_not_zero(dma_get_mask(dev), dev->bus_dma_mask) <
694 dma_get_required_mask(dev);
697 #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
698 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
699 const struct iommu_ops *iommu, bool coherent);
701 static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
702 u64 size, const struct iommu_ops *iommu, bool coherent)
705 #endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */
707 #ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS
708 void arch_teardown_dma_ops(struct device *dev);
710 static inline void arch_teardown_dma_ops(struct device *dev)
713 #endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */
715 static inline unsigned int dma_get_max_seg_size(struct device *dev)
717 if (dev->dma_parms && dev->dma_parms->max_segment_size)
718 return dev->dma_parms->max_segment_size;
722 static inline int dma_set_max_seg_size(struct device *dev, unsigned int size)
724 if (dev->dma_parms) {
725 dev->dma_parms->max_segment_size = size;
731 static inline unsigned long dma_get_seg_boundary(struct device *dev)
733 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask)
734 return dev->dma_parms->segment_boundary_mask;
735 return DMA_BIT_MASK(32);
738 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
740 if (dev->dma_parms) {
741 dev->dma_parms->segment_boundary_mask = mask;
747 static inline int dma_get_cache_alignment(void)
749 #ifdef ARCH_DMA_MINALIGN
750 return ARCH_DMA_MINALIGN;
755 #ifdef CONFIG_DMA_DECLARE_COHERENT
756 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
757 dma_addr_t device_addr, size_t size);
760 dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
761 dma_addr_t device_addr, size_t size)
765 #endif /* CONFIG_DMA_DECLARE_COHERENT */
767 static inline void *dmam_alloc_coherent(struct device *dev, size_t size,
768 dma_addr_t *dma_handle, gfp_t gfp)
770 return dmam_alloc_attrs(dev, size, dma_handle, gfp,
771 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
774 static inline void *dma_alloc_wc(struct device *dev, size_t size,
775 dma_addr_t *dma_addr, gfp_t gfp)
777 unsigned long attrs = DMA_ATTR_WRITE_COMBINE;
779 if (gfp & __GFP_NOWARN)
780 attrs |= DMA_ATTR_NO_WARN;
782 return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs);
785 static inline void dma_free_wc(struct device *dev, size_t size,
786 void *cpu_addr, dma_addr_t dma_addr)
788 return dma_free_attrs(dev, size, cpu_addr, dma_addr,
789 DMA_ATTR_WRITE_COMBINE);
792 static inline int dma_mmap_wc(struct device *dev,
793 struct vm_area_struct *vma,
794 void *cpu_addr, dma_addr_t dma_addr,
797 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size,
798 DMA_ATTR_WRITE_COMBINE);
801 #ifdef CONFIG_NEED_DMA_MAP_STATE
802 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
803 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
804 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
805 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
806 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
807 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
809 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
810 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
811 #define dma_unmap_addr(PTR, ADDR_NAME) (0)
812 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
813 #define dma_unmap_len(PTR, LEN_NAME) (0)
814 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)