clk: qcom: Add support for APQ8064 multimedia clocks
[sfrench/cifs-2.6.git] / include / dt-bindings / reset / qcom,mmcc-msm8960.h
1 /*
2  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
3  *
4  * This software is licensed under the terms of the GNU General Public
5  * License version 2, as published by the Free Software Foundation, and
6  * may be copied, distributed, and modified under those terms.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  */
13
14 #ifndef _DT_BINDINGS_RESET_MSM_MMCC_8960_H
15 #define _DT_BINDINGS_RESET_MSM_MMCC_8960_H
16
17 #define VPE_AXI_RESET                                   0
18 #define IJPEG_AXI_RESET                                 1
19 #define MPD_AXI_RESET                                   2
20 #define VFE_AXI_RESET                                   3
21 #define SP_AXI_RESET                                    4
22 #define VCODEC_AXI_RESET                                5
23 #define ROT_AXI_RESET                                   6
24 #define VCODEC_AXI_A_RESET                              7
25 #define VCODEC_AXI_B_RESET                              8
26 #define FAB_S3_AXI_RESET                                9
27 #define FAB_S2_AXI_RESET                                10
28 #define FAB_S1_AXI_RESET                                11
29 #define FAB_S0_AXI_RESET                                12
30 #define SMMU_GFX3D_ABH_RESET                            13
31 #define SMMU_VPE_AHB_RESET                              14
32 #define SMMU_VFE_AHB_RESET                              15
33 #define SMMU_ROT_AHB_RESET                              16
34 #define SMMU_VCODEC_B_AHB_RESET                         17
35 #define SMMU_VCODEC_A_AHB_RESET                         18
36 #define SMMU_MDP1_AHB_RESET                             19
37 #define SMMU_MDP0_AHB_RESET                             20
38 #define SMMU_JPEGD_AHB_RESET                            21
39 #define SMMU_IJPEG_AHB_RESET                            22
40 #define SMMU_GFX2D0_AHB_RESET                           23
41 #define SMMU_GFX2D1_AHB_RESET                           24
42 #define APU_AHB_RESET                                   25
43 #define CSI_AHB_RESET                                   26
44 #define TV_ENC_AHB_RESET                                27
45 #define VPE_AHB_RESET                                   28
46 #define FABRIC_AHB_RESET                                29
47 #define GFX2D0_AHB_RESET                                30
48 #define GFX2D1_AHB_RESET                                31
49 #define GFX3D_AHB_RESET                                 32
50 #define HDMI_AHB_RESET                                  33
51 #define MSSS_IMEM_AHB_RESET                             34
52 #define IJPEG_AHB_RESET                                 35
53 #define DSI_M_AHB_RESET                                 36
54 #define DSI_S_AHB_RESET                                 37
55 #define JPEGD_AHB_RESET                                 38
56 #define MDP_AHB_RESET                                   39
57 #define ROT_AHB_RESET                                   40
58 #define VCODEC_AHB_RESET                                41
59 #define VFE_AHB_RESET                                   42
60 #define DSI2_M_AHB_RESET                                43
61 #define DSI2_S_AHB_RESET                                44
62 #define CSIPHY2_RESET                                   45
63 #define CSI_PIX1_RESET                                  46
64 #define CSIPHY0_RESET                                   47
65 #define CSIPHY1_RESET                                   48
66 #define DSI2_RESET                                      49
67 #define VFE_CSI_RESET                                   50
68 #define MDP_RESET                                       51
69 #define AMP_RESET                                       52
70 #define JPEGD_RESET                                     53
71 #define CSI1_RESET                                      54
72 #define VPE_RESET                                       55
73 #define MMSS_FABRIC_RESET                               56
74 #define VFE_RESET                                       57
75 #define GFX2D0_RESET                                    58
76 #define GFX2D1_RESET                                    59
77 #define GFX3D_RESET                                     60
78 #define HDMI_RESET                                      61
79 #define MMSS_IMEM_RESET                                 62
80 #define IJPEG_RESET                                     63
81 #define CSI0_RESET                                      64
82 #define DSI_RESET                                       65
83 #define VCODEC_RESET                                    66
84 #define MDP_TV_RESET                                    67
85 #define MDP_VSYNC_RESET                                 68
86 #define ROT_RESET                                       69
87 #define TV_HDMI_RESET                                   70
88 #define TV_ENC_RESET                                    71
89 #define CSI2_RESET                                      72
90 #define CSI_RDI1_RESET                                  73
91 #define CSI_RDI2_RESET                                  74
92 #define GFX3D_AXI_RESET                                 75
93 #define VCAP_AXI_RESET                                  76
94 #define SMMU_VCAP_AHB_RESET                             77
95 #define VCAP_AHB_RESET                                  78
96 #define CSI_RDI_RESET                                   79
97 #define CSI_PIX_RESET                                   80
98 #define VCAP_NPL_RESET                                  81
99 #define VCAP_RESET                                      82
100
101 #endif