Merge remote-tracking branch 'regulator/fix/qcom-spmi' into regulator-linus
[sfrench/cifs-2.6.git] / include / clocksource / arm_arch_timer.h
1 /*
2  * Copyright (C) 2012 ARM Ltd.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  *
13  * You should have received a copy of the GNU General Public License
14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
15  */
16 #ifndef __CLKSOURCE_ARM_ARCH_TIMER_H
17 #define __CLKSOURCE_ARM_ARCH_TIMER_H
18
19 #include <linux/bitops.h>
20 #include <linux/timecounter.h>
21 #include <linux/types.h>
22
23 #define ARCH_TIMER_TYPE_CP15            BIT(0)
24 #define ARCH_TIMER_TYPE_MEM             BIT(1)
25
26 #define ARCH_TIMER_CTRL_ENABLE          (1 << 0)
27 #define ARCH_TIMER_CTRL_IT_MASK         (1 << 1)
28 #define ARCH_TIMER_CTRL_IT_STAT         (1 << 2)
29
30 #define CNTHCTL_EL1PCTEN                (1 << 0)
31 #define CNTHCTL_EL1PCEN                 (1 << 1)
32 #define CNTHCTL_EVNTEN                  (1 << 2)
33 #define CNTHCTL_EVNTDIR                 (1 << 3)
34 #define CNTHCTL_EVNTI                   (0xF << 4)
35
36 enum arch_timer_reg {
37         ARCH_TIMER_REG_CTRL,
38         ARCH_TIMER_REG_TVAL,
39 };
40
41 enum arch_timer_ppi_nr {
42         ARCH_TIMER_PHYS_SECURE_PPI,
43         ARCH_TIMER_PHYS_NONSECURE_PPI,
44         ARCH_TIMER_VIRT_PPI,
45         ARCH_TIMER_HYP_PPI,
46         ARCH_TIMER_MAX_TIMER_PPI
47 };
48
49 enum arch_timer_spi_nr {
50         ARCH_TIMER_PHYS_SPI,
51         ARCH_TIMER_VIRT_SPI,
52         ARCH_TIMER_MAX_TIMER_SPI
53 };
54
55 #define ARCH_TIMER_PHYS_ACCESS          0
56 #define ARCH_TIMER_VIRT_ACCESS          1
57 #define ARCH_TIMER_MEM_PHYS_ACCESS      2
58 #define ARCH_TIMER_MEM_VIRT_ACCESS      3
59
60 #define ARCH_TIMER_MEM_MAX_FRAMES       8
61
62 #define ARCH_TIMER_USR_PCT_ACCESS_EN    (1 << 0) /* physical counter */
63 #define ARCH_TIMER_USR_VCT_ACCESS_EN    (1 << 1) /* virtual counter */
64 #define ARCH_TIMER_VIRT_EVT_EN          (1 << 2)
65 #define ARCH_TIMER_EVT_TRIGGER_SHIFT    (4)
66 #define ARCH_TIMER_EVT_TRIGGER_MASK     (0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT)
67 #define ARCH_TIMER_USR_VT_ACCESS_EN     (1 << 8) /* virtual timer registers */
68 #define ARCH_TIMER_USR_PT_ACCESS_EN     (1 << 9) /* physical timer registers */
69
70 #define ARCH_TIMER_EVT_STREAM_FREQ      10000   /* 100us */
71
72 struct arch_timer_kvm_info {
73         struct timecounter timecounter;
74         int virtual_irq;
75 };
76
77 struct arch_timer_mem_frame {
78         bool valid;
79         phys_addr_t cntbase;
80         size_t size;
81         int phys_irq;
82         int virt_irq;
83 };
84
85 struct arch_timer_mem {
86         phys_addr_t cntctlbase;
87         size_t size;
88         struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES];
89 };
90
91 #ifdef CONFIG_ARM_ARCH_TIMER
92
93 extern u32 arch_timer_get_rate(void);
94 extern u64 (*arch_timer_read_counter)(void);
95 extern struct arch_timer_kvm_info *arch_timer_get_kvm_info(void);
96
97 #else
98
99 static inline u32 arch_timer_get_rate(void)
100 {
101         return 0;
102 }
103
104 static inline u64 arch_timer_read_counter(void)
105 {
106         return 0;
107 }
108
109 #endif
110
111 #endif