1 #ifndef _I386_PGTABLE_H
2 #define _I386_PGTABLE_H
6 * The Linux memory management assumes a three-level page table setup. On
7 * the i386, we use that, but "fold" the mid level into the top-level page
8 * table, so that we physically have the same two-level page table as the
11 * This file contains the functions and defines necessary to modify and use
12 * the i386 page table tree.
15 #include <asm/processor.h>
16 #include <asm/fixmap.h>
17 #include <linux/threads.h>
18 #include <asm/paravirt.h>
20 #include <linux/bitops.h>
21 #include <linux/slab.h>
22 #include <linux/list.h>
23 #include <linux/spinlock.h>
26 struct vm_area_struct;
28 extern pgd_t swapper_pg_dir[1024];
29 extern struct kmem_cache *pmd_cache;
30 extern spinlock_t pgd_lock;
31 extern struct page *pgd_list;
32 void check_pgt_cache(void);
34 static inline void pgtable_cache_init(void) {}
35 void paging_init(void);
39 * The Linux x86 paging architecture is 'compile-time dual-mode', it
40 * implements both the traditional 2-level x86 page tables and the
41 * newer 3-level PAE-mode page tables.
44 # include <asm/pgtable-3level-defs.h>
45 # define PMD_SIZE (1UL << PMD_SHIFT)
46 # define PMD_MASK (~(PMD_SIZE-1))
48 # include <asm/pgtable-2level-defs.h>
51 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
52 #define PGDIR_MASK (~(PGDIR_SIZE-1))
54 #define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
55 #define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
57 #define TWOLEVEL_PGDIR_SHIFT 22
58 #define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
59 #define BOOT_KERNEL_PGD_PTRS (1024-BOOT_USER_PGD_PTRS)
61 /* Just any arbitrary offset to the start of the vmalloc VM area: the
62 * current 8MB value just means that there will be a 8MB "hole" after the
63 * physical memory until the kernel virtual memory starts. That means that
64 * any out-of-bounds memory accesses will hopefully be caught.
65 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
66 * area for the same reason. ;)
68 #define VMALLOC_OFFSET (8*1024*1024)
69 #define VMALLOC_START (((unsigned long) high_memory + \
70 2*VMALLOC_OFFSET-1) & ~(VMALLOC_OFFSET-1))
72 # define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE)
74 # define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
78 * Define this if things work differently on an i386 and an i486:
79 * it will (on an i486) warn about kernel memory accesses that are
80 * done without a 'access_ok(VERIFY_WRITE,..)'
84 /* The boot page tables (all created as a single array) */
85 extern unsigned long pg0[];
87 #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
89 /* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
90 #define pmd_none(x) (!(unsigned long)pmd_val(x))
91 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
92 #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
95 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
98 # include <asm/pgtable-3level.h>
100 # include <asm/pgtable-2level.h>
104 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
106 * dst - pointer to pgd range anwhere on a pgd page
108 * count - the number of pgds to copy.
110 * dst and src can be on the same page, but the range must not overlap,
111 * and must not cross a page boundary.
113 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
115 memcpy(dst, src, count * sizeof(pgd_t));
119 * Macro to mark a page protection value as "uncacheable". On processors which do not support
120 * it, this is a no-op.
122 #define pgprot_noncached(prot) ((boot_cpu_data.x86 > 3) \
123 ? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) : (prot))
126 * Conversion functions: convert a page and protection to a page entry,
127 * and a page entry and page directory to the page they refer to.
130 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
133 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
135 * this macro returns the index of the entry in the pgd page which would
136 * control the given virtual address
138 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
139 #define pgd_index_k(addr) pgd_index(addr)
142 * pgd_offset() returns a (pgd_t *)
143 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
145 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
148 * a shortcut which implies the use of the kernel's pgd, instead
151 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
154 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
156 * this macro returns the index of the entry in the pmd page which would
157 * control the given virtual address
159 #define pmd_index(address) \
160 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
163 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
165 * this macro returns the index of the entry in the pte page which would
166 * control the given virtual address
168 #define pte_index(address) \
169 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
170 #define pte_offset_kernel(dir, address) \
171 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
173 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
175 #define pmd_page_vaddr(pmd) \
176 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
178 #if defined(CONFIG_HIGHPTE)
179 #define pte_offset_map(dir, address) \
180 ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)),KM_PTE0) + pte_index(address))
181 #define pte_offset_map_nested(dir, address) \
182 ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
183 #define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
184 #define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
186 #define pte_offset_map(dir, address) \
187 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
188 #define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
189 #define pte_unmap(pte) do { } while (0)
190 #define pte_unmap_nested(pte) do { } while (0)
193 /* Clear a kernel PTE and flush it from the TLB */
194 #define kpte_clear_flush(ptep, vaddr) \
196 pte_clear(&init_mm, vaddr, ptep); \
197 __flush_tlb_one(vaddr); \
201 * The i386 doesn't have any external MMU info: the kernel page
202 * tables contain all the necessary information.
204 #define update_mmu_cache(vma,address,pte) do { } while (0)
206 void native_pagetable_setup_start(pgd_t *base);
207 void native_pagetable_setup_done(pgd_t *base);
209 #ifndef CONFIG_PARAVIRT
210 static inline void paravirt_pagetable_setup_start(pgd_t *base)
212 native_pagetable_setup_start(base);
215 static inline void paravirt_pagetable_setup_done(pgd_t *base)
217 native_pagetable_setup_done(base);
219 #endif /* !CONFIG_PARAVIRT */
221 #endif /* !__ASSEMBLY__ */
224 * kern_addr_valid() is (1) for FLATMEM and (0) for
225 * SPARSEMEM and DISCONTIGMEM
227 #ifdef CONFIG_FLATMEM
228 #define kern_addr_valid(addr) (1)
230 #define kern_addr_valid(kaddr) (0)
233 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
234 remap_pfn_range(vma, vaddr, pfn, size, prot)
236 #endif /* _I386_PGTABLE_H */