1 #ifndef _I386_PGTABLE_H
2 #define _I386_PGTABLE_H
6 * The Linux memory management assumes a three-level page table setup. On
7 * the i386, we use that, but "fold" the mid level into the top-level page
8 * table, so that we physically have the same two-level page table as the
11 * This file contains the functions and defines necessary to modify and use
12 * the i386 page table tree.
15 #include <asm/processor.h>
16 #include <asm/fixmap.h>
17 #include <linux/threads.h>
18 #include <asm/paravirt.h>
20 #include <linux/bitops.h>
21 #include <linux/slab.h>
22 #include <linux/list.h>
23 #include <linux/spinlock.h>
26 struct vm_area_struct;
28 extern pgd_t swapper_pg_dir[1024];
29 extern struct kmem_cache *pmd_cache;
30 void check_pgt_cache(void);
32 static inline void pgtable_cache_init(void) {}
33 void paging_init(void);
37 * The Linux x86 paging architecture is 'compile-time dual-mode', it
38 * implements both the traditional 2-level x86 page tables and the
39 * newer 3-level PAE-mode page tables.
42 # include <asm/pgtable-3level-defs.h>
43 # define PMD_SIZE (1UL << PMD_SHIFT)
44 # define PMD_MASK (~(PMD_SIZE-1))
46 # include <asm/pgtable-2level-defs.h>
49 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
50 #define PGDIR_MASK (~(PGDIR_SIZE-1))
52 #define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
53 #define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
55 /* Just any arbitrary offset to the start of the vmalloc VM area: the
56 * current 8MB value just means that there will be a 8MB "hole" after the
57 * physical memory until the kernel virtual memory starts. That means that
58 * any out-of-bounds memory accesses will hopefully be caught.
59 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
60 * area for the same reason. ;)
62 #define VMALLOC_OFFSET (8*1024*1024)
63 #define VMALLOC_START (((unsigned long) high_memory + \
64 2*VMALLOC_OFFSET-1) & ~(VMALLOC_OFFSET-1))
66 #define LAST_PKMAP 512
68 #define LAST_PKMAP 1024
71 #define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE*(LAST_PKMAP + 1)) & PMD_MASK)
74 # define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE)
76 # define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
80 * Define this if things work differently on an i386 and an i486:
81 * it will (on an i486) warn about kernel memory accesses that are
82 * done without a 'access_ok(VERIFY_WRITE,..)'
86 /* The boot page tables (all created as a single array) */
87 extern unsigned long pg0[];
89 #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
91 /* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
92 #define pmd_none(x) (!(unsigned long)pmd_val(x))
93 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
94 #define pmd_bad(x) ((pmd_val(x) \
95 & ~(PAGE_MASK | _PAGE_USER | _PAGE_PSE | _PAGE_NX)) \
99 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
101 #ifdef CONFIG_X86_PAE
102 # include <asm/pgtable-3level.h>
104 # include <asm/pgtable-2level.h>
108 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
110 * dst - pointer to pgd range anwhere on a pgd page
112 * count - the number of pgds to copy.
114 * dst and src can be on the same page, but the range must not overlap,
115 * and must not cross a page boundary.
117 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
119 memcpy(dst, src, count * sizeof(pgd_t));
123 * Macro to mark a page protection value as "uncacheable". On processors which do not support
124 * it, this is a no-op.
126 #define pgprot_noncached(prot) ((boot_cpu_data.x86 > 3) \
127 ? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) : (prot))
130 * Conversion functions: convert a page and protection to a page entry,
131 * and a page entry and page directory to the page they refer to.
134 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
137 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
139 * this macro returns the index of the entry in the pgd page which would
140 * control the given virtual address
142 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
143 #define pgd_index_k(addr) pgd_index(addr)
146 * pgd_offset() returns a (pgd_t *)
147 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
149 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
152 * a shortcut which implies the use of the kernel's pgd, instead
155 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
157 static inline int pud_large(pud_t pud) { return 0; }
160 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
162 * this macro returns the index of the entry in the pmd page which would
163 * control the given virtual address
165 #define pmd_index(address) \
166 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
169 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
171 * this macro returns the index of the entry in the pte page which would
172 * control the given virtual address
174 #define pte_index(address) \
175 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
176 #define pte_offset_kernel(dir, address) \
177 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
179 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
181 #define pmd_page_vaddr(pmd) \
182 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
184 #if defined(CONFIG_HIGHPTE)
185 #define pte_offset_map(dir, address) \
186 ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)),KM_PTE0) + pte_index(address))
187 #define pte_offset_map_nested(dir, address) \
188 ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
189 #define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
190 #define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
192 #define pte_offset_map(dir, address) \
193 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
194 #define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
195 #define pte_unmap(pte) do { } while (0)
196 #define pte_unmap_nested(pte) do { } while (0)
199 /* Clear a kernel PTE and flush it from the TLB */
200 #define kpte_clear_flush(ptep, vaddr) \
202 pte_clear(&init_mm, vaddr, ptep); \
203 __flush_tlb_one(vaddr); \
207 * The i386 doesn't have any external MMU info: the kernel page
208 * tables contain all the necessary information.
210 #define update_mmu_cache(vma,address,pte) do { } while (0)
212 void native_pagetable_setup_start(pgd_t *base);
213 void native_pagetable_setup_done(pgd_t *base);
215 #ifndef CONFIG_PARAVIRT
216 static inline void paravirt_pagetable_setup_start(pgd_t *base)
218 native_pagetable_setup_start(base);
221 static inline void paravirt_pagetable_setup_done(pgd_t *base)
223 native_pagetable_setup_done(base);
225 #endif /* !CONFIG_PARAVIRT */
227 #endif /* !__ASSEMBLY__ */
230 * kern_addr_valid() is (1) for FLATMEM and (0) for
231 * SPARSEMEM and DISCONTIGMEM
233 #ifdef CONFIG_FLATMEM
234 #define kern_addr_valid(addr) (1)
236 #define kern_addr_valid(kaddr) (0)
239 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
240 remap_pfn_range(vma, vaddr, pfn, size, prot)
242 #endif /* _I386_PGTABLE_H */