include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_in_defs_asm.h

   1 #ifndef __iop_dmc_in_defs_asm_h
   2 #define __iop_dmc_in_defs_asm_h
   3
   4 /*
   5  * This file is autogenerated from
   6  *   file:           ../../inst/io_proc/rtl/iop_dmc_in.r
   7  *     id:           iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
   8  *     last modfied: Mon Apr 11 16:08:45 2005
   9  *
  10  *   by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_dmc_in_defs_asm.h ../../inst/io_proc/rtl/iop_dmc_in.r
  11  *      id: $Id: iop_dmc_in_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
  12  * Any changes here will be lost.
  13  *
  14  * -*- buffer-read-only: t -*-
  15  */
  16
  17 #ifndef REG_FIELD
  18 #define REG_FIELD( scope, reg, field, value ) \
  19   REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
  20 #define REG_FIELD_X_( value, shift ) ((value) << shift)
  21 #endif
  22
  23 #ifndef REG_STATE
  24 #define REG_STATE( scope, reg, field, symbolic_value ) \
  25   REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
  26 #define REG_STATE_X_( k, shift ) (k << shift)
  27 #endif
  28
  29 #ifndef REG_MASK
  30 #define REG_MASK( scope, reg, field ) \
  31   REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
  32 #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
  33 #endif
  34
  35 #ifndef REG_LSB
  36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
  37 #endif
  38
  39 #ifndef REG_BIT
  40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
  41 #endif
  42
  43 #ifndef REG_ADDR
  44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
  45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs)
  46 #endif
  47
  48 #ifndef REG_ADDR_VECT
  49 #define REG_ADDR_VECT( scope, inst, reg, index ) \
  50          REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
  51                          STRIDE_##scope##_##reg )
  52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
  53                           ((inst) + offs + (index) * stride)
  54 #endif
  55
  56 /* Register rw_cfg, scope iop_dmc_in, type rw */
  57 #define reg_iop_dmc_in_rw_cfg___sth_intr___lsb 0
  58 #define reg_iop_dmc_in_rw_cfg___sth_intr___width 3
  59 #define reg_iop_dmc_in_rw_cfg___last_dis_dif___lsb 3
  60 #define reg_iop_dmc_in_rw_cfg___last_dis_dif___width 1
  61 #define reg_iop_dmc_in_rw_cfg___last_dis_dif___bit 3
  62 #define reg_iop_dmc_in_rw_cfg_offset 0
  63
  64 /* Register rw_ctrl, scope iop_dmc_in, type rw */
  65 #define reg_iop_dmc_in_rw_ctrl___dif_en___lsb 0
  66 #define reg_iop_dmc_in_rw_ctrl___dif_en___width 1
  67 #define reg_iop_dmc_in_rw_ctrl___dif_en___bit 0
  68 #define reg_iop_dmc_in_rw_ctrl___dif_dis___lsb 1
  69 #define reg_iop_dmc_in_rw_ctrl___dif_dis___width 1
  70 #define reg_iop_dmc_in_rw_ctrl___dif_dis___bit 1
  71 #define reg_iop_dmc_in_rw_ctrl___stream_clr___lsb 2
  72 #define reg_iop_dmc_in_rw_ctrl___stream_clr___width 1
  73 #define reg_iop_dmc_in_rw_ctrl___stream_clr___bit 2
  74 #define reg_iop_dmc_in_rw_ctrl_offset 4
  75
  76 /* Register r_stat, scope iop_dmc_in, type r */
  77 #define reg_iop_dmc_in_r_stat___dif_en___lsb 0
  78 #define reg_iop_dmc_in_r_stat___dif_en___width 1
  79 #define reg_iop_dmc_in_r_stat___dif_en___bit 0
  80 #define reg_iop_dmc_in_r_stat_offset 8
  81
  82 /* Register rw_stream_cmd, scope iop_dmc_in, type rw */
  83 #define reg_iop_dmc_in_rw_stream_cmd___cmd___lsb 0
  84 #define reg_iop_dmc_in_rw_stream_cmd___cmd___width 10
  85 #define reg_iop_dmc_in_rw_stream_cmd___n___lsb 16
  86 #define reg_iop_dmc_in_rw_stream_cmd___n___width 8
  87 #define reg_iop_dmc_in_rw_stream_cmd_offset 12
  88
  89 /* Register rw_stream_wr_data, scope iop_dmc_in, type rw */
  90 #define reg_iop_dmc_in_rw_stream_wr_data_offset 16
  91
  92 /* Register rw_stream_wr_data_last, scope iop_dmc_in, type rw */
  93 #define reg_iop_dmc_in_rw_stream_wr_data_last_offset 20
  94
  95 /* Register rw_stream_ctrl, scope iop_dmc_in, type rw */
  96 #define reg_iop_dmc_in_rw_stream_ctrl___eop___lsb 0
  97 #define reg_iop_dmc_in_rw_stream_ctrl___eop___width 1
  98 #define reg_iop_dmc_in_rw_stream_ctrl___eop___bit 0
  99 #define reg_iop_dmc_in_rw_stream_ctrl___wait___lsb 1
 100 #define reg_iop_dmc_in_rw_stream_ctrl___wait___width 1
 101 #define reg_iop_dmc_in_rw_stream_ctrl___wait___bit 1
 102 #define reg_iop_dmc_in_rw_stream_ctrl___keep_md___lsb 2
 103 #define reg_iop_dmc_in_rw_stream_ctrl___keep_md___width 1
 104 #define reg_iop_dmc_in_rw_stream_ctrl___keep_md___bit 2
 105 #define reg_iop_dmc_in_rw_stream_ctrl___size___lsb 3
 106 #define reg_iop_dmc_in_rw_stream_ctrl___size___width 3
 107 #define reg_iop_dmc_in_rw_stream_ctrl_offset 24
 108
 109 /* Register r_stream_stat, scope iop_dmc_in, type r */
 110 #define reg_iop_dmc_in_r_stream_stat___sth___lsb 0
 111 #define reg_iop_dmc_in_r_stream_stat___sth___width 7
 112 #define reg_iop_dmc_in_r_stream_stat___full___lsb 16
 113 #define reg_iop_dmc_in_r_stream_stat___full___width 1
 114 #define reg_iop_dmc_in_r_stream_stat___full___bit 16
 115 #define reg_iop_dmc_in_r_stream_stat___last_pkt___lsb 17
 116 #define reg_iop_dmc_in_r_stream_stat___last_pkt___width 1
 117 #define reg_iop_dmc_in_r_stream_stat___last_pkt___bit 17
 118 #define reg_iop_dmc_in_r_stream_stat___data_md_valid___lsb 18
 119 #define reg_iop_dmc_in_r_stream_stat___data_md_valid___width 1
 120 #define reg_iop_dmc_in_r_stream_stat___data_md_valid___bit 18
 121 #define reg_iop_dmc_in_r_stream_stat___ctxt_md_valid___lsb 19
 122 #define reg_iop_dmc_in_r_stream_stat___ctxt_md_valid___width 1
 123 #define reg_iop_dmc_in_r_stream_stat___ctxt_md_valid___bit 19
 124 #define reg_iop_dmc_in_r_stream_stat___group_md_valid___lsb 20
 125 #define reg_iop_dmc_in_r_stream_stat___group_md_valid___width 1
 126 #define reg_iop_dmc_in_r_stream_stat___group_md_valid___bit 20
 127 #define reg_iop_dmc_in_r_stream_stat___stream_busy___lsb 21
 128 #define reg_iop_dmc_in_r_stream_stat___stream_busy___width 1
 129 #define reg_iop_dmc_in_r_stream_stat___stream_busy___bit 21
 130 #define reg_iop_dmc_in_r_stream_stat___cmd_rdy___lsb 22
 131 #define reg_iop_dmc_in_r_stream_stat___cmd_rdy___width 1
 132 #define reg_iop_dmc_in_r_stream_stat___cmd_rdy___bit 22
 133 #define reg_iop_dmc_in_r_stream_stat_offset 28
 134
 135 /* Register r_data_descr, scope iop_dmc_in, type r */
 136 #define reg_iop_dmc_in_r_data_descr___ctrl___lsb 0
 137 #define reg_iop_dmc_in_r_data_descr___ctrl___width 8
 138 #define reg_iop_dmc_in_r_data_descr___stat___lsb 8
 139 #define reg_iop_dmc_in_r_data_descr___stat___width 8
 140 #define reg_iop_dmc_in_r_data_descr___md___lsb 16
 141 #define reg_iop_dmc_in_r_data_descr___md___width 16
 142 #define reg_iop_dmc_in_r_data_descr_offset 32
 143
 144 /* Register r_ctxt_descr, scope iop_dmc_in, type r */
 145 #define reg_iop_dmc_in_r_ctxt_descr___ctrl___lsb 0
 146 #define reg_iop_dmc_in_r_ctxt_descr___ctrl___width 8
 147 #define reg_iop_dmc_in_r_ctxt_descr___stat___lsb 8
 148 #define reg_iop_dmc_in_r_ctxt_descr___stat___width 8
 149 #define reg_iop_dmc_in_r_ctxt_descr___md0___lsb 16
 150 #define reg_iop_dmc_in_r_ctxt_descr___md0___width 16
 151 #define reg_iop_dmc_in_r_ctxt_descr_offset 36
 152
 153 /* Register r_ctxt_descr_md1, scope iop_dmc_in, type r */
 154 #define reg_iop_dmc_in_r_ctxt_descr_md1_offset 40
 155
 156 /* Register r_ctxt_descr_md2, scope iop_dmc_in, type r */
 157 #define reg_iop_dmc_in_r_ctxt_descr_md2_offset 44
 158
 159 /* Register r_group_descr, scope iop_dmc_in, type r */
 160 #define reg_iop_dmc_in_r_group_descr___ctrl___lsb 0
 161 #define reg_iop_dmc_in_r_group_descr___ctrl___width 8
 162 #define reg_iop_dmc_in_r_group_descr___stat___lsb 8
 163 #define reg_iop_dmc_in_r_group_descr___stat___width 8
 164 #define reg_iop_dmc_in_r_group_descr___md___lsb 16
 165 #define reg_iop_dmc_in_r_group_descr___md___width 16
 166 #define reg_iop_dmc_in_r_group_descr_offset 56
 167
 168 /* Register rw_data_descr, scope iop_dmc_in, type rw */
 169 #define reg_iop_dmc_in_rw_data_descr___md___lsb 16
 170 #define reg_iop_dmc_in_rw_data_descr___md___width 16
 171 #define reg_iop_dmc_in_rw_data_descr_offset 60
 172
 173 /* Register rw_ctxt_descr, scope iop_dmc_in, type rw */
 174 #define reg_iop_dmc_in_rw_ctxt_descr___md0___lsb 16
 175 #define reg_iop_dmc_in_rw_ctxt_descr___md0___width 16
 176 #define reg_iop_dmc_in_rw_ctxt_descr_offset 64
 177
 178 /* Register rw_ctxt_descr_md1, scope iop_dmc_in, type rw */
 179 #define reg_iop_dmc_in_rw_ctxt_descr_md1_offset 68
 180
 181 /* Register rw_ctxt_descr_md2, scope iop_dmc_in, type rw */
 182 #define reg_iop_dmc_in_rw_ctxt_descr_md2_offset 72
 183
 184 /* Register rw_group_descr, scope iop_dmc_in, type rw */
 185 #define reg_iop_dmc_in_rw_group_descr___md___lsb 16
 186 #define reg_iop_dmc_in_rw_group_descr___md___width 16
 187 #define reg_iop_dmc_in_rw_group_descr_offset 84
 188
 189 /* Register rw_intr_mask, scope iop_dmc_in, type rw */
 190 #define reg_iop_dmc_in_rw_intr_mask___data_md___lsb 0
 191 #define reg_iop_dmc_in_rw_intr_mask___data_md___width 1
 192 #define reg_iop_dmc_in_rw_intr_mask___data_md___bit 0
 193 #define reg_iop_dmc_in_rw_intr_mask___ctxt_md___lsb 1
 194 #define reg_iop_dmc_in_rw_intr_mask___ctxt_md___width 1
 195 #define reg_iop_dmc_in_rw_intr_mask___ctxt_md___bit 1
 196 #define reg_iop_dmc_in_rw_intr_mask___group_md___lsb 2
 197 #define reg_iop_dmc_in_rw_intr_mask___group_md___width 1
 198 #define reg_iop_dmc_in_rw_intr_mask___group_md___bit 2
 199 #define reg_iop_dmc_in_rw_intr_mask___cmd_rdy___lsb 3
 200 #define reg_iop_dmc_in_rw_intr_mask___cmd_rdy___width 1
 201 #define reg_iop_dmc_in_rw_intr_mask___cmd_rdy___bit 3
 202 #define reg_iop_dmc_in_rw_intr_mask___sth___lsb 4
 203 #define reg_iop_dmc_in_rw_intr_mask___sth___width 1
 204 #define reg_iop_dmc_in_rw_intr_mask___sth___bit 4
 205 #define reg_iop_dmc_in_rw_intr_mask___full___lsb 5
 206 #define reg_iop_dmc_in_rw_intr_mask___full___width 1
 207 #define reg_iop_dmc_in_rw_intr_mask___full___bit 5
 208 #define reg_iop_dmc_in_rw_intr_mask_offset 88
 209
 210 /* Register rw_ack_intr, scope iop_dmc_in, type rw */
 211 #define reg_iop_dmc_in_rw_ack_intr___data_md___lsb 0
 212 #define reg_iop_dmc_in_rw_ack_intr___data_md___width 1
 213 #define reg_iop_dmc_in_rw_ack_intr___data_md___bit 0
 214 #define reg_iop_dmc_in_rw_ack_intr___ctxt_md___lsb 1
 215 #define reg_iop_dmc_in_rw_ack_intr___ctxt_md___width 1
 216 #define reg_iop_dmc_in_rw_ack_intr___ctxt_md___bit 1
 217 #define reg_iop_dmc_in_rw_ack_intr___group_md___lsb 2
 218 #define reg_iop_dmc_in_rw_ack_intr___group_md___width 1
 219 #define reg_iop_dmc_in_rw_ack_intr___group_md___bit 2
 220 #define reg_iop_dmc_in_rw_ack_intr___cmd_rdy___lsb 3
 221 #define reg_iop_dmc_in_rw_ack_intr___cmd_rdy___width 1
 222 #define reg_iop_dmc_in_rw_ack_intr___cmd_rdy___bit 3
 223 #define reg_iop_dmc_in_rw_ack_intr___sth___lsb 4
 224 #define reg_iop_dmc_in_rw_ack_intr___sth___width 1
 225 #define reg_iop_dmc_in_rw_ack_intr___sth___bit 4
 226 #define reg_iop_dmc_in_rw_ack_intr___full___lsb 5
 227 #define reg_iop_dmc_in_rw_ack_intr___full___width 1
 228 #define reg_iop_dmc_in_rw_ack_intr___full___bit 5
 229 #define reg_iop_dmc_in_rw_ack_intr_offset 92
 230
 231 /* Register r_intr, scope iop_dmc_in, type r */
 232 #define reg_iop_dmc_in_r_intr___data_md___lsb 0
 233 #define reg_iop_dmc_in_r_intr___data_md___width 1
 234 #define reg_iop_dmc_in_r_intr___data_md___bit 0
 235 #define reg_iop_dmc_in_r_intr___ctxt_md___lsb 1
 236 #define reg_iop_dmc_in_r_intr___ctxt_md___width 1
 237 #define reg_iop_dmc_in_r_intr___ctxt_md___bit 1
 238 #define reg_iop_dmc_in_r_intr___group_md___lsb 2
 239 #define reg_iop_dmc_in_r_intr___group_md___width 1
 240 #define reg_iop_dmc_in_r_intr___group_md___bit 2
 241 #define reg_iop_dmc_in_r_intr___cmd_rdy___lsb 3
 242 #define reg_iop_dmc_in_r_intr___cmd_rdy___width 1
 243 #define reg_iop_dmc_in_r_intr___cmd_rdy___bit 3
 244 #define reg_iop_dmc_in_r_intr___sth___lsb 4
 245 #define reg_iop_dmc_in_r_intr___sth___width 1
 246 #define reg_iop_dmc_in_r_intr___sth___bit 4
 247 #define reg_iop_dmc_in_r_intr___full___lsb 5
 248 #define reg_iop_dmc_in_r_intr___full___width 1
 249 #define reg_iop_dmc_in_r_intr___full___bit 5
 250 #define reg_iop_dmc_in_r_intr_offset 96
 251
 252 /* Register r_masked_intr, scope iop_dmc_in, type r */
 253 #define reg_iop_dmc_in_r_masked_intr___data_md___lsb 0
 254 #define reg_iop_dmc_in_r_masked_intr___data_md___width 1
 255 #define reg_iop_dmc_in_r_masked_intr___data_md___bit 0
 256 #define reg_iop_dmc_in_r_masked_intr___ctxt_md___lsb 1
 257 #define reg_iop_dmc_in_r_masked_intr___ctxt_md___width 1
 258 #define reg_iop_dmc_in_r_masked_intr___ctxt_md___bit 1
 259 #define reg_iop_dmc_in_r_masked_intr___group_md___lsb 2
 260 #define reg_iop_dmc_in_r_masked_intr___group_md___width 1
 261 #define reg_iop_dmc_in_r_masked_intr___group_md___bit 2
 262 #define reg_iop_dmc_in_r_masked_intr___cmd_rdy___lsb 3
 263 #define reg_iop_dmc_in_r_masked_intr___cmd_rdy___width 1
 264 #define reg_iop_dmc_in_r_masked_intr___cmd_rdy___bit 3
 265 #define reg_iop_dmc_in_r_masked_intr___sth___lsb 4
 266 #define reg_iop_dmc_in_r_masked_intr___sth___width 1
 267 #define reg_iop_dmc_in_r_masked_intr___sth___bit 4
 268 #define reg_iop_dmc_in_r_masked_intr___full___lsb 5
 269 #define reg_iop_dmc_in_r_masked_intr___full___width 1
 270 #define reg_iop_dmc_in_r_masked_intr___full___bit 5
 271 #define reg_iop_dmc_in_r_masked_intr_offset 100
 272
 273
 274 /* Constants */
 275 #define regk_iop_dmc_in_ack_pkt                   0x00000100
 276 #define regk_iop_dmc_in_array                     0x00000008
 277 #define regk_iop_dmc_in_burst                     0x00000020
 278 #define regk_iop_dmc_in_copy_next                 0x00000010
 279 #define regk_iop_dmc_in_copy_up                   0x00000020
 280 #define regk_iop_dmc_in_dis_c                     0x00000010
 281 #define regk_iop_dmc_in_dis_g                     0x00000020
 282 #define regk_iop_dmc_in_lim1                      0x00000000
 283 #define regk_iop_dmc_in_lim16                     0x00000004
 284 #define regk_iop_dmc_in_lim2                      0x00000001
 285 #define regk_iop_dmc_in_lim32                     0x00000005
 286 #define regk_iop_dmc_in_lim4                      0x00000002
 287 #define regk_iop_dmc_in_lim64                     0x00000006
 288 #define regk_iop_dmc_in_lim8                      0x00000003
 289 #define regk_iop_dmc_in_load_c                    0x00000200
 290 #define regk_iop_dmc_in_load_c_n                  0x00000280
 291 #define regk_iop_dmc_in_load_c_next               0x00000240
 292 #define regk_iop_dmc_in_load_d                    0x00000140
 293 #define regk_iop_dmc_in_load_g                    0x00000300
 294 #define regk_iop_dmc_in_load_g_down               0x000003c0
 295 #define regk_iop_dmc_in_load_g_next               0x00000340
 296 #define regk_iop_dmc_in_load_g_up                 0x00000380
 297 #define regk_iop_dmc_in_next_en                   0x00000010
 298 #define regk_iop_dmc_in_next_pkt                  0x00000010
 299 #define regk_iop_dmc_in_no                        0x00000000
 300 #define regk_iop_dmc_in_restore                   0x00000020
 301 #define regk_iop_dmc_in_rw_cfg_default            0x00000000
 302 #define regk_iop_dmc_in_rw_ctxt_descr_default     0x00000000
 303 #define regk_iop_dmc_in_rw_ctxt_descr_md1_default  0x00000000
 304 #define regk_iop_dmc_in_rw_ctxt_descr_md2_default  0x00000000
 305 #define regk_iop_dmc_in_rw_data_descr_default     0x00000000
 306 #define regk_iop_dmc_in_rw_group_descr_default    0x00000000
 307 #define regk_iop_dmc_in_rw_intr_mask_default      0x00000000
 308 #define regk_iop_dmc_in_rw_stream_ctrl_default    0x00000000
 309 #define regk_iop_dmc_in_save_down                 0x00000020
 310 #define regk_iop_dmc_in_save_up                   0x00000020
 311 #define regk_iop_dmc_in_set_reg                   0x00000050
 312 #define regk_iop_dmc_in_set_w_size1               0x00000190
 313 #define regk_iop_dmc_in_set_w_size2               0x000001a0
 314 #define regk_iop_dmc_in_set_w_size4               0x000001c0
 315 #define regk_iop_dmc_in_store_c                   0x00000002
 316 #define regk_iop_dmc_in_store_descr               0x00000000
 317 #define regk_iop_dmc_in_store_g                   0x00000004
 318 #define regk_iop_dmc_in_store_md                  0x00000001
 319 #define regk_iop_dmc_in_update_down               0x00000020
 320 #define regk_iop_dmc_in_yes                       0x00000001
 321 #endif /* __iop_dmc_in_defs_asm_h */