drivers/watchdog/sama5d4_wdt.c

   1 /*
   2  * Driver for Atmel SAMA5D4 Watchdog Timer
   3  *
   4  * Copyright (C) 2015 Atmel Corporation
   5  *
   6  * Licensed under GPLv2.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/io.h>
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/of.h>
  14 #include <linux/of_irq.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/reboot.h>
  17 #include <linux/watchdog.h>
  18
  19 #include "at91sam9_wdt.h"
  20
  21 /* minimum and maximum watchdog timeout, in seconds */
  22 #define MIN_WDT_TIMEOUT         1
  23 #define MAX_WDT_TIMEOUT         16
  24 #define WDT_DEFAULT_TIMEOUT     MAX_WDT_TIMEOUT
  25
  26 #define WDT_SEC2TICKS(s)        ((s) ? (((s) << 8) - 1) : 0)
  27
  28 struct sama5d4_wdt {
  29         struct watchdog_device  wdd;
  30         void __iomem            *reg_base;
  31         u32                     mr;
  32 };
  33
  34 static int wdt_timeout = WDT_DEFAULT_TIMEOUT;
  35 static bool nowayout = WATCHDOG_NOWAYOUT;
  36
  37 module_param(wdt_timeout, int, 0);
  38 MODULE_PARM_DESC(wdt_timeout,
  39         "Watchdog timeout in seconds. (default = "
  40         __MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");
  41
  42 module_param(nowayout, bool, 0);
  43 MODULE_PARM_DESC(nowayout,
  44         "Watchdog cannot be stopped once started (default="
  45         __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  46
  47 #define wdt_enabled (!(wdt->mr & AT91_WDT_WDDIS))
  48
  49 #define wdt_read(wdt, field) \
  50         readl_relaxed((wdt)->reg_base + (field))
  51
  52 #define wdt_write(wtd, field, val) \
  53         writel_relaxed((val), (wdt)->reg_base + (field))
  54
  55 static int sama5d4_wdt_start(struct watchdog_device *wdd)
  56 {
  57         struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
  58
  59         wdt->mr &= ~AT91_WDT_WDDIS;
  60         wdt_write(wdt, AT91_WDT_MR, wdt->mr);
  61
  62         return 0;
  63 }
  64
  65 static int sama5d4_wdt_stop(struct watchdog_device *wdd)
  66 {
  67         struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
  68
  69         wdt->mr |= AT91_WDT_WDDIS;
  70         wdt_write(wdt, AT91_WDT_MR, wdt->mr);
  71
  72         return 0;
  73 }
  74
  75 static int sama5d4_wdt_ping(struct watchdog_device *wdd)
  76 {
  77         struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
  78
  79         wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
  80
  81         return 0;
  82 }
  83
  84 static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd,
  85                                  unsigned int timeout)
  86 {
  87         struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
  88         u32 value = WDT_SEC2TICKS(timeout);
  89
  90         wdt->mr &= ~AT91_WDT_WDV;
  91         wdt->mr &= ~AT91_WDT_WDD;
  92         wdt->mr |= AT91_WDT_SET_WDV(value);
  93         wdt->mr |= AT91_WDT_SET_WDD(value);
  94
  95         /*
  96          * WDDIS has to be 0 when updating WDD/WDV. The datasheet states: When
  97          * setting the WDDIS bit, and while it is set, the fields WDV and WDD
  98          * must not be modified.
  99          * If the watchdog is enabled, then the timeout can be updated. Else,
 100          * wait that the user enables it.
 101          */
 102         if (wdt_enabled)
 103                 wdt_write(wdt, AT91_WDT_MR, wdt->mr & ~AT91_WDT_WDDIS);
 104
 105         wdd->timeout = timeout;
 106
 107         return 0;
 108 }
 109
 110 static const struct watchdog_info sama5d4_wdt_info = {
 111         .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
 112         .identity = "Atmel SAMA5D4 Watchdog",
 113 };
 114
 115 static const struct watchdog_ops sama5d4_wdt_ops = {
 116         .owner = THIS_MODULE,
 117         .start = sama5d4_wdt_start,
 118         .stop = sama5d4_wdt_stop,
 119         .ping = sama5d4_wdt_ping,
 120         .set_timeout = sama5d4_wdt_set_timeout,
 121 };
 122
 123 static irqreturn_t sama5d4_wdt_irq_handler(int irq, void *dev_id)
 124 {
 125         struct sama5d4_wdt *wdt = platform_get_drvdata(dev_id);
 126
 127         if (wdt_read(wdt, AT91_WDT_SR)) {
 128                 pr_crit("Atmel Watchdog Software Reset\n");
 129                 emergency_restart();
 130                 pr_crit("Reboot didn't succeed\n");
 131         }
 132
 133         return IRQ_HANDLED;
 134 }
 135
 136 static int of_sama5d4_wdt_init(struct device_node *np, struct sama5d4_wdt *wdt)
 137 {
 138         const char *tmp;
 139
 140         wdt->mr = AT91_WDT_WDDIS;
 141
 142         if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
 143             !strcmp(tmp, "software"))
 144                 wdt->mr |= AT91_WDT_WDFIEN;
 145         else
 146                 wdt->mr |= AT91_WDT_WDRSTEN;
 147
 148         if (of_property_read_bool(np, "atmel,idle-halt"))
 149                 wdt->mr |= AT91_WDT_WDIDLEHLT;
 150
 151         if (of_property_read_bool(np, "atmel,dbg-halt"))
 152                 wdt->mr |= AT91_WDT_WDDBGHLT;
 153
 154         return 0;
 155 }
 156
 157 static int sama5d4_wdt_init(struct sama5d4_wdt *wdt)
 158 {
 159         u32 reg;
 160         /*
 161          * When booting and resuming, the bootloader may have changed the
 162          * watchdog configuration.
 163          * If the watchdog is already running, we can safely update it.
 164          * Else, we have to disable it properly.
 165          */
 166         if (wdt_enabled) {
 167                 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
 168         } else {
 169                 reg = wdt_read(wdt, AT91_WDT_MR);
 170                 if (!(reg & AT91_WDT_WDDIS))
 171                         wdt_write(wdt, AT91_WDT_MR, reg | AT91_WDT_WDDIS);
 172         }
 173         return 0;
 174 }
 175
 176 static int sama5d4_wdt_probe(struct platform_device *pdev)
 177 {
 178         struct watchdog_device *wdd;
 179         struct sama5d4_wdt *wdt;
 180         struct resource *res;
 181         void __iomem *regs;
 182         u32 irq = 0;
 183         u32 timeout;
 184         int ret;
 185
 186         wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
 187         if (!wdt)
 188                 return -ENOMEM;
 189
 190         wdd = &wdt->wdd;
 191         wdd->timeout = wdt_timeout;
 192         wdd->info = &sama5d4_wdt_info;
 193         wdd->ops = &sama5d4_wdt_ops;
 194         wdd->min_timeout = MIN_WDT_TIMEOUT;
 195         wdd->max_timeout = MAX_WDT_TIMEOUT;
 196
 197         watchdog_set_drvdata(wdd, wdt);
 198
 199         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 200         regs = devm_ioremap_resource(&pdev->dev, res);
 201         if (IS_ERR(regs))
 202                 return PTR_ERR(regs);
 203
 204         wdt->reg_base = regs;
 205
 206         if (pdev->dev.of_node) {
 207                 irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
 208                 if (!irq)
 209                         dev_warn(&pdev->dev, "failed to get IRQ from DT\n");
 210
 211                 ret = of_sama5d4_wdt_init(pdev->dev.of_node, wdt);
 212                 if (ret)
 213                         return ret;
 214         }
 215
 216         if ((wdt->mr & AT91_WDT_WDFIEN) && irq) {
 217                 ret = devm_request_irq(&pdev->dev, irq, sama5d4_wdt_irq_handler,
 218                                        IRQF_SHARED | IRQF_IRQPOLL |
 219                                        IRQF_NO_SUSPEND, pdev->name, pdev);
 220                 if (ret) {
 221                         dev_err(&pdev->dev,
 222                                 "cannot register interrupt handler\n");
 223                         return ret;
 224                 }
 225         }
 226
 227         ret = watchdog_init_timeout(wdd, wdt_timeout, &pdev->dev);
 228         if (ret) {
 229                 dev_err(&pdev->dev, "unable to set timeout value\n");
 230                 return ret;
 231         }
 232
 233         timeout = WDT_SEC2TICKS(wdd->timeout);
 234
 235         wdt->mr |= AT91_WDT_SET_WDD(timeout);
 236         wdt->mr |= AT91_WDT_SET_WDV(timeout);
 237
 238         ret = sama5d4_wdt_init(wdt);
 239         if (ret)
 240                 return ret;
 241
 242         watchdog_set_nowayout(wdd, nowayout);
 243
 244         ret = watchdog_register_device(wdd);
 245         if (ret) {
 246                 dev_err(&pdev->dev, "failed to register watchdog device\n");
 247                 return ret;
 248         }
 249
 250         platform_set_drvdata(pdev, wdt);
 251
 252         dev_info(&pdev->dev, "initialized (timeout = %d sec, nowayout = %d)\n",
 253                  wdt_timeout, nowayout);
 254
 255         return 0;
 256 }
 257
 258 static int sama5d4_wdt_remove(struct platform_device *pdev)
 259 {
 260         struct sama5d4_wdt *wdt = platform_get_drvdata(pdev);
 261
 262         sama5d4_wdt_stop(&wdt->wdd);
 263
 264         watchdog_unregister_device(&wdt->wdd);
 265
 266         return 0;
 267 }
 268
 269 static const struct of_device_id sama5d4_wdt_of_match[] = {
 270         { .compatible = "atmel,sama5d4-wdt", },
 271         { }
 272 };
 273 MODULE_DEVICE_TABLE(of, sama5d4_wdt_of_match);
 274
 275 #ifdef CONFIG_PM_SLEEP
 276 static int sama5d4_wdt_resume(struct device *dev)
 277 {
 278         struct sama5d4_wdt *wdt = dev_get_drvdata(dev);
 279
 280         sama5d4_wdt_init(wdt);
 281
 282         return 0;
 283 }
 284 #endif
 285
 286 static SIMPLE_DEV_PM_OPS(sama5d4_wdt_pm_ops, NULL,
 287                          sama5d4_wdt_resume);
 288
 289 static struct platform_driver sama5d4_wdt_driver = {
 290         .probe          = sama5d4_wdt_probe,
 291         .remove         = sama5d4_wdt_remove,
 292         .driver         = {
 293                 .name   = "sama5d4_wdt",
 294                 .pm     = &sama5d4_wdt_pm_ops,
 295                 .of_match_table = sama5d4_wdt_of_match,
 296         }
 297 };
 298 module_platform_driver(sama5d4_wdt_driver);
 299
 300 MODULE_AUTHOR("Atmel Corporation");
 301 MODULE_DESCRIPTION("Atmel SAMA5D4 Watchdog Timer driver");
 302 MODULE_LICENSE("GPL v2");