1be95a68d69678d4ba05400bedd506467826cb99
[sfrench/cifs-2.6.git] / drivers / video / sm501fb.c
1 /* linux/drivers/video/sm501fb.c
2  *
3  * Copyright (c) 2006 Simtec Electronics
4  *      Vincent Sanders <vince@simtec.co.uk>
5  *      Ben Dooks <ben@simtec.co.uk>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * Framebuffer driver for the Silicon Motion SM501
12  */
13
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/errno.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/tty.h>
20 #include <linux/slab.h>
21 #include <linux/delay.h>
22 #include <linux/fb.h>
23 #include <linux/init.h>
24 #include <linux/vmalloc.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/interrupt.h>
27 #include <linux/workqueue.h>
28 #include <linux/wait.h>
29 #include <linux/platform_device.h>
30 #include <linux/clk.h>
31 #include <linux/console.h>
32
33 #include <asm/io.h>
34 #include <asm/uaccess.h>
35 #include <asm/div64.h>
36
37 #ifdef CONFIG_PM
38 #include <linux/pm.h>
39 #endif
40
41 #include <linux/sm501.h>
42 #include <linux/sm501-regs.h>
43
44 #define NR_PALETTE      256
45
46 enum sm501_controller {
47         HEAD_CRT        = 0,
48         HEAD_PANEL      = 1,
49 };
50
51 /* SM501 memory adress */
52 struct sm501_mem {
53         unsigned long    size;
54         unsigned long    sm_addr;
55         void __iomem    *k_addr;
56 };
57
58 /* private data that is shared between all frambuffers* */
59 struct sm501fb_info {
60         struct device           *dev;
61         struct fb_info          *fb[2];         /* fb info for both heads */
62         struct resource         *fbmem_res;     /* framebuffer resource */
63         struct resource         *regs_res;      /* registers resource */
64         struct sm501_platdata_fb *pdata;        /* our platform data */
65
66         unsigned long            pm_crt_ctrl;   /* pm: crt ctrl save */
67
68         int                      irq;
69         int                      swap_endian;   /* set to swap rgb=>bgr */
70         void __iomem            *regs;          /* remapped registers */
71         void __iomem            *fbmem;         /* remapped framebuffer */
72         size_t                   fbmem_len;     /* length of remapped region */
73 };
74
75 /* per-framebuffer private data */
76 struct sm501fb_par {
77         u32                      pseudo_palette[16];
78
79         enum sm501_controller    head;
80         struct sm501_mem         cursor;
81         struct sm501_mem         screen;
82         struct fb_ops            ops;
83
84         void                    *store_fb;
85         void                    *store_cursor;
86         void __iomem            *cursor_regs;
87         struct sm501fb_info     *info;
88 };
89
90 /* Helper functions */
91
92 static inline int h_total(struct fb_var_screeninfo *var)
93 {
94         return var->xres + var->left_margin +
95                 var->right_margin + var->hsync_len;
96 }
97
98 static inline int v_total(struct fb_var_screeninfo *var)
99 {
100         return var->yres + var->upper_margin +
101                 var->lower_margin + var->vsync_len;
102 }
103
104 /* sm501fb_sync_regs()
105  *
106  * This call is mainly for PCI bus systems where we need to
107  * ensure that any writes to the bus are completed before the
108  * next phase, or after completing a function.
109 */
110
111 static inline void sm501fb_sync_regs(struct sm501fb_info *info)
112 {
113         readl(info->regs);
114 }
115
116 /* sm501_alloc_mem
117  *
118  * This is an attempt to lay out memory for the two framebuffers and
119  * everything else
120  *
121  * |fbmem_res->start                                           fbmem_res->end|
122  * |                                                                         |
123  * |fb[0].fix.smem_start    |         |fb[1].fix.smem_start    |     2K      |
124  * |-> fb[0].fix.smem_len <-| spare   |-> fb[1].fix.smem_len <-|-> cursors <-|
125  *
126  * The "spare" space is for the 2d engine data
127  * the fixed is space for the cursors (2x1Kbyte)
128  *
129  * we need to allocate memory for the 2D acceleration engine
130  * command list and the data for the engine to deal with.
131  *
132  * - all allocations must be 128bit aligned
133  * - cursors are 64x64x2 bits (1Kbyte)
134  *
135  */
136
137 #define SM501_MEMF_CURSOR               (1)
138 #define SM501_MEMF_PANEL                (2)
139 #define SM501_MEMF_CRT                  (4)
140 #define SM501_MEMF_ACCEL                (8)
141
142 static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem,
143                            unsigned int why, size_t size)
144 {
145         unsigned int ptr = 0;
146
147         switch (why) {
148         case SM501_MEMF_CURSOR:
149                 ptr = inf->fbmem_len - size;
150                 inf->fbmem_len = ptr;
151                 break;
152
153         case SM501_MEMF_PANEL:
154                 ptr = inf->fbmem_len - size;
155                 if (ptr < inf->fb[0]->fix.smem_len)
156                         return -ENOMEM;
157
158                 break;
159
160         case SM501_MEMF_CRT:
161                 ptr = 0;
162                 break;
163
164         case SM501_MEMF_ACCEL:
165                 ptr = inf->fb[0]->fix.smem_len;
166
167                 if ((ptr + size) >
168                     (inf->fb[1]->fix.smem_start - inf->fbmem_res->start))
169                         return -ENOMEM;
170                 break;
171
172         default:
173                 return -EINVAL;
174         }
175
176         mem->size    = size;
177         mem->sm_addr = ptr;
178         mem->k_addr  = inf->fbmem + ptr;
179
180         dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd\n",
181                 __func__, mem->sm_addr, mem->k_addr, why, size);
182
183         return 0;
184 }
185
186 /* sm501fb_ps_to_hz
187  *
188  * Converts a period in picoseconds to Hz.
189  *
190  * Note, we try to keep this in Hz to minimise rounding with
191  * the limited PLL settings on the SM501.
192 */
193
194 static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
195 {
196         unsigned long long numerator=1000000000000ULL;
197
198         /* 10^12 / picosecond period gives frequency in Hz */
199         do_div(numerator, psvalue);
200         return (unsigned long)numerator;
201 }
202
203 /* sm501fb_hz_to_ps is identical to the oposite transform */
204
205 #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
206
207 /* sm501fb_setup_gamma
208  *
209  * Programs a linear 1.0 gamma ramp in case the gamma
210  * correction is enabled without programming anything else.
211 */
212
213 static void sm501fb_setup_gamma(struct sm501fb_info *fbi,
214                                 unsigned long palette)
215 {
216         unsigned long value = 0;
217         int offset;
218
219         /* set gamma values */
220         for (offset = 0; offset < 256 * 4; offset += 4) {
221                 writel(value, fbi->regs + palette + offset);
222                 value += 0x010101;      /* Advance RGB by 1,1,1.*/
223         }
224 }
225
226 /* sm501fb_check_var
227  *
228  * check common variables for both panel and crt
229 */
230
231 static int sm501fb_check_var(struct fb_var_screeninfo *var,
232                              struct fb_info *info)
233 {
234         struct sm501fb_par  *par = info->par;
235         struct sm501fb_info *sm  = par->info;
236         unsigned long tmp;
237
238         /* check we can fit these values into the registers */
239
240         if (var->hsync_len > 255 || var->vsync_len > 255)
241                 return -EINVAL;
242
243         if ((var->xres + var->right_margin) >= 4096)
244                 return -EINVAL;
245
246         if ((var->yres + var->lower_margin) > 2048)
247                 return -EINVAL;
248
249         /* hard limits of device */
250
251         if (h_total(var) > 4096 || v_total(var) > 2048)
252                 return -EINVAL;
253
254         /* check our line length is going to be 128 bit aligned */
255
256         tmp = (var->xres * var->bits_per_pixel) / 8;
257         if ((tmp & 15) != 0)
258                 return -EINVAL;
259
260         /* check the virtual size */
261
262         if (var->xres_virtual > 4096 || var->yres_virtual > 2048)
263                 return -EINVAL;
264
265         /* can cope with 8,16 or 32bpp */
266
267         if (var->bits_per_pixel <= 8)
268                 var->bits_per_pixel = 8;
269         else if (var->bits_per_pixel <= 16)
270                 var->bits_per_pixel = 16;
271         else if (var->bits_per_pixel == 24)
272                 var->bits_per_pixel = 32;
273
274         /* set r/g/b positions and validate bpp */
275         switch(var->bits_per_pixel) {
276         case 8:
277                 var->red.length         = var->bits_per_pixel;
278                 var->red.offset         = 0;
279                 var->green.length       = var->bits_per_pixel;
280                 var->green.offset       = 0;
281                 var->blue.length        = var->bits_per_pixel;
282                 var->blue.offset        = 0;
283                 var->transp.length      = 0;
284
285                 break;
286
287         case 16:
288                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
289                         var->red.offset         = 11;
290                         var->green.offset       = 5;
291                         var->blue.offset        = 0;
292                 } else {
293                         var->blue.offset        = 11;
294                         var->green.offset       = 5;
295                         var->red.offset         = 0;
296                 }
297
298                 var->red.length         = 5;
299                 var->green.length       = 6;
300                 var->blue.length        = 5;
301                 var->transp.length      = 0;
302                 break;
303
304         case 32:
305                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
306                         var->transp.offset      = 0;
307                         var->red.offset         = 8;
308                         var->green.offset       = 16;
309                         var->blue.offset        = 24;
310                 } else {
311                         var->transp.offset      = 24;
312                         var->red.offset         = 16;
313                         var->green.offset       = 8;
314                         var->blue.offset        = 0;
315                 }
316
317                 var->red.length         = 8;
318                 var->green.length       = 8;
319                 var->blue.length        = 8;
320                 var->transp.length      = 0;
321                 break;
322
323         default:
324                 return -EINVAL;
325         }
326
327         return 0;
328 }
329
330 /*
331  * sm501fb_check_var_crt():
332  *
333  * check the parameters for the CRT head, and either bring them
334  * back into range, or return -EINVAL.
335 */
336
337 static int sm501fb_check_var_crt(struct fb_var_screeninfo *var,
338                                  struct fb_info *info)
339 {
340         return sm501fb_check_var(var, info);
341 }
342
343 /* sm501fb_check_var_pnl():
344  *
345  * check the parameters for the CRT head, and either bring them
346  * back into range, or return -EINVAL.
347 */
348
349 static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var,
350                                  struct fb_info *info)
351 {
352         return sm501fb_check_var(var, info);
353 }
354
355 /* sm501fb_set_par_common
356  *
357  * set common registers for framebuffers
358 */
359
360 static int sm501fb_set_par_common(struct fb_info *info,
361                                   struct fb_var_screeninfo *var)
362 {
363         struct sm501fb_par  *par = info->par;
364         struct sm501fb_info *fbi = par->info;
365         unsigned long pixclock;      /* pixelclock in Hz */
366         unsigned long sm501pixclock; /* pixelclock the 501 can achive in Hz */
367         unsigned int mem_type;
368         unsigned int clock_type;
369         unsigned int head_addr;
370
371         dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d\n",
372                 __func__, var->xres, var->yres, var->bits_per_pixel,
373                 var->xres_virtual, var->yres_virtual);
374
375         switch (par->head) {
376         case HEAD_CRT:
377                 mem_type = SM501_MEMF_CRT;
378                 clock_type = SM501_CLOCK_V2XCLK;
379                 head_addr = SM501_DC_CRT_FB_ADDR;
380                 break;
381
382         case HEAD_PANEL:
383                 mem_type = SM501_MEMF_PANEL;
384                 clock_type = SM501_CLOCK_P2XCLK;
385                 head_addr = SM501_DC_PANEL_FB_ADDR;
386                 break;
387
388         default:
389                 mem_type = 0;           /* stop compiler warnings */
390                 head_addr = 0;
391                 clock_type = 0;
392         }
393
394         switch (var->bits_per_pixel) {
395         case 8:
396                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
397                 break;
398
399         case 16:
400                 info->fix.visual = FB_VISUAL_DIRECTCOLOR;
401                 break;
402
403         case 32:
404                 info->fix.visual = FB_VISUAL_TRUECOLOR;
405                 break;
406         }
407
408         /* allocate fb memory within 501 */
409         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8;
410         info->fix.smem_len    = info->fix.line_length * var->yres_virtual;
411
412         dev_dbg(fbi->dev, "%s: line length = %u\n", __func__,
413                 info->fix.line_length);
414
415         if (sm501_alloc_mem(fbi, &par->screen, mem_type,
416                             info->fix.smem_len)) {
417                 dev_err(fbi->dev, "no memory available\n");
418                 return -ENOMEM;
419         }
420
421         info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr;
422
423         info->screen_base = fbi->fbmem + par->screen.sm_addr;
424         info->screen_size = info->fix.smem_len;
425
426         /* set start of framebuffer to the screen */
427
428         writel(par->screen.sm_addr | SM501_ADDR_FLIP, fbi->regs + head_addr);
429
430         /* program CRT clock  */
431
432         pixclock = sm501fb_ps_to_hz(var->pixclock);
433
434         sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type,
435                                         pixclock);
436
437         /* update fb layer with actual clock used */
438         var->pixclock = sm501fb_hz_to_ps(sm501pixclock);
439
440         dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz)  = %lu, "
441                "sm501pixclock = %lu,  error = %ld%%\n",
442                __func__, var->pixclock, pixclock, sm501pixclock,
443                ((pixclock - sm501pixclock)*100)/pixclock);
444
445         return 0;
446 }
447
448 /* sm501fb_set_par_geometry
449  *
450  * set the geometry registers for specified framebuffer.
451 */
452
453 static void sm501fb_set_par_geometry(struct fb_info *info,
454                                      struct fb_var_screeninfo *var)
455 {
456         struct sm501fb_par  *par = info->par;
457         struct sm501fb_info *fbi = par->info;
458         void __iomem *base = fbi->regs;
459         unsigned long reg;
460
461         if (par->head == HEAD_CRT)
462                 base += SM501_DC_CRT_H_TOT;
463         else
464                 base += SM501_DC_PANEL_H_TOT;
465
466         /* set framebuffer width and display width */
467
468         reg = info->fix.line_length;
469         reg |= ((var->xres * var->bits_per_pixel)/8) << 16;
470
471         writel(reg, fbi->regs + (par->head == HEAD_CRT ?
472                     SM501_DC_CRT_FB_OFFSET :  SM501_DC_PANEL_FB_OFFSET));
473
474         /* program horizontal total */
475
476         reg  = (h_total(var) - 1) << 16;
477         reg |= (var->xres - 1);
478
479         writel(reg, base + SM501_OFF_DC_H_TOT);
480
481         /* program horizontal sync */
482
483         reg  = var->hsync_len << 16;
484         reg |= var->xres + var->right_margin - 1;
485
486         writel(reg, base + SM501_OFF_DC_H_SYNC);
487
488         /* program vertical total */
489
490         reg  = (v_total(var) - 1) << 16;
491         reg |= (var->yres - 1);
492
493         writel(reg, base + SM501_OFF_DC_V_TOT);
494
495         /* program vertical sync */
496         reg  = var->vsync_len << 16;
497         reg |= var->yres + var->lower_margin - 1;
498
499         writel(reg, base + SM501_OFF_DC_V_SYNC);
500 }
501
502 /* sm501fb_pan_crt
503  *
504  * pan the CRT display output within an virtual framebuffer
505 */
506
507 static int sm501fb_pan_crt(struct fb_var_screeninfo *var,
508                            struct fb_info *info)
509 {
510         struct sm501fb_par  *par = info->par;
511         struct sm501fb_info *fbi = par->info;
512         unsigned int bytes_pixel = var->bits_per_pixel / 8;
513         unsigned long reg;
514         unsigned long xoffs;
515
516         xoffs = var->xoffset * bytes_pixel;
517
518         reg = readl(fbi->regs + SM501_DC_CRT_CONTROL);
519
520         reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK;
521         reg |= ((xoffs & 15) / bytes_pixel) << 4;
522         writel(reg, fbi->regs + SM501_DC_CRT_CONTROL);
523
524         reg = (par->screen.sm_addr + xoffs +
525                var->yoffset * info->fix.line_length);
526         writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR);
527
528         sm501fb_sync_regs(fbi);
529         return 0;
530 }
531
532 /* sm501fb_pan_pnl
533  *
534  * pan the panel display output within an virtual framebuffer
535 */
536
537 static int sm501fb_pan_pnl(struct fb_var_screeninfo *var,
538                            struct fb_info *info)
539 {
540         struct sm501fb_par  *par = info->par;
541         struct sm501fb_info *fbi = par->info;
542         unsigned long reg;
543
544         reg = var->xoffset | (var->xres_virtual << 16);
545         writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH);
546
547         reg = var->yoffset | (var->yres_virtual << 16);
548         writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT);
549
550         sm501fb_sync_regs(fbi);
551         return 0;
552 }
553
554 /* sm501fb_set_par_crt
555  *
556  * Set the CRT video mode from the fb_info structure
557 */
558
559 static int sm501fb_set_par_crt(struct fb_info *info)
560 {
561         struct sm501fb_par  *par = info->par;
562         struct sm501fb_info *fbi = par->info;
563         struct fb_var_screeninfo *var = &info->var;
564         unsigned long control;       /* control register */
565         int ret;
566
567         /* activate new configuration */
568
569         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
570
571         /* enable CRT DAC - note 0 is on!*/
572         sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
573
574         control = readl(fbi->regs + SM501_DC_CRT_CONTROL);
575
576         control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK |
577                     SM501_DC_CRT_CONTROL_GAMMA |
578                     SM501_DC_CRT_CONTROL_BLANK |
579                     SM501_DC_CRT_CONTROL_SEL |
580                     SM501_DC_CRT_CONTROL_CP |
581                     SM501_DC_CRT_CONTROL_TVP);
582
583         /* set the sync polarities before we check data source  */
584
585         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
586                 control |= SM501_DC_CRT_CONTROL_HSP;
587
588         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
589                 control |= SM501_DC_CRT_CONTROL_VSP;
590
591         if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) {
592                 /* the head is displaying panel data... */
593
594                 sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0);
595                 goto out_update;
596         }
597
598         ret = sm501fb_set_par_common(info, var);
599         if (ret) {
600                 dev_err(fbi->dev, "failed to set common parameters\n");
601                 return ret;
602         }
603
604         sm501fb_pan_crt(var, info);
605         sm501fb_set_par_geometry(info, var);
606
607         control |= SM501_FIFO_3;        /* fill if >3 free slots */
608
609         switch(var->bits_per_pixel) {
610         case 8:
611                 control |= SM501_DC_CRT_CONTROL_8BPP;
612                 break;
613
614         case 16:
615                 control |= SM501_DC_CRT_CONTROL_16BPP;
616                 break;
617
618         case 32:
619                 control |= SM501_DC_CRT_CONTROL_32BPP;
620                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
621                 break;
622
623         default:
624                 BUG();
625         }
626
627         control |= SM501_DC_CRT_CONTROL_SEL;    /* CRT displays CRT data */
628         control |= SM501_DC_CRT_CONTROL_TE;     /* enable CRT timing */
629         control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */
630
631  out_update:
632         dev_dbg(fbi->dev, "new control is %08lx\n", control);
633
634         writel(control, fbi->regs + SM501_DC_CRT_CONTROL);
635         sm501fb_sync_regs(fbi);
636
637         return 0;
638 }
639
640 static void sm501fb_panel_power(struct sm501fb_info *fbi, int to)
641 {
642         unsigned long control;
643         void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL;
644
645         control = readl(ctrl_reg);
646
647         if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) {
648                 /* enable panel power */
649
650                 control |= SM501_DC_PANEL_CONTROL_VDD;  /* FPVDDEN */
651                 writel(control, ctrl_reg);
652                 sm501fb_sync_regs(fbi);
653                 mdelay(10);
654
655                 control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */
656                 writel(control, ctrl_reg);
657                 sm501fb_sync_regs(fbi);
658                 mdelay(10);
659
660                 control |= SM501_DC_PANEL_CONTROL_BIAS; /* VBIASEN */
661                 writel(control, ctrl_reg);
662                 sm501fb_sync_regs(fbi);
663                 mdelay(10);
664
665                 control |= SM501_DC_PANEL_CONTROL_FPEN;
666                 writel(control, ctrl_reg);
667
668         } else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) {
669                 /* disable panel power */
670
671                 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
672                 writel(control, ctrl_reg);
673                 sm501fb_sync_regs(fbi);
674                 mdelay(10);
675
676                 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
677                 writel(control, ctrl_reg);
678                 sm501fb_sync_regs(fbi);
679                 mdelay(10);
680
681                 control &= ~SM501_DC_PANEL_CONTROL_DATA;
682                 writel(control, ctrl_reg);
683                 sm501fb_sync_regs(fbi);
684                 mdelay(10);
685
686                 control &= ~SM501_DC_PANEL_CONTROL_VDD;
687                 writel(control, ctrl_reg);
688                 sm501fb_sync_regs(fbi);
689                 mdelay(10);
690         }
691
692         sm501fb_sync_regs(fbi);
693 }
694
695 /* sm501fb_set_par_pnl
696  *
697  * Set the panel video mode from the fb_info structure
698 */
699
700 static int sm501fb_set_par_pnl(struct fb_info *info)
701 {
702         struct sm501fb_par  *par = info->par;
703         struct sm501fb_info *fbi = par->info;
704         struct fb_var_screeninfo *var = &info->var;
705         unsigned long control;
706         unsigned long reg;
707         int ret;
708
709         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
710
711         /* activate this new configuration */
712
713         ret = sm501fb_set_par_common(info, var);
714         if (ret)
715                 return ret;
716
717         sm501fb_pan_pnl(var, info);
718         sm501fb_set_par_geometry(info, var);
719
720         /* update control register */
721
722         control = readl(fbi->regs + SM501_DC_PANEL_CONTROL);
723         control &= (SM501_DC_PANEL_CONTROL_GAMMA |
724                     SM501_DC_PANEL_CONTROL_VDD  |
725                     SM501_DC_PANEL_CONTROL_DATA |
726                     SM501_DC_PANEL_CONTROL_BIAS |
727                     SM501_DC_PANEL_CONTROL_FPEN |
728                     SM501_DC_PANEL_CONTROL_CP |
729                     SM501_DC_PANEL_CONTROL_CK |
730                     SM501_DC_PANEL_CONTROL_HP |
731                     SM501_DC_PANEL_CONTROL_VP |
732                     SM501_DC_PANEL_CONTROL_HPD |
733                     SM501_DC_PANEL_CONTROL_VPD);
734
735         control |= SM501_FIFO_3;        /* fill if >3 free slots */
736
737         switch(var->bits_per_pixel) {
738         case 8:
739                 control |= SM501_DC_PANEL_CONTROL_8BPP;
740                 break;
741
742         case 16:
743                 control |= SM501_DC_PANEL_CONTROL_16BPP;
744                 break;
745
746         case 32:
747                 control |= SM501_DC_PANEL_CONTROL_32BPP;
748                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
749                 break;
750
751         default:
752                 BUG();
753         }
754
755         writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL);
756
757         /* panel plane top left and bottom right location */
758
759         writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC);
760
761         reg  = var->xres - 1;
762         reg |= (var->yres - 1) << 16;
763
764         writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC);
765
766         /* program panel control register */
767
768         control |= SM501_DC_PANEL_CONTROL_TE;   /* enable PANEL timing */
769         control |= SM501_DC_PANEL_CONTROL_EN;   /* enable PANEL gfx plane */
770
771         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
772                 control |= SM501_DC_PANEL_CONTROL_HSP;
773
774         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
775                 control |= SM501_DC_PANEL_CONTROL_VSP;
776
777         writel(control, fbi->regs + SM501_DC_PANEL_CONTROL);
778         sm501fb_sync_regs(fbi);
779
780         /* ensure the panel interface is not tristated at this point */
781
782         sm501_modify_reg(fbi->dev->parent, SM501_SYSTEM_CONTROL,
783                          0, SM501_SYSCTRL_PANEL_TRISTATE);
784
785         /* power the panel up */
786         sm501fb_panel_power(fbi, 1);
787         return 0;
788 }
789
790
791 /* chan_to_field
792  *
793  * convert a colour value into a field position
794  *
795  * from pxafb.c
796 */
797
798 static inline unsigned int chan_to_field(unsigned int chan,
799                                          struct fb_bitfield *bf)
800 {
801         chan &= 0xffff;
802         chan >>= 16 - bf->length;
803         return chan << bf->offset;
804 }
805
806 /* sm501fb_setcolreg
807  *
808  * set the colour mapping for modes that support palettised data
809 */
810
811 static int sm501fb_setcolreg(unsigned regno,
812                              unsigned red, unsigned green, unsigned blue,
813                              unsigned transp, struct fb_info *info)
814 {
815         struct sm501fb_par  *par = info->par;
816         struct sm501fb_info *fbi = par->info;
817         void __iomem *base = fbi->regs;
818         unsigned int val;
819
820         if (par->head == HEAD_CRT)
821                 base += SM501_DC_CRT_PALETTE;
822         else
823                 base += SM501_DC_PANEL_PALETTE;
824
825         switch (info->fix.visual) {
826         case FB_VISUAL_TRUECOLOR:
827                 /* true-colour, use pseuo-palette */
828
829                 if (regno < 16) {
830                         u32 *pal = par->pseudo_palette;
831
832                         val  = chan_to_field(red,   &info->var.red);
833                         val |= chan_to_field(green, &info->var.green);
834                         val |= chan_to_field(blue,  &info->var.blue);
835
836                         pal[regno] = val;
837                 }
838                 break;
839
840         case FB_VISUAL_PSEUDOCOLOR:
841                 if (regno < 256) {
842                         val = (red >> 8) << 16;
843                         val |= (green >> 8) << 8;
844                         val |= blue >> 8;
845
846                         writel(val, base + (regno * 4));
847                 }
848
849                 break;
850
851         default:
852                 return 1;   /* unknown type */
853         }
854
855         return 0;
856 }
857
858 /* sm501fb_blank_pnl
859  *
860  * Blank or un-blank the panel interface
861 */
862
863 static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info)
864 {
865         struct sm501fb_par  *par = info->par;
866         struct sm501fb_info *fbi = par->info;
867
868         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
869
870         switch (blank_mode) {
871         case FB_BLANK_POWERDOWN:
872                 sm501fb_panel_power(fbi, 0);
873                 break;
874
875         case FB_BLANK_UNBLANK:
876                 sm501fb_panel_power(fbi, 1);
877                 break;
878
879         case FB_BLANK_NORMAL:
880         case FB_BLANK_VSYNC_SUSPEND:
881         case FB_BLANK_HSYNC_SUSPEND:
882         default:
883                 return 1;
884         }
885
886         return 0;
887 }
888
889 /* sm501fb_blank_crt
890  *
891  * Blank or un-blank the crt interface
892 */
893
894 static int sm501fb_blank_crt(int blank_mode, struct fb_info *info)
895 {
896         struct sm501fb_par  *par = info->par;
897         struct sm501fb_info *fbi = par->info;
898         unsigned long ctrl;
899
900         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
901
902         ctrl = readl(fbi->regs + SM501_DC_CRT_CONTROL);
903
904         switch (blank_mode) {
905         case FB_BLANK_POWERDOWN:
906                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
907                 sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0);
908
909         case FB_BLANK_NORMAL:
910                 ctrl |= SM501_DC_CRT_CONTROL_BLANK;
911                 break;
912
913         case FB_BLANK_UNBLANK:
914                 ctrl &= ~SM501_DC_CRT_CONTROL_BLANK;
915                 ctrl |=  SM501_DC_CRT_CONTROL_ENABLE;
916                 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
917                 break;
918
919         case FB_BLANK_VSYNC_SUSPEND:
920         case FB_BLANK_HSYNC_SUSPEND:
921         default:
922                 return 1;
923
924         }
925
926         writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL);
927         sm501fb_sync_regs(fbi);
928
929         return 0;
930 }
931
932 /* sm501fb_cursor
933  *
934  * set or change the hardware cursor parameters
935 */
936
937 static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
938 {
939         struct sm501fb_par  *par = info->par;
940         struct sm501fb_info *fbi = par->info;
941         void __iomem *base = fbi->regs;
942         unsigned long hwc_addr;
943         unsigned long fg, bg;
944
945         dev_dbg(fbi->dev, "%s(%p,%p)\n", __func__, info, cursor);
946
947         if (par->head == HEAD_CRT)
948                 base += SM501_DC_CRT_HWC_BASE;
949         else
950                 base += SM501_DC_PANEL_HWC_BASE;
951
952         /* check not being asked to exceed capabilities */
953
954         if (cursor->image.width > 64)
955                 return -EINVAL;
956
957         if (cursor->image.height > 64)
958                 return -EINVAL;
959
960         if (cursor->image.depth > 1)
961                 return -EINVAL;
962
963         hwc_addr = readl(base + SM501_OFF_HWC_ADDR);
964
965         if (cursor->enable)
966                 writel(hwc_addr | SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
967         else
968                 writel(hwc_addr & ~SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
969
970         /* set data */
971         if (cursor->set & FB_CUR_SETPOS) {
972                 unsigned int x = cursor->image.dx;
973                 unsigned int y = cursor->image.dy;
974
975                 if (x >= 2048 || y >= 2048 )
976                         return -EINVAL;
977
978                 dev_dbg(fbi->dev, "set position %d,%d\n", x, y);
979
980                 //y += cursor->image.height;
981
982                 writel(x | (y << 16), base + SM501_OFF_HWC_LOC);
983         }
984
985         if (cursor->set & FB_CUR_SETCMAP) {
986                 unsigned int bg_col = cursor->image.bg_color;
987                 unsigned int fg_col = cursor->image.fg_color;
988
989                 dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x)\n",
990                         __func__, bg_col, fg_col);
991
992                 bg = ((info->cmap.red[bg_col] & 0xF8) << 8) |
993                         ((info->cmap.green[bg_col] & 0xFC) << 3) |
994                         ((info->cmap.blue[bg_col] & 0xF8) >> 3);
995
996                 fg = ((info->cmap.red[fg_col] & 0xF8) << 8) |
997                         ((info->cmap.green[fg_col] & 0xFC) << 3) |
998                         ((info->cmap.blue[fg_col] & 0xF8) >> 3);
999
1000                 dev_dbg(fbi->dev, "fgcol %08lx, bgcol %08lx\n", fg, bg);
1001
1002                 writel(bg, base + SM501_OFF_HWC_COLOR_1_2);
1003                 writel(fg, base + SM501_OFF_HWC_COLOR_3);
1004         }
1005
1006         if (cursor->set & FB_CUR_SETSIZE ||
1007             cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1008                 /* SM501 cursor is a two bpp 64x64 bitmap this routine
1009                  * clears it to transparent then combines the cursor
1010                  * shape plane with the colour plane to set the
1011                  * cursor */
1012                 int x, y;
1013                 const unsigned char *pcol = cursor->image.data;
1014                 const unsigned char *pmsk = cursor->mask;
1015                 void __iomem   *dst = par->cursor.k_addr;
1016                 unsigned char  dcol = 0;
1017                 unsigned char  dmsk = 0;
1018                 unsigned int   op;
1019
1020                 dev_dbg(fbi->dev, "%s: setting shape (%d,%d)\n",
1021                         __func__, cursor->image.width, cursor->image.height);
1022
1023                 for (op = 0; op < (64*64*2)/8; op+=4)
1024                         writel(0x0, dst + op);
1025
1026                 for (y = 0; y < cursor->image.height; y++) {
1027                         for (x = 0; x < cursor->image.width; x++) {
1028                                 if ((x % 8) == 0) {
1029                                         dcol = *pcol++;
1030                                         dmsk = *pmsk++;
1031                                 } else {
1032                                         dcol >>= 1;
1033                                         dmsk >>= 1;
1034                                 }
1035
1036                                 if (dmsk & 1) {
1037                                         op = (dcol & 1) ? 1 : 3;
1038                                         op <<= ((x % 4) * 2);
1039
1040                                         op |= readb(dst + (x / 4));
1041                                         writeb(op, dst + (x / 4));
1042                                 }
1043                         }
1044                         dst += (64*2)/8;
1045                 }
1046         }
1047
1048         sm501fb_sync_regs(fbi); /* ensure cursor data flushed */
1049         return 0;
1050 }
1051
1052 /* sm501fb_crtsrc_show
1053  *
1054  * device attribute code to show where the crt output is sourced from
1055 */
1056
1057 static ssize_t sm501fb_crtsrc_show(struct device *dev,
1058                                struct device_attribute *attr, char *buf)
1059 {
1060         struct sm501fb_info *info = dev_get_drvdata(dev);
1061         unsigned long ctrl;
1062
1063         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1064         ctrl &= SM501_DC_CRT_CONTROL_SEL;
1065
1066         return snprintf(buf, PAGE_SIZE, "%s\n", ctrl ? "crt" : "panel");
1067 }
1068
1069 /* sm501fb_crtsrc_show
1070  *
1071  * device attribute code to set where the crt output is sourced from
1072 */
1073
1074 static ssize_t sm501fb_crtsrc_store(struct device *dev,
1075                                 struct device_attribute *attr,
1076                                 const char *buf, size_t len)
1077 {
1078         struct sm501fb_info *info = dev_get_drvdata(dev);
1079         enum sm501_controller head;
1080         unsigned long ctrl;
1081
1082         if (len < 1)
1083                 return -EINVAL;
1084
1085         if (strnicmp(buf, "crt", 3) == 0)
1086                 head = HEAD_CRT;
1087         else if (strnicmp(buf, "panel", 5) == 0)
1088                 head = HEAD_PANEL;
1089         else
1090                 return -EINVAL;
1091
1092         dev_info(dev, "setting crt source to head %d\n", head);
1093
1094         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1095
1096         if (head == HEAD_CRT) {
1097                 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1098                 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1099                 ctrl |= SM501_DC_CRT_CONTROL_TE;
1100         } else {
1101                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1102                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1103                 ctrl &= ~SM501_DC_CRT_CONTROL_TE;
1104         }
1105
1106         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1107         sm501fb_sync_regs(info);
1108
1109         return len;
1110 }
1111
1112 /* Prepare the device_attr for registration with sysfs later */
1113 static DEVICE_ATTR(crt_src, 0666, sm501fb_crtsrc_show, sm501fb_crtsrc_store);
1114
1115 /* sm501fb_show_regs
1116  *
1117  * show the primary sm501 registers
1118 */
1119 static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr,
1120                              unsigned int start, unsigned int len)
1121 {
1122         void __iomem *mem = info->regs;
1123         char *buf = ptr;
1124         unsigned int reg;
1125
1126         for (reg = start; reg < (len + start); reg += 4)
1127                 ptr += sprintf(ptr, "%08x = %08x\n", reg, readl(mem + reg));
1128
1129         return ptr - buf;
1130 }
1131
1132 /* sm501fb_debug_show_crt
1133  *
1134  * show the crt control and cursor registers
1135 */
1136
1137 static ssize_t sm501fb_debug_show_crt(struct device *dev,
1138                                   struct device_attribute *attr, char *buf)
1139 {
1140         struct sm501fb_info *info = dev_get_drvdata(dev);
1141         char *ptr = buf;
1142
1143         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40);
1144         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10);
1145
1146         return ptr - buf;
1147 }
1148
1149 static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL);
1150
1151 /* sm501fb_debug_show_pnl
1152  *
1153  * show the panel control and cursor registers
1154 */
1155
1156 static ssize_t sm501fb_debug_show_pnl(struct device *dev,
1157                                   struct device_attribute *attr, char *buf)
1158 {
1159         struct sm501fb_info *info = dev_get_drvdata(dev);
1160         char *ptr = buf;
1161
1162         ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40);
1163         ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10);
1164
1165         return ptr - buf;
1166 }
1167
1168 static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
1169
1170 /* framebuffer ops */
1171
1172 static struct fb_ops sm501fb_ops_crt = {
1173         .owner          = THIS_MODULE,
1174         .fb_check_var   = sm501fb_check_var_crt,
1175         .fb_set_par     = sm501fb_set_par_crt,
1176         .fb_blank       = sm501fb_blank_crt,
1177         .fb_setcolreg   = sm501fb_setcolreg,
1178         .fb_pan_display = sm501fb_pan_crt,
1179         .fb_cursor      = sm501fb_cursor,
1180         .fb_fillrect    = cfb_fillrect,
1181         .fb_copyarea    = cfb_copyarea,
1182         .fb_imageblit   = cfb_imageblit,
1183 };
1184
1185 static struct fb_ops sm501fb_ops_pnl = {
1186         .owner          = THIS_MODULE,
1187         .fb_check_var   = sm501fb_check_var_pnl,
1188         .fb_set_par     = sm501fb_set_par_pnl,
1189         .fb_pan_display = sm501fb_pan_pnl,
1190         .fb_blank       = sm501fb_blank_pnl,
1191         .fb_setcolreg   = sm501fb_setcolreg,
1192         .fb_cursor      = sm501fb_cursor,
1193         .fb_fillrect    = cfb_fillrect,
1194         .fb_copyarea    = cfb_copyarea,
1195         .fb_imageblit   = cfb_imageblit,
1196 };
1197
1198 /* sm501fb_info_alloc
1199  *
1200  * creates and initialises an sm501fb_info structure
1201 */
1202
1203 static struct sm501fb_info *sm501fb_info_alloc(struct fb_info *fbinfo_crt,
1204                                                struct fb_info *fbinfo_pnl)
1205 {
1206         struct sm501fb_info *info;
1207         struct sm501fb_par  *par;
1208
1209         info = kzalloc(sizeof(struct sm501fb_info), GFP_KERNEL);
1210         if (info) {
1211                 /* set the references back */
1212
1213                 par = fbinfo_crt->par;
1214                 par->info = info;
1215                 par->head = HEAD_CRT;
1216                 fbinfo_crt->pseudo_palette = &par->pseudo_palette;
1217
1218                 par = fbinfo_pnl->par;
1219                 par->info = info;
1220                 par->head = HEAD_PANEL;
1221                 fbinfo_pnl->pseudo_palette = &par->pseudo_palette;
1222
1223                 /* store the two fbs into our info */
1224                 info->fb[HEAD_CRT] = fbinfo_crt;
1225                 info->fb[HEAD_PANEL] = fbinfo_pnl;
1226         }
1227
1228         return info;
1229 }
1230
1231 /* sm501_init_cursor
1232  *
1233  * initialise hw cursor parameters
1234 */
1235
1236 static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base)
1237 {
1238         struct sm501fb_par *par = fbi->par;
1239         struct sm501fb_info *info = par->info;
1240         int ret;
1241
1242         par->cursor_regs = info->regs + reg_base;
1243
1244         ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024);
1245         if (ret < 0)
1246                 return ret;
1247
1248         /* initialise the colour registers */
1249
1250         writel(par->cursor.sm_addr, par->cursor_regs + SM501_OFF_HWC_ADDR);
1251
1252         writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC);
1253         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2);
1254         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3);
1255         sm501fb_sync_regs(info);
1256
1257         return 0;
1258 }
1259
1260 /* sm501fb_info_start
1261  *
1262  * fills the par structure claiming resources and remapping etc.
1263 */
1264
1265 static int sm501fb_start(struct sm501fb_info *info,
1266                          struct platform_device *pdev)
1267 {
1268         struct resource *res;
1269         struct device *dev;
1270         int ret;
1271
1272         info->dev = dev = &pdev->dev;
1273         platform_set_drvdata(pdev, info);
1274
1275         info->irq = ret = platform_get_irq(pdev, 0);
1276         if (ret < 0) {
1277                 /* we currently do not use the IRQ */
1278                 dev_warn(dev, "no irq for device\n");
1279         }
1280
1281         /* allocate, reserve and remap resources for registers */
1282         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1283         if (res == NULL) {
1284                 dev_err(dev, "no resource definition for registers\n");
1285                 ret = -ENOENT;
1286                 goto err_release;
1287         }
1288
1289         info->regs_res = request_mem_region(res->start,
1290                                             res->end - res->start,
1291                                             pdev->name);
1292
1293         if (info->regs_res == NULL) {
1294                 dev_err(dev, "cannot claim registers\n");
1295                 ret = -ENXIO;
1296                 goto err_release;
1297         }
1298
1299         info->regs = ioremap(res->start, (res->end - res->start)+1);
1300         if (info->regs == NULL) {
1301                 dev_err(dev, "cannot remap registers\n");
1302                 ret = -ENXIO;
1303                 goto err_regs_res;
1304         }
1305
1306         /* allocate, reserve resources for framebuffer */
1307         res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1308         if (res == NULL) {
1309                 dev_err(dev, "no memory resource defined\n");
1310                 ret = -ENXIO;
1311                 goto err_regs_map;
1312         }
1313
1314         info->fbmem_res = request_mem_region(res->start,
1315                                              (res->end - res->start)+1,
1316                                              pdev->name);
1317         if (info->fbmem_res == NULL) {
1318                 dev_err(dev, "cannot claim framebuffer\n");
1319                 ret = -ENXIO;
1320                 goto err_regs_map;
1321         }
1322
1323         info->fbmem = ioremap(res->start, (res->end - res->start)+1);
1324         if (info->fbmem == NULL) {
1325                 dev_err(dev, "cannot remap framebuffer\n");
1326                 goto err_mem_res;
1327         }
1328
1329         info->fbmem_len = (res->end - res->start)+1;
1330
1331         /* enable display controller */
1332         sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
1333
1334         /* setup cursors */
1335
1336         sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
1337         sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
1338
1339         return 0; /* everything is setup */
1340
1341  err_mem_res:
1342         release_resource(info->fbmem_res);
1343         kfree(info->fbmem_res);
1344
1345  err_regs_map:
1346         iounmap(info->regs);
1347
1348  err_regs_res:
1349         release_resource(info->regs_res);
1350         kfree(info->regs_res);
1351
1352  err_release:
1353         return ret;
1354 }
1355
1356 static void sm501fb_stop(struct sm501fb_info *info)
1357 {
1358         /* disable display controller */
1359         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1360
1361         iounmap(info->fbmem);
1362         release_resource(info->fbmem_res);
1363         kfree(info->fbmem_res);
1364
1365         iounmap(info->regs);
1366         release_resource(info->regs_res);
1367         kfree(info->regs_res);
1368 }
1369
1370 static void sm501fb_info_release(struct sm501fb_info *info)
1371 {
1372         kfree(info);
1373 }
1374
1375 static int sm501fb_init_fb(struct fb_info *fb,
1376                            enum sm501_controller head,
1377                            const char *fbname)
1378 {
1379         struct sm501_platdata_fbsub *pd;
1380         struct sm501fb_par *par = fb->par;
1381         struct sm501fb_info *info = par->info;
1382         unsigned long ctrl;
1383         unsigned int enable;
1384         int ret;
1385
1386         switch (head) {
1387         case HEAD_CRT:
1388                 pd = info->pdata->fb_crt;
1389                 ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1390                 enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0;
1391
1392                 /* ensure we set the correct source register */
1393                 if (info->pdata->fb_route != SM501_FB_CRT_PANEL) {
1394                         ctrl |= SM501_DC_CRT_CONTROL_SEL;
1395                         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1396                 }
1397
1398                 break;
1399
1400         case HEAD_PANEL:
1401                 pd = info->pdata->fb_pnl;
1402                 ctrl = readl(info->regs + SM501_DC_PANEL_CONTROL);
1403                 enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0;
1404                 break;
1405
1406         default:
1407                 pd = NULL;              /* stop compiler warnings */
1408                 ctrl = 0;
1409                 enable = 0;
1410                 BUG();
1411         }
1412
1413         dev_info(info->dev, "fb %s %sabled at start\n",
1414                  fbname, enable ? "en" : "dis");
1415
1416         /* check to see if our routing allows this */
1417
1418         if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) {
1419                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1420                 writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1421                 enable = 0;
1422         }
1423
1424         strlcpy(fb->fix.id, fbname, sizeof(fb->fix.id));
1425
1426         memcpy(&par->ops,
1427                (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
1428                sizeof(struct fb_ops));
1429
1430         /* update ops dependant on what we've been passed */
1431
1432         if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
1433                 par->ops.fb_cursor = NULL;
1434
1435         fb->fbops = &par->ops;
1436         fb->flags = FBINFO_FLAG_DEFAULT |
1437                 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
1438
1439         /* fixed data */
1440
1441         fb->fix.type            = FB_TYPE_PACKED_PIXELS;
1442         fb->fix.type_aux        = 0;
1443         fb->fix.xpanstep        = 1;
1444         fb->fix.ypanstep        = 1;
1445         fb->fix.ywrapstep       = 0;
1446         fb->fix.accel           = FB_ACCEL_NONE;
1447
1448         /* screenmode */
1449
1450         fb->var.nonstd          = 0;
1451         fb->var.activate        = FB_ACTIVATE_NOW;
1452         fb->var.accel_flags     = 0;
1453         fb->var.vmode           = FB_VMODE_NONINTERLACED;
1454         fb->var.bits_per_pixel  = 16;
1455
1456         if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
1457                 /* TODO read the mode from the current display */
1458
1459         } else {
1460                 if (pd->def_mode) {
1461                         dev_info(info->dev, "using supplied mode\n");
1462                         fb_videomode_to_var(&fb->var, pd->def_mode);
1463
1464                         fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8;
1465                         fb->var.xres_virtual = fb->var.xres;
1466                         fb->var.yres_virtual = fb->var.yres;
1467                 } else {
1468                         ret = fb_find_mode(&fb->var, fb,
1469                                            NULL, NULL, 0, NULL, 8);
1470
1471                         if (ret == 0 || ret == 4) {
1472                                 dev_err(info->dev,
1473                                         "failed to get initial mode\n");
1474                                 return -EINVAL;
1475                         }
1476                 }
1477         }
1478
1479         /* initialise and set the palette */
1480         fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0);
1481         fb_set_cmap(&fb->cmap, fb);
1482
1483         ret = (fb->fbops->fb_check_var)(&fb->var, fb);
1484         if (ret)
1485                 dev_err(info->dev, "check_var() failed on initial setup?\n");
1486
1487         /* ensure we've activated our new configuration */
1488         (fb->fbops->fb_set_par)(fb);
1489
1490         return 0;
1491 }
1492
1493 /* default platform data if none is supplied (ie, PCI device) */
1494
1495 static struct sm501_platdata_fbsub sm501fb_pdata_crt = {
1496         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1497                            SM501FB_FLAG_USE_HWCURSOR |
1498                            SM501FB_FLAG_USE_HWACCEL |
1499                            SM501FB_FLAG_DISABLE_AT_EXIT),
1500
1501 };
1502
1503 static struct sm501_platdata_fbsub sm501fb_pdata_pnl = {
1504         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1505                            SM501FB_FLAG_USE_HWCURSOR |
1506                            SM501FB_FLAG_USE_HWACCEL |
1507                            SM501FB_FLAG_DISABLE_AT_EXIT),
1508 };
1509
1510 static struct sm501_platdata_fb sm501fb_def_pdata = {
1511         .fb_route               = SM501_FB_OWN,
1512         .fb_crt                 = &sm501fb_pdata_crt,
1513         .fb_pnl                 = &sm501fb_pdata_pnl,
1514 };
1515
1516 static char driver_name_crt[] = "sm501fb-crt";
1517 static char driver_name_pnl[] = "sm501fb-panel";
1518
1519 static int __init sm501fb_probe(struct platform_device *pdev)
1520 {
1521         struct sm501fb_info *info;
1522         struct device       *dev = &pdev->dev;
1523         struct fb_info      *fbinfo_crt;
1524         struct fb_info      *fbinfo_pnl;
1525         int                  ret;
1526
1527         /* allocate our framebuffers */
1528
1529         fbinfo_crt = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1530         if (fbinfo_crt == NULL) {
1531                 dev_err(dev, "cannot allocate crt framebuffer\n");
1532                 return -ENOMEM;
1533         }
1534
1535         fbinfo_pnl = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1536         if (fbinfo_pnl == NULL) {
1537                 dev_err(dev, "cannot allocate panel framebuffer\n");
1538                 ret = -ENOMEM;
1539                 goto fbinfo_crt_alloc_fail;
1540         }
1541
1542         info = sm501fb_info_alloc(fbinfo_crt, fbinfo_pnl);
1543         if (info == NULL) {
1544                 dev_err(dev, "cannot allocate par\n");
1545                 ret = -ENOMEM;
1546                 goto sm501fb_alloc_fail;
1547         }
1548
1549         if (dev->parent->platform_data) {
1550                 struct sm501_platdata *pd = dev->parent->platform_data;
1551                 info->pdata = pd->fb;
1552         }
1553
1554         if (info->pdata == NULL) {
1555                 dev_info(dev, "using default configuration data\n");
1556                 info->pdata = &sm501fb_def_pdata;
1557         }
1558
1559         /* start the framebuffers */
1560
1561         ret = sm501fb_start(info, pdev);
1562         if (ret) {
1563                 dev_err(dev, "cannot initialise SM501\n");
1564                 goto sm501fb_start_fail;
1565         }
1566
1567         /* CRT framebuffer setup */
1568
1569         ret = sm501fb_init_fb(fbinfo_crt, HEAD_CRT, driver_name_crt);
1570         if (ret) {
1571                 dev_err(dev, "cannot initialise CRT fb\n");
1572                 goto sm501fb_start_fail;
1573         }
1574
1575         /* Panel framebuffer setup */
1576
1577         ret = sm501fb_init_fb(fbinfo_pnl, HEAD_PANEL, driver_name_pnl);
1578         if (ret) {
1579                 dev_err(dev, "cannot initialise Panel fb\n");
1580                 goto sm501fb_start_fail;
1581         }
1582
1583         /* register framebuffers */
1584
1585         ret = register_framebuffer(fbinfo_crt);
1586         if (ret < 0) {
1587                 dev_err(dev, "failed to register CRT fb (%d)\n", ret);
1588                 goto register_crt_fail;
1589         }
1590
1591         ret = register_framebuffer(fbinfo_pnl);
1592         if (ret < 0) {
1593                 dev_err(dev, "failed to register panel fb (%d)\n", ret);
1594                 goto register_pnl_fail;
1595         }
1596
1597         dev_info(dev, "fb%d: %s frame buffer device\n",
1598                  fbinfo_crt->node, fbinfo_crt->fix.id);
1599
1600         dev_info(dev, "fb%d: %s frame buffer device\n",
1601                fbinfo_pnl->node, fbinfo_pnl->fix.id);
1602
1603         /* create device files */
1604
1605         ret = device_create_file(dev, &dev_attr_crt_src);
1606         if (ret)
1607                 goto crtsrc_fail;
1608
1609         ret = device_create_file(dev, &dev_attr_fbregs_pnl);
1610         if (ret)
1611                 goto fbregs_pnl_fail;
1612
1613         ret = device_create_file(dev, &dev_attr_fbregs_crt);
1614         if (ret)
1615                 goto fbregs_crt_fail;
1616
1617         /* we registered, return ok */
1618         return 0;
1619
1620  fbregs_crt_fail:
1621         device_remove_file(dev, &dev_attr_fbregs_pnl);
1622
1623  fbregs_pnl_fail:
1624         device_remove_file(dev, &dev_attr_crt_src);
1625
1626  crtsrc_fail:
1627         unregister_framebuffer(fbinfo_pnl);
1628
1629  register_pnl_fail:
1630         unregister_framebuffer(fbinfo_crt);
1631
1632  register_crt_fail:
1633         sm501fb_stop(info);
1634
1635  sm501fb_start_fail:
1636         sm501fb_info_release(info);
1637
1638  sm501fb_alloc_fail:
1639         framebuffer_release(fbinfo_pnl);
1640
1641  fbinfo_crt_alloc_fail:
1642         framebuffer_release(fbinfo_crt);
1643
1644         return ret;
1645 }
1646
1647
1648 /*
1649  *  Cleanup
1650  */
1651 static int sm501fb_remove(struct platform_device *pdev)
1652 {
1653         struct sm501fb_info *info = platform_get_drvdata(pdev);
1654         struct fb_info     *fbinfo_crt = info->fb[0];
1655         struct fb_info     *fbinfo_pnl = info->fb[1];
1656
1657         device_remove_file(&pdev->dev, &dev_attr_fbregs_crt);
1658         device_remove_file(&pdev->dev, &dev_attr_fbregs_pnl);
1659         device_remove_file(&pdev->dev, &dev_attr_crt_src);
1660
1661         unregister_framebuffer(fbinfo_crt);
1662         unregister_framebuffer(fbinfo_pnl);
1663
1664         sm501fb_stop(info);
1665         sm501fb_info_release(info);
1666
1667         framebuffer_release(fbinfo_pnl);
1668         framebuffer_release(fbinfo_crt);
1669
1670         return 0;
1671 }
1672
1673 #ifdef CONFIG_PM
1674
1675 static int sm501fb_suspend_fb(struct sm501fb_info *info,
1676                               enum sm501_controller head)
1677 {
1678         struct fb_info *fbi = info->fb[head];
1679         struct sm501fb_par *par = fbi->par;
1680
1681         if (par->screen.size == 0)
1682                 return 0;
1683
1684         /* backup copies in case chip is powered down over suspend */
1685
1686         par->store_fb = vmalloc(par->screen.size);
1687         if (par->store_fb == NULL) {
1688                 dev_err(info->dev, "no memory to store screen\n");
1689                 return -ENOMEM;
1690         }
1691
1692         par->store_cursor = vmalloc(par->cursor.size);
1693         if (par->store_cursor == NULL) {
1694                 dev_err(info->dev, "no memory to store cursor\n");
1695                 goto err_nocursor;
1696         }
1697
1698         dev_dbg(info->dev, "suspending screen to %p\n", par->store_fb);
1699         dev_dbg(info->dev, "suspending cursor to %p\n", par->store_cursor);
1700
1701         memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size);
1702         memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size);
1703         /* blank the relevant interface to ensure unit power minimised */
1704         (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi);
1705
1706         acquire_console_sem();
1707         fb_set_suspend(fbi, 1);
1708         release_console_sem();
1709
1710         return 0;
1711
1712  err_nocursor:
1713         vfree(par->store_fb);
1714         par->store_fb = NULL;
1715
1716         return -ENOMEM;
1717 }
1718
1719 static void sm501fb_resume_fb(struct sm501fb_info *info,
1720                               enum sm501_controller head)
1721 {
1722         struct fb_info *fbi = info->fb[head];
1723         struct sm501fb_par *par = fbi->par;
1724
1725         if (par->screen.size == 0)
1726                 return;
1727
1728         /* re-activate the configuration */
1729
1730         (par->ops.fb_set_par)(fbi);
1731
1732         /* restore the data */
1733
1734         dev_dbg(info->dev, "restoring screen from %p\n", par->store_fb);
1735         dev_dbg(info->dev, "restoring cursor from %p\n", par->store_cursor);
1736
1737         if (par->store_fb)
1738                 memcpy_toio(par->screen.k_addr, par->store_fb,
1739                             par->screen.size);
1740
1741         if (par->store_cursor)
1742                 memcpy_toio(par->cursor.k_addr, par->store_cursor,
1743                             par->cursor.size);
1744
1745         acquire_console_sem();
1746         fb_set_suspend(fbi, 0);
1747         release_console_sem();
1748
1749         vfree(par->store_fb);
1750         vfree(par->store_cursor);
1751 }
1752
1753
1754 /* suspend and resume support */
1755
1756 static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state)
1757 {
1758         struct sm501fb_info *info = platform_get_drvdata(pdev);
1759
1760         /* store crt control to resume with */
1761         info->pm_crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1762
1763         sm501fb_suspend_fb(info, HEAD_CRT);
1764         sm501fb_suspend_fb(info, HEAD_PANEL);
1765
1766         /* turn off the clocks, in case the device is not powered down */
1767         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1768
1769         return 0;
1770 }
1771
1772 #define SM501_CRT_CTRL_SAVE (SM501_DC_CRT_CONTROL_TVP |        \
1773                              SM501_DC_CRT_CONTROL_SEL)
1774
1775
1776 static int sm501fb_resume(struct platform_device *pdev)
1777 {
1778         struct sm501fb_info *info = platform_get_drvdata(pdev);
1779         unsigned long crt_ctrl;
1780
1781         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1);
1782
1783         /* restore the items we want to be saved for crt control */
1784
1785         crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1786         crt_ctrl &= ~SM501_CRT_CTRL_SAVE;
1787         crt_ctrl |= info->pm_crt_ctrl & SM501_CRT_CTRL_SAVE;
1788         writel(crt_ctrl, info->regs + SM501_DC_CRT_CONTROL);
1789
1790         sm501fb_resume_fb(info, HEAD_CRT);
1791         sm501fb_resume_fb(info, HEAD_PANEL);
1792
1793         return 0;
1794 }
1795
1796 #else
1797 #define sm501fb_suspend NULL
1798 #define sm501fb_resume  NULL
1799 #endif
1800
1801 static struct platform_driver sm501fb_driver = {
1802         .probe          = sm501fb_probe,
1803         .remove         = sm501fb_remove,
1804         .suspend        = sm501fb_suspend,
1805         .resume         = sm501fb_resume,
1806         .driver         = {
1807                 .name   = "sm501-fb",
1808                 .owner  = THIS_MODULE,
1809         },
1810 };
1811
1812 static int __devinit sm501fb_init(void)
1813 {
1814         return platform_driver_register(&sm501fb_driver);
1815 }
1816
1817 static void __exit sm501fb_cleanup(void)
1818 {
1819         platform_driver_unregister(&sm501fb_driver);
1820 }
1821
1822 module_init(sm501fb_init);
1823 module_exit(sm501fb_cleanup);
1824
1825 MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
1826 MODULE_DESCRIPTION("SM501 Framebuffer driver");
1827 MODULE_LICENSE("GPL v2");