drivers/video/mxsfb.c

   1 /*
   2  * Copyright (C) 2010 Juergen Beisert, Pengutronix
   3  *
   4  * This code is based on:
   5  * Author: Vitaly Wool <vital@embeddedalley.com>
   6  *
   7  * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
   8  * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * as published by the Free Software Foundation; either version 2
  13  * of the License, or (at your option) any later version.
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  */
  19
  20 #define DRIVER_NAME "mxsfb"
  21
  22 /**
  23  * @file
  24  * @brief LCDIF driver for i.MX23 and i.MX28
  25  *
  26  * The LCDIF support four modes of operation
  27  * - MPU interface (to drive smart displays) -> not supported yet
  28  * - VSYNC interface (like MPU interface plus Vsync) -> not supported yet
  29  * - Dotclock interface (to drive LC displays with RGB data and sync signals)
  30  * - DVI (to drive ITU-R BT656)  -> not supported yet
  31  *
  32  * This driver depends on a correct setup of the pins used for this purpose
  33  * (platform specific).
  34  *
  35  * For the developer: Don't forget to set the data bus width to the display
  36  * in the imx_fb_videomode structure. You will else end up with ugly colours.
  37  * If you fight against jitter you can vary the clock delay. This is a feature
  38  * of the i.MX28 and you can vary it between 2 ns ... 8 ns in 2 ns steps. Give
  39  * the required value in the imx_fb_videomode structure.
  40  */
  41
  42 #include <linux/kernel.h>
  43 #include <linux/platform_device.h>
  44 #include <linux/clk.h>
  45 #include <linux/dma-mapping.h>
  46 #include <linux/io.h>
  47 #include <mach/mxsfb.h>
  48
  49 #define REG_SET 4
  50 #define REG_CLR 8
  51
  52 #define LCDC_CTRL                       0x00
  53 #define LCDC_CTRL1                      0x10
  54 #define LCDC_V4_CTRL2                   0x20
  55 #define LCDC_V3_TRANSFER_COUNT          0x20
  56 #define LCDC_V4_TRANSFER_COUNT          0x30
  57 #define LCDC_V4_CUR_BUF                 0x40
  58 #define LCDC_V4_NEXT_BUF                0x50
  59 #define LCDC_V3_CUR_BUF                 0x30
  60 #define LCDC_V3_NEXT_BUF                0x40
  61 #define LCDC_TIMING                     0x60
  62 #define LCDC_VDCTRL0                    0x70
  63 #define LCDC_VDCTRL1                    0x80
  64 #define LCDC_VDCTRL2                    0x90
  65 #define LCDC_VDCTRL3                    0xa0
  66 #define LCDC_VDCTRL4                    0xb0
  67 #define LCDC_DVICTRL0                   0xc0
  68 #define LCDC_DVICTRL1                   0xd0
  69 #define LCDC_DVICTRL2                   0xe0
  70 #define LCDC_DVICTRL3                   0xf0
  71 #define LCDC_DVICTRL4                   0x100
  72 #define LCDC_V4_DATA                    0x180
  73 #define LCDC_V3_DATA                    0x1b0
  74 #define LCDC_V4_DEBUG0                  0x1d0
  75 #define LCDC_V3_DEBUG0                  0x1f0
  76
  77 #define CTRL_SFTRST                     (1 << 31)
  78 #define CTRL_CLKGATE                    (1 << 30)
  79 #define CTRL_BYPASS_COUNT               (1 << 19)
  80 #define CTRL_VSYNC_MODE                 (1 << 18)
  81 #define CTRL_DOTCLK_MODE                (1 << 17)
  82 #define CTRL_DATA_SELECT                (1 << 16)
  83 #define CTRL_SET_BUS_WIDTH(x)           (((x) & 0x3) << 10)
  84 #define CTRL_GET_BUS_WIDTH(x)           (((x) >> 10) & 0x3)
  85 #define CTRL_SET_WORD_LENGTH(x)         (((x) & 0x3) << 8)
  86 #define CTRL_GET_WORD_LENGTH(x)         (((x) >> 8) & 0x3)
  87 #define CTRL_MASTER                     (1 << 5)
  88 #define CTRL_DF16                       (1 << 3)
  89 #define CTRL_DF18                       (1 << 2)
  90 #define CTRL_DF24                       (1 << 1)
  91 #define CTRL_RUN                        (1 << 0)
  92
  93 #define CTRL1_FIFO_CLEAR                (1 << 21)
  94 #define CTRL1_SET_BYTE_PACKAGING(x)     (((x) & 0xf) << 16)
  95 #define CTRL1_GET_BYTE_PACKAGING(x)     (((x) >> 16) & 0xf)
  96
  97 #define TRANSFER_COUNT_SET_VCOUNT(x)    (((x) & 0xffff) << 16)
  98 #define TRANSFER_COUNT_GET_VCOUNT(x)    (((x) >> 16) & 0xffff)
  99 #define TRANSFER_COUNT_SET_HCOUNT(x)    ((x) & 0xffff)
 100 #define TRANSFER_COUNT_GET_HCOUNT(x)    ((x) & 0xffff)
 101
 102
 103 #define VDCTRL0_ENABLE_PRESENT          (1 << 28)
 104 #define VDCTRL0_VSYNC_ACT_HIGH          (1 << 27)
 105 #define VDCTRL0_HSYNC_ACT_HIGH          (1 << 26)
 106 #define VDCTRL0_DOTCLK_ACT_FAILING      (1 << 25)
 107 #define VDCTRL0_ENABLE_ACT_HIGH         (1 << 24)
 108 #define VDCTRL0_VSYNC_PERIOD_UNIT       (1 << 21)
 109 #define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT  (1 << 20)
 110 #define VDCTRL0_HALF_LINE               (1 << 19)
 111 #define VDCTRL0_HALF_LINE_MODE          (1 << 18)
 112 #define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
 113 #define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
 114
 115 #define VDCTRL2_SET_HSYNC_PERIOD(x)     ((x) & 0x3ffff)
 116 #define VDCTRL2_GET_HSYNC_PERIOD(x)     ((x) & 0x3ffff)
 117
 118 #define VDCTRL3_MUX_SYNC_SIGNALS        (1 << 29)
 119 #define VDCTRL3_VSYNC_ONLY              (1 << 28)
 120 #define SET_HOR_WAIT_CNT(x)             (((x) & 0xfff) << 16)
 121 #define GET_HOR_WAIT_CNT(x)             (((x) >> 16) & 0xfff)
 122 #define SET_VERT_WAIT_CNT(x)            ((x) & 0xffff)
 123 #define GET_VERT_WAIT_CNT(x)            ((x) & 0xffff)
 124
 125 #define VDCTRL4_SET_DOTCLK_DLY(x)       (((x) & 0x7) << 29) /* v4 only */
 126 #define VDCTRL4_GET_DOTCLK_DLY(x)       (((x) >> 29) & 0x7) /* v4 only */
 127 #define VDCTRL4_SYNC_SIGNALS_ON         (1 << 18)
 128 #define SET_DOTCLK_H_VALID_DATA_CNT(x)  ((x) & 0x3ffff)
 129
 130 #define DEBUG0_HSYNC                    (1 < 26)
 131 #define DEBUG0_VSYNC                    (1 < 25)
 132
 133 #define MIN_XRES                        120
 134 #define MIN_YRES                        120
 135
 136 #define RED 0
 137 #define GREEN 1
 138 #define BLUE 2
 139 #define TRANSP 3
 140
 141 enum mxsfb_devtype {
 142         MXSFB_V3,
 143         MXSFB_V4,
 144 };
 145
 146 /* CPU dependent register offsets */
 147 struct mxsfb_devdata {
 148         unsigned transfer_count;
 149         unsigned cur_buf;
 150         unsigned next_buf;
 151         unsigned debug0;
 152         unsigned hs_wdth_mask;
 153         unsigned hs_wdth_shift;
 154         unsigned ipversion;
 155 };
 156
 157 struct mxsfb_info {
 158         struct fb_info fb_info;
 159         struct platform_device *pdev;
 160         struct clk *clk;
 161         void __iomem *base;     /* registers */
 162         unsigned allocated_size;
 163         int enabled;
 164         unsigned ld_intf_width;
 165         unsigned dotclk_delay;
 166         const struct mxsfb_devdata *devdata;
 167         int mapped;
 168 };
 169
 170 #define mxsfb_is_v3(host) (host->devdata->ipversion == 3)
 171 #define mxsfb_is_v4(host) (host->devdata->ipversion == 4)
 172
 173 static const struct mxsfb_devdata mxsfb_devdata[] = {
 174         [MXSFB_V3] = {
 175                 .transfer_count = LCDC_V3_TRANSFER_COUNT,
 176                 .cur_buf = LCDC_V3_CUR_BUF,
 177                 .next_buf = LCDC_V3_NEXT_BUF,
 178                 .debug0 = LCDC_V3_DEBUG0,
 179                 .hs_wdth_mask = 0xff,
 180                 .hs_wdth_shift = 24,
 181                 .ipversion = 3,
 182         },
 183         [MXSFB_V4] = {
 184                 .transfer_count = LCDC_V4_TRANSFER_COUNT,
 185                 .cur_buf = LCDC_V4_CUR_BUF,
 186                 .next_buf = LCDC_V4_NEXT_BUF,
 187                 .debug0 = LCDC_V4_DEBUG0,
 188                 .hs_wdth_mask = 0x3fff,
 189                 .hs_wdth_shift = 18,
 190                 .ipversion = 4,
 191         },
 192 };
 193
 194 #define to_imxfb_host(x) (container_of(x, struct mxsfb_info, fb_info))
 195
 196 /* mask and shift depends on architecture */
 197 static inline u32 set_hsync_pulse_width(struct mxsfb_info *host, unsigned val)
 198 {
 199         return (val & host->devdata->hs_wdth_mask) <<
 200                 host->devdata->hs_wdth_shift;
 201 }
 202
 203 static inline u32 get_hsync_pulse_width(struct mxsfb_info *host, unsigned val)
 204 {
 205         return (val >> host->devdata->hs_wdth_shift) &
 206                 host->devdata->hs_wdth_mask;
 207 }
 208
 209 static const struct fb_bitfield def_rgb565[] = {
 210         [RED] = {
 211                 .offset = 11,
 212                 .length = 5,
 213         },
 214         [GREEN] = {
 215                 .offset = 5,
 216                 .length = 6,
 217         },
 218         [BLUE] = {
 219                 .offset = 0,
 220                 .length = 5,
 221         },
 222         [TRANSP] = {    /* no support for transparency */
 223                 .length = 0,
 224         }
 225 };
 226
 227 static const struct fb_bitfield def_rgb666[] = {
 228         [RED] = {
 229                 .offset = 16,
 230                 .length = 6,
 231         },
 232         [GREEN] = {
 233                 .offset = 8,
 234                 .length = 6,
 235         },
 236         [BLUE] = {
 237                 .offset = 0,
 238                 .length = 6,
 239         },
 240         [TRANSP] = {    /* no support for transparency */
 241                 .length = 0,
 242         }
 243 };
 244
 245 static const struct fb_bitfield def_rgb888[] = {
 246         [RED] = {
 247                 .offset = 16,
 248                 .length = 8,
 249         },
 250         [GREEN] = {
 251                 .offset = 8,
 252                 .length = 8,
 253         },
 254         [BLUE] = {
 255                 .offset = 0,
 256                 .length = 8,
 257         },
 258         [TRANSP] = {    /* no support for transparency */
 259                 .length = 0,
 260         }
 261 };
 262
 263 static inline unsigned chan_to_field(unsigned chan, struct fb_bitfield *bf)
 264 {
 265         chan &= 0xffff;
 266         chan >>= 16 - bf->length;
 267         return chan << bf->offset;
 268 }
 269
 270 static int mxsfb_check_var(struct fb_var_screeninfo *var,
 271                 struct fb_info *fb_info)
 272 {
 273         struct mxsfb_info *host = to_imxfb_host(fb_info);
 274         const struct fb_bitfield *rgb = NULL;
 275
 276         if (var->xres < MIN_XRES)
 277                 var->xres = MIN_XRES;
 278         if (var->yres < MIN_YRES)
 279                 var->yres = MIN_YRES;
 280
 281         var->xres_virtual = var->xres;
 282
 283         var->yres_virtual = var->yres;
 284
 285         switch (var->bits_per_pixel) {
 286         case 16:
 287                 /* always expect RGB 565 */
 288                 rgb = def_rgb565;
 289                 break;
 290         case 32:
 291                 switch (host->ld_intf_width) {
 292                 case STMLCDIF_8BIT:
 293                         pr_debug("Unsupported LCD bus width mapping\n");
 294                         break;
 295                 case STMLCDIF_16BIT:
 296                 case STMLCDIF_18BIT:
 297                         /* 24 bit to 18 bit mapping */
 298                         rgb = def_rgb666;
 299                         break;
 300                 case STMLCDIF_24BIT:
 301                         /* real 24 bit */
 302                         rgb = def_rgb888;
 303                         break;
 304                 }
 305                 break;
 306         default:
 307                 pr_debug("Unsupported colour depth: %u\n", var->bits_per_pixel);
 308                 return -EINVAL;
 309         }
 310
 311         /*
 312          * Copy the RGB parameters for this display
 313          * from the machine specific parameters.
 314          */
 315         var->red    = rgb[RED];
 316         var->green  = rgb[GREEN];
 317         var->blue   = rgb[BLUE];
 318         var->transp = rgb[TRANSP];
 319
 320         return 0;
 321 }
 322
 323 static void mxsfb_enable_controller(struct fb_info *fb_info)
 324 {
 325         struct mxsfb_info *host = to_imxfb_host(fb_info);
 326         u32 reg;
 327
 328         dev_dbg(&host->pdev->dev, "%s\n", __func__);
 329
 330         clk_enable(host->clk);
 331         clk_set_rate(host->clk, PICOS2KHZ(fb_info->var.pixclock) * 1000U);
 332
 333         /* if it was disabled, re-enable the mode again */
 334         writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_SET);
 335
 336         /* enable the SYNC signals first, then the DMA engine */
 337         reg = readl(host->base + LCDC_VDCTRL4);
 338         reg |= VDCTRL4_SYNC_SIGNALS_ON;
 339         writel(reg, host->base + LCDC_VDCTRL4);
 340
 341         writel(CTRL_RUN, host->base + LCDC_CTRL + REG_SET);
 342
 343         host->enabled = 1;
 344 }
 345
 346 static void mxsfb_disable_controller(struct fb_info *fb_info)
 347 {
 348         struct mxsfb_info *host = to_imxfb_host(fb_info);
 349         unsigned loop;
 350         u32 reg;
 351
 352         dev_dbg(&host->pdev->dev, "%s\n", __func__);
 353
 354         /*
 355          * Even if we disable the controller here, it will still continue
 356          * until its FIFOs are running out of data
 357          */
 358         writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_CLR);
 359
 360         loop = 1000;
 361         while (loop) {
 362                 reg = readl(host->base + LCDC_CTRL);
 363                 if (!(reg & CTRL_RUN))
 364                         break;
 365                 loop--;
 366         }
 367
 368         writel(VDCTRL4_SYNC_SIGNALS_ON, host->base + LCDC_VDCTRL4 + REG_CLR);
 369
 370         clk_disable(host->clk);
 371
 372         host->enabled = 0;
 373 }
 374
 375 static int mxsfb_set_par(struct fb_info *fb_info)
 376 {
 377         struct mxsfb_info *host = to_imxfb_host(fb_info);
 378         u32 ctrl, vdctrl0, vdctrl4;
 379         int line_size, fb_size;
 380         int reenable = 0;
 381
 382         line_size =  fb_info->var.xres * (fb_info->var.bits_per_pixel >> 3);
 383         fb_size = fb_info->var.yres_virtual * line_size;
 384
 385         if (fb_size > fb_info->fix.smem_len)
 386                 return -ENOMEM;
 387
 388         fb_info->fix.line_length = line_size;
 389
 390         /*
 391          * It seems, you can't re-program the controller if it is still running.
 392          * This may lead into shifted pictures (FIFO issue?).
 393          * So, first stop the controller and drain its FIFOs
 394          */
 395         if (host->enabled) {
 396                 reenable = 1;
 397                 mxsfb_disable_controller(fb_info);
 398         }
 399
 400         /* clear the FIFOs */
 401         writel(CTRL1_FIFO_CLEAR, host->base + LCDC_CTRL1 + REG_SET);
 402
 403         ctrl = CTRL_BYPASS_COUNT | CTRL_MASTER |
 404                 CTRL_SET_BUS_WIDTH(host->ld_intf_width);;
 405
 406         switch (fb_info->var.bits_per_pixel) {
 407         case 16:
 408                 dev_dbg(&host->pdev->dev, "Setting up RGB565 mode\n");
 409                 ctrl |= CTRL_SET_WORD_LENGTH(0);
 410                 writel(CTRL1_SET_BYTE_PACKAGING(0xf), host->base + LCDC_CTRL1);
 411                 break;
 412         case 32:
 413                 dev_dbg(&host->pdev->dev, "Setting up RGB888/666 mode\n");
 414                 ctrl |= CTRL_SET_WORD_LENGTH(3);
 415                 switch (host->ld_intf_width) {
 416                 case STMLCDIF_8BIT:
 417                         dev_dbg(&host->pdev->dev,
 418                                         "Unsupported LCD bus width mapping\n");
 419                         return -EINVAL;
 420                 case STMLCDIF_16BIT:
 421                 case STMLCDIF_18BIT:
 422                         /* 24 bit to 18 bit mapping */
 423                         ctrl |= CTRL_DF24; /* ignore the upper 2 bits in
 424                                             *  each colour component
 425                                             */
 426                         break;
 427                 case STMLCDIF_24BIT:
 428                         /* real 24 bit */
 429                         break;
 430                 }
 431                 /* do not use packed pixels = one pixel per word instead */
 432                 writel(CTRL1_SET_BYTE_PACKAGING(0x7), host->base + LCDC_CTRL1);
 433                 break;
 434         default:
 435                 dev_dbg(&host->pdev->dev, "Unhandled color depth of %u\n",
 436                                 fb_info->var.bits_per_pixel);
 437                 return -EINVAL;
 438         }
 439
 440         writel(ctrl, host->base + LCDC_CTRL);
 441
 442         writel(TRANSFER_COUNT_SET_VCOUNT(fb_info->var.yres) |
 443                         TRANSFER_COUNT_SET_HCOUNT(fb_info->var.xres),
 444                         host->base + host->devdata->transfer_count);
 445
 446         vdctrl0 = VDCTRL0_ENABLE_PRESENT |      /* always in DOTCLOCK mode */
 447                 VDCTRL0_VSYNC_PERIOD_UNIT |
 448                 VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
 449                 VDCTRL0_SET_VSYNC_PULSE_WIDTH(fb_info->var.vsync_len);
 450         if (fb_info->var.sync & FB_SYNC_HOR_HIGH_ACT)
 451                 vdctrl0 |= VDCTRL0_HSYNC_ACT_HIGH;
 452         if (fb_info->var.sync & FB_SYNC_VERT_HIGH_ACT)
 453                 vdctrl0 |= VDCTRL0_VSYNC_ACT_HIGH;
 454         if (fb_info->var.sync & FB_SYNC_DATA_ENABLE_HIGH_ACT)
 455                 vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH;
 456         if (fb_info->var.sync & FB_SYNC_DOTCLK_FAILING_ACT)
 457                 vdctrl0 |= VDCTRL0_DOTCLK_ACT_FAILING;
 458
 459         writel(vdctrl0, host->base + LCDC_VDCTRL0);
 460
 461         /* frame length in lines */
 462         writel(fb_info->var.upper_margin + fb_info->var.vsync_len +
 463                 fb_info->var.lower_margin + fb_info->var.yres,
 464                 host->base + LCDC_VDCTRL1);
 465
 466         /* line length in units of clocks or pixels */
 467         writel(set_hsync_pulse_width(host, fb_info->var.hsync_len) |
 468                 VDCTRL2_SET_HSYNC_PERIOD(fb_info->var.left_margin +
 469                 fb_info->var.hsync_len + fb_info->var.right_margin +
 470                 fb_info->var.xres),
 471                 host->base + LCDC_VDCTRL2);
 472
 473         writel(SET_HOR_WAIT_CNT(fb_info->var.left_margin +
 474                 fb_info->var.hsync_len) |
 475                 SET_VERT_WAIT_CNT(fb_info->var.upper_margin +
 476                         fb_info->var.vsync_len),
 477                 host->base + LCDC_VDCTRL3);
 478
 479         vdctrl4 = SET_DOTCLK_H_VALID_DATA_CNT(fb_info->var.xres);
 480         if (mxsfb_is_v4(host))
 481                 vdctrl4 |= VDCTRL4_SET_DOTCLK_DLY(host->dotclk_delay);
 482         writel(vdctrl4, host->base + LCDC_VDCTRL4);
 483
 484         writel(fb_info->fix.smem_start +
 485                         fb_info->fix.line_length * fb_info->var.yoffset,
 486                         host->base + host->devdata->next_buf);
 487
 488         if (reenable)
 489                 mxsfb_enable_controller(fb_info);
 490
 491         return 0;
 492 }
 493
 494 static int mxsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 495                 u_int transp, struct fb_info *fb_info)
 496 {
 497         unsigned int val;
 498         int ret = -EINVAL;
 499
 500         /*
 501          * If greyscale is true, then we convert the RGB value
 502          * to greyscale no matter what visual we are using.
 503          */
 504         if (fb_info->var.grayscale)
 505                 red = green = blue = (19595 * red + 38470 * green +
 506                                         7471 * blue) >> 16;
 507
 508         switch (fb_info->fix.visual) {
 509         case FB_VISUAL_TRUECOLOR:
 510                 /*
 511                  * 12 or 16-bit True Colour.  We encode the RGB value
 512                  * according to the RGB bitfield information.
 513                  */
 514                 if (regno < 16) {
 515                         u32 *pal = fb_info->pseudo_palette;
 516
 517                         val  = chan_to_field(red, &fb_info->var.red);
 518                         val |= chan_to_field(green, &fb_info->var.green);
 519                         val |= chan_to_field(blue, &fb_info->var.blue);
 520
 521                         pal[regno] = val;
 522                         ret = 0;
 523                 }
 524                 break;
 525
 526         case FB_VISUAL_STATIC_PSEUDOCOLOR:
 527         case FB_VISUAL_PSEUDOCOLOR:
 528                 break;
 529         }
 530
 531         return ret;
 532 }
 533
 534 static int mxsfb_blank(int blank, struct fb_info *fb_info)
 535 {
 536         struct mxsfb_info *host = to_imxfb_host(fb_info);
 537
 538         switch (blank) {
 539         case FB_BLANK_POWERDOWN:
 540         case FB_BLANK_VSYNC_SUSPEND:
 541         case FB_BLANK_HSYNC_SUSPEND:
 542         case FB_BLANK_NORMAL:
 543                 if (host->enabled)
 544                         mxsfb_disable_controller(fb_info);
 545                 break;
 546
 547         case FB_BLANK_UNBLANK:
 548                 if (!host->enabled)
 549                         mxsfb_enable_controller(fb_info);
 550                 break;
 551         }
 552         return 0;
 553 }
 554
 555 static int mxsfb_pan_display(struct fb_var_screeninfo *var,
 556                 struct fb_info *fb_info)
 557 {
 558         struct mxsfb_info *host = to_imxfb_host(fb_info);
 559         unsigned offset;
 560
 561         if (var->xoffset != 0)
 562                 return -EINVAL;
 563
 564         offset = fb_info->fix.line_length * var->yoffset;
 565
 566         /* update on next VSYNC */
 567         writel(fb_info->fix.smem_start + offset,
 568                         host->base + host->devdata->next_buf);
 569
 570         return 0;
 571 }
 572
 573 static struct fb_ops mxsfb_ops = {
 574         .owner = THIS_MODULE,
 575         .fb_check_var = mxsfb_check_var,
 576         .fb_set_par = mxsfb_set_par,
 577         .fb_setcolreg = mxsfb_setcolreg,
 578         .fb_blank = mxsfb_blank,
 579         .fb_pan_display = mxsfb_pan_display,
 580         .fb_fillrect = cfb_fillrect,
 581         .fb_copyarea = cfb_copyarea,
 582         .fb_imageblit = cfb_imageblit,
 583 };
 584
 585 static int __devinit mxsfb_restore_mode(struct mxsfb_info *host)
 586 {
 587         struct fb_info *fb_info = &host->fb_info;
 588         unsigned line_count;
 589         unsigned period;
 590         unsigned long pa, fbsize;
 591         int bits_per_pixel, ofs;
 592         u32 transfer_count, vdctrl0, vdctrl2, vdctrl3, vdctrl4, ctrl;
 593         struct fb_videomode vmode;
 594
 595         /* Only restore the mode when the controller is running */
 596         ctrl = readl(host->base + LCDC_CTRL);
 597         if (!(ctrl & CTRL_RUN))
 598                 return -EINVAL;
 599
 600         vdctrl0 = readl(host->base + LCDC_VDCTRL0);
 601         vdctrl2 = readl(host->base + LCDC_VDCTRL2);
 602         vdctrl3 = readl(host->base + LCDC_VDCTRL3);
 603         vdctrl4 = readl(host->base + LCDC_VDCTRL4);
 604
 605         transfer_count = readl(host->base + host->devdata->transfer_count);
 606
 607         vmode.xres = TRANSFER_COUNT_GET_HCOUNT(transfer_count);
 608         vmode.yres = TRANSFER_COUNT_GET_VCOUNT(transfer_count);
 609
 610         switch (CTRL_GET_WORD_LENGTH(ctrl)) {
 611         case 0:
 612                 bits_per_pixel = 16;
 613                 break;
 614         case 3:
 615                 bits_per_pixel = 32;
 616         case 1:
 617         default:
 618                 return -EINVAL;
 619         }
 620
 621         fb_info->var.bits_per_pixel = bits_per_pixel;
 622
 623         vmode.pixclock = KHZ2PICOS(clk_get_rate(host->clk) / 1000U);
 624         vmode.hsync_len = get_hsync_pulse_width(host, vdctrl2);
 625         vmode.left_margin = GET_HOR_WAIT_CNT(vdctrl3) - vmode.hsync_len;
 626         vmode.right_margin = VDCTRL2_GET_HSYNC_PERIOD(vdctrl2) - vmode.hsync_len -
 627                 vmode.left_margin - vmode.xres;
 628         vmode.vsync_len = VDCTRL0_GET_VSYNC_PULSE_WIDTH(vdctrl0);
 629         period = readl(host->base + LCDC_VDCTRL1);
 630         vmode.upper_margin = GET_VERT_WAIT_CNT(vdctrl3) - vmode.vsync_len;
 631         vmode.lower_margin = period - vmode.vsync_len - vmode.upper_margin - vmode.yres;
 632
 633         vmode.vmode = FB_VMODE_NONINTERLACED;
 634
 635         vmode.sync = 0;
 636         if (vdctrl0 & VDCTRL0_HSYNC_ACT_HIGH)
 637                 vmode.sync |= FB_SYNC_HOR_HIGH_ACT;
 638         if (vdctrl0 & VDCTRL0_VSYNC_ACT_HIGH)
 639                 vmode.sync |= FB_SYNC_VERT_HIGH_ACT;
 640
 641         pr_debug("Reconstructed video mode:\n");
 642         pr_debug("%dx%d, hsync: %u left: %u, right: %u, vsync: %u, upper: %u, lower: %u\n",
 643                         vmode.xres, vmode.yres,
 644                         vmode.hsync_len, vmode.left_margin, vmode.right_margin,
 645                         vmode.vsync_len, vmode.upper_margin, vmode.lower_margin);
 646         pr_debug("pixclk: %ldkHz\n", PICOS2KHZ(vmode.pixclock));
 647
 648         fb_add_videomode(&vmode, &fb_info->modelist);
 649
 650         host->ld_intf_width = CTRL_GET_BUS_WIDTH(ctrl);
 651         host->dotclk_delay = VDCTRL4_GET_DOTCLK_DLY(vdctrl4);
 652
 653         fb_info->fix.line_length = vmode.xres * (bits_per_pixel >> 3);
 654
 655         pa = readl(host->base + host->devdata->cur_buf);
 656         fbsize = fb_info->fix.line_length * vmode.yres;
 657         if (pa < fb_info->fix.smem_start)
 658                 return -EINVAL;
 659         if (pa + fbsize > fb_info->fix.smem_start + fb_info->fix.smem_len)
 660                 return -EINVAL;
 661         ofs = pa - fb_info->fix.smem_start;
 662         if (ofs) {
 663                 memmove(fb_info->screen_base, fb_info->screen_base + ofs, fbsize);
 664                 writel(fb_info->fix.smem_start, host->base + host->devdata->next_buf);
 665         }
 666
 667         line_count = fb_info->fix.smem_len / fb_info->fix.line_length;
 668         fb_info->fix.ypanstep = 1;
 669
 670         clk_enable(host->clk);
 671         host->enabled = 1;
 672
 673         return 0;
 674 }
 675
 676 static int __devinit mxsfb_init_fbinfo(struct mxsfb_info *host)
 677 {
 678         struct fb_info *fb_info = &host->fb_info;
 679         struct fb_var_screeninfo *var = &fb_info->var;
 680         struct mxsfb_platform_data *pdata = host->pdev->dev.platform_data;
 681         dma_addr_t fb_phys;
 682         void *fb_virt;
 683         unsigned fb_size = pdata->fb_size;
 684
 685         fb_info->fbops = &mxsfb_ops;
 686         fb_info->flags = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST;
 687         strlcpy(fb_info->fix.id, "mxs", sizeof(fb_info->fix.id));
 688         fb_info->fix.type = FB_TYPE_PACKED_PIXELS;
 689         fb_info->fix.ypanstep = 1;
 690         fb_info->fix.visual = FB_VISUAL_TRUECOLOR,
 691         fb_info->fix.accel = FB_ACCEL_NONE;
 692
 693         var->bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16;
 694         var->nonstd = 0;
 695         var->activate = FB_ACTIVATE_NOW;
 696         var->accel_flags = 0;
 697         var->vmode = FB_VMODE_NONINTERLACED;
 698
 699         host->dotclk_delay = pdata->dotclk_delay;
 700         host->ld_intf_width = pdata->ld_intf_width;
 701
 702         /* Memory allocation for framebuffer */
 703         if (pdata->fb_phys) {
 704                 if (!fb_size)
 705                         return -EINVAL;
 706
 707                 fb_phys = pdata->fb_phys;
 708
 709                 if (!request_mem_region(fb_phys, fb_size, host->pdev->name))
 710                         return -ENOMEM;
 711
 712                 fb_virt = ioremap(fb_phys, fb_size);
 713                 if (!fb_virt) {
 714                         release_mem_region(fb_phys, fb_size);
 715                         return -ENOMEM;
 716                 }
 717                 host->mapped = 1;
 718         } else {
 719                 if (!fb_size)
 720                         fb_size = SZ_2M; /* default */
 721                 fb_virt = alloc_pages_exact(fb_size, GFP_DMA);
 722                 if (!fb_virt)
 723                         return -ENOMEM;
 724
 725                 fb_phys = virt_to_phys(fb_virt);
 726         }
 727
 728         fb_info->fix.smem_start = fb_phys;
 729         fb_info->screen_base = fb_virt;
 730         fb_info->screen_size = fb_info->fix.smem_len = fb_size;
 731
 732         if (mxsfb_restore_mode(host))
 733                 memset(fb_virt, 0, fb_size);
 734
 735         return 0;
 736 }
 737
 738 static void __devexit mxsfb_free_videomem(struct mxsfb_info *host)
 739 {
 740         struct fb_info *fb_info = &host->fb_info;
 741
 742         if (host->mapped) {
 743                 iounmap(fb_info->screen_base);
 744                 release_mem_region(fb_info->fix.smem_start,
 745                                 fb_info->screen_size);
 746         } else {
 747                 free_pages_exact(fb_info->screen_base, fb_info->fix.smem_len);
 748         }
 749 }
 750
 751 static int __devinit mxsfb_probe(struct platform_device *pdev)
 752 {
 753         struct mxsfb_platform_data *pdata = pdev->dev.platform_data;
 754         struct resource *res;
 755         struct mxsfb_info *host;
 756         struct fb_info *fb_info;
 757         struct fb_modelist *modelist;
 758         int i, ret;
 759
 760         if (!pdata) {
 761                 dev_err(&pdev->dev, "No platformdata. Giving up\n");
 762                 return -ENODEV;
 763         }
 764
 765         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 766         if (!res) {
 767                 dev_err(&pdev->dev, "Cannot get memory IO resource\n");
 768                 return -ENODEV;
 769         }
 770
 771         if (!request_mem_region(res->start, resource_size(res), pdev->name))
 772                 return -EBUSY;
 773
 774         fb_info = framebuffer_alloc(sizeof(struct mxsfb_info), &pdev->dev);
 775         if (!fb_info) {
 776                 dev_err(&pdev->dev, "Failed to allocate fbdev\n");
 777                 ret = -ENOMEM;
 778                 goto error_alloc_info;
 779         }
 780
 781         host = to_imxfb_host(fb_info);
 782
 783         host->base = ioremap(res->start, resource_size(res));
 784         if (!host->base) {
 785                 dev_err(&pdev->dev, "ioremap failed\n");
 786                 ret = -ENOMEM;
 787                 goto error_ioremap;
 788         }
 789
 790         host->pdev = pdev;
 791         platform_set_drvdata(pdev, host);
 792
 793         host->devdata = &mxsfb_devdata[pdev->id_entry->driver_data];
 794
 795         host->clk = clk_get(&host->pdev->dev, NULL);
 796         if (IS_ERR(host->clk)) {
 797                 ret = PTR_ERR(host->clk);
 798                 goto error_getclock;
 799         }
 800
 801         fb_info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
 802         if (!fb_info->pseudo_palette) {
 803                 ret = -ENOMEM;
 804                 goto error_pseudo_pallette;
 805         }
 806
 807         INIT_LIST_HEAD(&fb_info->modelist);
 808
 809         ret = mxsfb_init_fbinfo(host);
 810         if (ret != 0)
 811                 goto error_init_fb;
 812
 813         for (i = 0; i < pdata->mode_count; i++)
 814                 fb_add_videomode(&pdata->mode_list[i], &fb_info->modelist);
 815
 816         modelist = list_first_entry(&fb_info->modelist,
 817                         struct fb_modelist, list);
 818         fb_videomode_to_var(&fb_info->var, &modelist->mode);
 819
 820         /* init the color fields */
 821         mxsfb_check_var(&fb_info->var, fb_info);
 822
 823         platform_set_drvdata(pdev, fb_info);
 824
 825         ret = register_framebuffer(fb_info);
 826         if (ret != 0) {
 827                 dev_err(&pdev->dev,"Failed to register framebuffer\n");
 828                 goto error_register;
 829         }
 830
 831         if (!host->enabled) {
 832                 writel(0, host->base + LCDC_CTRL);
 833                 mxsfb_set_par(fb_info);
 834                 mxsfb_enable_controller(fb_info);
 835         }
 836
 837         dev_info(&pdev->dev, "initialized\n");
 838
 839         return 0;
 840
 841 error_register:
 842         if (host->enabled)
 843                 clk_disable(host->clk);
 844         fb_destroy_modelist(&fb_info->modelist);
 845 error_init_fb:
 846         kfree(fb_info->pseudo_palette);
 847 error_pseudo_pallette:
 848         clk_put(host->clk);
 849 error_getclock:
 850         iounmap(host->base);
 851 error_ioremap:
 852         framebuffer_release(fb_info);
 853 error_alloc_info:
 854         release_mem_region(res->start, resource_size(res));
 855
 856         return ret;
 857 }
 858
 859 static int __devexit mxsfb_remove(struct platform_device *pdev)
 860 {
 861         struct fb_info *fb_info = platform_get_drvdata(pdev);
 862         struct mxsfb_info *host = to_imxfb_host(fb_info);
 863         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 864
 865         if (host->enabled)
 866                 mxsfb_disable_controller(fb_info);
 867
 868         unregister_framebuffer(fb_info);
 869         kfree(fb_info->pseudo_palette);
 870         mxsfb_free_videomem(host);
 871         iounmap(host->base);
 872         clk_put(host->clk);
 873
 874         framebuffer_release(fb_info);
 875         release_mem_region(res->start, resource_size(res));
 876
 877         platform_set_drvdata(pdev, NULL);
 878
 879         return 0;
 880 }
 881
 882 static struct platform_device_id mxsfb_devtype[] = {
 883         {
 884                 .name = "imx23-fb",
 885                 .driver_data = MXSFB_V3,
 886         }, {
 887                 .name = "imx28-fb",
 888                 .driver_data = MXSFB_V4,
 889         }, {
 890                 /* sentinel */
 891         }
 892 };
 893 MODULE_DEVICE_TABLE(platform, mxsfb_devtype);
 894
 895 static struct platform_driver mxsfb_driver = {
 896         .probe = mxsfb_probe,
 897         .remove = __devexit_p(mxsfb_remove),
 898         .id_table = mxsfb_devtype,
 899         .driver = {
 900                    .name = DRIVER_NAME,
 901         },
 902 };
 903
 904 static int __init mxsfb_init(void)
 905 {
 906         return platform_driver_register(&mxsfb_driver);
 907 }
 908
 909 static void __exit mxsfb_exit(void)
 910 {
 911         platform_driver_unregister(&mxsfb_driver);
 912 }
 913
 914 module_init(mxsfb_init);
 915 module_exit(mxsfb_exit);
 916
 917 MODULE_DESCRIPTION("Freescale mxs framebuffer driver");
 918 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 919 MODULE_LICENSE("GPL");