drivers/usb/host/ohci-hcd.c

   1 /*
   2  * Open Host Controller Interface (OHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   7  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   8  *
   9  * [ Initialisation is based on Linus'  ]
  10  * [ uhci code and gregs ohci fragments ]
  11  * [ (C) Copyright 1999 Linus Torvalds  ]
  12  * [ (C) Copyright 1999 Gregory P. Smith]
  13  *
  14  *
  15  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  16  * interfaces (though some non-x86 Intel chips use it).  It supports
  17  * smarter hardware than UHCI.  A download link for the spec available
  18  * through the http://www.usb.org website.
  19  *
  20  * This file is licenced under the GPL.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/moduleparam.h>
  25 #include <linux/pci.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/slab.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/timer.h>
  34 #include <linux/list.h>
  35 #include <linux/usb.h>
  36 #include <linux/usb/otg.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/dmapool.h>
  40 #include <linux/workqueue.h>
  41 #include <linux/debugfs.h>
  42
  43 #include <asm/io.h>
  44 #include <asm/irq.h>
  45 #include <asm/unaligned.h>
  46 #include <asm/byteorder.h>
  47
  48
  49 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  50 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 /* For initializing controller (mask in an HCFS mode too) */
  55 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  56 #define OHCI_INTR_INIT \
  57                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  58                 | OHCI_INTR_RD | OHCI_INTR_WDH)
  59
  60 #ifdef __hppa__
  61 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  62 #define IR_DISABLE
  63 #endif
  64
  65 #ifdef CONFIG_ARCH_OMAP
  66 /* OMAP doesn't support IR (no SMM; not needed) */
  67 #define IR_DISABLE
  68 #endif
  69
  70 /*-------------------------------------------------------------------------*/
  71
  72 static const char       hcd_name [] = "ohci_hcd";
  73
  74 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
  75 #define IO_WATCHDOG_DELAY       msecs_to_jiffies(275)
  76
  77 #include "ohci.h"
  78 #include "pci-quirks.h"
  79
  80 static void ohci_dump(struct ohci_hcd *ohci);
  81 static void ohci_stop(struct usb_hcd *hcd);
  82 static void io_watchdog_func(unsigned long _ohci);
  83
  84 #include "ohci-hub.c"
  85 #include "ohci-dbg.c"
  86 #include "ohci-mem.c"
  87 #include "ohci-q.c"
  88
  89
  90 /*
  91  * On architectures with edge-triggered interrupts we must never return
  92  * IRQ_NONE.
  93  */
  94 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
  95 #define IRQ_NOTMINE     IRQ_HANDLED
  96 #else
  97 #define IRQ_NOTMINE     IRQ_NONE
  98 #endif
  99
 100
 101 /* Some boards misreport power switching/overcurrent */
 102 static bool distrust_firmware = true;
 103 module_param (distrust_firmware, bool, 0);
 104 MODULE_PARM_DESC (distrust_firmware,
 105         "true to distrust firmware power/overcurrent setup");
 106
 107 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 108 static bool no_handshake;
 109 module_param (no_handshake, bool, 0);
 110 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 111
 112 /*-------------------------------------------------------------------------*/
 113
 114 static int number_of_tds(struct urb *urb)
 115 {
 116         int                     len, i, num, this_sg_len;
 117         struct scatterlist      *sg;
 118
 119         len = urb->transfer_buffer_length;
 120         i = urb->num_mapped_sgs;
 121
 122         if (len > 0 && i > 0) {         /* Scatter-gather transfer */
 123                 num = 0;
 124                 sg = urb->sg;
 125                 for (;;) {
 126                         this_sg_len = min_t(int, sg_dma_len(sg), len);
 127                         num += DIV_ROUND_UP(this_sg_len, 4096);
 128                         len -= this_sg_len;
 129                         if (--i <= 0 || len <= 0)
 130                                 break;
 131                         sg = sg_next(sg);
 132                 }
 133
 134         } else {                        /* Non-SG transfer */
 135                 /* one TD for every 4096 Bytes (could be up to 8K) */
 136                 num = DIV_ROUND_UP(len, 4096);
 137         }
 138         return num;
 139 }
 140
 141 /*
 142  * queue up an urb for anything except the root hub
 143  */
 144 static int ohci_urb_enqueue (
 145         struct usb_hcd  *hcd,
 146         struct urb      *urb,
 147         gfp_t           mem_flags
 148 ) {
 149         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 150         struct ed       *ed;
 151         urb_priv_t      *urb_priv;
 152         unsigned int    pipe = urb->pipe;
 153         int             i, size = 0;
 154         unsigned long   flags;
 155         int             retval = 0;
 156
 157         /* every endpoint has a ed, locate and maybe (re)initialize it */
 158         ed = ed_get(ohci, urb->ep, urb->dev, pipe, urb->interval);
 159         if (! ed)
 160                 return -ENOMEM;
 161
 162         /* for the private part of the URB we need the number of TDs (size) */
 163         switch (ed->type) {
 164                 case PIPE_CONTROL:
 165                         /* td_submit_urb() doesn't yet handle these */
 166                         if (urb->transfer_buffer_length > 4096)
 167                                 return -EMSGSIZE;
 168
 169                         /* 1 TD for setup, 1 for ACK, plus ... */
 170                         size = 2;
 171                         /* FALLTHROUGH */
 172                 // case PIPE_INTERRUPT:
 173                 // case PIPE_BULK:
 174                 default:
 175                         size += number_of_tds(urb);
 176                         /* maybe a zero-length packet to wrap it up */
 177                         if (size == 0)
 178                                 size++;
 179                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 180                                 && (urb->transfer_buffer_length
 181                                         % usb_maxpacket (urb->dev, pipe,
 182                                                 usb_pipeout (pipe))) == 0)
 183                                 size++;
 184                         break;
 185                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
 186                         size = urb->number_of_packets;
 187                         break;
 188         }
 189
 190         /* allocate the private part of the URB */
 191         urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 192                         mem_flags);
 193         if (!urb_priv)
 194                 return -ENOMEM;
 195         INIT_LIST_HEAD (&urb_priv->pending);
 196         urb_priv->length = size;
 197         urb_priv->ed = ed;
 198
 199         /* allocate the TDs (deferring hash chain updates) */
 200         for (i = 0; i < size; i++) {
 201                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
 202                 if (!urb_priv->td [i]) {
 203                         urb_priv->length = i;
 204                         urb_free_priv (ohci, urb_priv);
 205                         return -ENOMEM;
 206                 }
 207         }
 208
 209         spin_lock_irqsave (&ohci->lock, flags);
 210
 211         /* don't submit to a dead HC */
 212         if (!HCD_HW_ACCESSIBLE(hcd)) {
 213                 retval = -ENODEV;
 214                 goto fail;
 215         }
 216         if (ohci->rh_state != OHCI_RH_RUNNING) {
 217                 retval = -ENODEV;
 218                 goto fail;
 219         }
 220         retval = usb_hcd_link_urb_to_ep(hcd, urb);
 221         if (retval)
 222                 goto fail;
 223
 224         /* schedule the ed if needed */
 225         if (ed->state == ED_IDLE) {
 226                 retval = ed_schedule (ohci, ed);
 227                 if (retval < 0) {
 228                         usb_hcd_unlink_urb_from_ep(hcd, urb);
 229                         goto fail;
 230                 }
 231
 232                 /* Start up the I/O watchdog timer, if it's not running */
 233                 if (!timer_pending(&ohci->io_watchdog) &&
 234                                 list_empty(&ohci->eds_in_use)) {
 235                         ohci->prev_frame_no = ohci_frame_no(ohci);
 236                         mod_timer(&ohci->io_watchdog,
 237                                         jiffies + IO_WATCHDOG_DELAY);
 238                 }
 239                 list_add(&ed->in_use_list, &ohci->eds_in_use);
 240
 241                 if (ed->type == PIPE_ISOCHRONOUS) {
 242                         u16     frame = ohci_frame_no(ohci);
 243
 244                         /* delay a few frames before the first TD */
 245                         frame += max_t (u16, 8, ed->interval);
 246                         frame &= ~(ed->interval - 1);
 247                         frame |= ed->branch;
 248                         urb->start_frame = frame;
 249                         ed->last_iso = frame + ed->interval * (size - 1);
 250                 }
 251         } else if (ed->type == PIPE_ISOCHRONOUS) {
 252                 u16     next = ohci_frame_no(ohci) + 1;
 253                 u16     frame = ed->last_iso + ed->interval;
 254                 u16     length = ed->interval * (size - 1);
 255
 256                 /* Behind the scheduling threshold? */
 257                 if (unlikely(tick_before(frame, next))) {
 258
 259                         /* URB_ISO_ASAP: Round up to the first available slot */
 260                         if (urb->transfer_flags & URB_ISO_ASAP) {
 261                                 frame += (next - frame + ed->interval - 1) &
 262                                                 -ed->interval;
 263
 264                         /*
 265                          * Not ASAP: Use the next slot in the stream,
 266                          * no matter what.
 267                          */
 268                         } else {
 269                                 /*
 270                                  * Some OHCI hardware doesn't handle late TDs
 271                                  * correctly.  After retiring them it proceeds
 272                                  * to the next ED instead of the next TD.
 273                                  * Therefore we have to omit the late TDs
 274                                  * entirely.
 275                                  */
 276                                 urb_priv->td_cnt = DIV_ROUND_UP(
 277                                                 (u16) (next - frame),
 278                                                 ed->interval);
 279                                 if (urb_priv->td_cnt >= urb_priv->length) {
 280                                         ++urb_priv->td_cnt;     /* Mark it */
 281                                         ohci_dbg(ohci, "iso underrun %p (%u+%u < %u)\n",
 282                                                         urb, frame, length,
 283                                                         next);
 284                                 }
 285                         }
 286                 }
 287                 urb->start_frame = frame;
 288                 ed->last_iso = frame + length;
 289         }
 290
 291         /* fill the TDs and link them to the ed; and
 292          * enable that part of the schedule, if needed
 293          * and update count of queued periodic urbs
 294          */
 295         urb->hcpriv = urb_priv;
 296         td_submit_urb (ohci, urb);
 297
 298 fail:
 299         if (retval)
 300                 urb_free_priv (ohci, urb_priv);
 301         spin_unlock_irqrestore (&ohci->lock, flags);
 302         return retval;
 303 }
 304
 305 /*
 306  * decouple the URB from the HC queues (TDs, urb_priv).
 307  * reporting is always done
 308  * asynchronously, and we might be dealing with an urb that's
 309  * partially transferred, or an ED with other urbs being unlinked.
 310  */
 311 static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 312 {
 313         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 314         unsigned long           flags;
 315         int                     rc;
 316         urb_priv_t              *urb_priv;
 317
 318         spin_lock_irqsave (&ohci->lock, flags);
 319         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 320         if (rc == 0) {
 321
 322                 /* Unless an IRQ completed the unlink while it was being
 323                  * handed to us, flag it for unlink and giveback, and force
 324                  * some upcoming INTR_SF to call finish_unlinks()
 325                  */
 326                 urb_priv = urb->hcpriv;
 327                 if (urb_priv->ed->state == ED_OPER)
 328                         start_ed_unlink(ohci, urb_priv->ed);
 329
 330                 if (ohci->rh_state != OHCI_RH_RUNNING) {
 331                         /* With HC dead, we can clean up right away */
 332                         ohci_work(ohci);
 333                 }
 334         }
 335         spin_unlock_irqrestore (&ohci->lock, flags);
 336         return rc;
 337 }
 338
 339 /*-------------------------------------------------------------------------*/
 340
 341 /* frees config/altsetting state for endpoints,
 342  * including ED memory, dummy TD, and bulk/intr data toggle
 343  */
 344
 345 static void
 346 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 347 {
 348         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 349         unsigned long           flags;
 350         struct ed               *ed = ep->hcpriv;
 351         unsigned                limit = 1000;
 352
 353         /* ASSERT:  any requests/urbs are being unlinked */
 354         /* ASSERT:  nobody can be submitting urbs for this any more */
 355
 356         if (!ed)
 357                 return;
 358
 359 rescan:
 360         spin_lock_irqsave (&ohci->lock, flags);
 361
 362         if (ohci->rh_state != OHCI_RH_RUNNING) {
 363 sanitize:
 364                 ed->state = ED_IDLE;
 365                 ohci_work(ohci);
 366         }
 367
 368         switch (ed->state) {
 369         case ED_UNLINK:         /* wait for hw to finish? */
 370                 /* major IRQ delivery trouble loses INTR_SF too... */
 371                 if (limit-- == 0) {
 372                         ohci_warn(ohci, "ED unlink timeout\n");
 373                         goto sanitize;
 374                 }
 375                 spin_unlock_irqrestore (&ohci->lock, flags);
 376                 schedule_timeout_uninterruptible(1);
 377                 goto rescan;
 378         case ED_IDLE:           /* fully unlinked */
 379                 if (list_empty (&ed->td_list)) {
 380                         td_free (ohci, ed->dummy);
 381                         ed_free (ohci, ed);
 382                         break;
 383                 }
 384                 /* else FALL THROUGH */
 385         default:
 386                 /* caller was supposed to have unlinked any requests;
 387                  * that's not our job.  can't recover; must leak ed.
 388                  */
 389                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 390                         ed, ep->desc.bEndpointAddress, ed->state,
 391                         list_empty (&ed->td_list) ? "" : " (has tds)");
 392                 td_free (ohci, ed->dummy);
 393                 break;
 394         }
 395         ep->hcpriv = NULL;
 396         spin_unlock_irqrestore (&ohci->lock, flags);
 397 }
 398
 399 static int ohci_get_frame (struct usb_hcd *hcd)
 400 {
 401         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 402
 403         return ohci_frame_no(ohci);
 404 }
 405
 406 static void ohci_usb_reset (struct ohci_hcd *ohci)
 407 {
 408         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 409         ohci->hc_control &= OHCI_CTRL_RWC;
 410         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 411         ohci->rh_state = OHCI_RH_HALTED;
 412 }
 413
 414 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 415  * other cases where the next software may expect clean state from the
 416  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 417  */
 418 static void
 419 ohci_shutdown (struct usb_hcd *hcd)
 420 {
 421         struct ohci_hcd *ohci;
 422
 423         ohci = hcd_to_ohci (hcd);
 424         ohci_writel(ohci, (u32) ~0, &ohci->regs->intrdisable);
 425
 426         /* Software reset, after which the controller goes into SUSPEND */
 427         ohci_writel(ohci, OHCI_HCR, &ohci->regs->cmdstatus);
 428         ohci_readl(ohci, &ohci->regs->cmdstatus);       /* flush the writes */
 429         udelay(10);
 430
 431         ohci_writel(ohci, ohci->fminterval, &ohci->regs->fminterval);
 432         ohci->rh_state = OHCI_RH_HALTED;
 433 }
 434
 435 /*-------------------------------------------------------------------------*
 436  * HC functions
 437  *-------------------------------------------------------------------------*/
 438
 439 /* init memory, and kick BIOS/SMM off */
 440
 441 static int ohci_init (struct ohci_hcd *ohci)
 442 {
 443         int ret;
 444         struct usb_hcd *hcd = ohci_to_hcd(ohci);
 445
 446         /* Accept arbitrarily long scatter-gather lists */
 447         hcd->self.sg_tablesize = ~0;
 448
 449         if (distrust_firmware)
 450                 ohci->flags |= OHCI_QUIRK_HUB_POWER;
 451
 452         ohci->rh_state = OHCI_RH_HALTED;
 453         ohci->regs = hcd->regs;
 454
 455         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 456          * was never needed for most non-PCI systems ... remove the code?
 457          */
 458
 459 #ifndef IR_DISABLE
 460         /* SMM owns the HC?  not for long! */
 461         if (!no_handshake && ohci_readl (ohci,
 462                                         &ohci->regs->control) & OHCI_CTRL_IR) {
 463                 u32 temp;
 464
 465                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 466
 467                 /* this timeout is arbitrary.  we make it long, so systems
 468                  * depending on usb keyboards may be usable even if the
 469                  * BIOS/SMM code seems pretty broken.
 470                  */
 471                 temp = 500;     /* arbitrary: five seconds */
 472
 473                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 474                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 475                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 476                         msleep (10);
 477                         if (--temp == 0) {
 478                                 ohci_err (ohci, "USB HC takeover failed!"
 479                                         "  (BIOS/SMM bug)\n");
 480                                 return -EBUSY;
 481                         }
 482                 }
 483                 ohci_usb_reset (ohci);
 484         }
 485 #endif
 486
 487         /* Disable HC interrupts */
 488         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 489
 490         /* flush the writes, and save key bits like RWC */
 491         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 492                 ohci->hc_control |= OHCI_CTRL_RWC;
 493
 494         /* Read the number of ports unless overridden */
 495         if (ohci->num_ports == 0)
 496                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 497
 498         if (ohci->hcca)
 499                 return 0;
 500
 501         setup_timer(&ohci->io_watchdog, io_watchdog_func,
 502                         (unsigned long) ohci);
 503
 504         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
 505                         sizeof(*ohci->hcca), &ohci->hcca_dma, GFP_KERNEL);
 506         if (!ohci->hcca)
 507                 return -ENOMEM;
 508
 509         if ((ret = ohci_mem_init (ohci)) < 0)
 510                 ohci_stop (hcd);
 511         else {
 512                 create_debug_files (ohci);
 513         }
 514
 515         return ret;
 516 }
 517
 518 /*-------------------------------------------------------------------------*/
 519
 520 /* Start an OHCI controller, set the BUS operational
 521  * resets USB and controller
 522  * enable interrupts
 523  */
 524 static int ohci_run (struct ohci_hcd *ohci)
 525 {
 526         u32                     mask, val;
 527         int                     first = ohci->fminterval == 0;
 528         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 529
 530         ohci->rh_state = OHCI_RH_HALTED;
 531
 532         /* boot firmware should have set this up (5.1.1.3.1) */
 533         if (first) {
 534
 535                 val = ohci_readl (ohci, &ohci->regs->fminterval);
 536                 ohci->fminterval = val & 0x3fff;
 537                 if (ohci->fminterval != FI)
 538                         ohci_dbg (ohci, "fminterval delta %d\n",
 539                                 ohci->fminterval - FI);
 540                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 541                 /* also: power/overcurrent flags in roothub.a */
 542         }
 543
 544         /* Reset USB nearly "by the book".  RemoteWakeupConnected has
 545          * to be checked in case boot firmware (BIOS/SMM/...) has set up
 546          * wakeup in a way the bus isn't aware of (e.g., legacy PCI PM).
 547          * If the bus glue detected wakeup capability then it should
 548          * already be enabled; if so we'll just enable it again.
 549          */
 550         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0)
 551                 device_set_wakeup_capable(hcd->self.controller, 1);
 552
 553         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 554         case OHCI_USB_OPER:
 555                 val = 0;
 556                 break;
 557         case OHCI_USB_SUSPEND:
 558         case OHCI_USB_RESUME:
 559                 ohci->hc_control &= OHCI_CTRL_RWC;
 560                 ohci->hc_control |= OHCI_USB_RESUME;
 561                 val = 10 /* msec wait */;
 562                 break;
 563         // case OHCI_USB_RESET:
 564         default:
 565                 ohci->hc_control &= OHCI_CTRL_RWC;
 566                 ohci->hc_control |= OHCI_USB_RESET;
 567                 val = 50 /* msec wait */;
 568                 break;
 569         }
 570         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 571         // flush the writes
 572         (void) ohci_readl (ohci, &ohci->regs->control);
 573         msleep(val);
 574
 575         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 576
 577         /* 2msec timelimit here means no irqs/preempt */
 578         spin_lock_irq (&ohci->lock);
 579
 580 retry:
 581         /* HC Reset requires max 10 us delay */
 582         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 583         val = 30;       /* ... allow extra time */
 584         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 585                 if (--val == 0) {
 586                         spin_unlock_irq (&ohci->lock);
 587                         ohci_err (ohci, "USB HC reset timed out!\n");
 588                         return -1;
 589                 }
 590                 udelay (1);
 591         }
 592
 593         /* now we're in the SUSPEND state ... must go OPERATIONAL
 594          * within 2msec else HC enters RESUME
 595          *
 596          * ... but some hardware won't init fmInterval "by the book"
 597          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 598          * this if we write fmInterval after we're OPERATIONAL.
 599          * Unclear about ALi, ServerWorks, and others ... this could
 600          * easily be a longstanding bug in chip init on Linux.
 601          */
 602         if (ohci->flags & OHCI_QUIRK_INITRESET) {
 603                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 604                 // flush those writes
 605                 (void) ohci_readl (ohci, &ohci->regs->control);
 606         }
 607
 608         /* Tell the controller where the control and bulk lists are
 609          * The lists are empty now. */
 610         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 611         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 612
 613         /* a reset clears this */
 614         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 615
 616         periodic_reinit (ohci);
 617
 618         /* some OHCI implementations are finicky about how they init.
 619          * bogus values here mean not even enumeration could work.
 620          */
 621         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 622                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 623                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 624                         ohci->flags |= OHCI_QUIRK_INITRESET;
 625                         ohci_dbg (ohci, "enabling initreset quirk\n");
 626                         goto retry;
 627                 }
 628                 spin_unlock_irq (&ohci->lock);
 629                 ohci_err (ohci, "init err (%08x %04x)\n",
 630                         ohci_readl (ohci, &ohci->regs->fminterval),
 631                         ohci_readl (ohci, &ohci->regs->periodicstart));
 632                 return -EOVERFLOW;
 633         }
 634
 635         /* use rhsc irqs after hub_wq is allocated */
 636         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 637         hcd->uses_new_polling = 1;
 638
 639         /* start controller operations */
 640         ohci->hc_control &= OHCI_CTRL_RWC;
 641         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 642         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 643         ohci->rh_state = OHCI_RH_RUNNING;
 644
 645         /* wake on ConnectStatusChange, matching external hubs */
 646         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 647
 648         /* Choose the interrupts we care about now, others later on demand */
 649         mask = OHCI_INTR_INIT;
 650         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 651         ohci_writel (ohci, mask, &ohci->regs->intrenable);
 652
 653         /* handle root hub init quirks ... */
 654         val = roothub_a (ohci);
 655         val &= ~(RH_A_PSM | RH_A_OCPM);
 656         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 657                 /* NSC 87560 and maybe others */
 658                 val |= RH_A_NOCP;
 659                 val &= ~(RH_A_POTPGT | RH_A_NPS);
 660                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 661         } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
 662                         (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
 663                 /* hub power always on; required for AMD-756 and some
 664                  * Mac platforms.  ganged overcurrent reporting, if any.
 665                  */
 666                 val |= RH_A_NPS;
 667                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 668         }
 669         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 670         ohci_writel (ohci, (val & RH_A_NPS) ? 0 : RH_B_PPCM,
 671                                                 &ohci->regs->roothub.b);
 672         // flush those writes
 673         (void) ohci_readl (ohci, &ohci->regs->control);
 674
 675         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 676         spin_unlock_irq (&ohci->lock);
 677
 678         // POTPGT delay is bits 24-31, in 2 ms units.
 679         mdelay ((val >> 23) & 0x1fe);
 680
 681         ohci_dump(ohci);
 682
 683         return 0;
 684 }
 685
 686 /* ohci_setup routine for generic controller initialization */
 687
 688 int ohci_setup(struct usb_hcd *hcd)
 689 {
 690         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 691
 692         ohci_hcd_init(ohci);
 693
 694         return ohci_init(ohci);
 695 }
 696 EXPORT_SYMBOL_GPL(ohci_setup);
 697
 698 /* ohci_start routine for generic controller start of all OHCI bus glue */
 699 static int ohci_start(struct usb_hcd *hcd)
 700 {
 701         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 702         int     ret;
 703
 704         ret = ohci_run(ohci);
 705         if (ret < 0) {
 706                 ohci_err(ohci, "can't start\n");
 707                 ohci_stop(hcd);
 708         }
 709         return ret;
 710 }
 711
 712 /*-------------------------------------------------------------------------*/
 713
 714 /*
 715  * Some OHCI controllers are known to lose track of completed TDs.  They
 716  * don't add the TDs to the hardware done queue, which means we never see
 717  * them as being completed.
 718  *
 719  * This watchdog routine checks for such problems.  Without some way to
 720  * tell when those TDs have completed, we would never take their EDs off
 721  * the unlink list.  As a result, URBs could never be dequeued and
 722  * endpoints could never be released.
 723  */
 724 static void io_watchdog_func(unsigned long _ohci)
 725 {
 726         struct ohci_hcd *ohci = (struct ohci_hcd *) _ohci;
 727         bool            takeback_all_pending = false;
 728         u32             status;
 729         u32             head;
 730         struct ed       *ed;
 731         struct td       *td, *td_start, *td_next;
 732         unsigned        frame_no;
 733         unsigned long   flags;
 734
 735         spin_lock_irqsave(&ohci->lock, flags);
 736
 737         /*
 738          * One way to lose track of completed TDs is if the controller
 739          * never writes back the done queue head.  If it hasn't been
 740          * written back since the last time this function ran and if it
 741          * was non-empty at that time, something is badly wrong with the
 742          * hardware.
 743          */
 744         status = ohci_readl(ohci, &ohci->regs->intrstatus);
 745         if (!(status & OHCI_INTR_WDH) && ohci->wdh_cnt == ohci->prev_wdh_cnt) {
 746                 if (ohci->prev_donehead) {
 747                         ohci_err(ohci, "HcDoneHead not written back; disabled\n");
 748  died:
 749                         usb_hc_died(ohci_to_hcd(ohci));
 750                         ohci_dump(ohci);
 751                         ohci_shutdown(ohci_to_hcd(ohci));
 752                         goto done;
 753                 } else {
 754                         /* No write back because the done queue was empty */
 755                         takeback_all_pending = true;
 756                 }
 757         }
 758
 759         /* Check every ED which might have pending TDs */
 760         list_for_each_entry(ed, &ohci->eds_in_use, in_use_list) {
 761                 if (ed->pending_td) {
 762                         if (takeback_all_pending ||
 763                                         OKAY_TO_TAKEBACK(ohci, ed)) {
 764                                 unsigned tmp = hc32_to_cpu(ohci, ed->hwINFO);
 765
 766                                 ohci_dbg(ohci, "takeback pending TD for dev %d ep 0x%x\n",
 767                                                 0x007f & tmp,
 768                                                 (0x000f & (tmp >> 7)) +
 769                                                         ((tmp & ED_IN) >> 5));
 770                                 add_to_done_list(ohci, ed->pending_td);
 771                         }
 772                 }
 773
 774                 /* Starting from the latest pending TD, */
 775                 td = ed->pending_td;
 776
 777                 /* or the last TD on the done list, */
 778                 if (!td) {
 779                         list_for_each_entry(td_next, &ed->td_list, td_list) {
 780                                 if (!td_next->next_dl_td)
 781                                         break;
 782                                 td = td_next;
 783                         }
 784                 }
 785
 786                 /* find the last TD processed by the controller. */
 787                 head = hc32_to_cpu(ohci, ACCESS_ONCE(ed->hwHeadP)) & TD_MASK;
 788                 td_start = td;
 789                 td_next = list_prepare_entry(td, &ed->td_list, td_list);
 790                 list_for_each_entry_continue(td_next, &ed->td_list, td_list) {
 791                         if (head == (u32) td_next->td_dma)
 792                                 break;
 793                         td = td_next;   /* head pointer has passed this TD */
 794                 }
 795                 if (td != td_start) {
 796                         /*
 797                          * In case a WDH cycle is in progress, we will wait
 798                          * for the next two cycles to complete before assuming
 799                          * this TD will never get on the done queue.
 800                          */
 801                         ed->takeback_wdh_cnt = ohci->wdh_cnt + 2;
 802                         ed->pending_td = td;
 803                 }
 804         }
 805
 806         ohci_work(ohci);
 807
 808         if (ohci->rh_state == OHCI_RH_RUNNING) {
 809
 810                 /*
 811                  * Sometimes a controller just stops working.  We can tell
 812                  * by checking that the frame counter has advanced since
 813                  * the last time we ran.
 814                  *
 815                  * But be careful: Some controllers violate the spec by
 816                  * stopping their frame counter when no ports are active.
 817                  */
 818                 frame_no = ohci_frame_no(ohci);
 819                 if (frame_no == ohci->prev_frame_no) {
 820                         int             active_cnt = 0;
 821                         int             i;
 822                         unsigned        tmp;
 823
 824                         for (i = 0; i < ohci->num_ports; ++i) {
 825                                 tmp = roothub_portstatus(ohci, i);
 826                                 /* Enabled and not suspended? */
 827                                 if ((tmp & RH_PS_PES) && !(tmp & RH_PS_PSS))
 828                                         ++active_cnt;
 829                         }
 830
 831                         if (active_cnt > 0) {
 832                                 ohci_err(ohci, "frame counter not updating; disabled\n");
 833                                 goto died;
 834                         }
 835                 }
 836                 if (!list_empty(&ohci->eds_in_use)) {
 837                         ohci->prev_frame_no = frame_no;
 838                         ohci->prev_wdh_cnt = ohci->wdh_cnt;
 839                         ohci->prev_donehead = ohci_readl(ohci,
 840                                         &ohci->regs->donehead);
 841                         mod_timer(&ohci->io_watchdog,
 842                                         jiffies + IO_WATCHDOG_DELAY);
 843                 }
 844         }
 845
 846  done:
 847         spin_unlock_irqrestore(&ohci->lock, flags);
 848 }
 849
 850 /* an interrupt happens */
 851
 852 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 853 {
 854         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 855         struct ohci_regs __iomem *regs = ohci->regs;
 856         int                     ints;
 857
 858         /* Read interrupt status (and flush pending writes).  We ignore the
 859          * optimization of checking the LSB of hcca->done_head; it doesn't
 860          * work on all systems (edge triggering for OHCI can be a factor).
 861          */
 862         ints = ohci_readl(ohci, &regs->intrstatus);
 863
 864         /* Check for an all 1's result which is a typical consequence
 865          * of dead, unclocked, or unplugged (CardBus...) devices
 866          */
 867         if (ints == ~(u32)0) {
 868                 ohci->rh_state = OHCI_RH_HALTED;
 869                 ohci_dbg (ohci, "device removed!\n");
 870                 usb_hc_died(hcd);
 871                 return IRQ_HANDLED;
 872         }
 873
 874         /* We only care about interrupts that are enabled */
 875         ints &= ohci_readl(ohci, &regs->intrenable);
 876
 877         /* interrupt for some other device? */
 878         if (ints == 0 || unlikely(ohci->rh_state == OHCI_RH_HALTED))
 879                 return IRQ_NOTMINE;
 880
 881         if (ints & OHCI_INTR_UE) {
 882                 // e.g. due to PCI Master/Target Abort
 883                 if (quirk_nec(ohci)) {
 884                         /* Workaround for a silicon bug in some NEC chips used
 885                          * in Apple's PowerBooks. Adapted from Darwin code.
 886                          */
 887                         ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 888
 889                         ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 890
 891                         schedule_work (&ohci->nec_work);
 892                 } else {
 893                         ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 894                         ohci->rh_state = OHCI_RH_HALTED;
 895                         usb_hc_died(hcd);
 896                 }
 897
 898                 ohci_dump(ohci);
 899                 ohci_usb_reset (ohci);
 900         }
 901
 902         if (ints & OHCI_INTR_RHSC) {
 903                 ohci_dbg(ohci, "rhsc\n");
 904                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 905                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 906                                 &regs->intrstatus);
 907
 908                 /* NOTE: Vendors didn't always make the same implementation
 909                  * choices for RHSC.  Many followed the spec; RHSC triggers
 910                  * on an edge, like setting and maybe clearing a port status
 911                  * change bit.  With others it's level-triggered, active
 912                  * until hub_wq clears all the port status change bits.  We'll
 913                  * always disable it here and rely on polling until hub_wq
 914                  * re-enables it.
 915                  */
 916                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 917                 usb_hcd_poll_rh_status(hcd);
 918         }
 919
 920         /* For connect and disconnect events, we expect the controller
 921          * to turn on RHSC along with RD.  But for remote wakeup events
 922          * this might not happen.
 923          */
 924         else if (ints & OHCI_INTR_RD) {
 925                 ohci_dbg(ohci, "resume detect\n");
 926                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 927                 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 928                 if (ohci->autostop) {
 929                         spin_lock (&ohci->lock);
 930                         ohci_rh_resume (ohci);
 931                         spin_unlock (&ohci->lock);
 932                 } else
 933                         usb_hcd_resume_root_hub(hcd);
 934         }
 935
 936         spin_lock(&ohci->lock);
 937         if (ints & OHCI_INTR_WDH)
 938                 update_done_list(ohci);
 939
 940         /* could track INTR_SO to reduce available PCI/... bandwidth */
 941
 942         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 943          * when there's still unlinking to be done (next frame).
 944          */
 945         ohci_work(ohci);
 946         if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
 947                         && ohci->rh_state == OHCI_RH_RUNNING)
 948                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 949
 950         if (ohci->rh_state == OHCI_RH_RUNNING) {
 951                 ohci_writel (ohci, ints, &regs->intrstatus);
 952                 if (ints & OHCI_INTR_WDH)
 953                         ++ohci->wdh_cnt;
 954
 955                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 956                 // flush those writes
 957                 (void) ohci_readl (ohci, &ohci->regs->control);
 958         }
 959         spin_unlock(&ohci->lock);
 960
 961         return IRQ_HANDLED;
 962 }
 963
 964 /*-------------------------------------------------------------------------*/
 965
 966 static void ohci_stop (struct usb_hcd *hcd)
 967 {
 968         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 969
 970         ohci_dump(ohci);
 971
 972         if (quirk_nec(ohci))
 973                 flush_work(&ohci->nec_work);
 974         del_timer_sync(&ohci->io_watchdog);
 975
 976         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 977         ohci_usb_reset(ohci);
 978         free_irq(hcd->irq, hcd);
 979         hcd->irq = 0;
 980
 981         if (quirk_amdiso(ohci))
 982                 usb_amd_dev_put();
 983
 984         remove_debug_files (ohci);
 985         ohci_mem_cleanup (ohci);
 986         if (ohci->hcca) {
 987                 dma_free_coherent (hcd->self.controller,
 988                                 sizeof *ohci->hcca,
 989                                 ohci->hcca, ohci->hcca_dma);
 990                 ohci->hcca = NULL;
 991                 ohci->hcca_dma = 0;
 992         }
 993 }
 994
 995 /*-------------------------------------------------------------------------*/
 996
 997 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
 998
 999 /* must not be called from interrupt context */
1000 int ohci_restart(struct ohci_hcd *ohci)
1001 {
1002         int temp;
1003         int i;
1004         struct urb_priv *priv;
1005
1006         ohci_init(ohci);
1007         spin_lock_irq(&ohci->lock);
1008         ohci->rh_state = OHCI_RH_HALTED;
1009
1010         /* Recycle any "live" eds/tds (and urbs). */
1011         if (!list_empty (&ohci->pending))
1012                 ohci_dbg(ohci, "abort schedule...\n");
1013         list_for_each_entry (priv, &ohci->pending, pending) {
1014                 struct urb      *urb = priv->td[0]->urb;
1015                 struct ed       *ed = priv->ed;
1016
1017                 switch (ed->state) {
1018                 case ED_OPER:
1019                         ed->state = ED_UNLINK;
1020                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
1021                         ed_deschedule (ohci, ed);
1022
1023                         ed->ed_next = ohci->ed_rm_list;
1024                         ed->ed_prev = NULL;
1025                         ohci->ed_rm_list = ed;
1026                         /* FALLTHROUGH */
1027                 case ED_UNLINK:
1028                         break;
1029                 default:
1030                         ohci_dbg(ohci, "bogus ed %p state %d\n",
1031                                         ed, ed->state);
1032                 }
1033
1034                 if (!urb->unlinked)
1035                         urb->unlinked = -ESHUTDOWN;
1036         }
1037         ohci_work(ohci);
1038         spin_unlock_irq(&ohci->lock);
1039
1040         /* paranoia, in case that didn't work: */
1041
1042         /* empty the interrupt branches */
1043         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
1044         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
1045
1046         /* no EDs to remove */
1047         ohci->ed_rm_list = NULL;
1048
1049         /* empty control and bulk lists */
1050         ohci->ed_controltail = NULL;
1051         ohci->ed_bulktail    = NULL;
1052
1053         if ((temp = ohci_run (ohci)) < 0) {
1054                 ohci_err (ohci, "can't restart, %d\n", temp);
1055                 return temp;
1056         }
1057         ohci_dbg(ohci, "restart complete\n");
1058         return 0;
1059 }
1060 EXPORT_SYMBOL_GPL(ohci_restart);
1061
1062 #endif
1063
1064 #ifdef CONFIG_PM
1065
1066 int ohci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1067 {
1068         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
1069         unsigned long   flags;
1070         int             rc = 0;
1071
1072         /* Disable irq emission and mark HW unaccessible. Use
1073          * the spinlock to properly synchronize with possible pending
1074          * RH suspend or resume activity.
1075          */
1076         spin_lock_irqsave (&ohci->lock, flags);
1077         ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
1078         (void)ohci_readl(ohci, &ohci->regs->intrdisable);
1079
1080         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1081         spin_unlock_irqrestore (&ohci->lock, flags);
1082
1083         synchronize_irq(hcd->irq);
1084
1085         if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1086                 ohci_resume(hcd, false);
1087                 rc = -EBUSY;
1088         }
1089         return rc;
1090 }
1091 EXPORT_SYMBOL_GPL(ohci_suspend);
1092
1093
1094 int ohci_resume(struct usb_hcd *hcd, bool hibernated)
1095 {
1096         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
1097         int                     port;
1098         bool                    need_reinit = false;
1099
1100         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1101
1102         /* Make sure resume from hibernation re-enumerates everything */
1103         if (hibernated)
1104                 ohci_usb_reset(ohci);
1105
1106         /* See if the controller is already running or has been reset */
1107         ohci->hc_control = ohci_readl(ohci, &ohci->regs->control);
1108         if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
1109                 need_reinit = true;
1110         } else {
1111                 switch (ohci->hc_control & OHCI_CTRL_HCFS) {
1112                 case OHCI_USB_OPER:
1113                 case OHCI_USB_RESET:
1114                         need_reinit = true;
1115                 }
1116         }
1117
1118         /* If needed, reinitialize and suspend the root hub */
1119         if (need_reinit) {
1120                 spin_lock_irq(&ohci->lock);
1121                 ohci_rh_resume(ohci);
1122                 ohci_rh_suspend(ohci, 0);
1123                 spin_unlock_irq(&ohci->lock);
1124         }
1125
1126         /* Normally just turn on port power and enable interrupts */
1127         else {
1128                 ohci_dbg(ohci, "powerup ports\n");
1129                 for (port = 0; port < ohci->num_ports; port++)
1130                         ohci_writel(ohci, RH_PS_PPS,
1131                                         &ohci->regs->roothub.portstatus[port]);
1132
1133                 ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrenable);
1134                 ohci_readl(ohci, &ohci->regs->intrenable);
1135                 msleep(20);
1136         }
1137
1138         usb_hcd_resume_root_hub(hcd);
1139
1140         return 0;
1141 }
1142 EXPORT_SYMBOL_GPL(ohci_resume);
1143
1144 #endif
1145
1146 /*-------------------------------------------------------------------------*/
1147
1148 /*
1149  * Generic structure: This gets copied for platform drivers so that
1150  * individual entries can be overridden as needed.
1151  */
1152
1153 static const struct hc_driver ohci_hc_driver = {
1154         .description =          hcd_name,
1155         .product_desc =         "OHCI Host Controller",
1156         .hcd_priv_size =        sizeof(struct ohci_hcd),
1157
1158         /*
1159          * generic hardware linkage
1160         */
1161         .irq =                  ohci_irq,
1162         .flags =                HCD_MEMORY | HCD_USB11,
1163
1164         /*
1165         * basic lifecycle operations
1166         */
1167         .reset =                ohci_setup,
1168         .start =                ohci_start,
1169         .stop =                 ohci_stop,
1170         .shutdown =             ohci_shutdown,
1171
1172         /*
1173          * managing i/o requests and associated device resources
1174         */
1175         .urb_enqueue =          ohci_urb_enqueue,
1176         .urb_dequeue =          ohci_urb_dequeue,
1177         .endpoint_disable =     ohci_endpoint_disable,
1178
1179         /*
1180         * scheduling support
1181         */
1182         .get_frame_number =     ohci_get_frame,
1183
1184         /*
1185         * root hub support
1186         */
1187         .hub_status_data =      ohci_hub_status_data,
1188         .hub_control =          ohci_hub_control,
1189 #ifdef CONFIG_PM
1190         .bus_suspend =          ohci_bus_suspend,
1191         .bus_resume =           ohci_bus_resume,
1192 #endif
1193         .start_port_reset =     ohci_start_port_reset,
1194 };
1195
1196 void ohci_init_driver(struct hc_driver *drv,
1197                 const struct ohci_driver_overrides *over)
1198 {
1199         /* Copy the generic table to drv and then apply the overrides */
1200         *drv = ohci_hc_driver;
1201
1202         if (over) {
1203                 drv->product_desc = over->product_desc;
1204                 drv->hcd_priv_size += over->extra_priv_size;
1205                 if (over->reset)
1206                         drv->reset = over->reset;
1207         }
1208 }
1209 EXPORT_SYMBOL_GPL(ohci_init_driver);
1210
1211 /*-------------------------------------------------------------------------*/
1212
1213 MODULE_AUTHOR (DRIVER_AUTHOR);
1214 MODULE_DESCRIPTION(DRIVER_DESC);
1215 MODULE_LICENSE ("GPL");
1216
1217 #if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_SA1111)
1218 #include "ohci-sa1111.c"
1219 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
1220 #endif
1221
1222 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1223 #include "ohci-ppc-of.c"
1224 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1225 #endif
1226
1227 #ifdef CONFIG_PPC_PS3
1228 #include "ohci-ps3.c"
1229 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1230 #endif
1231
1232 #ifdef CONFIG_MFD_SM501
1233 #include "ohci-sm501.c"
1234 #define SM501_OHCI_DRIVER       ohci_hcd_sm501_driver
1235 #endif
1236
1237 #ifdef CONFIG_MFD_TC6393XB
1238 #include "ohci-tmio.c"
1239 #define TMIO_OHCI_DRIVER        ohci_hcd_tmio_driver
1240 #endif
1241
1242 #ifdef CONFIG_TILE_USB
1243 #include "ohci-tilegx.c"
1244 #define PLATFORM_DRIVER         ohci_hcd_tilegx_driver
1245 #endif
1246
1247 static int __init ohci_hcd_mod_init(void)
1248 {
1249         int retval = 0;
1250
1251         if (usb_disabled())
1252                 return -ENODEV;
1253
1254         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1255         pr_debug ("%s: block sizes: ed %zd td %zd\n", hcd_name,
1256                 sizeof (struct ed), sizeof (struct td));
1257         set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1258
1259         ohci_debug_root = debugfs_create_dir("ohci", usb_debug_root);
1260         if (!ohci_debug_root) {
1261                 retval = -ENOENT;
1262                 goto error_debug;
1263         }
1264
1265 #ifdef PS3_SYSTEM_BUS_DRIVER
1266         retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1267         if (retval < 0)
1268                 goto error_ps3;
1269 #endif
1270
1271 #ifdef PLATFORM_DRIVER
1272         retval = platform_driver_register(&PLATFORM_DRIVER);
1273         if (retval < 0)
1274                 goto error_platform;
1275 #endif
1276
1277 #ifdef OF_PLATFORM_DRIVER
1278         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1279         if (retval < 0)
1280                 goto error_of_platform;
1281 #endif
1282
1283 #ifdef SA1111_DRIVER
1284         retval = sa1111_driver_register(&SA1111_DRIVER);
1285         if (retval < 0)
1286                 goto error_sa1111;
1287 #endif
1288
1289 #ifdef SM501_OHCI_DRIVER
1290         retval = platform_driver_register(&SM501_OHCI_DRIVER);
1291         if (retval < 0)
1292                 goto error_sm501;
1293 #endif
1294
1295 #ifdef TMIO_OHCI_DRIVER
1296         retval = platform_driver_register(&TMIO_OHCI_DRIVER);
1297         if (retval < 0)
1298                 goto error_tmio;
1299 #endif
1300
1301         return retval;
1302
1303         /* Error path */
1304 #ifdef TMIO_OHCI_DRIVER
1305         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1306  error_tmio:
1307 #endif
1308 #ifdef SM501_OHCI_DRIVER
1309         platform_driver_unregister(&SM501_OHCI_DRIVER);
1310  error_sm501:
1311 #endif
1312 #ifdef SA1111_DRIVER
1313         sa1111_driver_unregister(&SA1111_DRIVER);
1314  error_sa1111:
1315 #endif
1316 #ifdef OF_PLATFORM_DRIVER
1317         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1318  error_of_platform:
1319 #endif
1320 #ifdef PLATFORM_DRIVER
1321         platform_driver_unregister(&PLATFORM_DRIVER);
1322  error_platform:
1323 #endif
1324 #ifdef PS3_SYSTEM_BUS_DRIVER
1325         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1326  error_ps3:
1327 #endif
1328         debugfs_remove(ohci_debug_root);
1329         ohci_debug_root = NULL;
1330  error_debug:
1331
1332         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1333         return retval;
1334 }
1335 module_init(ohci_hcd_mod_init);
1336
1337 static void __exit ohci_hcd_mod_exit(void)
1338 {
1339 #ifdef TMIO_OHCI_DRIVER
1340         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1341 #endif
1342 #ifdef SM501_OHCI_DRIVER
1343         platform_driver_unregister(&SM501_OHCI_DRIVER);
1344 #endif
1345 #ifdef SA1111_DRIVER
1346         sa1111_driver_unregister(&SA1111_DRIVER);
1347 #endif
1348 #ifdef OF_PLATFORM_DRIVER
1349         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1350 #endif
1351 #ifdef PLATFORM_DRIVER
1352         platform_driver_unregister(&PLATFORM_DRIVER);
1353 #endif
1354 #ifdef PS3_SYSTEM_BUS_DRIVER
1355         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1356 #endif
1357         debugfs_remove(ohci_debug_root);
1358         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1359 }
1360 module_exit(ohci_hcd_mod_exit);
1361