thermal: pch: Add Cannon Lake support
[sfrench/cifs-2.6.git] / drivers / thermal / rcar_gen3_thermal.c
1 /*
2  *  R-Car Gen3 THS thermal sensor driver
3  *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
4  *
5  * Copyright (C) 2016 Renesas Electronics Corporation.
6  * Copyright (C) 2016 Sang Engineering
7  *
8  *  This program is free software; you can redistribute it and/or modify
9  *  it under the terms of the GNU General Public License as published by
10  *  the Free Software Foundation; version 2 of the License.
11  *
12  *  This program is distributed in the hope that it will be useful, but
13  *  WITHOUT ANY WARRANTY; without even the implied warranty of
14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  *  General Public License for more details.
16  *
17  */
18 #include <linux/delay.h>
19 #include <linux/err.h>
20 #include <linux/interrupt.h>
21 #include <linux/io.h>
22 #include <linux/module.h>
23 #include <linux/of_device.h>
24 #include <linux/platform_device.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/spinlock.h>
27 #include <linux/thermal.h>
28
29 #include "thermal_core.h"
30
31 /* Register offsets */
32 #define REG_GEN3_IRQSTR         0x04
33 #define REG_GEN3_IRQMSK         0x08
34 #define REG_GEN3_IRQCTL         0x0C
35 #define REG_GEN3_IRQEN          0x10
36 #define REG_GEN3_IRQTEMP1       0x14
37 #define REG_GEN3_IRQTEMP2       0x18
38 #define REG_GEN3_IRQTEMP3       0x1C
39 #define REG_GEN3_CTSR           0x20
40 #define REG_GEN3_THCTR          0x20
41 #define REG_GEN3_TEMP           0x28
42 #define REG_GEN3_THCODE1        0x50
43 #define REG_GEN3_THCODE2        0x54
44 #define REG_GEN3_THCODE3        0x58
45
46 /* IRQ{STR,MSK,EN} bits */
47 #define IRQ_TEMP1               BIT(0)
48 #define IRQ_TEMP2               BIT(1)
49 #define IRQ_TEMP3               BIT(2)
50 #define IRQ_TEMPD1              BIT(3)
51 #define IRQ_TEMPD2              BIT(4)
52 #define IRQ_TEMPD3              BIT(5)
53
54 /* CTSR bits */
55 #define CTSR_PONM       BIT(8)
56 #define CTSR_AOUT       BIT(7)
57 #define CTSR_THBGR      BIT(5)
58 #define CTSR_VMEN       BIT(4)
59 #define CTSR_VMST       BIT(1)
60 #define CTSR_THSST      BIT(0)
61
62 /* THCTR bits */
63 #define THCTR_PONM      BIT(6)
64 #define THCTR_THSST     BIT(0)
65
66 #define CTEMP_MASK      0xFFF
67
68 #define MCELSIUS(temp)  ((temp) * 1000)
69 #define GEN3_FUSE_MASK  0xFFF
70
71 #define TSC_MAX_NUM     3
72
73 /* Structure for thermal temperature calculation */
74 struct equation_coefs {
75         int a1;
76         int b1;
77         int a2;
78         int b2;
79 };
80
81 struct rcar_gen3_thermal_tsc {
82         void __iomem *base;
83         struct thermal_zone_device *zone;
84         struct equation_coefs coef;
85         int low;
86         int high;
87 };
88
89 struct rcar_gen3_thermal_priv {
90         struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
91         unsigned int num_tscs;
92         spinlock_t lock; /* Protect interrupts on and off */
93         const struct rcar_gen3_thermal_data *data;
94 };
95
96 struct rcar_gen3_thermal_data {
97         void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
98 };
99
100 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
101                                          u32 reg)
102 {
103         return ioread32(tsc->base + reg);
104 }
105
106 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
107                                            u32 reg, u32 data)
108 {
109         iowrite32(data, tsc->base + reg);
110 }
111
112 /*
113  * Linear approximation for temperature
114  *
115  * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
116  *
117  * The constants a and b are calculated using two triplets of int values PTAT
118  * and THCODE. PTAT and THCODE can either be read from hardware or use hard
119  * coded values from driver. The formula to calculate a and b are taken from
120  * BSP and sparsely documented and understood.
121  *
122  * Examining the linear formula and the formula used to calculate constants a
123  * and b while knowing that the span for PTAT and THCODE values are between
124  * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
125  * Integer also needs to be signed so that leaves 7 bits for binary
126  * fixed point scaling.
127  */
128
129 #define FIXPT_SHIFT 7
130 #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
131 #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
132 #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
133 #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
134
135 #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
136
137 /* no idea where these constants come from */
138 #define TJ_1 96
139 #define TJ_3 -41
140
141 static void rcar_gen3_thermal_calc_coefs(struct equation_coefs *coef,
142                                          int *ptat, int *thcode)
143 {
144         int tj_2;
145
146         /* TODO: Find documentation and document constant calculation formula */
147
148         /*
149          * Division is not scaled in BSP and if scaled it might overflow
150          * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
151          */
152         tj_2 = (FIXPT_INT((ptat[1] - ptat[2]) * 137)
153                 / (ptat[0] - ptat[2])) - FIXPT_INT(41);
154
155         coef->a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
156                              tj_2 - FIXPT_INT(TJ_3));
157         coef->b1 = FIXPT_INT(thcode[2]) - coef->a1 * TJ_3;
158
159         coef->a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
160                              tj_2 - FIXPT_INT(TJ_1));
161         coef->b2 = FIXPT_INT(thcode[0]) - coef->a2 * TJ_1;
162 }
163
164 static int rcar_gen3_thermal_round(int temp)
165 {
166         int result, round_offs;
167
168         round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
169                 -RCAR3_THERMAL_GRAN / 2;
170         result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
171         return result * RCAR3_THERMAL_GRAN;
172 }
173
174 static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
175 {
176         struct rcar_gen3_thermal_tsc *tsc = devdata;
177         int mcelsius, val1, val2;
178         u32 reg;
179
180         /* Read register and convert to mili Celsius */
181         reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
182
183         val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1);
184         val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2);
185         mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2);
186
187         /* Make sure we are inside specifications */
188         if ((mcelsius < MCELSIUS(-40)) || (mcelsius > MCELSIUS(125)))
189                 return -EIO;
190
191         /* Round value to device granularity setting */
192         *temp = rcar_gen3_thermal_round(mcelsius);
193
194         return 0;
195 }
196
197 static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
198                                               int mcelsius)
199 {
200         int celsius, val1, val2;
201
202         celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
203         val1 = celsius * tsc->coef.a1 + tsc->coef.b1;
204         val2 = celsius * tsc->coef.a2 + tsc->coef.b2;
205
206         return INT_FIXPT((val1 + val2) / 2);
207 }
208
209 static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
210 {
211         struct rcar_gen3_thermal_tsc *tsc = devdata;
212
213         low = clamp_val(low, -40000, 125000);
214         high = clamp_val(high, -40000, 125000);
215
216         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
217                                 rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
218
219         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
220                                 rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
221
222         tsc->low = low;
223         tsc->high = high;
224
225         return 0;
226 }
227
228 static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
229         .get_temp       = rcar_gen3_thermal_get_temp,
230         .set_trips      = rcar_gen3_thermal_set_trips,
231 };
232
233 static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
234 {
235         unsigned int i;
236         u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0;
237
238         for (i = 0; i < priv->num_tscs; i++)
239                 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
240 }
241
242 static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
243 {
244         struct rcar_gen3_thermal_priv *priv = data;
245         u32 status;
246         int i, ret = IRQ_HANDLED;
247
248         spin_lock(&priv->lock);
249         for (i = 0; i < priv->num_tscs; i++) {
250                 status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
251                 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
252                 if (status)
253                         ret = IRQ_WAKE_THREAD;
254         }
255
256         if (ret == IRQ_WAKE_THREAD)
257                 rcar_thermal_irq_set(priv, false);
258
259         spin_unlock(&priv->lock);
260
261         return ret;
262 }
263
264 static irqreturn_t rcar_gen3_thermal_irq_thread(int irq, void *data)
265 {
266         struct rcar_gen3_thermal_priv *priv = data;
267         unsigned long flags;
268         int i;
269
270         for (i = 0; i < priv->num_tscs; i++)
271                 thermal_zone_device_update(priv->tscs[i]->zone,
272                                            THERMAL_EVENT_UNSPECIFIED);
273
274         spin_lock_irqsave(&priv->lock, flags);
275         rcar_thermal_irq_set(priv, true);
276         spin_unlock_irqrestore(&priv->lock, flags);
277
278         return IRQ_HANDLED;
279 }
280
281 static void r8a7795_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
282 {
283         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  CTSR_THBGR);
284         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  0x0);
285
286         usleep_range(1000, 2000);
287
288         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
289
290         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
291         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
292         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
293
294         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
295                                 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
296
297         usleep_range(100, 200);
298
299         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
300                                 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
301                                 CTSR_VMST | CTSR_THSST);
302
303         usleep_range(1000, 2000);
304 }
305
306 static void r8a7796_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
307 {
308         u32 reg_val;
309
310         reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
311         reg_val &= ~THCTR_PONM;
312         rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
313
314         usleep_range(1000, 2000);
315
316         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
317         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
318         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
319
320         reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
321         reg_val |= THCTR_THSST;
322         rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
323
324         usleep_range(1000, 2000);
325 }
326
327 static const struct rcar_gen3_thermal_data r8a7795_data = {
328         .thermal_init = r8a7795_thermal_init,
329 };
330
331 static const struct rcar_gen3_thermal_data r8a7796_data = {
332         .thermal_init = r8a7796_thermal_init,
333 };
334
335 static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
336         { .compatible = "renesas,r8a7795-thermal", .data = &r8a7795_data},
337         { .compatible = "renesas,r8a7796-thermal", .data = &r8a7796_data},
338         {},
339 };
340 MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
341
342 static int rcar_gen3_thermal_remove(struct platform_device *pdev)
343 {
344         struct device *dev = &pdev->dev;
345
346         pm_runtime_put(dev);
347         pm_runtime_disable(dev);
348
349         return 0;
350 }
351
352 static int rcar_gen3_thermal_probe(struct platform_device *pdev)
353 {
354         struct rcar_gen3_thermal_priv *priv;
355         struct device *dev = &pdev->dev;
356         struct resource *res;
357         struct thermal_zone_device *zone;
358         int ret, irq, i;
359         char *irqname;
360
361         /* default values if FUSEs are missing */
362         /* TODO: Read values from hardware on supported platforms */
363         int ptat[3] = { 2351, 1509, 435 };
364         int thcode[TSC_MAX_NUM][3] = {
365                 { 3248, 2800, 2221 },
366                 { 3245, 2795, 2216 },
367                 { 3250, 2805, 2237 },
368         };
369
370         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
371         if (!priv)
372                 return -ENOMEM;
373
374         priv->data = of_device_get_match_data(dev);
375
376         spin_lock_init(&priv->lock);
377
378         platform_set_drvdata(pdev, priv);
379
380         /*
381          * Request 2 (of the 3 possible) IRQs, the driver only needs to
382          * to trigger on the low and high trip points of the current
383          * temp window at this point.
384          */
385         for (i = 0; i < 2; i++) {
386                 irq = platform_get_irq(pdev, i);
387                 if (irq < 0)
388                         return irq;
389
390                 irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
391                                          dev_name(dev), i);
392                 if (!irqname)
393                         return -ENOMEM;
394
395                 ret = devm_request_threaded_irq(dev, irq, rcar_gen3_thermal_irq,
396                                                 rcar_gen3_thermal_irq_thread,
397                                                 IRQF_SHARED, irqname, priv);
398                 if (ret)
399                         return ret;
400         }
401
402         pm_runtime_enable(dev);
403         pm_runtime_get_sync(dev);
404
405         for (i = 0; i < TSC_MAX_NUM; i++) {
406                 struct rcar_gen3_thermal_tsc *tsc;
407
408                 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
409                 if (!res)
410                         break;
411
412                 tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
413                 if (!tsc) {
414                         ret = -ENOMEM;
415                         goto error_unregister;
416                 }
417
418                 tsc->base = devm_ioremap_resource(dev, res);
419                 if (IS_ERR(tsc->base)) {
420                         ret = PTR_ERR(tsc->base);
421                         goto error_unregister;
422                 }
423
424                 priv->tscs[i] = tsc;
425
426                 priv->data->thermal_init(tsc);
427                 rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);
428
429                 zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
430                                                             &rcar_gen3_tz_of_ops);
431                 if (IS_ERR(zone)) {
432                         dev_err(dev, "Can't register thermal zone\n");
433                         ret = PTR_ERR(zone);
434                         goto error_unregister;
435                 }
436                 tsc->zone = zone;
437
438                 ret = of_thermal_get_ntrips(tsc->zone);
439                 if (ret < 0)
440                         goto error_unregister;
441
442                 dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
443         }
444
445         priv->num_tscs = i;
446
447         if (!priv->num_tscs) {
448                 ret = -ENODEV;
449                 goto error_unregister;
450         }
451
452         rcar_thermal_irq_set(priv, true);
453
454         return 0;
455
456 error_unregister:
457         rcar_gen3_thermal_remove(pdev);
458
459         return ret;
460 }
461
462 static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
463 {
464         struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
465
466         rcar_thermal_irq_set(priv, false);
467
468         return 0;
469 }
470
471 static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
472 {
473         struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
474         unsigned int i;
475
476         for (i = 0; i < priv->num_tscs; i++) {
477                 struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
478
479                 priv->data->thermal_init(tsc);
480                 rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
481         }
482
483         rcar_thermal_irq_set(priv, true);
484
485         return 0;
486 }
487
488 static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
489                          rcar_gen3_thermal_resume);
490
491 static struct platform_driver rcar_gen3_thermal_driver = {
492         .driver = {
493                 .name   = "rcar_gen3_thermal",
494                 .pm = &rcar_gen3_thermal_pm_ops,
495                 .of_match_table = rcar_gen3_thermal_dt_ids,
496         },
497         .probe          = rcar_gen3_thermal_probe,
498         .remove         = rcar_gen3_thermal_remove,
499 };
500 module_platform_driver(rcar_gen3_thermal_driver);
501
502 MODULE_LICENSE("GPL v2");
503 MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
504 MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");