drivers/staging/media/lirc/lirc_serial.c

   1 /*
   2  * lirc_serial.c
   3  *
   4  * lirc_serial - Device driver that records pulse- and pause-lengths
   5  *             (space-lengths) between DDCD event on a serial port.
   6  *
   7  * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
   8  * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
   9  * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
  10  * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
  11  * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
  12  *  This program is free software; you can redistribute it and/or modify
  13  *  it under the terms of the GNU General Public License as published by
  14  *  the Free Software Foundation; either version 2 of the License, or
  15  *  (at your option) any later version.
  16  *
  17  *  This program is distributed in the hope that it will be useful,
  18  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *  GNU General Public License for more details.
  21  *
  22  *  You should have received a copy of the GNU General Public License
  23  *  along with this program; if not, write to the Free Software
  24  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  25  *
  26  */
  27
  28 /*
  29  * Steve's changes to improve transmission fidelity:
  30  *   - for systems with the rdtsc instruction and the clock counter, a
  31  *     send_pule that times the pulses directly using the counter.
  32  *     This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
  33  *     not needed. Measurement shows very stable waveform, even where
  34  *     PCI activity slows the access to the UART, which trips up other
  35  *     versions.
  36  *   - For other system, non-integer-microsecond pulse/space lengths,
  37  *     done using fixed point binary. So, much more accurate carrier
  38  *     frequency.
  39  *   - fine tuned transmitter latency, taking advantage of fractional
  40  *     microseconds in previous change
  41  *   - Fixed bug in the way transmitter latency was accounted for by
  42  *     tuning the pulse lengths down - the send_pulse routine ignored
  43  *     this overhead as it timed the overall pulse length - so the
  44  *     pulse frequency was right but overall pulse length was too
  45  *     long. Fixed by accounting for latency on each pulse/space
  46  *     iteration.
  47  *
  48  * Steve Davies <steve@daviesfam.org>  July 2001
  49  */
  50
  51 #include <linux/module.h>
  52 #include <linux/errno.h>
  53 #include <linux/signal.h>
  54 #include <linux/sched.h>
  55 #include <linux/fs.h>
  56 #include <linux/interrupt.h>
  57 #include <linux/ioport.h>
  58 #include <linux/kernel.h>
  59 #include <linux/serial_reg.h>
  60 #include <linux/time.h>
  61 #include <linux/string.h>
  62 #include <linux/types.h>
  63 #include <linux/wait.h>
  64 #include <linux/mm.h>
  65 #include <linux/delay.h>
  66 #include <linux/poll.h>
  67 #include <linux/platform_device.h>
  68
  69 #include <linux/io.h>
  70 #include <linux/irq.h>
  71 #include <linux/fcntl.h>
  72 #include <linux/spinlock.h>
  73
  74 #ifdef CONFIG_LIRC_SERIAL_NSLU2
  75 #include <asm/hardware.h>
  76 #endif
  77 /* From Intel IXP42X Developer's Manual (#252480-005): */
  78 /* ftp://download.intel.com/design/network/manuals/25248005.pdf */
  79 #define UART_IE_IXP42X_UUE   0x40 /* IXP42X UART Unit enable */
  80 #define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
  81
  82 #include <media/lirc.h>
  83 #include <media/lirc_dev.h>
  84
  85 #define LIRC_DRIVER_NAME "lirc_serial"
  86
  87 struct lirc_serial {
  88         int signal_pin;
  89         int signal_pin_change;
  90         u8 on;
  91         u8 off;
  92         long (*send_pulse)(unsigned long length);
  93         void (*send_space)(long length);
  94         int features;
  95         spinlock_t lock;
  96 };
  97
  98 #define LIRC_HOMEBREW           0
  99 #define LIRC_IRDEO              1
 100 #define LIRC_IRDEO_REMOTE       2
 101 #define LIRC_ANIMAX             3
 102 #define LIRC_IGOR               4
 103 #define LIRC_NSLU2              5
 104
 105 /*** module parameters ***/
 106 static int type;
 107 static int io;
 108 static int irq;
 109 static bool iommap;
 110 static int ioshift;
 111 static bool softcarrier = 1;
 112 static bool share_irq;
 113 static bool debug;
 114 static int sense = -1;  /* -1 = auto, 0 = active high, 1 = active low */
 115 static bool txsense;    /* 0 = active high, 1 = active low */
 116
 117 #define dprintk(fmt, args...)                                   \
 118         do {                                                    \
 119                 if (debug)                                      \
 120                         printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
 121                                fmt, ## args);                   \
 122         } while (0)
 123
 124 /* forward declarations */
 125 static long send_pulse_irdeo(unsigned long length);
 126 static long send_pulse_homebrew(unsigned long length);
 127 static void send_space_irdeo(long length);
 128 static void send_space_homebrew(long length);
 129
 130 static struct lirc_serial hardware[] = {
 131         [LIRC_HOMEBREW] = {
 132                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_HOMEBREW].lock),
 133                 .signal_pin        = UART_MSR_DCD,
 134                 .signal_pin_change = UART_MSR_DDCD,
 135                 .on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
 136                 .off = (UART_MCR_RTS | UART_MCR_OUT2),
 137                 .send_pulse = send_pulse_homebrew,
 138                 .send_space = send_space_homebrew,
 139 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
 140                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 141                                 LIRC_CAN_SET_SEND_CARRIER |
 142                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 143 #else
 144                 .features    = LIRC_CAN_REC_MODE2
 145 #endif
 146         },
 147
 148         [LIRC_IRDEO] = {
 149                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO].lock),
 150                 .signal_pin        = UART_MSR_DSR,
 151                 .signal_pin_change = UART_MSR_DDSR,
 152                 .on  = UART_MCR_OUT2,
 153                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 154                 .send_pulse  = send_pulse_irdeo,
 155                 .send_space  = send_space_irdeo,
 156                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 157                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 158         },
 159
 160         [LIRC_IRDEO_REMOTE] = {
 161                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO_REMOTE].lock),
 162                 .signal_pin        = UART_MSR_DSR,
 163                 .signal_pin_change = UART_MSR_DDSR,
 164                 .on  = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 165                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 166                 .send_pulse  = send_pulse_irdeo,
 167                 .send_space  = send_space_irdeo,
 168                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 169                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 170         },
 171
 172         [LIRC_ANIMAX] = {
 173                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_ANIMAX].lock),
 174                 .signal_pin        = UART_MSR_DCD,
 175                 .signal_pin_change = UART_MSR_DDCD,
 176                 .on  = 0,
 177                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 178                 .send_pulse = NULL,
 179                 .send_space = NULL,
 180                 .features   = LIRC_CAN_REC_MODE2
 181         },
 182
 183         [LIRC_IGOR] = {
 184                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IGOR].lock),
 185                 .signal_pin        = UART_MSR_DSR,
 186                 .signal_pin_change = UART_MSR_DDSR,
 187                 .on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
 188                 .off = (UART_MCR_RTS | UART_MCR_OUT2),
 189                 .send_pulse = send_pulse_homebrew,
 190                 .send_space = send_space_homebrew,
 191 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
 192                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 193                                 LIRC_CAN_SET_SEND_CARRIER |
 194                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 195 #else
 196                 .features    = LIRC_CAN_REC_MODE2
 197 #endif
 198         },
 199
 200 #ifdef CONFIG_LIRC_SERIAL_NSLU2
 201         /*
 202          * Modified Linksys Network Storage Link USB 2.0 (NSLU2):
 203          * We receive on CTS of the 2nd serial port (R142,LHS), we
 204          * transmit with a IR diode between GPIO[1] (green status LED),
 205          * and ground (Matthias Goebl <matthias.goebl@goebl.net>).
 206          * See also http://www.nslu2-linux.org for this device
 207          */
 208         [LIRC_NSLU2] = {
 209                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_NSLU2].lock),
 210                 .signal_pin        = UART_MSR_CTS,
 211                 .signal_pin_change = UART_MSR_DCTS,
 212                 .on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
 213                 .off = (UART_MCR_RTS | UART_MCR_OUT2),
 214                 .send_pulse = send_pulse_homebrew,
 215                 .send_space = send_space_homebrew,
 216 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
 217                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 218                                 LIRC_CAN_SET_SEND_CARRIER |
 219                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 220 #else
 221                 .features    = LIRC_CAN_REC_MODE2
 222 #endif
 223         },
 224 #endif
 225
 226 };
 227
 228 #define RS_ISR_PASS_LIMIT 256
 229
 230 /*
 231  * A long pulse code from a remote might take up to 300 bytes.  The
 232  * daemon should read the bytes as soon as they are generated, so take
 233  * the number of keys you think you can push before the daemon runs
 234  * and multiply by 300.  The driver will warn you if you overrun this
 235  * buffer.  If you have a slow computer or non-busmastering IDE disks,
 236  * maybe you will need to increase this.
 237  */
 238
 239 /* This MUST be a power of two!  It has to be larger than 1 as well. */
 240
 241 #define RBUF_LEN 256
 242
 243 static struct timeval lasttv = {0, 0};
 244
 245 static struct lirc_buffer rbuf;
 246
 247 static unsigned int freq = 38000;
 248 static unsigned int duty_cycle = 50;
 249
 250 /* Initialized in init_timing_params() */
 251 static unsigned long period;
 252 static unsigned long pulse_width;
 253 static unsigned long space_width;
 254
 255 #if defined(__i386__)
 256 /*
 257  * From:
 258  * Linux I/O port programming mini-HOWTO
 259  * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
 260  * v, 28 December 1997
 261  *
 262  * [...]
 263  * Actually, a port I/O instruction on most ports in the 0-0x3ff range
 264  * takes almost exactly 1 microsecond, so if you're, for example, using
 265  * the parallel port directly, just do additional inb()s from that port
 266  * to delay.
 267  * [...]
 268  */
 269 /* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
 270  * comment above plus trimming to match actual measured frequency.
 271  * This will be sensitive to cpu speed, though hopefully most of the 1.5us
 272  * is spent in the uart access.  Still - for reference test machine was a
 273  * 1.13GHz Athlon system - Steve
 274  */
 275
 276 /*
 277  * changed from 400 to 450 as this works better on slower machines;
 278  * faster machines will use the rdtsc code anyway
 279  */
 280 #define LIRC_SERIAL_TRANSMITTER_LATENCY 450
 281
 282 #else
 283
 284 /* does anybody have information on other platforms ? */
 285 /* 256 = 1<<8 */
 286 #define LIRC_SERIAL_TRANSMITTER_LATENCY 256
 287
 288 #endif  /* __i386__ */
 289 /*
 290  * FIXME: should we be using hrtimers instead of this
 291  * LIRC_SERIAL_TRANSMITTER_LATENCY nonsense?
 292  */
 293
 294 /* fetch serial input packet (1 byte) from register offset */
 295 static u8 sinp(int offset)
 296 {
 297         if (iommap != 0)
 298                 /* the register is memory-mapped */
 299                 offset <<= ioshift;
 300
 301         return inb(io + offset);
 302 }
 303
 304 /* write serial output packet (1 byte) of value to register offset */
 305 static void soutp(int offset, u8 value)
 306 {
 307         if (iommap != 0)
 308                 /* the register is memory-mapped */
 309                 offset <<= ioshift;
 310
 311         outb(value, io + offset);
 312 }
 313
 314 static void on(void)
 315 {
 316 #ifdef CONFIG_LIRC_SERIAL_NSLU2
 317         /*
 318          * On NSLU2, we put the transmit diode between the output of the green
 319          * status LED and ground
 320          */
 321         if (type == LIRC_NSLU2) {
 322                 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_LOW);
 323                 return;
 324         }
 325 #endif
 326         if (txsense)
 327                 soutp(UART_MCR, hardware[type].off);
 328         else
 329                 soutp(UART_MCR, hardware[type].on);
 330 }
 331
 332 static void off(void)
 333 {
 334 #ifdef CONFIG_LIRC_SERIAL_NSLU2
 335         if (type == LIRC_NSLU2) {
 336                 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_HIGH);
 337                 return;
 338         }
 339 #endif
 340         if (txsense)
 341                 soutp(UART_MCR, hardware[type].on);
 342         else
 343                 soutp(UART_MCR, hardware[type].off);
 344 }
 345
 346 #ifndef MAX_UDELAY_MS
 347 #define MAX_UDELAY_US 5000
 348 #else
 349 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
 350 #endif
 351
 352 static void safe_udelay(unsigned long usecs)
 353 {
 354         while (usecs > MAX_UDELAY_US) {
 355                 udelay(MAX_UDELAY_US);
 356                 usecs -= MAX_UDELAY_US;
 357         }
 358         udelay(usecs);
 359 }
 360
 361 #ifdef USE_RDTSC
 362 /*
 363  * This is an overflow/precision juggle, complicated in that we can't
 364  * do long long divide in the kernel
 365  */
 366
 367 /*
 368  * When we use the rdtsc instruction to measure clocks, we keep the
 369  * pulse and space widths as clock cycles.  As this is CPU speed
 370  * dependent, the widths must be calculated in init_port and ioctl
 371  * time
 372  */
 373
 374 /* So send_pulse can quickly convert microseconds to clocks */
 375 static unsigned long conv_us_to_clocks;
 376
 377 static int init_timing_params(unsigned int new_duty_cycle,
 378                 unsigned int new_freq)
 379 {
 380         __u64 loops_per_sec, work;
 381
 382         duty_cycle = new_duty_cycle;
 383         freq = new_freq;
 384
 385         loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy);
 386         loops_per_sec *= HZ;
 387
 388         /* How many clocks in a microsecond?, avoiding long long divide */
 389         work = loops_per_sec;
 390         work *= 4295;  /* 4295 = 2^32 / 1e6 */
 391         conv_us_to_clocks = (work >> 32);
 392
 393         /*
 394          * Carrier period in clocks, approach good up to 32GHz clock,
 395          * gets carrier frequency within 8Hz
 396          */
 397         period = loops_per_sec >> 3;
 398         period /= (freq >> 3);
 399
 400         /* Derive pulse and space from the period */
 401         pulse_width = period * duty_cycle / 100;
 402         space_width = period - pulse_width;
 403         dprintk("in init_timing_params, freq=%d, duty_cycle=%d, "
 404                 "clk/jiffy=%ld, pulse=%ld, space=%ld, "
 405                 "conv_us_to_clocks=%ld\n",
 406                 freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy),
 407                 pulse_width, space_width, conv_us_to_clocks);
 408         return 0;
 409 }
 410 #else /* ! USE_RDTSC */
 411 static int init_timing_params(unsigned int new_duty_cycle,
 412                 unsigned int new_freq)
 413 {
 414 /*
 415  * period, pulse/space width are kept with 8 binary places -
 416  * IE multiplied by 256.
 417  */
 418         if (256 * 1000000L / new_freq * new_duty_cycle / 100 <=
 419             LIRC_SERIAL_TRANSMITTER_LATENCY)
 420                 return -EINVAL;
 421         if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <=
 422             LIRC_SERIAL_TRANSMITTER_LATENCY)
 423                 return -EINVAL;
 424         duty_cycle = new_duty_cycle;
 425         freq = new_freq;
 426         period = 256 * 1000000L / freq;
 427         pulse_width = period * duty_cycle / 100;
 428         space_width = period - pulse_width;
 429         dprintk("in init_timing_params, freq=%d pulse=%ld, "
 430                 "space=%ld\n", freq, pulse_width, space_width);
 431         return 0;
 432 }
 433 #endif /* USE_RDTSC */
 434
 435
 436 /* return value: space length delta */
 437
 438 static long send_pulse_irdeo(unsigned long length)
 439 {
 440         long rawbits, ret;
 441         int i;
 442         unsigned char output;
 443         unsigned char chunk, shifted;
 444
 445         /* how many bits have to be sent ? */
 446         rawbits = length * 1152 / 10000;
 447         if (duty_cycle > 50)
 448                 chunk = 3;
 449         else
 450                 chunk = 1;
 451         for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
 452                 shifted = chunk << (i * 3);
 453                 shifted >>= 1;
 454                 output &= (~shifted);
 455                 i++;
 456                 if (i == 3) {
 457                         soutp(UART_TX, output);
 458                         while (!(sinp(UART_LSR) & UART_LSR_THRE))
 459                                 ;
 460                         output = 0x7f;
 461                         i = 0;
 462                 }
 463         }
 464         if (i != 0) {
 465                 soutp(UART_TX, output);
 466                 while (!(sinp(UART_LSR) & UART_LSR_TEMT))
 467                         ;
 468         }
 469
 470         if (i == 0)
 471                 ret = (-rawbits) * 10000 / 1152;
 472         else
 473                 ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152;
 474
 475         return ret;
 476 }
 477
 478 #ifdef USE_RDTSC
 479 /* Version that uses Pentium rdtsc instruction to measure clocks */
 480
 481 /*
 482  * This version does sub-microsecond timing using rdtsc instruction,
 483  * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY
 484  * Implicitly i586 architecture...  - Steve
 485  */
 486
 487 static long send_pulse_homebrew_softcarrier(unsigned long length)
 488 {
 489         int flag;
 490         unsigned long target, start, now;
 491
 492         /* Get going quick as we can */
 493         rdtscl(start);
 494         on();
 495         /* Convert length from microseconds to clocks */
 496         length *= conv_us_to_clocks;
 497         /* And loop till time is up - flipping at right intervals */
 498         now = start;
 499         target = pulse_width;
 500         flag = 1;
 501         /*
 502          * FIXME: This looks like a hard busy wait, without even an occasional,
 503          * polite, cpu_relax() call.  There's got to be a better way?
 504          *
 505          * The i2c code has the result of a lot of bit-banging work, I wonder if
 506          * there's something there which could be helpful here.
 507          */
 508         while ((now - start) < length) {
 509                 /* Delay till flip time */
 510                 do {
 511                         rdtscl(now);
 512                 } while ((now - start) < target);
 513
 514                 /* flip */
 515                 if (flag) {
 516                         rdtscl(now);
 517                         off();
 518                         target += space_width;
 519                 } else {
 520                         rdtscl(now); on();
 521                         target += pulse_width;
 522                 }
 523                 flag = !flag;
 524         }
 525         rdtscl(now);
 526         return ((now - start) - length) / conv_us_to_clocks;
 527 }
 528 #else /* ! USE_RDTSC */
 529 /* Version using udelay() */
 530
 531 /*
 532  * here we use fixed point arithmetic, with 8
 533  * fractional bits.  that gets us within 0.1% or so of the right average
 534  * frequency, albeit with some jitter in pulse length - Steve
 535  */
 536
 537 /* To match 8 fractional bits used for pulse/space length */
 538
 539 static long send_pulse_homebrew_softcarrier(unsigned long length)
 540 {
 541         int flag;
 542         unsigned long actual, target, d;
 543         length <<= 8;
 544
 545         actual = 0; target = 0; flag = 0;
 546         while (actual < length) {
 547                 if (flag) {
 548                         off();
 549                         target += space_width;
 550                 } else {
 551                         on();
 552                         target += pulse_width;
 553                 }
 554                 d = (target - actual -
 555                      LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8;
 556                 /*
 557                  * Note - we've checked in ioctl that the pulse/space
 558                  * widths are big enough so that d is > 0
 559                  */
 560                 udelay(d);
 561                 actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY;
 562                 flag = !flag;
 563         }
 564         return (actual-length) >> 8;
 565 }
 566 #endif /* USE_RDTSC */
 567
 568 static long send_pulse_homebrew(unsigned long length)
 569 {
 570         if (length <= 0)
 571                 return 0;
 572
 573         if (softcarrier)
 574                 return send_pulse_homebrew_softcarrier(length);
 575         else {
 576                 on();
 577                 safe_udelay(length);
 578                 return 0;
 579         }
 580 }
 581
 582 static void send_space_irdeo(long length)
 583 {
 584         if (length <= 0)
 585                 return;
 586
 587         safe_udelay(length);
 588 }
 589
 590 static void send_space_homebrew(long length)
 591 {
 592         off();
 593         if (length <= 0)
 594                 return;
 595         safe_udelay(length);
 596 }
 597
 598 static void rbwrite(int l)
 599 {
 600         if (lirc_buffer_full(&rbuf)) {
 601                 /* no new signals will be accepted */
 602                 dprintk("Buffer overrun\n");
 603                 return;
 604         }
 605         lirc_buffer_write(&rbuf, (void *)&l);
 606 }
 607
 608 static void frbwrite(int l)
 609 {
 610         /* simple noise filter */
 611         static int pulse, space;
 612         static unsigned int ptr;
 613
 614         if (ptr > 0 && (l & PULSE_BIT)) {
 615                 pulse += l & PULSE_MASK;
 616                 if (pulse > 250) {
 617                         rbwrite(space);
 618                         rbwrite(pulse | PULSE_BIT);
 619                         ptr = 0;
 620                         pulse = 0;
 621                 }
 622                 return;
 623         }
 624         if (!(l & PULSE_BIT)) {
 625                 if (ptr == 0) {
 626                         if (l > 20000) {
 627                                 space = l;
 628                                 ptr++;
 629                                 return;
 630                         }
 631                 } else {
 632                         if (l > 20000) {
 633                                 space += pulse;
 634                                 if (space > PULSE_MASK)
 635                                         space = PULSE_MASK;
 636                                 space += l;
 637                                 if (space > PULSE_MASK)
 638                                         space = PULSE_MASK;
 639                                 pulse = 0;
 640                                 return;
 641                         }
 642                         rbwrite(space);
 643                         rbwrite(pulse | PULSE_BIT);
 644                         ptr = 0;
 645                         pulse = 0;
 646                 }
 647         }
 648         rbwrite(l);
 649 }
 650
 651 static irqreturn_t irq_handler(int i, void *blah)
 652 {
 653         struct timeval tv;
 654         int counter, dcd;
 655         u8 status;
 656         long deltv;
 657         int data;
 658         static int last_dcd = -1;
 659
 660         if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
 661                 /* not our interrupt */
 662                 return IRQ_NONE;
 663         }
 664
 665         counter = 0;
 666         do {
 667                 counter++;
 668                 status = sinp(UART_MSR);
 669                 if (counter > RS_ISR_PASS_LIMIT) {
 670                         printk(KERN_WARNING LIRC_DRIVER_NAME ": AIEEEE: "
 671                                "We're caught!\n");
 672                         break;
 673                 }
 674                 if ((status & hardware[type].signal_pin_change)
 675                     && sense != -1) {
 676                         /* get current time */
 677                         do_gettimeofday(&tv);
 678
 679                         /* New mode, written by Trent Piepho
 680                            <xyzzy@u.washington.edu>. */
 681
 682                         /*
 683                          * The old format was not very portable.
 684                          * We now use an int to pass pulses
 685                          * and spaces to user space.
 686                          *
 687                          * If PULSE_BIT is set a pulse has been
 688                          * received, otherwise a space has been
 689                          * received.  The driver needs to know if your
 690                          * receiver is active high or active low, or
 691                          * the space/pulse sense could be
 692                          * inverted. The bits denoted by PULSE_MASK are
 693                          * the length in microseconds. Lengths greater
 694                          * than or equal to 16 seconds are clamped to
 695                          * PULSE_MASK.  All other bits are unused.
 696                          * This is a much simpler interface for user
 697                          * programs, as well as eliminating "out of
 698                          * phase" errors with space/pulse
 699                          * autodetection.
 700                          */
 701
 702                         /* calc time since last interrupt in microseconds */
 703                         dcd = (status & hardware[type].signal_pin) ? 1 : 0;
 704
 705                         if (dcd == last_dcd) {
 706                                 printk(KERN_WARNING LIRC_DRIVER_NAME
 707                                 ": ignoring spike: %d %d %lx %lx %lx %lx\n",
 708                                 dcd, sense,
 709                                 tv.tv_sec, lasttv.tv_sec,
 710                                 tv.tv_usec, lasttv.tv_usec);
 711                                 continue;
 712                         }
 713
 714                         deltv = tv.tv_sec-lasttv.tv_sec;
 715                         if (tv.tv_sec < lasttv.tv_sec ||
 716                             (tv.tv_sec == lasttv.tv_sec &&
 717                              tv.tv_usec < lasttv.tv_usec)) {
 718                                 printk(KERN_WARNING LIRC_DRIVER_NAME
 719                                        ": AIEEEE: your clock just jumped "
 720                                        "backwards\n");
 721                                 printk(KERN_WARNING LIRC_DRIVER_NAME
 722                                        ": %d %d %lx %lx %lx %lx\n",
 723                                        dcd, sense,
 724                                        tv.tv_sec, lasttv.tv_sec,
 725                                        tv.tv_usec, lasttv.tv_usec);
 726                                 data = PULSE_MASK;
 727                         } else if (deltv > 15) {
 728                                 data = PULSE_MASK; /* really long time */
 729                                 if (!(dcd^sense)) {
 730                                         /* sanity check */
 731                                         printk(KERN_WARNING LIRC_DRIVER_NAME
 732                                                ": AIEEEE: "
 733                                                "%d %d %lx %lx %lx %lx\n",
 734                                                dcd, sense,
 735                                                tv.tv_sec, lasttv.tv_sec,
 736                                                tv.tv_usec, lasttv.tv_usec);
 737                                         /*
 738                                          * detecting pulse while this
 739                                          * MUST be a space!
 740                                          */
 741                                         sense = sense ? 0 : 1;
 742                                 }
 743                         } else
 744                                 data = (int) (deltv*1000000 +
 745                                                tv.tv_usec -
 746                                                lasttv.tv_usec);
 747                         frbwrite(dcd^sense ? data : (data|PULSE_BIT));
 748                         lasttv = tv;
 749                         last_dcd = dcd;
 750                         wake_up_interruptible(&rbuf.wait_poll);
 751                 }
 752         } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
 753         return IRQ_HANDLED;
 754 }
 755
 756
 757 static int hardware_init_port(void)
 758 {
 759         u8 scratch, scratch2, scratch3;
 760
 761         /*
 762          * This is a simple port existence test, borrowed from the autoconfig
 763          * function in drivers/serial/8250.c
 764          */
 765         scratch = sinp(UART_IER);
 766         soutp(UART_IER, 0);
 767 #ifdef __i386__
 768         outb(0xff, 0x080);
 769 #endif
 770         scratch2 = sinp(UART_IER) & 0x0f;
 771         soutp(UART_IER, 0x0f);
 772 #ifdef __i386__
 773         outb(0x00, 0x080);
 774 #endif
 775         scratch3 = sinp(UART_IER) & 0x0f;
 776         soutp(UART_IER, scratch);
 777         if (scratch2 != 0 || scratch3 != 0x0f) {
 778                 /* we fail, there's nothing here */
 779                 printk(KERN_ERR LIRC_DRIVER_NAME ": port existence test "
 780                        "failed, cannot continue\n");
 781                 return -ENODEV;
 782         }
 783
 784
 785
 786         /* Set DLAB 0. */
 787         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 788
 789         /* First of all, disable all interrupts */
 790         soutp(UART_IER, sinp(UART_IER) &
 791               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
 792
 793         /* Clear registers. */
 794         sinp(UART_LSR);
 795         sinp(UART_RX);
 796         sinp(UART_IIR);
 797         sinp(UART_MSR);
 798
 799 #ifdef CONFIG_LIRC_SERIAL_NSLU2
 800         if (type == LIRC_NSLU2) {
 801                 /* Setup NSLU2 UART */
 802
 803                 /* Enable UART */
 804                 soutp(UART_IER, sinp(UART_IER) | UART_IE_IXP42X_UUE);
 805                 /* Disable Receiver data Time out interrupt */
 806                 soutp(UART_IER, sinp(UART_IER) & ~UART_IE_IXP42X_RTOIE);
 807                 /* set out2 = interrupt unmask; off() doesn't set MCR
 808                    on NSLU2 */
 809                 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
 810         }
 811 #endif
 812
 813         /* Set line for power source */
 814         off();
 815
 816         /* Clear registers again to be sure. */
 817         sinp(UART_LSR);
 818         sinp(UART_RX);
 819         sinp(UART_IIR);
 820         sinp(UART_MSR);
 821
 822         switch (type) {
 823         case LIRC_IRDEO:
 824         case LIRC_IRDEO_REMOTE:
 825                 /* setup port to 7N1 @ 115200 Baud */
 826                 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
 827
 828                 /* Set DLAB 1. */
 829                 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
 830                 /* Set divisor to 1 => 115200 Baud */
 831                 soutp(UART_DLM, 0);
 832                 soutp(UART_DLL, 1);
 833                 /* Set DLAB 0 +  7N1 */
 834                 soutp(UART_LCR, UART_LCR_WLEN7);
 835                 /* THR interrupt already disabled at this point */
 836                 break;
 837         default:
 838                 break;
 839         }
 840
 841         return 0;
 842 }
 843
 844 static int lirc_serial_probe(struct platform_device *dev)
 845 {
 846         int i, nlow, nhigh, result;
 847
 848         result = request_irq(irq, irq_handler,
 849                              (share_irq ? IRQF_SHARED : 0),
 850                              LIRC_DRIVER_NAME, (void *)&hardware);
 851         if (result < 0) {
 852                 if (result == -EBUSY)
 853                         printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n",
 854                                irq);
 855                 else if (result == -EINVAL)
 856                         printk(KERN_ERR LIRC_DRIVER_NAME
 857                                ": Bad irq number or handler\n");
 858                 return result;
 859         }
 860
 861         /* Reserve io region. */
 862         /*
 863          * Future MMAP-Developers: Attention!
 864          * For memory mapped I/O you *might* need to use ioremap() first,
 865          * for the NSLU2 it's done in boot code.
 866          */
 867         if (((iommap != 0)
 868              && (request_mem_region(iommap, 8 << ioshift,
 869                                     LIRC_DRIVER_NAME) == NULL))
 870            || ((iommap == 0)
 871                && (request_region(io, 8, LIRC_DRIVER_NAME) == NULL))) {
 872                 printk(KERN_ERR  LIRC_DRIVER_NAME
 873                        ": port %04x already in use\n", io);
 874                 printk(KERN_WARNING LIRC_DRIVER_NAME
 875                        ": use 'setserial /dev/ttySX uart none'\n");
 876                 printk(KERN_WARNING LIRC_DRIVER_NAME
 877                        ": or compile the serial port driver as module and\n");
 878                 printk(KERN_WARNING LIRC_DRIVER_NAME
 879                        ": make sure this module is loaded first\n");
 880                 result = -EBUSY;
 881                 goto exit_free_irq;
 882         }
 883
 884         result = hardware_init_port();
 885         if (result < 0)
 886                 goto exit_release_region;
 887
 888         /* Initialize pulse/space widths */
 889         init_timing_params(duty_cycle, freq);
 890
 891         /* If pin is high, then this must be an active low receiver. */
 892         if (sense == -1) {
 893                 /* wait 1/2 sec for the power supply */
 894                 msleep(500);
 895
 896                 /*
 897                  * probe 9 times every 0.04s, collect "votes" for
 898                  * active high/low
 899                  */
 900                 nlow = 0;
 901                 nhigh = 0;
 902                 for (i = 0; i < 9; i++) {
 903                         if (sinp(UART_MSR) & hardware[type].signal_pin)
 904                                 nlow++;
 905                         else
 906                                 nhigh++;
 907                         msleep(40);
 908                 }
 909                 sense = (nlow >= nhigh ? 1 : 0);
 910                 printk(KERN_INFO LIRC_DRIVER_NAME  ": auto-detected active "
 911                        "%s receiver\n", sense ? "low" : "high");
 912         } else
 913                 printk(KERN_INFO LIRC_DRIVER_NAME  ": Manually using active "
 914                        "%s receiver\n", sense ? "low" : "high");
 915
 916         dprintk("Interrupt %d, port %04x obtained\n", irq, io);
 917         return 0;
 918
 919 exit_release_region:
 920         if (iommap != 0)
 921                 release_mem_region(iommap, 8 << ioshift);
 922         else
 923                 release_region(io, 8);
 924 exit_free_irq:
 925         free_irq(irq, (void *)&hardware);
 926
 927         return result;
 928 }
 929
 930 static int lirc_serial_remove(struct platform_device *dev)
 931 {
 932         free_irq(irq, (void *)&hardware);
 933
 934         if (iommap != 0)
 935                 release_mem_region(iommap, 8 << ioshift);
 936         else
 937                 release_region(io, 8);
 938
 939         return 0;
 940 }
 941
 942 static int set_use_inc(void *data)
 943 {
 944         unsigned long flags;
 945
 946         /* initialize timestamp */
 947         do_gettimeofday(&lasttv);
 948
 949         spin_lock_irqsave(&hardware[type].lock, flags);
 950
 951         /* Set DLAB 0. */
 952         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 953
 954         soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
 955
 956         spin_unlock_irqrestore(&hardware[type].lock, flags);
 957
 958         return 0;
 959 }
 960
 961 static void set_use_dec(void *data)
 962 {       unsigned long flags;
 963
 964         spin_lock_irqsave(&hardware[type].lock, flags);
 965
 966         /* Set DLAB 0. */
 967         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 968
 969         /* First of all, disable all interrupts */
 970         soutp(UART_IER, sinp(UART_IER) &
 971               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
 972         spin_unlock_irqrestore(&hardware[type].lock, flags);
 973 }
 974
 975 static ssize_t lirc_write(struct file *file, const char *buf,
 976                          size_t n, loff_t *ppos)
 977 {
 978         int i, count;
 979         unsigned long flags;
 980         long delta = 0;
 981         int *wbuf;
 982
 983         if (!(hardware[type].features & LIRC_CAN_SEND_PULSE))
 984                 return -EPERM;
 985
 986         count = n / sizeof(int);
 987         if (n % sizeof(int) || count % 2 == 0)
 988                 return -EINVAL;
 989         wbuf = memdup_user(buf, n);
 990         if (IS_ERR(wbuf))
 991                 return PTR_ERR(wbuf);
 992         spin_lock_irqsave(&hardware[type].lock, flags);
 993         if (type == LIRC_IRDEO) {
 994                 /* DTR, RTS down */
 995                 on();
 996         }
 997         for (i = 0; i < count; i++) {
 998                 if (i%2)
 999                         hardware[type].send_space(wbuf[i] - delta);
1000                 else
1001                         delta = hardware[type].send_pulse(wbuf[i]);
1002         }
1003         off();
1004         spin_unlock_irqrestore(&hardware[type].lock, flags);
1005         kfree(wbuf);
1006         return n;
1007 }
1008
1009 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
1010 {
1011         int result;
1012         __u32 value;
1013
1014         switch (cmd) {
1015         case LIRC_GET_SEND_MODE:
1016                 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1017                         return -ENOIOCTLCMD;
1018
1019                 result = put_user(LIRC_SEND2MODE
1020                                   (hardware[type].features&LIRC_CAN_SEND_MASK),
1021                                   (__u32 *) arg);
1022                 if (result)
1023                         return result;
1024                 break;
1025
1026         case LIRC_SET_SEND_MODE:
1027                 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1028                         return -ENOIOCTLCMD;
1029
1030                 result = get_user(value, (__u32 *) arg);
1031                 if (result)
1032                         return result;
1033                 /* only LIRC_MODE_PULSE supported */
1034                 if (value != LIRC_MODE_PULSE)
1035                         return -EINVAL;
1036                 break;
1037
1038         case LIRC_GET_LENGTH:
1039                 return -ENOIOCTLCMD;
1040                 break;
1041
1042         case LIRC_SET_SEND_DUTY_CYCLE:
1043                 dprintk("SET_SEND_DUTY_CYCLE\n");
1044                 if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE))
1045                         return -ENOIOCTLCMD;
1046
1047                 result = get_user(value, (__u32 *) arg);
1048                 if (result)
1049                         return result;
1050                 if (value <= 0 || value > 100)
1051                         return -EINVAL;
1052                 return init_timing_params(value, freq);
1053                 break;
1054
1055         case LIRC_SET_SEND_CARRIER:
1056                 dprintk("SET_SEND_CARRIER\n");
1057                 if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER))
1058                         return -ENOIOCTLCMD;
1059
1060                 result = get_user(value, (__u32 *) arg);
1061                 if (result)
1062                         return result;
1063                 if (value > 500000 || value < 20000)
1064                         return -EINVAL;
1065                 return init_timing_params(duty_cycle, value);
1066                 break;
1067
1068         default:
1069                 return lirc_dev_fop_ioctl(filep, cmd, arg);
1070         }
1071         return 0;
1072 }
1073
1074 static const struct file_operations lirc_fops = {
1075         .owner          = THIS_MODULE,
1076         .write          = lirc_write,
1077         .unlocked_ioctl = lirc_ioctl,
1078 #ifdef CONFIG_COMPAT
1079         .compat_ioctl   = lirc_ioctl,
1080 #endif
1081         .read           = lirc_dev_fop_read,
1082         .poll           = lirc_dev_fop_poll,
1083         .open           = lirc_dev_fop_open,
1084         .release        = lirc_dev_fop_close,
1085         .llseek         = no_llseek,
1086 };
1087
1088 static struct lirc_driver driver = {
1089         .name           = LIRC_DRIVER_NAME,
1090         .minor          = -1,
1091         .code_length    = 1,
1092         .sample_rate    = 0,
1093         .data           = NULL,
1094         .add_to_buf     = NULL,
1095         .rbuf           = &rbuf,
1096         .set_use_inc    = set_use_inc,
1097         .set_use_dec    = set_use_dec,
1098         .fops           = &lirc_fops,
1099         .dev            = NULL,
1100         .owner          = THIS_MODULE,
1101 };
1102
1103 static struct platform_device *lirc_serial_dev;
1104
1105 static int lirc_serial_suspend(struct platform_device *dev,
1106                                pm_message_t state)
1107 {
1108         /* Set DLAB 0. */
1109         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
1110
1111         /* Disable all interrupts */
1112         soutp(UART_IER, sinp(UART_IER) &
1113               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
1114
1115         /* Clear registers. */
1116         sinp(UART_LSR);
1117         sinp(UART_RX);
1118         sinp(UART_IIR);
1119         sinp(UART_MSR);
1120
1121         return 0;
1122 }
1123
1124 /* twisty maze... need a forward-declaration here... */
1125 static void lirc_serial_exit(void);
1126
1127 static int lirc_serial_resume(struct platform_device *dev)
1128 {
1129         unsigned long flags;
1130         int result;
1131
1132         result = hardware_init_port();
1133         if (result < 0)
1134                 return result;
1135
1136         spin_lock_irqsave(&hardware[type].lock, flags);
1137         /* Enable Interrupt */
1138         do_gettimeofday(&lasttv);
1139         soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
1140         off();
1141
1142         lirc_buffer_clear(&rbuf);
1143
1144         spin_unlock_irqrestore(&hardware[type].lock, flags);
1145
1146         return 0;
1147 }
1148
1149 static struct platform_driver lirc_serial_driver = {
1150         .probe          = lirc_serial_probe,
1151         .remove         = lirc_serial_remove,
1152         .suspend        = lirc_serial_suspend,
1153         .resume         = lirc_serial_resume,
1154         .driver         = {
1155                 .name   = "lirc_serial",
1156                 .owner  = THIS_MODULE,
1157         },
1158 };
1159
1160 static int __init lirc_serial_init(void)
1161 {
1162         int result;
1163
1164         /* Init read buffer. */
1165         result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN);
1166         if (result < 0)
1167                 return result;
1168
1169         result = platform_driver_register(&lirc_serial_driver);
1170         if (result) {
1171                 printk("lirc register returned %d\n", result);
1172                 goto exit_buffer_free;
1173         }
1174
1175         lirc_serial_dev = platform_device_alloc("lirc_serial", 0);
1176         if (!lirc_serial_dev) {
1177                 result = -ENOMEM;
1178                 goto exit_driver_unregister;
1179         }
1180
1181         result = platform_device_add(lirc_serial_dev);
1182         if (result)
1183                 goto exit_device_put;
1184
1185         return 0;
1186
1187 exit_device_put:
1188         platform_device_put(lirc_serial_dev);
1189 exit_driver_unregister:
1190         platform_driver_unregister(&lirc_serial_driver);
1191 exit_buffer_free:
1192         lirc_buffer_free(&rbuf);
1193         return result;
1194 }
1195
1196 static void lirc_serial_exit(void)
1197 {
1198         platform_device_unregister(lirc_serial_dev);
1199         platform_driver_unregister(&lirc_serial_driver);
1200         lirc_buffer_free(&rbuf);
1201 }
1202
1203 static int __init lirc_serial_init_module(void)
1204 {
1205         int result;
1206
1207         switch (type) {
1208         case LIRC_HOMEBREW:
1209         case LIRC_IRDEO:
1210         case LIRC_IRDEO_REMOTE:
1211         case LIRC_ANIMAX:
1212         case LIRC_IGOR:
1213                 /* if nothing specified, use ttyS0/com1 and irq 4 */
1214                 io = io ? io : 0x3f8;
1215                 irq = irq ? irq : 4;
1216                 break;
1217 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1218         case LIRC_NSLU2:
1219                 io = io ? io : IRQ_IXP4XX_UART2;
1220                 irq = irq ? irq : (IXP4XX_UART2_BASE_VIRT + REG_OFFSET);
1221                 iommap = iommap ? iommap : IXP4XX_UART2_BASE_PHYS;
1222                 ioshift = ioshift ? ioshift : 2;
1223                 break;
1224 #endif
1225         default:
1226                 return -EINVAL;
1227         }
1228         if (!softcarrier) {
1229                 switch (type) {
1230                 case LIRC_HOMEBREW:
1231                 case LIRC_IGOR:
1232 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1233                 case LIRC_NSLU2:
1234 #endif
1235                         hardware[type].features &=
1236                                 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE|
1237                                   LIRC_CAN_SET_SEND_CARRIER);
1238                         break;
1239                 }
1240         }
1241
1242         /* make sure sense is either -1, 0, or 1 */
1243         if (sense != -1)
1244                 sense = !!sense;
1245
1246         result = lirc_serial_init();
1247         if (result)
1248                 return result;
1249
1250         driver.features = hardware[type].features;
1251         driver.dev = &lirc_serial_dev->dev;
1252         driver.minor = lirc_register_driver(&driver);
1253         if (driver.minor < 0) {
1254                 printk(KERN_ERR  LIRC_DRIVER_NAME
1255                        ": register_chrdev failed!\n");
1256                 lirc_serial_exit();
1257                 return driver.minor;
1258         }
1259         return 0;
1260 }
1261
1262 static void __exit lirc_serial_exit_module(void)
1263 {
1264         lirc_unregister_driver(driver.minor);
1265         lirc_serial_exit();
1266         dprintk("cleaned up module\n");
1267 }
1268
1269
1270 module_init(lirc_serial_init_module);
1271 module_exit(lirc_serial_exit_module);
1272
1273 MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
1274 MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
1275               "Christoph Bartelmus, Andrei Tanas");
1276 MODULE_LICENSE("GPL");
1277
1278 module_param(type, int, S_IRUGO);
1279 MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
1280                  " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
1281                  " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
1282
1283 module_param(io, int, S_IRUGO);
1284 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1285
1286 /* some architectures (e.g. intel xscale) have memory mapped registers */
1287 module_param(iommap, bool, S_IRUGO);
1288 MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O"
1289                 " (0 = no memory mapped io)");
1290
1291 /*
1292  * some architectures (e.g. intel xscale) align the 8bit serial registers
1293  * on 32bit word boundaries.
1294  * See linux-kernel/drivers/tty/serial/8250/8250.c serial_in()/out()
1295  */
1296 module_param(ioshift, int, S_IRUGO);
1297 MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
1298
1299 module_param(irq, int, S_IRUGO);
1300 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1301
1302 module_param(share_irq, bool, S_IRUGO);
1303 MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
1304
1305 module_param(sense, int, S_IRUGO);
1306 MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit"
1307                  " (0 = active high, 1 = active low )");
1308
1309 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
1310 module_param(txsense, bool, S_IRUGO);
1311 MODULE_PARM_DESC(txsense, "Sense of transmitter circuit"
1312                  " (0 = active high, 1 = active low )");
1313 #endif
1314
1315 module_param(softcarrier, bool, S_IRUGO);
1316 MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");
1317
1318 module_param(debug, bool, S_IRUGO | S_IWUSR);
1319 MODULE_PARM_DESC(debug, "Enable debugging messages");