drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h

   1 /*
   2  * Support for Intel Camera Imaging ISP subsystem.
   3  * Copyright (c) 2015, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #ifndef __IBUF_CTRL_PRIVATE_H_INCLUDED__
  16 #define __IBUF_CTRL_PRIVATE_H_INCLUDED__
  17
  18 #include "ibuf_ctrl_public.h"
  19
  20 #include "device_access.h"      /* ia_css_device_load_uint32 */
  21
  22 #include "assert_support.h" /* assert */
  23 #include "print_support.h" /* print */
  24
  25
  26 /*****************************************************
  27  *
  28  * Native command interface (NCI).
  29  *
  30  *****************************************************/
  31 /**
  32  * @brief Get the ibuf-controller state.
  33  * Refer to "ibuf_ctrl_public.h" for details.
  34  */
  35 STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_state(
  36                 const ibuf_ctrl_ID_t ID,
  37                 ibuf_ctrl_state_t *state)
  38 {
  39         uint32_t i;
  40
  41         state->recalc_words =
  42                 ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_RECALC_WORDS_STATUS);
  43         state->arbiters =
  44                 ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_ARBITERS_STATUS);
  45
  46         /*
  47          * Get the values of the register-set per
  48          * ibuf-controller process.
  49          */
  50         for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) {
  51                 ibuf_ctrl_get_proc_state(
  52                                 ID,
  53                                 i,
  54                                 &(state->proc_state[i]));
  55         }
  56 }
  57
  58 /**
  59  * @brief Get the state of the ibuf-controller process.
  60  * Refer to "ibuf_ctrl_public.h" for details.
  61  */
  62 STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_proc_state(
  63                 const ibuf_ctrl_ID_t ID,
  64                 const uint32_t proc_id,
  65                 ibuf_ctrl_proc_state_t  *state)
  66 {
  67         hrt_address reg_bank_offset;
  68
  69         reg_bank_offset =
  70                 _IBUF_CNTRL_PROC_REG_ALIGN * (1 + proc_id);
  71
  72         state->num_items =
  73                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_ITEMS_PER_STORE);
  74
  75         state->num_stores =
  76                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_STORES_PER_FRAME);
  77
  78         state->dma_channel =
  79                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CHANNEL);
  80
  81         state->dma_command =
  82                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CMD);
  83
  84         state->ibuf_st_addr =
  85                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_START_ADDRESS);
  86
  87         state->ibuf_stride =
  88                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_STRIDE);
  89
  90         state->ibuf_end_addr =
  91                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_END_ADDRESS);
  92
  93         state->dest_st_addr =
  94                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_START_ADDRESS);
  95
  96         state->dest_stride =
  97                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_STRIDE);
  98
  99         state->dest_end_addr =
 100                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_END_ADDRESS);
 101
 102         state->sync_frame =
 103                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SYNC_FRAME);
 104
 105         state->sync_command =
 106                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_SYNC_CMD);
 107
 108         state->store_command =
 109                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_STORE_CMD);
 110
 111         state->shift_returned_items =
 112                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SHIFT_ITEMS);
 113
 114         state->elems_ibuf =
 115                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_IBUF);
 116
 117         state->elems_dest =
 118                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_DEST);
 119
 120         state->cur_stores =
 121                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_STORES);
 122
 123         state->cur_acks =
 124                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ACKS);
 125
 126         state->cur_s2m_ibuf_addr =
 127                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_S2M_IBUF_ADDR);
 128
 129         state->cur_dma_ibuf_addr =
 130                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_IBUF_ADDR);
 131
 132         state->cur_dma_dest_addr =
 133                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_DEST_ADDR);
 134
 135         state->cur_isp_dest_addr =
 136                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ISP_DEST_ADDR);
 137
 138         state->dma_cmds_send =
 139                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_NR_DMA_CMDS_SEND);
 140
 141         state->main_cntrl_state =
 142                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_MAIN_CNTRL_STATE);
 143
 144         state->dma_sync_state =
 145                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_SYNC_STATE);
 146
 147         state->isp_sync_state =
 148                 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ISP_SYNC_STATE);
 149 }
 150 /**
 151  * @brief Dump the ibuf-controller state.
 152  * Refer to "ibuf_ctrl_public.h" for details.
 153  */
 154 STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_dump_state(
 155                 const ibuf_ctrl_ID_t ID,
 156                 ibuf_ctrl_state_t *state)
 157 {
 158         uint32_t i;
 159         ia_css_print("IBUF controller ID %d recalculate words 0x%x\n", ID, state->recalc_words);
 160         ia_css_print("IBUF controller ID %d arbiters 0x%x\n", ID, state->arbiters);
 161
 162         /*
 163          * Dump the values of the register-set per
 164          * ibuf-controller process.
 165          */
 166         for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) {
 167                 ia_css_print("IBUF controller ID %d Process ID %d num_items 0x%x\n", ID, i, state->proc_state[i].num_items);
 168                 ia_css_print("IBUF controller ID %d Process ID %d num_stores 0x%x\n", ID, i, state->proc_state[i].num_stores);
 169                 ia_css_print("IBUF controller ID %d Process ID %d dma_channel 0x%x\n", ID, i, state->proc_state[i].dma_channel);
 170                 ia_css_print("IBUF controller ID %d Process ID %d dma_command 0x%x\n", ID, i, state->proc_state[i].dma_command);
 171                 ia_css_print("IBUF controller ID %d Process ID %d ibuf_st_addr 0x%x\n", ID, i, state->proc_state[i].ibuf_st_addr);
 172                 ia_css_print("IBUF controller ID %d Process ID %d ibuf_stride 0x%x\n", ID, i, state->proc_state[i].ibuf_stride);
 173                 ia_css_print("IBUF controller ID %d Process ID %d ibuf_end_addr 0x%x\n", ID, i, state->proc_state[i].ibuf_end_addr);
 174                 ia_css_print("IBUF controller ID %d Process ID %d dest_st_addr 0x%x\n", ID, i, state->proc_state[i].dest_st_addr);
 175                 ia_css_print("IBUF controller ID %d Process ID %d dest_stride 0x%x\n", ID, i, state->proc_state[i].dest_stride);
 176                 ia_css_print("IBUF controller ID %d Process ID %d dest_end_addr 0x%x\n", ID, i, state->proc_state[i].dest_end_addr);
 177                 ia_css_print("IBUF controller ID %d Process ID %d sync_frame 0x%x\n", ID, i, state->proc_state[i].sync_frame);
 178                 ia_css_print("IBUF controller ID %d Process ID %d sync_command 0x%x\n", ID, i, state->proc_state[i].sync_command);
 179                 ia_css_print("IBUF controller ID %d Process ID %d store_command 0x%x\n", ID, i, state->proc_state[i].store_command);
 180                 ia_css_print("IBUF controller ID %d Process ID %d shift_returned_items 0x%x\n", ID, i, state->proc_state[i].shift_returned_items);
 181                 ia_css_print("IBUF controller ID %d Process ID %d elems_ibuf 0x%x\n", ID, i, state->proc_state[i].elems_ibuf);
 182                 ia_css_print("IBUF controller ID %d Process ID %d elems_dest 0x%x\n", ID, i, state->proc_state[i].elems_dest);
 183                 ia_css_print("IBUF controller ID %d Process ID %d cur_stores 0x%x\n", ID, i, state->proc_state[i].cur_stores);
 184                 ia_css_print("IBUF controller ID %d Process ID %d cur_acks 0x%x\n", ID, i, state->proc_state[i].cur_acks);
 185                 ia_css_print("IBUF controller ID %d Process ID %d cur_s2m_ibuf_addr 0x%x\n", ID, i, state->proc_state[i].cur_s2m_ibuf_addr);
 186                 ia_css_print("IBUF controller ID %d Process ID %d cur_dma_ibuf_addr 0x%x\n", ID, i, state->proc_state[i].cur_dma_ibuf_addr);
 187                 ia_css_print("IBUF controller ID %d Process ID %d cur_dma_dest_addr 0x%x\n", ID, i, state->proc_state[i].cur_dma_dest_addr);
 188                 ia_css_print("IBUF controller ID %d Process ID %d cur_isp_dest_addr 0x%x\n", ID, i, state->proc_state[i].cur_isp_dest_addr);
 189                 ia_css_print("IBUF controller ID %d Process ID %d dma_cmds_send 0x%x\n", ID, i, state->proc_state[i].dma_cmds_send);
 190                 ia_css_print("IBUF controller ID %d Process ID %d main_cntrl_state 0x%x\n", ID, i, state->proc_state[i].main_cntrl_state);
 191                 ia_css_print("IBUF controller ID %d Process ID %d dma_sync_state 0x%x\n", ID, i, state->proc_state[i].dma_sync_state);
 192                 ia_css_print("IBUF controller ID %d Process ID %d isp_sync_state 0x%x\n", ID, i, state->proc_state[i].isp_sync_state);
 193         }
 194 }
 195 /* end of NCI */
 196
 197 /*****************************************************
 198  *
 199  * Device level interface (DLI).
 200  *
 201  *****************************************************/
 202 /**
 203  * @brief Load the register value.
 204  * Refer to "ibuf_ctrl_public.h" for details.
 205  */
 206 STORAGE_CLASS_IBUF_CTRL_C hrt_data ibuf_ctrl_reg_load(
 207         const ibuf_ctrl_ID_t ID,
 208         const hrt_address reg)
 209 {
 210         assert(ID < N_IBUF_CTRL_ID);
 211         assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1);
 212         return ia_css_device_load_uint32(IBUF_CTRL_BASE[ID] + reg*sizeof(hrt_data));
 213 }
 214
 215
 216 /**
 217  * @brief Store a value to the register.
 218  * Refer to "ibuf_ctrl_public.h" for details.
 219  */
 220 STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_reg_store(
 221         const ibuf_ctrl_ID_t ID,
 222         const hrt_address reg,
 223         const hrt_data value)
 224 {
 225         assert(ID < N_IBUF_CTRL_ID);
 226         assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1);
 227
 228         ia_css_device_store_uint32(IBUF_CTRL_BASE[ID] + reg*sizeof(hrt_data), value);
 229 }
 230 /* end of DLI */
 231
 232
 233 #endif /* __IBUF_CTRL_PRIVATE_H_INCLUDED__ */